File:  [Qemu by Fabrice Bellard] / qemu / rwhandler.c
Revision 1.1.1.2 (vendor branch): download - view: text, annotated - select for diffs
Tue Apr 24 18:33:21 2018 UTC (23 months, 2 weeks ago) by root
Branches: qemu, MAIN
CVS tags: qemu1000, qemu0151, qemu0150, qemu0141, qemu0140, HEAD
qemu 0.14.0

    1: #include "rwhandler.h"
    2: #include "ioport.h"
    3: #include "cpu-all.h"
    4: 
    5: #define RWHANDLER_WRITE(name, len, type) \
    6: static void name(void *opaque, type addr, uint32_t value) \
    7: {\
    8:     struct ReadWriteHandler *handler = opaque;\
    9:     handler->write(handler, addr, value, len);\
   10: }
   11: 
   12: #define RWHANDLER_READ(name, len, type) \
   13: static uint32_t name(void *opaque, type addr) \
   14: { \
   15:     struct ReadWriteHandler *handler = opaque; \
   16:     return handler->read(handler, addr, len); \
   17: }
   18: 
   19: RWHANDLER_WRITE(cpu_io_memory_simple_writeb, 1, target_phys_addr_t);
   20: RWHANDLER_READ(cpu_io_memory_simple_readb, 1, target_phys_addr_t);
   21: RWHANDLER_WRITE(cpu_io_memory_simple_writew, 2, target_phys_addr_t);
   22: RWHANDLER_READ(cpu_io_memory_simple_readw, 2, target_phys_addr_t);
   23: RWHANDLER_WRITE(cpu_io_memory_simple_writel, 4, target_phys_addr_t);
   24: RWHANDLER_READ(cpu_io_memory_simple_readl, 4, target_phys_addr_t);
   25: 
   26: static CPUWriteMemoryFunc * const cpu_io_memory_simple_write[] = {
   27:     &cpu_io_memory_simple_writeb,
   28:     &cpu_io_memory_simple_writew,
   29:     &cpu_io_memory_simple_writel,
   30: };
   31: 
   32: static CPUReadMemoryFunc * const cpu_io_memory_simple_read[] = {
   33:     &cpu_io_memory_simple_readb,
   34:     &cpu_io_memory_simple_readw,
   35:     &cpu_io_memory_simple_readl,
   36: };
   37: 
   38: int cpu_register_io_memory_simple(struct ReadWriteHandler *handler, int endian)
   39: {
   40:     if (!handler->read || !handler->write) {
   41:         return -1;
   42:     }
   43:     return cpu_register_io_memory(cpu_io_memory_simple_read,
   44:                                   cpu_io_memory_simple_write,
   45:                                   handler, endian);
   46: }
   47: 
   48: RWHANDLER_WRITE(ioport_simple_writeb, 1, uint32_t);
   49: RWHANDLER_READ(ioport_simple_readb, 1, uint32_t);
   50: RWHANDLER_WRITE(ioport_simple_writew, 2, uint32_t);
   51: RWHANDLER_READ(ioport_simple_readw, 2, uint32_t);
   52: RWHANDLER_WRITE(ioport_simple_writel, 4, uint32_t);
   53: RWHANDLER_READ(ioport_simple_readl, 4, uint32_t);
   54: 
   55: int register_ioport_simple(ReadWriteHandler* handler,
   56:                            pio_addr_t start, int length, int size)
   57: {
   58:     IOPortWriteFunc *write;
   59:     IOPortReadFunc *read;
   60:     int r;
   61:     switch (size) {
   62:     case 1:
   63:         write = ioport_simple_writeb;
   64:         read = ioport_simple_readb;
   65:         break;
   66:     case 2:
   67:         write = ioport_simple_writew;
   68:         read = ioport_simple_readw;
   69:         break;
   70:     default:
   71:         write = ioport_simple_writel;
   72:         read = ioport_simple_readl;
   73:     }
   74:     if (handler->write) {
   75:         r = register_ioport_write(start, length, size, write, handler);
   76:         if (r < 0) {
   77:             return r;
   78:         }
   79:     }
   80:     if (handler->read) {
   81:         r = register_ioport_read(start, length, size, read, handler);
   82:         if (r < 0) {
   83:             return r;
   84:         }
   85:     }
   86:     return 0;
   87: }

unix.superglobalmegacorp.com