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1.1 root 1: /*
2: * CRIS helper routines.
3: *
4: * Copyright (c) 2007 AXIS Communications AB
5: * Written by Edgar E. Iglesias.
6: *
7: * This library is free software; you can redistribute it and/or
8: * modify it under the terms of the GNU Lesser General Public
9: * License as published by the Free Software Foundation; either
10: * version 2 of the License, or (at your option) any later version.
11: *
12: * This library is distributed in the hope that it will be useful,
13: * but WITHOUT ANY WARRANTY; without even the implied warranty of
14: * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
15: * Lesser General Public License for more details.
16: *
17: * You should have received a copy of the GNU Lesser General Public
1.1.1.3 root 18: * License along with this library; if not, see <http://www.gnu.org/licenses/>.
1.1 root 19: */
20:
21: #include <stdio.h>
22: #include <string.h>
23:
24: #include "config.h"
25: #include "cpu.h"
26: #include "mmu.h"
27: #include "exec-all.h"
28: #include "host-utils.h"
29:
1.1.1.2 root 30:
31: //#define CRIS_HELPER_DEBUG
32:
33:
34: #ifdef CRIS_HELPER_DEBUG
35: #define D(x) x
36: #define D_LOG(...) qemu_log(__VA__ARGS__)
37: #else
38: #define D(x)
39: #define D_LOG(...) do { } while (0)
40: #endif
41:
1.1 root 42: #if defined(CONFIG_USER_ONLY)
43:
44: void do_interrupt (CPUState *env)
45: {
1.1.1.2 root 46: env->exception_index = -1;
47: env->pregs[PR_ERP] = env->pc;
1.1 root 48: }
49:
50: int cpu_cris_handle_mmu_fault(CPUState * env, target_ulong address, int rw,
51: int mmu_idx, int is_softmmu)
52: {
1.1.1.2 root 53: env->exception_index = 0xaa;
54: env->pregs[PR_EDA] = address;
55: cpu_dump_state(env, stderr, fprintf, 0);
56: return 1;
1.1 root 57: }
58:
59: target_phys_addr_t cpu_get_phys_page_debug(CPUState * env, target_ulong addr)
60: {
1.1.1.2 root 61: return addr;
1.1 root 62: }
63:
64: #else /* !CONFIG_USER_ONLY */
65:
1.1.1.2 root 66:
67: static void cris_shift_ccs(CPUState *env)
68: {
69: uint32_t ccs;
70: /* Apply the ccs shift. */
71: ccs = env->pregs[PR_CCS];
72: ccs = ((ccs & 0xc0000000) | ((ccs << 12) >> 2)) & ~0x3ff;
73: env->pregs[PR_CCS] = ccs;
74: }
75:
1.1 root 76: int cpu_cris_handle_mmu_fault (CPUState *env, target_ulong address, int rw,
77: int mmu_idx, int is_softmmu)
78: {
1.1.1.3 root 79: struct cris_mmu_result res;
1.1 root 80: int prot, miss;
1.1.1.2 root 81: int r = -1;
1.1 root 82: target_ulong phy;
83:
1.1.1.2 root 84: D(printf ("%s addr=%x pc=%x rw=%x\n", __func__, address, env->pc, rw));
1.1.1.4 ! root 85: miss = cris_mmu_translate(&res, env, address & TARGET_PAGE_MASK,
! 86: rw, mmu_idx);
1.1 root 87: if (miss)
88: {
1.1.1.2 root 89: if (env->exception_index == EXCP_BUSFAULT)
90: cpu_abort(env,
91: "CRIS: Illegal recursive bus fault."
92: "addr=%x rw=%d\n",
93: address, rw);
94:
1.1.1.4 ! root 95: env->pregs[PR_EDA] = address;
1.1.1.2 root 96: env->exception_index = EXCP_BUSFAULT;
97: env->fault_vector = res.bf_vec;
98: r = 1;
1.1 root 99: }
100: else
101: {
1.1.1.2 root 102: /*
103: * Mask off the cache selection bit. The ETRAX busses do not
104: * see the top bit.
105: */
106: phy = res.phy & ~0x80000000;
107: prot = res.prot;
1.1.1.4 ! root 108: r = tlb_set_page(env, address & TARGET_PAGE_MASK,
! 109: phy, prot, mmu_idx, is_softmmu);
1.1 root 110: }
1.1.1.2 root 111: if (r > 0)
112: D_LOG("%s returns %d irqreq=%x addr=%x"
113: " phy=%x ismmu=%d vec=%x pc=%x\n",
114: __func__, r, env->interrupt_request,
115: address, res.phy, is_softmmu, res.bf_vec, env->pc);
116: return r;
1.1 root 117: }
118:
119: void do_interrupt(CPUState *env)
120: {
1.1.1.2 root 121: int ex_vec = -1;
1.1 root 122:
1.1.1.2 root 123: D_LOG( "exception index=%d interrupt_req=%d\n",
124: env->exception_index,
125: env->interrupt_request);
1.1 root 126:
127: switch (env->exception_index)
128: {
129: case EXCP_BREAK:
1.1.1.2 root 130: /* These exceptions are genereated by the core itself.
131: ERP should point to the insn following the brk. */
132: ex_vec = env->trap_vector;
133: env->pregs[PR_ERP] = env->pc;
134: break;
1.1 root 135:
1.1.1.2 root 136: case EXCP_NMI:
137: /* NMI is hardwired to vector zero. */
138: ex_vec = 0;
139: env->pregs[PR_CCS] &= ~M_FLAG;
140: env->pregs[PR_NRP] = env->pc;
1.1 root 141: break;
1.1.1.2 root 142:
143: case EXCP_BUSFAULT:
144: ex_vec = env->fault_vector;
145: env->pregs[PR_ERP] = env->pc;
1.1 root 146: break;
147:
148: default:
1.1.1.2 root 149: /* The interrupt controller gives us the vector. */
150: ex_vec = env->interrupt_vector;
151: /* Normal interrupts are taken between
152: TB's. env->pc is valid here. */
153: env->pregs[PR_ERP] = env->pc;
154: break;
155: }
1.1 root 156:
1.1.1.2 root 157: /* Fill in the IDX field. */
158: env->pregs[PR_EXS] = (ex_vec & 0xff) << 8;
159:
160: if (env->dslot) {
161: D_LOG("excp isr=%x PC=%x ds=%d SP=%x"
162: " ERP=%x pid=%x ccs=%x cc=%d %x\n",
163: ex_vec, env->pc, env->dslot,
164: env->regs[R_SP],
165: env->pregs[PR_ERP], env->pregs[PR_PID],
166: env->pregs[PR_CCS],
167: env->cc_op, env->cc_mask);
168: /* We loose the btarget, btaken state here so rexec the
169: branch. */
170: env->pregs[PR_ERP] -= env->dslot;
171: /* Exception starts with dslot cleared. */
172: env->dslot = 0;
173: }
174:
175: if (env->pregs[PR_CCS] & U_FLAG) {
176: /* Swap stack pointers. */
177: env->pregs[PR_USP] = env->regs[R_SP];
178: env->regs[R_SP] = env->ksp;
1.1 root 179: }
1.1.1.2 root 180:
181: /* Apply the CRIS CCS shift. Clears U if set. */
182: cris_shift_ccs(env);
1.1.1.4 ! root 183:
! 184: /* Now that we are in kernel mode, load the handlers address. */
! 185: env->pc = ldl_code(env->pregs[PR_EBP] + ex_vec * 4);
! 186:
1.1.1.2 root 187: D_LOG("%s isr=%x vec=%x ccs=%x pid=%d erp=%x\n",
188: __func__, env->pc, ex_vec,
189: env->pregs[PR_CCS],
190: env->pregs[PR_PID],
191: env->pregs[PR_ERP]);
1.1 root 192: }
193:
194: target_phys_addr_t cpu_get_phys_page_debug(CPUState * env, target_ulong addr)
195: {
196: uint32_t phy = addr;
1.1.1.3 root 197: struct cris_mmu_result res;
1.1 root 198: int miss;
199: miss = cris_mmu_translate(&res, env, addr, 0, 0);
200: if (!miss)
201: phy = res.phy;
1.1.1.2 root 202: D(fprintf(stderr, "%s %x -> %x\n", __func__, addr, phy));
1.1 root 203: return phy;
204: }
205: #endif
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