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1.1 root 1: /*
2: * i386 CPUID helper functions
3: *
4: * Copyright (c) 2003 Fabrice Bellard
5: *
6: * This library is free software; you can redistribute it and/or
7: * modify it under the terms of the GNU Lesser General Public
8: * License as published by the Free Software Foundation; either
9: * version 2 of the License, or (at your option) any later version.
10: *
11: * This library is distributed in the hope that it will be useful,
12: * but WITHOUT ANY WARRANTY; without even the implied warranty of
13: * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14: * Lesser General Public License for more details.
15: *
16: * You should have received a copy of the GNU Lesser General Public
17: * License along with this library; if not, see <http://www.gnu.org/licenses/>.
18: */
19: #include <stdlib.h>
20: #include <stdio.h>
21: #include <string.h>
22: #include <inttypes.h>
23:
24: #include "cpu.h"
25: #include "kvm.h"
26:
27: #include "qemu-option.h"
28: #include "qemu-config.h"
29:
30: /* feature flags taken from "Intel Processor Identification and the CPUID
31: * Instruction" and AMD's "CPUID Specification". In cases of disagreement
32: * between feature naming conventions, aliases may be added.
33: */
34: static const char *feature_name[] = {
35: "fpu", "vme", "de", "pse",
36: "tsc", "msr", "pae", "mce",
37: "cx8", "apic", NULL, "sep",
38: "mtrr", "pge", "mca", "cmov",
39: "pat", "pse36", "pn" /* Intel psn */, "clflush" /* Intel clfsh */,
40: NULL, "ds" /* Intel dts */, "acpi", "mmx",
41: "fxsr", "sse", "sse2", "ss",
42: "ht" /* Intel htt */, "tm", "ia64", "pbe",
43: };
44: static const char *ext_feature_name[] = {
45: "pni|sse3" /* Intel,AMD sse3 */, "pclmuldq", "dtes64", "monitor",
46: "ds_cpl", "vmx", "smx", "est",
47: "tm2", "ssse3", "cid", NULL,
48: "fma", "cx16", "xtpr", "pdcm",
49: NULL, NULL, "dca", "sse4.1|sse4_1",
50: "sse4.2|sse4_2", "x2apic", "movbe", "popcnt",
51: NULL, "aes", "xsave", "osxsave",
52: "avx", NULL, NULL, "hypervisor",
53: };
54: static const char *ext2_feature_name[] = {
55: "fpu", "vme", "de", "pse",
56: "tsc", "msr", "pae", "mce",
57: "cx8" /* AMD CMPXCHG8B */, "apic", NULL, "syscall",
58: "mtrr", "pge", "mca", "cmov",
59: "pat", "pse36", NULL, NULL /* Linux mp */,
60: "nx" /* Intel xd */, NULL, "mmxext", "mmx",
61: "fxsr", "fxsr_opt" /* AMD ffxsr */, "pdpe1gb" /* AMD Page1GB */, "rdtscp",
62: NULL, "lm" /* Intel 64 */, "3dnowext", "3dnow",
63: };
64: static const char *ext3_feature_name[] = {
65: "lahf_lm" /* AMD LahfSahf */, "cmp_legacy", "svm", "extapic" /* AMD ExtApicSpace */,
66: "cr8legacy" /* AMD AltMovCr8 */, "abm", "sse4a", "misalignsse",
67: "3dnowprefetch", "osvw", "ibs", "xop",
68: "skinit", "wdt", NULL, NULL,
69: "fma4", NULL, "cvt16", "nodeid_msr",
70: NULL, NULL, NULL, NULL,
71: NULL, NULL, NULL, NULL,
72: NULL, NULL, NULL, NULL,
73: };
74:
75: static const char *kvm_feature_name[] = {
1.1.1.3 ! root 76: "kvmclock", "kvm_nopiodelay", "kvm_mmu", "kvmclock", "kvm_asyncpf", NULL, NULL, NULL,
1.1 root 77: NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
78: NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
79: NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
80: };
81:
1.1.1.2 root 82: static const char *svm_feature_name[] = {
83: "npt", "lbrv", "svm_lock", "nrip_save",
84: "tsc_scale", "vmcb_clean", "flushbyasid", "decodeassists",
85: NULL, NULL, "pause_filter", NULL,
86: "pfthreshold", NULL, NULL, NULL,
87: NULL, NULL, NULL, NULL,
88: NULL, NULL, NULL, NULL,
89: NULL, NULL, NULL, NULL,
90: NULL, NULL, NULL, NULL,
91: };
92:
1.1 root 93: /* collects per-function cpuid data
94: */
95: typedef struct model_features_t {
96: uint32_t *guest_feat;
97: uint32_t *host_feat;
98: uint32_t check_feat;
99: const char **flag_names;
100: uint32_t cpuid;
101: } model_features_t;
102:
103: int check_cpuid = 0;
104: int enforce_cpuid = 0;
105:
1.1.1.2 root 106: void host_cpuid(uint32_t function, uint32_t count,
107: uint32_t *eax, uint32_t *ebx, uint32_t *ecx, uint32_t *edx)
1.1 root 108: {
109: #if defined(CONFIG_KVM)
110: uint32_t vec[4];
111:
112: #ifdef __x86_64__
113: asm volatile("cpuid"
114: : "=a"(vec[0]), "=b"(vec[1]),
115: "=c"(vec[2]), "=d"(vec[3])
116: : "0"(function), "c"(count) : "cc");
117: #else
118: asm volatile("pusha \n\t"
119: "cpuid \n\t"
120: "mov %%eax, 0(%2) \n\t"
121: "mov %%ebx, 4(%2) \n\t"
122: "mov %%ecx, 8(%2) \n\t"
123: "mov %%edx, 12(%2) \n\t"
124: "popa"
125: : : "a"(function), "c"(count), "S"(vec)
126: : "memory", "cc");
127: #endif
128:
129: if (eax)
130: *eax = vec[0];
131: if (ebx)
132: *ebx = vec[1];
133: if (ecx)
134: *ecx = vec[2];
135: if (edx)
136: *edx = vec[3];
137: #endif
138: }
139:
140: #define iswhite(c) ((c) && ((c) <= ' ' || '~' < (c)))
141:
142: /* general substring compare of *[s1..e1) and *[s2..e2). sx is start of
143: * a substring. ex if !NULL points to the first char after a substring,
144: * otherwise the string is assumed to sized by a terminating nul.
145: * Return lexical ordering of *s1:*s2.
146: */
147: static int sstrcmp(const char *s1, const char *e1, const char *s2,
148: const char *e2)
149: {
150: for (;;) {
151: if (!*s1 || !*s2 || *s1 != *s2)
152: return (*s1 - *s2);
153: ++s1, ++s2;
154: if (s1 == e1 && s2 == e2)
155: return (0);
156: else if (s1 == e1)
157: return (*s2);
158: else if (s2 == e2)
159: return (*s1);
160: }
161: }
162:
163: /* compare *[s..e) to *altstr. *altstr may be a simple string or multiple
164: * '|' delimited (possibly empty) strings in which case search for a match
165: * within the alternatives proceeds left to right. Return 0 for success,
166: * non-zero otherwise.
167: */
168: static int altcmp(const char *s, const char *e, const char *altstr)
169: {
170: const char *p, *q;
171:
172: for (q = p = altstr; ; ) {
173: while (*p && *p != '|')
174: ++p;
175: if ((q == p && !*s) || (q != p && !sstrcmp(s, e, q, p)))
176: return (0);
177: if (!*p)
178: return (1);
179: else
180: q = ++p;
181: }
182: }
183:
184: /* search featureset for flag *[s..e), if found set corresponding bit in
1.1.1.3 ! root 185: * *pval and return true, otherwise return false
1.1 root 186: */
1.1.1.3 ! root 187: static bool lookup_feature(uint32_t *pval, const char *s, const char *e,
! 188: const char **featureset)
1.1 root 189: {
190: uint32_t mask;
191: const char **ppc;
1.1.1.3 ! root 192: bool found = false;
1.1 root 193:
1.1.1.3 ! root 194: for (mask = 1, ppc = featureset; mask; mask <<= 1, ++ppc) {
1.1 root 195: if (*ppc && !altcmp(s, e, *ppc)) {
196: *pval |= mask;
1.1.1.3 ! root 197: found = true;
1.1 root 198: }
1.1.1.3 ! root 199: }
! 200: return found;
1.1 root 201: }
202:
203: static void add_flagname_to_bitmaps(const char *flagname, uint32_t *features,
204: uint32_t *ext_features,
205: uint32_t *ext2_features,
206: uint32_t *ext3_features,
1.1.1.2 root 207: uint32_t *kvm_features,
208: uint32_t *svm_features)
1.1 root 209: {
210: if (!lookup_feature(features, flagname, NULL, feature_name) &&
211: !lookup_feature(ext_features, flagname, NULL, ext_feature_name) &&
212: !lookup_feature(ext2_features, flagname, NULL, ext2_feature_name) &&
213: !lookup_feature(ext3_features, flagname, NULL, ext3_feature_name) &&
1.1.1.2 root 214: !lookup_feature(kvm_features, flagname, NULL, kvm_feature_name) &&
215: !lookup_feature(svm_features, flagname, NULL, svm_feature_name))
1.1 root 216: fprintf(stderr, "CPU feature %s not found\n", flagname);
217: }
218:
219: typedef struct x86_def_t {
220: struct x86_def_t *next;
221: const char *name;
222: uint32_t level;
223: uint32_t vendor1, vendor2, vendor3;
224: int family;
225: int model;
226: int stepping;
1.1.1.2 root 227: uint32_t features, ext_features, ext2_features, ext3_features;
228: uint32_t kvm_features, svm_features;
1.1 root 229: uint32_t xlevel;
230: char model_id[48];
231: int vendor_override;
232: uint32_t flags;
1.1.1.3 ! root 233: /* Store the results of Centaur's CPUID instructions */
! 234: uint32_t ext4_features;
! 235: uint32_t xlevel2;
1.1 root 236: } x86_def_t;
237:
238: #define I486_FEATURES (CPUID_FP87 | CPUID_VME | CPUID_PSE)
239: #define PENTIUM_FEATURES (I486_FEATURES | CPUID_DE | CPUID_TSC | \
240: CPUID_MSR | CPUID_MCE | CPUID_CX8 | CPUID_MMX | CPUID_APIC)
241: #define PENTIUM2_FEATURES (PENTIUM_FEATURES | CPUID_PAE | CPUID_SEP | \
242: CPUID_MTRR | CPUID_PGE | CPUID_MCA | CPUID_CMOV | CPUID_PAT | \
243: CPUID_PSE36 | CPUID_FXSR)
244: #define PENTIUM3_FEATURES (PENTIUM2_FEATURES | CPUID_SSE)
245: #define PPRO_FEATURES (CPUID_FP87 | CPUID_DE | CPUID_PSE | CPUID_TSC | \
246: CPUID_MSR | CPUID_MCE | CPUID_CX8 | CPUID_PGE | CPUID_CMOV | \
247: CPUID_PAT | CPUID_FXSR | CPUID_MMX | CPUID_SSE | CPUID_SSE2 | \
248: CPUID_PAE | CPUID_SEP | CPUID_APIC)
249: #define EXT2_FEATURE_MASK 0x0183F3FF
250:
251: #define TCG_FEATURES (CPUID_FP87 | CPUID_PSE | CPUID_TSC | CPUID_MSR | \
252: CPUID_PAE | CPUID_MCE | CPUID_CX8 | CPUID_APIC | CPUID_SEP | \
253: CPUID_MTRR | CPUID_PGE | CPUID_MCA | CPUID_CMOV | CPUID_PAT | \
254: CPUID_PSE36 | CPUID_CLFLUSH | CPUID_ACPI | CPUID_MMX | \
255: CPUID_FXSR | CPUID_SSE | CPUID_SSE2 | CPUID_SS)
256: /* partly implemented:
257: CPUID_MTRR, CPUID_MCA, CPUID_CLFLUSH (needed for Win64)
258: CPUID_PSE36 (needed for Solaris) */
259: /* missing:
260: CPUID_VME, CPUID_DTS, CPUID_SS, CPUID_HT, CPUID_TM, CPUID_PBE */
261: #define TCG_EXT_FEATURES (CPUID_EXT_SSE3 | CPUID_EXT_MONITOR | \
262: CPUID_EXT_CX16 | CPUID_EXT_POPCNT | \
263: CPUID_EXT_HYPERVISOR)
264: /* missing:
265: CPUID_EXT_DTES64, CPUID_EXT_DSCPL, CPUID_EXT_VMX, CPUID_EXT_EST,
266: CPUID_EXT_TM2, CPUID_EXT_XTPR, CPUID_EXT_PDCM, CPUID_EXT_XSAVE */
267: #define TCG_EXT2_FEATURES ((TCG_FEATURES & EXT2_FEATURE_MASK) | \
268: CPUID_EXT2_NX | CPUID_EXT2_MMXEXT | CPUID_EXT2_RDTSCP | \
269: CPUID_EXT2_3DNOW | CPUID_EXT2_3DNOWEXT)
270: /* missing:
271: CPUID_EXT2_PDPE1GB */
272: #define TCG_EXT3_FEATURES (CPUID_EXT3_LAHF_LM | CPUID_EXT3_SVM | \
273: CPUID_EXT3_CR8LEG | CPUID_EXT3_ABM | CPUID_EXT3_SSE4A)
1.1.1.2 root 274: #define TCG_SVM_FEATURES 0
1.1 root 275:
276: /* maintains list of cpu model definitions
277: */
278: static x86_def_t *x86_defs = {NULL};
279:
280: /* built-in cpu model definitions (deprecated)
281: */
282: static x86_def_t builtin_x86_defs[] = {
283: {
284: .name = "qemu64",
285: .level = 4,
286: .vendor1 = CPUID_VENDOR_AMD_1,
287: .vendor2 = CPUID_VENDOR_AMD_2,
288: .vendor3 = CPUID_VENDOR_AMD_3,
289: .family = 6,
290: .model = 2,
291: .stepping = 3,
292: .features = PPRO_FEATURES |
293: CPUID_MTRR | CPUID_CLFLUSH | CPUID_MCA |
294: CPUID_PSE36,
295: .ext_features = CPUID_EXT_SSE3 | CPUID_EXT_CX16 | CPUID_EXT_POPCNT,
296: .ext2_features = (PPRO_FEATURES & EXT2_FEATURE_MASK) |
297: CPUID_EXT2_LM | CPUID_EXT2_SYSCALL | CPUID_EXT2_NX,
298: .ext3_features = CPUID_EXT3_LAHF_LM | CPUID_EXT3_SVM |
299: CPUID_EXT3_ABM | CPUID_EXT3_SSE4A,
300: .xlevel = 0x8000000A,
301: .model_id = "QEMU Virtual CPU version " QEMU_VERSION,
302: },
303: {
304: .name = "phenom",
305: .level = 5,
306: .vendor1 = CPUID_VENDOR_AMD_1,
307: .vendor2 = CPUID_VENDOR_AMD_2,
308: .vendor3 = CPUID_VENDOR_AMD_3,
309: .family = 16,
310: .model = 2,
311: .stepping = 3,
312: .features = PPRO_FEATURES |
313: CPUID_MTRR | CPUID_CLFLUSH | CPUID_MCA |
314: CPUID_PSE36 | CPUID_VME | CPUID_HT,
315: .ext_features = CPUID_EXT_SSE3 | CPUID_EXT_MONITOR | CPUID_EXT_CX16 |
316: CPUID_EXT_POPCNT,
317: .ext2_features = (PPRO_FEATURES & EXT2_FEATURE_MASK) |
318: CPUID_EXT2_LM | CPUID_EXT2_SYSCALL | CPUID_EXT2_NX |
319: CPUID_EXT2_3DNOW | CPUID_EXT2_3DNOWEXT | CPUID_EXT2_MMXEXT |
320: CPUID_EXT2_FFXSR | CPUID_EXT2_PDPE1GB | CPUID_EXT2_RDTSCP,
321: /* Missing: CPUID_EXT3_CMP_LEG, CPUID_EXT3_EXTAPIC,
322: CPUID_EXT3_CR8LEG,
323: CPUID_EXT3_MISALIGNSSE, CPUID_EXT3_3DNOWPREFETCH,
324: CPUID_EXT3_OSVW, CPUID_EXT3_IBS */
325: .ext3_features = CPUID_EXT3_LAHF_LM | CPUID_EXT3_SVM |
326: CPUID_EXT3_ABM | CPUID_EXT3_SSE4A,
1.1.1.2 root 327: .svm_features = CPUID_SVM_NPT | CPUID_SVM_LBRV,
1.1 root 328: .xlevel = 0x8000001A,
329: .model_id = "AMD Phenom(tm) 9550 Quad-Core Processor"
330: },
331: {
332: .name = "core2duo",
333: .level = 10,
334: .family = 6,
335: .model = 15,
336: .stepping = 11,
337: .features = PPRO_FEATURES |
338: CPUID_MTRR | CPUID_CLFLUSH | CPUID_MCA |
339: CPUID_PSE36 | CPUID_VME | CPUID_DTS | CPUID_ACPI | CPUID_SS |
340: CPUID_HT | CPUID_TM | CPUID_PBE,
341: .ext_features = CPUID_EXT_SSE3 | CPUID_EXT_MONITOR | CPUID_EXT_SSSE3 |
342: CPUID_EXT_DTES64 | CPUID_EXT_DSCPL | CPUID_EXT_VMX | CPUID_EXT_EST |
343: CPUID_EXT_TM2 | CPUID_EXT_CX16 | CPUID_EXT_XTPR | CPUID_EXT_PDCM,
344: .ext2_features = CPUID_EXT2_LM | CPUID_EXT2_SYSCALL | CPUID_EXT2_NX,
345: .ext3_features = CPUID_EXT3_LAHF_LM,
346: .xlevel = 0x80000008,
347: .model_id = "Intel(R) Core(TM)2 Duo CPU T7700 @ 2.40GHz",
348: },
349: {
350: .name = "kvm64",
351: .level = 5,
352: .vendor1 = CPUID_VENDOR_INTEL_1,
353: .vendor2 = CPUID_VENDOR_INTEL_2,
354: .vendor3 = CPUID_VENDOR_INTEL_3,
355: .family = 15,
356: .model = 6,
357: .stepping = 1,
358: /* Missing: CPUID_VME, CPUID_HT */
359: .features = PPRO_FEATURES |
360: CPUID_MTRR | CPUID_CLFLUSH | CPUID_MCA |
361: CPUID_PSE36,
362: /* Missing: CPUID_EXT_POPCNT, CPUID_EXT_MONITOR */
363: .ext_features = CPUID_EXT_SSE3 | CPUID_EXT_CX16,
364: /* Missing: CPUID_EXT2_PDPE1GB, CPUID_EXT2_RDTSCP */
365: .ext2_features = (PPRO_FEATURES & EXT2_FEATURE_MASK) |
366: CPUID_EXT2_LM | CPUID_EXT2_SYSCALL | CPUID_EXT2_NX,
367: /* Missing: CPUID_EXT3_LAHF_LM, CPUID_EXT3_CMP_LEG, CPUID_EXT3_EXTAPIC,
368: CPUID_EXT3_CR8LEG, CPUID_EXT3_ABM, CPUID_EXT3_SSE4A,
369: CPUID_EXT3_MISALIGNSSE, CPUID_EXT3_3DNOWPREFETCH,
370: CPUID_EXT3_OSVW, CPUID_EXT3_IBS, CPUID_EXT3_SVM */
371: .ext3_features = 0,
372: .xlevel = 0x80000008,
373: .model_id = "Common KVM processor"
374: },
375: {
376: .name = "qemu32",
377: .level = 4,
378: .family = 6,
379: .model = 3,
380: .stepping = 3,
381: .features = PPRO_FEATURES,
382: .ext_features = CPUID_EXT_SSE3 | CPUID_EXT_POPCNT,
383: .xlevel = 0x80000004,
384: .model_id = "QEMU Virtual CPU version " QEMU_VERSION,
385: },
386: {
387: .name = "kvm32",
388: .level = 5,
389: .family = 15,
390: .model = 6,
391: .stepping = 1,
392: .features = PPRO_FEATURES |
393: CPUID_MTRR | CPUID_CLFLUSH | CPUID_MCA | CPUID_PSE36,
394: .ext_features = CPUID_EXT_SSE3,
395: .ext2_features = PPRO_FEATURES & EXT2_FEATURE_MASK,
396: .ext3_features = 0,
397: .xlevel = 0x80000008,
398: .model_id = "Common 32-bit KVM processor"
399: },
400: {
401: .name = "coreduo",
402: .level = 10,
403: .family = 6,
404: .model = 14,
405: .stepping = 8,
406: .features = PPRO_FEATURES | CPUID_VME |
407: CPUID_MTRR | CPUID_CLFLUSH | CPUID_MCA | CPUID_DTS | CPUID_ACPI |
408: CPUID_SS | CPUID_HT | CPUID_TM | CPUID_PBE,
409: .ext_features = CPUID_EXT_SSE3 | CPUID_EXT_MONITOR | CPUID_EXT_VMX |
410: CPUID_EXT_EST | CPUID_EXT_TM2 | CPUID_EXT_XTPR | CPUID_EXT_PDCM,
411: .ext2_features = CPUID_EXT2_NX,
412: .xlevel = 0x80000008,
413: .model_id = "Genuine Intel(R) CPU T2600 @ 2.16GHz",
414: },
415: {
416: .name = "486",
417: .level = 1,
418: .family = 4,
419: .model = 0,
420: .stepping = 0,
421: .features = I486_FEATURES,
422: .xlevel = 0,
423: },
424: {
425: .name = "pentium",
426: .level = 1,
427: .family = 5,
428: .model = 4,
429: .stepping = 3,
430: .features = PENTIUM_FEATURES,
431: .xlevel = 0,
432: },
433: {
434: .name = "pentium2",
435: .level = 2,
436: .family = 6,
437: .model = 5,
438: .stepping = 2,
439: .features = PENTIUM2_FEATURES,
440: .xlevel = 0,
441: },
442: {
443: .name = "pentium3",
444: .level = 2,
445: .family = 6,
446: .model = 7,
447: .stepping = 3,
448: .features = PENTIUM3_FEATURES,
449: .xlevel = 0,
450: },
451: {
452: .name = "athlon",
453: .level = 2,
454: .vendor1 = CPUID_VENDOR_AMD_1,
455: .vendor2 = CPUID_VENDOR_AMD_2,
456: .vendor3 = CPUID_VENDOR_AMD_3,
457: .family = 6,
458: .model = 2,
459: .stepping = 3,
460: .features = PPRO_FEATURES | CPUID_PSE36 | CPUID_VME | CPUID_MTRR | CPUID_MCA,
461: .ext2_features = (PPRO_FEATURES & EXT2_FEATURE_MASK) | CPUID_EXT2_MMXEXT | CPUID_EXT2_3DNOW | CPUID_EXT2_3DNOWEXT,
462: .xlevel = 0x80000008,
463: /* XXX: put another string ? */
464: .model_id = "QEMU Virtual CPU version " QEMU_VERSION,
465: },
466: {
467: .name = "n270",
468: /* original is on level 10 */
469: .level = 5,
470: .family = 6,
471: .model = 28,
472: .stepping = 2,
473: .features = PPRO_FEATURES |
474: CPUID_MTRR | CPUID_CLFLUSH | CPUID_MCA | CPUID_VME | CPUID_DTS |
475: CPUID_ACPI | CPUID_SS | CPUID_HT | CPUID_TM | CPUID_PBE,
476: /* Some CPUs got no CPUID_SEP */
477: .ext_features = CPUID_EXT_SSE3 | CPUID_EXT_MONITOR | CPUID_EXT_SSSE3 |
478: CPUID_EXT_DSCPL | CPUID_EXT_EST | CPUID_EXT_TM2 | CPUID_EXT_XTPR,
479: .ext2_features = (PPRO_FEATURES & EXT2_FEATURE_MASK) | CPUID_EXT2_NX,
480: .ext3_features = CPUID_EXT3_LAHF_LM,
481: .xlevel = 0x8000000A,
482: .model_id = "Intel(R) Atom(TM) CPU N270 @ 1.60GHz",
483: },
484: };
485:
486: static int cpu_x86_fill_model_id(char *str)
487: {
488: uint32_t eax = 0, ebx = 0, ecx = 0, edx = 0;
489: int i;
490:
491: for (i = 0; i < 3; i++) {
492: host_cpuid(0x80000002 + i, 0, &eax, &ebx, &ecx, &edx);
493: memcpy(str + i * 16 + 0, &eax, 4);
494: memcpy(str + i * 16 + 4, &ebx, 4);
495: memcpy(str + i * 16 + 8, &ecx, 4);
496: memcpy(str + i * 16 + 12, &edx, 4);
497: }
498: return 0;
499: }
500:
501: static int cpu_x86_fill_host(x86_def_t *x86_cpu_def)
502: {
503: uint32_t eax = 0, ebx = 0, ecx = 0, edx = 0;
504:
505: x86_cpu_def->name = "host";
506: host_cpuid(0x0, 0, &eax, &ebx, &ecx, &edx);
507: x86_cpu_def->level = eax;
508: x86_cpu_def->vendor1 = ebx;
509: x86_cpu_def->vendor2 = edx;
510: x86_cpu_def->vendor3 = ecx;
511:
512: host_cpuid(0x1, 0, &eax, &ebx, &ecx, &edx);
513: x86_cpu_def->family = ((eax >> 8) & 0x0F) + ((eax >> 20) & 0xFF);
514: x86_cpu_def->model = ((eax >> 4) & 0x0F) | ((eax & 0xF0000) >> 12);
515: x86_cpu_def->stepping = eax & 0x0F;
516: x86_cpu_def->ext_features = ecx;
517: x86_cpu_def->features = edx;
518:
519: host_cpuid(0x80000000, 0, &eax, &ebx, &ecx, &edx);
520: x86_cpu_def->xlevel = eax;
521:
522: host_cpuid(0x80000001, 0, &eax, &ebx, &ecx, &edx);
523: x86_cpu_def->ext2_features = edx;
524: x86_cpu_def->ext3_features = ecx;
525: cpu_x86_fill_model_id(x86_cpu_def->model_id);
526: x86_cpu_def->vendor_override = 0;
527:
1.1.1.3 ! root 528: /* Call Centaur's CPUID instruction. */
! 529: if (x86_cpu_def->vendor1 == CPUID_VENDOR_VIA_1 &&
! 530: x86_cpu_def->vendor2 == CPUID_VENDOR_VIA_2 &&
! 531: x86_cpu_def->vendor3 == CPUID_VENDOR_VIA_3) {
! 532: host_cpuid(0xC0000000, 0, &eax, &ebx, &ecx, &edx);
! 533: if (eax >= 0xC0000001) {
! 534: /* Support VIA max extended level */
! 535: x86_cpu_def->xlevel2 = eax;
! 536: host_cpuid(0xC0000001, 0, &eax, &ebx, &ecx, &edx);
! 537: x86_cpu_def->ext4_features = edx;
! 538: }
! 539: }
1.1.1.2 root 540:
541: /*
542: * Every SVM feature requires emulation support in KVM - so we can't just
543: * read the host features here. KVM might even support SVM features not
544: * available on the host hardware. Just set all bits and mask out the
545: * unsupported ones later.
546: */
547: x86_cpu_def->svm_features = -1;
548:
1.1 root 549: return 0;
550: }
551:
552: static int unavailable_host_feature(struct model_features_t *f, uint32_t mask)
553: {
554: int i;
555:
556: for (i = 0; i < 32; ++i)
557: if (1 << i & mask) {
558: fprintf(stderr, "warning: host cpuid %04x_%04x lacks requested"
559: " flag '%s' [0x%08x]\n",
560: f->cpuid >> 16, f->cpuid & 0xffff,
561: f->flag_names[i] ? f->flag_names[i] : "[reserved]", mask);
562: break;
563: }
564: return 0;
565: }
566:
567: /* best effort attempt to inform user requested cpu flags aren't making
568: * their way to the guest. Note: ft[].check_feat ideally should be
569: * specified via a guest_def field to suppress report of extraneous flags.
570: */
571: static int check_features_against_host(x86_def_t *guest_def)
572: {
573: x86_def_t host_def;
574: uint32_t mask;
575: int rv, i;
576: struct model_features_t ft[] = {
577: {&guest_def->features, &host_def.features,
578: ~0, feature_name, 0x00000000},
579: {&guest_def->ext_features, &host_def.ext_features,
580: ~CPUID_EXT_HYPERVISOR, ext_feature_name, 0x00000001},
581: {&guest_def->ext2_features, &host_def.ext2_features,
582: ~PPRO_FEATURES, ext2_feature_name, 0x80000000},
583: {&guest_def->ext3_features, &host_def.ext3_features,
584: ~CPUID_EXT3_SVM, ext3_feature_name, 0x80000001}};
585:
586: cpu_x86_fill_host(&host_def);
1.1.1.2 root 587: for (rv = 0, i = 0; i < ARRAY_SIZE(ft); ++i)
1.1 root 588: for (mask = 1; mask; mask <<= 1)
589: if (ft[i].check_feat & mask && *ft[i].guest_feat & mask &&
590: !(*ft[i].host_feat & mask)) {
591: unavailable_host_feature(&ft[i], mask);
592: rv = 1;
593: }
594: return rv;
595: }
596:
597: static int cpu_x86_find_by_name(x86_def_t *x86_cpu_def, const char *cpu_model)
598: {
599: unsigned int i;
600: x86_def_t *def;
601:
602: char *s = strdup(cpu_model);
603: char *featurestr, *name = strtok(s, ",");
1.1.1.2 root 604: /* Features to be added*/
605: uint32_t plus_features = 0, plus_ext_features = 0;
606: uint32_t plus_ext2_features = 0, plus_ext3_features = 0;
607: uint32_t plus_kvm_features = 0, plus_svm_features = 0;
608: /* Features to be removed */
609: uint32_t minus_features = 0, minus_ext_features = 0;
610: uint32_t minus_ext2_features = 0, minus_ext3_features = 0;
611: uint32_t minus_kvm_features = 0, minus_svm_features = 0;
1.1 root 612: uint32_t numvalue;
613:
614: for (def = x86_defs; def; def = def->next)
615: if (!strcmp(name, def->name))
616: break;
617: if (kvm_enabled() && strcmp(name, "host") == 0) {
618: cpu_x86_fill_host(x86_cpu_def);
619: } else if (!def) {
620: goto error;
621: } else {
622: memcpy(x86_cpu_def, def, sizeof(*def));
623: }
624:
625: plus_kvm_features = ~0; /* not supported bits will be filtered out later */
626:
627: add_flagname_to_bitmaps("hypervisor", &plus_features,
628: &plus_ext_features, &plus_ext2_features, &plus_ext3_features,
1.1.1.2 root 629: &plus_kvm_features, &plus_svm_features);
1.1 root 630:
631: featurestr = strtok(NULL, ",");
632:
633: while (featurestr) {
634: char *val;
635: if (featurestr[0] == '+') {
1.1.1.2 root 636: add_flagname_to_bitmaps(featurestr + 1, &plus_features,
637: &plus_ext_features, &plus_ext2_features,
638: &plus_ext3_features, &plus_kvm_features,
639: &plus_svm_features);
1.1 root 640: } else if (featurestr[0] == '-') {
1.1.1.2 root 641: add_flagname_to_bitmaps(featurestr + 1, &minus_features,
642: &minus_ext_features, &minus_ext2_features,
643: &minus_ext3_features, &minus_kvm_features,
644: &minus_svm_features);
1.1 root 645: } else if ((val = strchr(featurestr, '='))) {
646: *val = 0; val++;
647: if (!strcmp(featurestr, "family")) {
648: char *err;
649: numvalue = strtoul(val, &err, 0);
650: if (!*val || *err) {
651: fprintf(stderr, "bad numerical value %s\n", val);
652: goto error;
653: }
654: x86_cpu_def->family = numvalue;
655: } else if (!strcmp(featurestr, "model")) {
656: char *err;
657: numvalue = strtoul(val, &err, 0);
658: if (!*val || *err || numvalue > 0xff) {
659: fprintf(stderr, "bad numerical value %s\n", val);
660: goto error;
661: }
662: x86_cpu_def->model = numvalue;
663: } else if (!strcmp(featurestr, "stepping")) {
664: char *err;
665: numvalue = strtoul(val, &err, 0);
666: if (!*val || *err || numvalue > 0xf) {
667: fprintf(stderr, "bad numerical value %s\n", val);
668: goto error;
669: }
670: x86_cpu_def->stepping = numvalue ;
671: } else if (!strcmp(featurestr, "level")) {
672: char *err;
673: numvalue = strtoul(val, &err, 0);
674: if (!*val || *err) {
675: fprintf(stderr, "bad numerical value %s\n", val);
676: goto error;
677: }
678: x86_cpu_def->level = numvalue;
679: } else if (!strcmp(featurestr, "xlevel")) {
680: char *err;
681: numvalue = strtoul(val, &err, 0);
682: if (!*val || *err) {
683: fprintf(stderr, "bad numerical value %s\n", val);
684: goto error;
685: }
686: if (numvalue < 0x80000000) {
687: numvalue += 0x80000000;
688: }
689: x86_cpu_def->xlevel = numvalue;
690: } else if (!strcmp(featurestr, "vendor")) {
691: if (strlen(val) != 12) {
692: fprintf(stderr, "vendor string must be 12 chars long\n");
693: goto error;
694: }
695: x86_cpu_def->vendor1 = 0;
696: x86_cpu_def->vendor2 = 0;
697: x86_cpu_def->vendor3 = 0;
698: for(i = 0; i < 4; i++) {
699: x86_cpu_def->vendor1 |= ((uint8_t)val[i ]) << (8 * i);
700: x86_cpu_def->vendor2 |= ((uint8_t)val[i + 4]) << (8 * i);
701: x86_cpu_def->vendor3 |= ((uint8_t)val[i + 8]) << (8 * i);
702: }
703: x86_cpu_def->vendor_override = 1;
704: } else if (!strcmp(featurestr, "model_id")) {
705: pstrcpy(x86_cpu_def->model_id, sizeof(x86_cpu_def->model_id),
706: val);
707: } else {
708: fprintf(stderr, "unrecognized feature %s\n", featurestr);
709: goto error;
710: }
711: } else if (!strcmp(featurestr, "check")) {
712: check_cpuid = 1;
713: } else if (!strcmp(featurestr, "enforce")) {
714: check_cpuid = enforce_cpuid = 1;
715: } else {
716: fprintf(stderr, "feature string `%s' not in format (+feature|-feature|feature=xyz)\n", featurestr);
717: goto error;
718: }
719: featurestr = strtok(NULL, ",");
720: }
721: x86_cpu_def->features |= plus_features;
722: x86_cpu_def->ext_features |= plus_ext_features;
723: x86_cpu_def->ext2_features |= plus_ext2_features;
724: x86_cpu_def->ext3_features |= plus_ext3_features;
725: x86_cpu_def->kvm_features |= plus_kvm_features;
1.1.1.2 root 726: x86_cpu_def->svm_features |= plus_svm_features;
1.1 root 727: x86_cpu_def->features &= ~minus_features;
728: x86_cpu_def->ext_features &= ~minus_ext_features;
729: x86_cpu_def->ext2_features &= ~minus_ext2_features;
730: x86_cpu_def->ext3_features &= ~minus_ext3_features;
731: x86_cpu_def->kvm_features &= ~minus_kvm_features;
1.1.1.2 root 732: x86_cpu_def->svm_features &= ~minus_svm_features;
1.1 root 733: if (check_cpuid) {
734: if (check_features_against_host(x86_cpu_def) && enforce_cpuid)
735: goto error;
736: }
737: free(s);
738: return 0;
739:
740: error:
741: free(s);
742: return -1;
743: }
744:
745: /* generate a composite string into buf of all cpuid names in featureset
746: * selected by fbits. indicate truncation at bufsize in the event of overflow.
747: * if flags, suppress names undefined in featureset.
748: */
749: static void listflags(char *buf, int bufsize, uint32_t fbits,
750: const char **featureset, uint32_t flags)
751: {
752: const char **p = &featureset[31];
753: char *q, *b, bit;
754: int nc;
755:
756: b = 4 <= bufsize ? buf + (bufsize -= 3) - 1 : NULL;
757: *buf = '\0';
758: for (q = buf, bit = 31; fbits && bufsize; --p, fbits &= ~(1 << bit), --bit)
759: if (fbits & 1 << bit && (*p || !flags)) {
760: if (*p)
761: nc = snprintf(q, bufsize, "%s%s", q == buf ? "" : " ", *p);
762: else
763: nc = snprintf(q, bufsize, "%s[%d]", q == buf ? "" : " ", bit);
764: if (bufsize <= nc) {
765: if (b) {
766: memcpy(b, "...", sizeof("..."));
767: }
768: return;
769: }
770: q += nc;
771: bufsize -= nc;
772: }
773: }
774:
775: /* generate CPU information:
776: * -? list model names
777: * -?model list model names/IDs
778: * -?dump output all model (x86_def_t) data
779: * -?cpuid list all recognized cpuid flag names
780: */
1.1.1.2 root 781: void x86_cpu_list(FILE *f, fprintf_function cpu_fprintf, const char *optarg)
1.1 root 782: {
783: unsigned char model = !strcmp("?model", optarg);
784: unsigned char dump = !strcmp("?dump", optarg);
785: unsigned char cpuid = !strcmp("?cpuid", optarg);
786: x86_def_t *def;
787: char buf[256];
788:
789: if (cpuid) {
790: (*cpu_fprintf)(f, "Recognized CPUID flags:\n");
791: listflags(buf, sizeof (buf), (uint32_t)~0, feature_name, 1);
792: (*cpu_fprintf)(f, " f_edx: %s\n", buf);
793: listflags(buf, sizeof (buf), (uint32_t)~0, ext_feature_name, 1);
794: (*cpu_fprintf)(f, " f_ecx: %s\n", buf);
795: listflags(buf, sizeof (buf), (uint32_t)~0, ext2_feature_name, 1);
796: (*cpu_fprintf)(f, " extf_edx: %s\n", buf);
797: listflags(buf, sizeof (buf), (uint32_t)~0, ext3_feature_name, 1);
798: (*cpu_fprintf)(f, " extf_ecx: %s\n", buf);
799: return;
800: }
801: for (def = x86_defs; def; def = def->next) {
802: snprintf(buf, sizeof (buf), def->flags ? "[%s]": "%s", def->name);
803: if (model || dump) {
804: (*cpu_fprintf)(f, "x86 %16s %-48s\n", buf, def->model_id);
805: } else {
806: (*cpu_fprintf)(f, "x86 %16s\n", buf);
807: }
808: if (dump) {
809: memcpy(buf, &def->vendor1, sizeof (def->vendor1));
810: memcpy(buf + 4, &def->vendor2, sizeof (def->vendor2));
811: memcpy(buf + 8, &def->vendor3, sizeof (def->vendor3));
812: buf[12] = '\0';
813: (*cpu_fprintf)(f,
814: " family %d model %d stepping %d level %d xlevel 0x%x"
815: " vendor \"%s\"\n",
816: def->family, def->model, def->stepping, def->level,
817: def->xlevel, buf);
818: listflags(buf, sizeof (buf), def->features, feature_name, 0);
819: (*cpu_fprintf)(f, " feature_edx %08x (%s)\n", def->features,
820: buf);
821: listflags(buf, sizeof (buf), def->ext_features, ext_feature_name,
822: 0);
823: (*cpu_fprintf)(f, " feature_ecx %08x (%s)\n", def->ext_features,
824: buf);
825: listflags(buf, sizeof (buf), def->ext2_features, ext2_feature_name,
826: 0);
827: (*cpu_fprintf)(f, " extfeature_edx %08x (%s)\n",
828: def->ext2_features, buf);
829: listflags(buf, sizeof (buf), def->ext3_features, ext3_feature_name,
830: 0);
831: (*cpu_fprintf)(f, " extfeature_ecx %08x (%s)\n",
832: def->ext3_features, buf);
833: (*cpu_fprintf)(f, "\n");
834: }
835: }
836: if (kvm_enabled()) {
837: (*cpu_fprintf)(f, "x86 %16s\n", "[host]");
838: }
839: }
840:
841: int cpu_x86_register (CPUX86State *env, const char *cpu_model)
842: {
843: x86_def_t def1, *def = &def1;
844:
1.1.1.2 root 845: memset(def, 0, sizeof(*def));
846:
1.1 root 847: if (cpu_x86_find_by_name(def, cpu_model) < 0)
848: return -1;
849: if (def->vendor1) {
850: env->cpuid_vendor1 = def->vendor1;
851: env->cpuid_vendor2 = def->vendor2;
852: env->cpuid_vendor3 = def->vendor3;
853: } else {
854: env->cpuid_vendor1 = CPUID_VENDOR_INTEL_1;
855: env->cpuid_vendor2 = CPUID_VENDOR_INTEL_2;
856: env->cpuid_vendor3 = CPUID_VENDOR_INTEL_3;
857: }
858: env->cpuid_vendor_override = def->vendor_override;
859: env->cpuid_level = def->level;
860: if (def->family > 0x0f)
861: env->cpuid_version = 0xf00 | ((def->family - 0x0f) << 20);
862: else
863: env->cpuid_version = def->family << 8;
864: env->cpuid_version |= ((def->model & 0xf) << 4) | ((def->model >> 4) << 16);
865: env->cpuid_version |= def->stepping;
866: env->cpuid_features = def->features;
867: env->cpuid_ext_features = def->ext_features;
868: env->cpuid_ext2_features = def->ext2_features;
869: env->cpuid_ext3_features = def->ext3_features;
870: env->cpuid_xlevel = def->xlevel;
871: env->cpuid_kvm_features = def->kvm_features;
1.1.1.2 root 872: env->cpuid_svm_features = def->svm_features;
1.1.1.3 ! root 873: env->cpuid_ext4_features = def->ext4_features;
! 874: env->cpuid_xlevel2 = def->xlevel2;
1.1 root 875: if (!kvm_enabled()) {
876: env->cpuid_features &= TCG_FEATURES;
877: env->cpuid_ext_features &= TCG_EXT_FEATURES;
878: env->cpuid_ext2_features &= (TCG_EXT2_FEATURES
879: #ifdef TARGET_X86_64
880: | CPUID_EXT2_SYSCALL | CPUID_EXT2_LM
881: #endif
882: );
883: env->cpuid_ext3_features &= TCG_EXT3_FEATURES;
1.1.1.2 root 884: env->cpuid_svm_features &= TCG_SVM_FEATURES;
1.1 root 885: }
886: {
887: const char *model_id = def->model_id;
888: int c, len, i;
889: if (!model_id)
890: model_id = "";
891: len = strlen(model_id);
892: for(i = 0; i < 48; i++) {
893: if (i >= len)
894: c = '\0';
895: else
896: c = (uint8_t)model_id[i];
897: env->cpuid_model[i >> 2] |= c << (8 * (i & 3));
898: }
899: }
900: return 0;
901: }
902:
903: #if !defined(CONFIG_USER_ONLY)
904: /* copy vendor id string to 32 bit register, nul pad as needed
905: */
906: static void cpyid(const char *s, uint32_t *id)
907: {
908: char *d = (char *)id;
909: char i;
910:
911: for (i = sizeof (*id); i--; )
912: *d++ = *s ? *s++ : '\0';
913: }
914:
915: /* interpret radix and convert from string to arbitrary scalar,
916: * otherwise flag failure
917: */
918: #define setscalar(pval, str, perr) \
919: { \
920: char *pend; \
921: unsigned long ul; \
922: \
923: ul = strtoul(str, &pend, 0); \
924: *str && !*pend ? (*pval = ul) : (*perr = 1); \
925: }
926:
927: /* map cpuid options to feature bits, otherwise return failure
928: * (option tags in *str are delimited by whitespace)
929: */
930: static void setfeatures(uint32_t *pval, const char *str,
931: const char **featureset, int *perr)
932: {
933: const char *p, *q;
934:
935: for (q = p = str; *p || *q; q = p) {
936: while (iswhite(*p))
937: q = ++p;
938: while (*p && !iswhite(*p))
939: ++p;
940: if (!*q && !*p)
941: return;
942: if (!lookup_feature(pval, q, p, featureset)) {
943: fprintf(stderr, "error: feature \"%.*s\" not available in set\n",
944: (int)(p - q), q);
945: *perr = 1;
946: return;
947: }
948: }
949: }
950:
951: /* map config file options to x86_def_t form
952: */
953: static int cpudef_setfield(const char *name, const char *str, void *opaque)
954: {
955: x86_def_t *def = opaque;
956: int err = 0;
957:
958: if (!strcmp(name, "name")) {
959: def->name = strdup(str);
960: } else if (!strcmp(name, "model_id")) {
961: strncpy(def->model_id, str, sizeof (def->model_id));
962: } else if (!strcmp(name, "level")) {
963: setscalar(&def->level, str, &err)
964: } else if (!strcmp(name, "vendor")) {
965: cpyid(&str[0], &def->vendor1);
966: cpyid(&str[4], &def->vendor2);
967: cpyid(&str[8], &def->vendor3);
968: } else if (!strcmp(name, "family")) {
969: setscalar(&def->family, str, &err)
970: } else if (!strcmp(name, "model")) {
971: setscalar(&def->model, str, &err)
972: } else if (!strcmp(name, "stepping")) {
973: setscalar(&def->stepping, str, &err)
974: } else if (!strcmp(name, "feature_edx")) {
975: setfeatures(&def->features, str, feature_name, &err);
976: } else if (!strcmp(name, "feature_ecx")) {
977: setfeatures(&def->ext_features, str, ext_feature_name, &err);
978: } else if (!strcmp(name, "extfeature_edx")) {
979: setfeatures(&def->ext2_features, str, ext2_feature_name, &err);
980: } else if (!strcmp(name, "extfeature_ecx")) {
981: setfeatures(&def->ext3_features, str, ext3_feature_name, &err);
982: } else if (!strcmp(name, "xlevel")) {
983: setscalar(&def->xlevel, str, &err)
984: } else {
985: fprintf(stderr, "error: unknown option [%s = %s]\n", name, str);
986: return (1);
987: }
988: if (err) {
989: fprintf(stderr, "error: bad option value [%s = %s]\n", name, str);
990: return (1);
991: }
992: return (0);
993: }
994:
995: /* register config file entry as x86_def_t
996: */
997: static int cpudef_register(QemuOpts *opts, void *opaque)
998: {
999: x86_def_t *def = qemu_mallocz(sizeof (x86_def_t));
1000:
1001: qemu_opt_foreach(opts, cpudef_setfield, def, 1);
1002: def->next = x86_defs;
1003: x86_defs = def;
1004: return (0);
1005: }
1006:
1007: void cpu_clear_apic_feature(CPUX86State *env)
1008: {
1009: env->cpuid_features &= ~CPUID_APIC;
1010: }
1011:
1012: #endif /* !CONFIG_USER_ONLY */
1013:
1014: /* register "cpudef" models defined in configuration file. Here we first
1015: * preload any built-in definitions
1016: */
1017: void x86_cpudef_setup(void)
1018: {
1019: int i;
1020:
1021: for (i = 0; i < ARRAY_SIZE(builtin_x86_defs); ++i) {
1022: builtin_x86_defs[i].next = x86_defs;
1023: builtin_x86_defs[i].flags = 1;
1024: x86_defs = &builtin_x86_defs[i];
1025: }
1026: #if !defined(CONFIG_USER_ONLY)
1.1.1.2 root 1027: qemu_opts_foreach(qemu_find_opts("cpudef"), cpudef_register, NULL, 0);
1.1 root 1028: #endif
1029: }
1030:
1031: static void get_cpuid_vendor(CPUX86State *env, uint32_t *ebx,
1032: uint32_t *ecx, uint32_t *edx)
1033: {
1034: *ebx = env->cpuid_vendor1;
1035: *edx = env->cpuid_vendor2;
1036: *ecx = env->cpuid_vendor3;
1037:
1038: /* sysenter isn't supported on compatibility mode on AMD, syscall
1039: * isn't supported in compatibility mode on Intel.
1040: * Normally we advertise the actual cpu vendor, but you can override
1041: * this if you want to use KVM's sysenter/syscall emulation
1042: * in compatibility mode and when doing cross vendor migration
1043: */
1044: if (kvm_enabled() && ! env->cpuid_vendor_override) {
1045: host_cpuid(0, 0, NULL, ebx, ecx, edx);
1046: }
1047: }
1048:
1049: void cpu_x86_cpuid(CPUX86State *env, uint32_t index, uint32_t count,
1050: uint32_t *eax, uint32_t *ebx,
1051: uint32_t *ecx, uint32_t *edx)
1052: {
1053: /* test if maximum index reached */
1054: if (index & 0x80000000) {
1.1.1.3 ! root 1055: if (index > env->cpuid_xlevel) {
! 1056: if (env->cpuid_xlevel2 > 0) {
! 1057: /* Handle the Centaur's CPUID instruction. */
! 1058: if (index > env->cpuid_xlevel2) {
! 1059: index = env->cpuid_xlevel2;
! 1060: } else if (index < 0xC0000000) {
! 1061: index = env->cpuid_xlevel;
! 1062: }
! 1063: } else {
! 1064: index = env->cpuid_xlevel;
! 1065: }
! 1066: }
1.1 root 1067: } else {
1068: if (index > env->cpuid_level)
1069: index = env->cpuid_level;
1070: }
1071:
1072: switch(index) {
1073: case 0:
1074: *eax = env->cpuid_level;
1075: get_cpuid_vendor(env, ebx, ecx, edx);
1076: break;
1077: case 1:
1078: *eax = env->cpuid_version;
1079: *ebx = (env->cpuid_apic_id << 24) | 8 << 8; /* CLFLUSH size in quad words, Linux wants it. */
1080: *ecx = env->cpuid_ext_features;
1081: *edx = env->cpuid_features;
1082: if (env->nr_cores * env->nr_threads > 1) {
1083: *ebx |= (env->nr_cores * env->nr_threads) << 16;
1084: *edx |= 1 << 28; /* HTT bit */
1085: }
1086: break;
1087: case 2:
1088: /* cache info: needed for Pentium Pro compatibility */
1089: *eax = 1;
1090: *ebx = 0;
1091: *ecx = 0;
1092: *edx = 0x2c307d;
1093: break;
1094: case 4:
1095: /* cache info: needed for Core compatibility */
1096: if (env->nr_cores > 1) {
1097: *eax = (env->nr_cores - 1) << 26;
1098: } else {
1099: *eax = 0;
1100: }
1101: switch (count) {
1102: case 0: /* L1 dcache info */
1103: *eax |= 0x0000121;
1104: *ebx = 0x1c0003f;
1105: *ecx = 0x000003f;
1106: *edx = 0x0000001;
1107: break;
1108: case 1: /* L1 icache info */
1109: *eax |= 0x0000122;
1110: *ebx = 0x1c0003f;
1111: *ecx = 0x000003f;
1112: *edx = 0x0000001;
1113: break;
1114: case 2: /* L2 cache info */
1115: *eax |= 0x0000143;
1116: if (env->nr_threads > 1) {
1117: *eax |= (env->nr_threads - 1) << 14;
1118: }
1119: *ebx = 0x3c0003f;
1120: *ecx = 0x0000fff;
1121: *edx = 0x0000001;
1122: break;
1123: default: /* end of info */
1124: *eax = 0;
1125: *ebx = 0;
1126: *ecx = 0;
1127: *edx = 0;
1128: break;
1129: }
1130: break;
1131: case 5:
1132: /* mwait info: needed for Core compatibility */
1133: *eax = 0; /* Smallest monitor-line size in bytes */
1134: *ebx = 0; /* Largest monitor-line size in bytes */
1135: *ecx = CPUID_MWAIT_EMX | CPUID_MWAIT_IBE;
1136: *edx = 0;
1137: break;
1138: case 6:
1139: /* Thermal and Power Leaf */
1140: *eax = 0;
1141: *ebx = 0;
1142: *ecx = 0;
1143: *edx = 0;
1144: break;
1.1.1.3 ! root 1145: case 7:
! 1146: if (kvm_enabled()) {
! 1147: KVMState *s = env->kvm_state;
! 1148:
! 1149: *eax = kvm_arch_get_supported_cpuid(s, 0x7, count, R_EAX);
! 1150: *ebx = kvm_arch_get_supported_cpuid(s, 0x7, count, R_EBX);
! 1151: *ecx = kvm_arch_get_supported_cpuid(s, 0x7, count, R_ECX);
! 1152: *edx = kvm_arch_get_supported_cpuid(s, 0x7, count, R_EDX);
! 1153: } else {
! 1154: *eax = 0;
! 1155: *ebx = 0;
! 1156: *ecx = 0;
! 1157: *edx = 0;
! 1158: }
! 1159: break;
1.1 root 1160: case 9:
1161: /* Direct Cache Access Information Leaf */
1162: *eax = 0; /* Bits 0-31 in DCA_CAP MSR */
1163: *ebx = 0;
1164: *ecx = 0;
1165: *edx = 0;
1166: break;
1167: case 0xA:
1168: /* Architectural Performance Monitoring Leaf */
1169: *eax = 0;
1170: *ebx = 0;
1171: *ecx = 0;
1172: *edx = 0;
1173: break;
1174: case 0xD:
1175: /* Processor Extended State */
1176: if (!(env->cpuid_ext_features & CPUID_EXT_XSAVE)) {
1177: *eax = 0;
1178: *ebx = 0;
1179: *ecx = 0;
1180: *edx = 0;
1181: break;
1182: }
1183: if (kvm_enabled()) {
1.1.1.3 ! root 1184: KVMState *s = env->kvm_state;
! 1185:
! 1186: *eax = kvm_arch_get_supported_cpuid(s, 0xd, count, R_EAX);
! 1187: *ebx = kvm_arch_get_supported_cpuid(s, 0xd, count, R_EBX);
! 1188: *ecx = kvm_arch_get_supported_cpuid(s, 0xd, count, R_ECX);
! 1189: *edx = kvm_arch_get_supported_cpuid(s, 0xd, count, R_EDX);
1.1 root 1190: } else {
1191: *eax = 0;
1192: *ebx = 0;
1193: *ecx = 0;
1194: *edx = 0;
1195: }
1196: break;
1197: case 0x80000000:
1198: *eax = env->cpuid_xlevel;
1199: *ebx = env->cpuid_vendor1;
1200: *edx = env->cpuid_vendor2;
1201: *ecx = env->cpuid_vendor3;
1202: break;
1203: case 0x80000001:
1204: *eax = env->cpuid_version;
1205: *ebx = 0;
1206: *ecx = env->cpuid_ext3_features;
1207: *edx = env->cpuid_ext2_features;
1208:
1209: /* The Linux kernel checks for the CMPLegacy bit and
1210: * discards multiple thread information if it is set.
1211: * So dont set it here for Intel to make Linux guests happy.
1212: */
1213: if (env->nr_cores * env->nr_threads > 1) {
1214: uint32_t tebx, tecx, tedx;
1215: get_cpuid_vendor(env, &tebx, &tecx, &tedx);
1216: if (tebx != CPUID_VENDOR_INTEL_1 ||
1217: tedx != CPUID_VENDOR_INTEL_2 ||
1218: tecx != CPUID_VENDOR_INTEL_3) {
1219: *ecx |= 1 << 1; /* CmpLegacy bit */
1220: }
1221: }
1222: break;
1223: case 0x80000002:
1224: case 0x80000003:
1225: case 0x80000004:
1226: *eax = env->cpuid_model[(index - 0x80000002) * 4 + 0];
1227: *ebx = env->cpuid_model[(index - 0x80000002) * 4 + 1];
1228: *ecx = env->cpuid_model[(index - 0x80000002) * 4 + 2];
1229: *edx = env->cpuid_model[(index - 0x80000002) * 4 + 3];
1230: break;
1231: case 0x80000005:
1232: /* cache info (L1 cache) */
1233: *eax = 0x01ff01ff;
1234: *ebx = 0x01ff01ff;
1235: *ecx = 0x40020140;
1236: *edx = 0x40020140;
1237: break;
1238: case 0x80000006:
1239: /* cache info (L2 cache) */
1240: *eax = 0;
1241: *ebx = 0x42004200;
1242: *ecx = 0x02008140;
1243: *edx = 0;
1244: break;
1245: case 0x80000008:
1246: /* virtual & phys address size in low 2 bytes. */
1247: /* XXX: This value must match the one used in the MMU code. */
1248: if (env->cpuid_ext2_features & CPUID_EXT2_LM) {
1249: /* 64 bit processor */
1250: /* XXX: The physical address space is limited to 42 bits in exec.c. */
1251: *eax = 0x00003028; /* 48 bits virtual, 40 bits physical */
1252: } else {
1253: if (env->cpuid_features & CPUID_PSE36)
1254: *eax = 0x00000024; /* 36 bits physical */
1255: else
1256: *eax = 0x00000020; /* 32 bits physical */
1257: }
1258: *ebx = 0;
1259: *ecx = 0;
1260: *edx = 0;
1261: if (env->nr_cores * env->nr_threads > 1) {
1262: *ecx |= (env->nr_cores * env->nr_threads) - 1;
1263: }
1264: break;
1265: case 0x8000000A:
1.1.1.2 root 1266: if (env->cpuid_ext3_features & CPUID_EXT3_SVM) {
1267: *eax = 0x00000001; /* SVM Revision */
1268: *ebx = 0x00000010; /* nr of ASIDs */
1269: *ecx = 0;
1270: *edx = env->cpuid_svm_features; /* optional features */
1271: } else {
1272: *eax = 0;
1273: *ebx = 0;
1274: *ecx = 0;
1275: *edx = 0;
1276: }
1.1 root 1277: break;
1.1.1.3 ! root 1278: case 0xC0000000:
! 1279: *eax = env->cpuid_xlevel2;
! 1280: *ebx = 0;
! 1281: *ecx = 0;
! 1282: *edx = 0;
! 1283: break;
! 1284: case 0xC0000001:
! 1285: /* Support for VIA CPU's CPUID instruction */
! 1286: *eax = env->cpuid_version;
! 1287: *ebx = 0;
! 1288: *ecx = 0;
! 1289: *edx = env->cpuid_ext4_features;
! 1290: break;
! 1291: case 0xC0000002:
! 1292: case 0xC0000003:
! 1293: case 0xC0000004:
! 1294: /* Reserved for the future, and now filled with zero */
! 1295: *eax = 0;
! 1296: *ebx = 0;
! 1297: *ecx = 0;
! 1298: *edx = 0;
! 1299: break;
1.1 root 1300: default:
1301: /* reserved values: zero */
1302: *eax = 0;
1303: *ebx = 0;
1304: *ecx = 0;
1305: *edx = 0;
1306: break;
1307: }
1308: }
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