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1.1 root 1: /*
2: * m68k virtual CPU header
1.1.1.2 ! root 3: *
! 4: * Copyright (c) 2005-2007 CodeSourcery
1.1 root 5: * Written by Paul Brook
6: *
7: * This library is free software; you can redistribute it and/or
8: * modify it under the terms of the GNU Lesser General Public
9: * License as published by the Free Software Foundation; either
10: * version 2 of the License, or (at your option) any later version.
11: *
12: * This library is distributed in the hope that it will be useful,
13: * but WITHOUT ANY WARRANTY; without even the implied warranty of
14: * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
15: * General Public License for more details.
16: *
17: * You should have received a copy of the GNU Lesser General Public
18: * License along with this library; if not, write to the Free Software
19: * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
20: */
21: #ifndef CPU_M68K_H
22: #define CPU_M68K_H
23:
24: #define TARGET_LONG_BITS 32
25:
26: #include "cpu-defs.h"
27:
28: #include "softfloat.h"
29:
30: #define MAX_QREGS 32
31:
32: #define TARGET_HAS_ICE 1
33:
34: #define ELF_MACHINE EM_68K
35:
36: #define EXCP_ACCESS 2 /* Access (MMU) error. */
37: #define EXCP_ADDRESS 3 /* Address error. */
38: #define EXCP_ILLEGAL 4 /* Illegal instruction. */
39: #define EXCP_DIV0 5 /* Divide by zero */
40: #define EXCP_PRIVILEGE 8 /* Privilege violation. */
41: #define EXCP_TRACE 9
42: #define EXCP_LINEA 10 /* Unimplemented line-A (MAC) opcode. */
43: #define EXCP_LINEF 11 /* Unimplemented line-F (FPU) opcode. */
44: #define EXCP_DEBUGNBP 12 /* Non-breakpoint debug interrupt. */
45: #define EXCP_DEBEGBP 13 /* Breakpoint debug interrupt. */
46: #define EXCP_FORMAT 14 /* RTE format error. */
47: #define EXCP_UNINITIALIZED 15
48: #define EXCP_TRAP0 32 /* User trap #0. */
49: #define EXCP_TRAP15 47 /* User trap #15. */
50: #define EXCP_UNSUPPORTED 61
51: #define EXCP_ICE 13
52:
1.1.1.2 ! root 53: #define EXCP_RTE 0x100
! 54: #define EXCP_HALT_INSN 0x101
! 55:
! 56: #define NB_MMU_MODES 2
! 57:
1.1 root 58: typedef struct CPUM68KState {
59: uint32_t dregs[8];
60: uint32_t aregs[8];
61: uint32_t pc;
62: uint32_t sr;
63:
1.1.1.2 ! root 64: /* SSP and USP. The current_sp is stored in aregs[7], the other here. */
! 65: int current_sp;
! 66: uint32_t sp[2];
! 67:
1.1 root 68: /* Condition flags. */
69: uint32_t cc_op;
70: uint32_t cc_dest;
71: uint32_t cc_src;
72: uint32_t cc_x;
73:
74: float64 fregs[8];
75: float64 fp_result;
76: uint32_t fpcr;
77: uint32_t fpsr;
78: float_status fp_status;
79:
1.1.1.2 ! root 80: uint64_t mactmp;
! 81: /* EMAC Hardware deals with 48-bit values composed of one 32-bit and
! 82: two 8-bit parts. We store a single 64-bit value and
! 83: rearrange/extend this when changing modes. */
! 84: uint64_t macc[4];
! 85: uint32_t macsr;
! 86: uint32_t mac_mask;
! 87:
1.1 root 88: /* Temporary storage for DIV helpers. */
89: uint32_t div1;
90: uint32_t div2;
1.1.1.2 ! root 91:
1.1 root 92: /* MMU status. */
93: struct {
94: uint32_t ar;
95: } mmu;
1.1.1.2 ! root 96:
! 97: /* Control registers. */
! 98: uint32_t vbr;
! 99: uint32_t mbar;
! 100: uint32_t rambar0;
! 101: uint32_t cacr;
! 102:
1.1 root 103: /* ??? remove this. */
104: uint32_t t1;
105:
106: /* exception/interrupt handling */
107: jmp_buf jmp_env;
108: int exception_index;
109: int interrupt_request;
110: int user_mode_only;
1.1.1.2 ! root 111: int halted;
! 112:
! 113: int pending_vector;
! 114: int pending_level;
1.1 root 115:
116: uint32_t qregs[MAX_QREGS];
117:
118: CPU_COMMON
1.1.1.2 ! root 119:
! 120: uint32_t features;
1.1 root 121: } CPUM68KState;
122:
1.1.1.2 ! root 123: CPUM68KState *cpu_m68k_init(const char *cpu_model);
1.1 root 124: int cpu_m68k_exec(CPUM68KState *s);
125: void cpu_m68k_close(CPUM68KState *s);
1.1.1.2 ! root 126: void do_interrupt(int is_hw);
1.1 root 127: /* you can call this signal handler from your SIGBUS and SIGSEGV
128: signal handlers to inform the virtual CPU of exceptions. non zero
129: is returned if the signal was handled by the virtual CPU. */
1.1.1.2 ! root 130: int cpu_m68k_signal_handler(int host_signum, void *pinfo,
1.1 root 131: void *puc);
132: void cpu_m68k_flush_flags(CPUM68KState *, int);
133:
134: enum {
135: CC_OP_DYNAMIC, /* Use env->cc_op */
136: CC_OP_FLAGS, /* CC_DEST = CVZN, CC_SRC = unused */
137: CC_OP_LOGIC, /* CC_DEST = result, CC_SRC = unused */
138: CC_OP_ADD, /* CC_DEST = result, CC_SRC = source */
139: CC_OP_SUB, /* CC_DEST = result, CC_SRC = source */
140: CC_OP_CMPB, /* CC_DEST = result, CC_SRC = source */
141: CC_OP_CMPW, /* CC_DEST = result, CC_SRC = source */
142: CC_OP_ADDX, /* CC_DEST = result, CC_SRC = source */
143: CC_OP_SUBX, /* CC_DEST = result, CC_SRC = source */
144: CC_OP_SHL, /* CC_DEST = source, CC_SRC = shift */
145: CC_OP_SHR, /* CC_DEST = source, CC_SRC = shift */
146: CC_OP_SAR, /* CC_DEST = source, CC_SRC = shift */
147: };
148:
149: #define CCF_C 0x01
150: #define CCF_V 0x02
151: #define CCF_Z 0x04
152: #define CCF_N 0x08
1.1.1.2 ! root 153: #define CCF_X 0x10
1.1 root 154:
1.1.1.2 ! root 155: #define SR_I_SHIFT 8
! 156: #define SR_I 0x0700
! 157: #define SR_M 0x1000
! 158: #define SR_S 0x2000
! 159: #define SR_T 0x8000
! 160:
! 161: #define M68K_SSP 0
! 162: #define M68K_USP 1
! 163:
! 164: /* CACR fields are implementation defined, but some bits are common. */
! 165: #define M68K_CACR_EUSP 0x10
! 166:
! 167: #define MACSR_PAV0 0x100
! 168: #define MACSR_OMC 0x080
! 169: #define MACSR_SU 0x040
! 170: #define MACSR_FI 0x020
! 171: #define MACSR_RT 0x010
! 172: #define MACSR_N 0x008
! 173: #define MACSR_Z 0x004
! 174: #define MACSR_V 0x002
! 175: #define MACSR_EV 0x001
! 176:
! 177: void m68k_set_irq_level(CPUM68KState *env, int level, uint8_t vector);
! 178: void m68k_set_macsr(CPUM68KState *env, uint32_t val);
! 179: void m68k_switch_sp(CPUM68KState *env);
1.1 root 180:
181: #define M68K_FPCR_PREC (1 << 6)
182:
1.1.1.2 ! root 183: void do_m68k_semihosting(CPUM68KState *env, int nr);
! 184:
! 185: /* There are 4 ColdFire core ISA revisions: A, A+, B and C.
! 186: Each feature covers the subset of instructions common to the
! 187: ISA revisions mentioned. */
! 188:
! 189: enum m68k_features {
! 190: M68K_FEATURE_CF_ISA_A,
! 191: M68K_FEATURE_CF_ISA_B, /* (ISA B or C). */
! 192: M68K_FEATURE_CF_ISA_APLUSC, /* BIT/BITREV, FF1, STRLDSR (ISA A+ or C). */
! 193: M68K_FEATURE_BRAL, /* Long unconditional branch. (ISA A+ or B). */
! 194: M68K_FEATURE_CF_FPU,
! 195: M68K_FEATURE_CF_MAC,
! 196: M68K_FEATURE_CF_EMAC,
! 197: M68K_FEATURE_CF_EMAC_B, /* Revision B EMAC (dual accumulate). */
! 198: M68K_FEATURE_USP, /* User Stack Pointer. (ISA A+, B or C). */
! 199: M68K_FEATURE_EXT_FULL, /* 68020+ full extension word. */
! 200: M68K_FEATURE_WORD_INDEX /* word sized address index registers. */
! 201: };
! 202:
! 203: static inline int m68k_feature(CPUM68KState *env, int feature)
! 204: {
! 205: return (env->features & (1u << feature)) != 0;
! 206: }
! 207:
! 208: void register_m68k_insns (CPUM68KState *env);
! 209:
1.1 root 210: #ifdef CONFIG_USER_ONLY
211: /* Linux uses 8k pages. */
212: #define TARGET_PAGE_BITS 13
213: #else
1.1.1.2 ! root 214: /* Smallest TLB entry size is 1k. */
1.1 root 215: #define TARGET_PAGE_BITS 10
216: #endif
1.1.1.2 ! root 217:
! 218: #define CPUState CPUM68KState
! 219: #define cpu_init cpu_m68k_init
! 220: #define cpu_exec cpu_m68k_exec
! 221: #define cpu_gen_code cpu_m68k_gen_code
! 222: #define cpu_signal_handler cpu_m68k_signal_handler
! 223:
! 224: /* MMU modes definitions */
! 225: #define MMU_MODE0_SUFFIX _kernel
! 226: #define MMU_MODE1_SUFFIX _user
! 227: #define MMU_USER_IDX 1
! 228: static inline int cpu_mmu_index (CPUState *env)
! 229: {
! 230: return (env->sr & SR_S) == 0 ? 1 : 0;
! 231: }
! 232:
1.1 root 233: #include "cpu-all.h"
234:
235: #endif
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