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1.1 root 1: /*
2: * m68k virtual CPU header
1.1.1.2 root 3: *
4: * Copyright (c) 2005-2007 CodeSourcery
1.1 root 5: * Written by Paul Brook
6: *
7: * This library is free software; you can redistribute it and/or
8: * modify it under the terms of the GNU Lesser General Public
9: * License as published by the Free Software Foundation; either
10: * version 2 of the License, or (at your option) any later version.
11: *
12: * This library is distributed in the hope that it will be useful,
13: * but WITHOUT ANY WARRANTY; without even the implied warranty of
14: * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
15: * General Public License for more details.
16: *
17: * You should have received a copy of the GNU Lesser General Public
1.1.1.4 root 18: * License along with this library; if not, see <http://www.gnu.org/licenses/>.
1.1 root 19: */
20: #ifndef CPU_M68K_H
21: #define CPU_M68K_H
22:
23: #define TARGET_LONG_BITS 32
24:
1.1.1.4 root 25: #define CPUState struct CPUM68KState
26:
1.1 root 27: #include "cpu-defs.h"
28:
29: #include "softfloat.h"
30:
31: #define MAX_QREGS 32
32:
33: #define TARGET_HAS_ICE 1
34:
35: #define ELF_MACHINE EM_68K
36:
37: #define EXCP_ACCESS 2 /* Access (MMU) error. */
38: #define EXCP_ADDRESS 3 /* Address error. */
39: #define EXCP_ILLEGAL 4 /* Illegal instruction. */
40: #define EXCP_DIV0 5 /* Divide by zero */
41: #define EXCP_PRIVILEGE 8 /* Privilege violation. */
42: #define EXCP_TRACE 9
43: #define EXCP_LINEA 10 /* Unimplemented line-A (MAC) opcode. */
44: #define EXCP_LINEF 11 /* Unimplemented line-F (FPU) opcode. */
45: #define EXCP_DEBUGNBP 12 /* Non-breakpoint debug interrupt. */
46: #define EXCP_DEBEGBP 13 /* Breakpoint debug interrupt. */
47: #define EXCP_FORMAT 14 /* RTE format error. */
48: #define EXCP_UNINITIALIZED 15
49: #define EXCP_TRAP0 32 /* User trap #0. */
50: #define EXCP_TRAP15 47 /* User trap #15. */
51: #define EXCP_UNSUPPORTED 61
52: #define EXCP_ICE 13
53:
1.1.1.2 root 54: #define EXCP_RTE 0x100
55: #define EXCP_HALT_INSN 0x101
56:
57: #define NB_MMU_MODES 2
58:
1.1 root 59: typedef struct CPUM68KState {
60: uint32_t dregs[8];
61: uint32_t aregs[8];
62: uint32_t pc;
63: uint32_t sr;
64:
1.1.1.2 root 65: /* SSP and USP. The current_sp is stored in aregs[7], the other here. */
66: int current_sp;
67: uint32_t sp[2];
68:
1.1 root 69: /* Condition flags. */
70: uint32_t cc_op;
71: uint32_t cc_dest;
72: uint32_t cc_src;
73: uint32_t cc_x;
74:
75: float64 fregs[8];
76: float64 fp_result;
77: uint32_t fpcr;
78: uint32_t fpsr;
79: float_status fp_status;
80:
1.1.1.2 root 81: uint64_t mactmp;
82: /* EMAC Hardware deals with 48-bit values composed of one 32-bit and
83: two 8-bit parts. We store a single 64-bit value and
84: rearrange/extend this when changing modes. */
85: uint64_t macc[4];
86: uint32_t macsr;
87: uint32_t mac_mask;
88:
1.1 root 89: /* Temporary storage for DIV helpers. */
90: uint32_t div1;
91: uint32_t div2;
1.1.1.2 root 92:
1.1 root 93: /* MMU status. */
94: struct {
95: uint32_t ar;
96: } mmu;
1.1.1.2 root 97:
98: /* Control registers. */
99: uint32_t vbr;
100: uint32_t mbar;
101: uint32_t rambar0;
102: uint32_t cacr;
103:
1.1 root 104: /* ??? remove this. */
105: uint32_t t1;
106:
1.1.1.2 root 107: int pending_vector;
108: int pending_level;
1.1 root 109:
110: uint32_t qregs[MAX_QREGS];
111:
112: CPU_COMMON
1.1.1.2 root 113:
114: uint32_t features;
1.1 root 115: } CPUM68KState;
116:
1.1.1.3 root 117: void m68k_tcg_init(void);
1.1.1.2 root 118: CPUM68KState *cpu_m68k_init(const char *cpu_model);
1.1 root 119: int cpu_m68k_exec(CPUM68KState *s);
120: void cpu_m68k_close(CPUM68KState *s);
1.1.1.2 root 121: void do_interrupt(int is_hw);
1.1 root 122: /* you can call this signal handler from your SIGBUS and SIGSEGV
123: signal handlers to inform the virtual CPU of exceptions. non zero
124: is returned if the signal was handled by the virtual CPU. */
1.1.1.2 root 125: int cpu_m68k_signal_handler(int host_signum, void *pinfo,
1.1 root 126: void *puc);
127: void cpu_m68k_flush_flags(CPUM68KState *, int);
128:
129: enum {
130: CC_OP_DYNAMIC, /* Use env->cc_op */
131: CC_OP_FLAGS, /* CC_DEST = CVZN, CC_SRC = unused */
132: CC_OP_LOGIC, /* CC_DEST = result, CC_SRC = unused */
133: CC_OP_ADD, /* CC_DEST = result, CC_SRC = source */
134: CC_OP_SUB, /* CC_DEST = result, CC_SRC = source */
135: CC_OP_CMPB, /* CC_DEST = result, CC_SRC = source */
136: CC_OP_CMPW, /* CC_DEST = result, CC_SRC = source */
137: CC_OP_ADDX, /* CC_DEST = result, CC_SRC = source */
138: CC_OP_SUBX, /* CC_DEST = result, CC_SRC = source */
1.1.1.3 root 139: CC_OP_SHIFT, /* CC_DEST = result, CC_SRC = carry */
1.1 root 140: };
141:
142: #define CCF_C 0x01
143: #define CCF_V 0x02
144: #define CCF_Z 0x04
145: #define CCF_N 0x08
1.1.1.2 root 146: #define CCF_X 0x10
1.1 root 147:
1.1.1.2 root 148: #define SR_I_SHIFT 8
149: #define SR_I 0x0700
150: #define SR_M 0x1000
151: #define SR_S 0x2000
152: #define SR_T 0x8000
153:
154: #define M68K_SSP 0
155: #define M68K_USP 1
156:
157: /* CACR fields are implementation defined, but some bits are common. */
158: #define M68K_CACR_EUSP 0x10
159:
160: #define MACSR_PAV0 0x100
161: #define MACSR_OMC 0x080
162: #define MACSR_SU 0x040
163: #define MACSR_FI 0x020
164: #define MACSR_RT 0x010
165: #define MACSR_N 0x008
166: #define MACSR_Z 0x004
167: #define MACSR_V 0x002
168: #define MACSR_EV 0x001
169:
170: void m68k_set_irq_level(CPUM68KState *env, int level, uint8_t vector);
171: void m68k_set_macsr(CPUM68KState *env, uint32_t val);
172: void m68k_switch_sp(CPUM68KState *env);
1.1 root 173:
174: #define M68K_FPCR_PREC (1 << 6)
175:
1.1.1.2 root 176: void do_m68k_semihosting(CPUM68KState *env, int nr);
177:
178: /* There are 4 ColdFire core ISA revisions: A, A+, B and C.
179: Each feature covers the subset of instructions common to the
180: ISA revisions mentioned. */
181:
182: enum m68k_features {
183: M68K_FEATURE_CF_ISA_A,
184: M68K_FEATURE_CF_ISA_B, /* (ISA B or C). */
185: M68K_FEATURE_CF_ISA_APLUSC, /* BIT/BITREV, FF1, STRLDSR (ISA A+ or C). */
186: M68K_FEATURE_BRAL, /* Long unconditional branch. (ISA A+ or B). */
187: M68K_FEATURE_CF_FPU,
188: M68K_FEATURE_CF_MAC,
189: M68K_FEATURE_CF_EMAC,
190: M68K_FEATURE_CF_EMAC_B, /* Revision B EMAC (dual accumulate). */
191: M68K_FEATURE_USP, /* User Stack Pointer. (ISA A+, B or C). */
192: M68K_FEATURE_EXT_FULL, /* 68020+ full extension word. */
193: M68K_FEATURE_WORD_INDEX /* word sized address index registers. */
194: };
195:
196: static inline int m68k_feature(CPUM68KState *env, int feature)
197: {
198: return (env->features & (1u << feature)) != 0;
199: }
200:
1.1.1.4 root 201: void m68k_cpu_list(FILE *f, int (*cpu_fprintf)(FILE *f, const char *fmt, ...));
202:
1.1.1.2 root 203: void register_m68k_insns (CPUM68KState *env);
204:
1.1 root 205: #ifdef CONFIG_USER_ONLY
206: /* Linux uses 8k pages. */
207: #define TARGET_PAGE_BITS 13
208: #else
1.1.1.2 root 209: /* Smallest TLB entry size is 1k. */
1.1 root 210: #define TARGET_PAGE_BITS 10
211: #endif
1.1.1.2 root 212:
1.1.1.6 ! root 213: #define TARGET_PHYS_ADDR_SPACE_BITS 32
! 214: #define TARGET_VIRT_ADDR_SPACE_BITS 32
! 215:
1.1.1.2 root 216: #define cpu_init cpu_m68k_init
217: #define cpu_exec cpu_m68k_exec
218: #define cpu_gen_code cpu_m68k_gen_code
219: #define cpu_signal_handler cpu_m68k_signal_handler
1.1.1.4 root 220: #define cpu_list m68k_cpu_list
1.1.1.2 root 221:
222: /* MMU modes definitions */
223: #define MMU_MODE0_SUFFIX _kernel
224: #define MMU_MODE1_SUFFIX _user
225: #define MMU_USER_IDX 1
226: static inline int cpu_mmu_index (CPUState *env)
227: {
228: return (env->sr & SR_S) == 0 ? 1 : 0;
229: }
230:
1.1.1.4 root 231: int cpu_m68k_handle_mmu_fault(CPUState *env, target_ulong address, int rw,
232: int mmu_idx, int is_softmmu);
1.1.1.5 root 233: #define cpu_handle_mmu_fault cpu_m68k_handle_mmu_fault
1.1.1.4 root 234:
1.1.1.3 root 235: #if defined(CONFIG_USER_ONLY)
236: static inline void cpu_clone_regs(CPUState *env, target_ulong newsp)
237: {
238: if (newsp)
239: env->aregs[7] = newsp;
240: env->dregs[0] = 0;
241: }
242: #endif
243:
1.1 root 244: #include "cpu-all.h"
1.1.1.3 root 245:
246: static inline void cpu_get_tb_cpu_state(CPUState *env, target_ulong *pc,
247: target_ulong *cs_base, int *flags)
248: {
249: *pc = env->pc;
250: *cs_base = 0;
251: *flags = (env->fpcr & M68K_FPCR_PREC) /* Bit 6 */
252: | (env->sr & SR_S) /* Bit 13 */
253: | ((env->macsr >> 4) & 0xf); /* Bits 0-3 */
254: }
1.1 root 255:
256: #endif
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