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1.1 root 1: /* Various hacks to make code written for a dynamic code generator work
2: with regular QEMU. */
3:
4: static int free_qreg;
5:
6: #define QMODE_I32 1
7: #define QMODE_F32 1
8: #define QMODE_F64 2
9:
10: static inline int gen_new_qreg(int mode)
11: {
12: int qreg;
13:
14: qreg = free_qreg;
15: free_qreg += mode;
16: if (free_qreg > MAX_QREGS) {
17: fprintf(stderr, "qreg overflow\n");
18: abort();
19: }
20: return qreg + TARGET_NUM_QREGS;
21: }
22:
23: static inline int gen_im32(uint32_t i)
24: {
25: int qreg = gen_new_qreg(QMODE_I32);
26: gen_op_mov32_im(qreg, i);
27: return qreg;
28: }
29:
30: static inline void gen_op_ldf32(int dest, int addr)
31: {
32: gen_op_ld32(dest, addr);
33: }
34:
35: static inline void gen_op_stf32(int addr, int dest)
36: {
37: gen_op_st32(addr, dest);
38: }
39:
40: static inline void gen_op_pack_32_f32(int dest, int src)
41: {
42: gen_op_mov32(dest, src);
43: }
44:
45: static inline void gen_op_pack_f32_32(int dest, int src)
46: {
47: gen_op_mov32(dest, src);
48: }
49:
50: static inline void gen_op_flags_set(void)
51: {
52: /* Dummy op. */
53: }
54:
55: static inline void gen_op_shl_im_cc(int val, int shift)
56: {
57: gen_op_shl_cc(val, gen_im32(shift));
58: }
59:
60: static inline void gen_op_shr_im_cc(int val, int shift)
61: {
62: gen_op_shr_cc(val, gen_im32(shift));
63: }
64:
65: static inline void gen_op_sar_im_cc(int val, int shift)
66: {
67: gen_op_sar_cc(val, gen_im32(shift));
68: }
69:
70: #ifdef USE_DIRECT_JUMP
71: #define TBPARAM(x)
72: #else
73: #define TBPARAM(x) (long)(x)
74: #endif
75:
76: static inline void gen_op_goto_tb(int dummy, int n, long tb)
77: {
78: if (n == 0) {
79: gen_op_goto_tb0(TBPARAM(tb));
80: } else {
81: gen_op_goto_tb1(TBPARAM(tb));
82: }
83: }
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