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Annotation of qemu/target-m68k/qregs.def, revision 1.1.1.2

1.1       root        1: DEFO32(D0, dregs[0])
                      2: DEFO32(D1, dregs[1])
                      3: DEFO32(D2, dregs[2])
                      4: DEFO32(D3, dregs[3])
                      5: DEFO32(D4, dregs[4])
                      6: DEFO32(D5, dregs[5])
                      7: DEFO32(D6, dregs[6])
                      8: DEFO32(D7, dregs[7])
                      9: DEFO32(A0, aregs[0])
                     10: DEFO32(A1, aregs[1])
                     11: DEFO32(A2, aregs[2])
                     12: DEFO32(A3, aregs[3])
                     13: DEFO32(A4, aregs[4])
                     14: DEFO32(A5, aregs[5])
                     15: DEFO32(A6, aregs[6])
                     16: DEFO32(SP, aregs[7]) /* A7 */
                     17: DEFF64(F0, fregs[0])
                     18: DEFF64(F1, fregs[1])
                     19: DEFF64(F2, fregs[2])
                     20: DEFF64(F3, fregs[3])
                     21: DEFF64(F4, fregs[4])
                     22: DEFF64(F5, fregs[5])
                     23: DEFF64(F6, fregs[6])
                     24: DEFF64(F7, fregs[7])
                     25: DEFF64(FP_RESULT, fp_result)
                     26: DEFO32(PC, pc)
1.1.1.2 ! root       27: DEFO32(SR, sr)
1.1       root       28: DEFO32(CC_OP, cc_op)
                     29: DEFR(T0, AREG1, QMODE_I32)
                     30: DEFO32(CC_DEST, cc_dest)
                     31: DEFO32(CC_SRC, cc_src)
                     32: DEFO32(CC_X, cc_x)
                     33: DEFO32(DIV1, div1)
                     34: DEFO32(DIV2, div2)
                     35: DEFO32(EXCEPTION, exception_index)
1.1.1.2 ! root       36: DEFO32(MACSR, macsr)
        !            37: DEFO32(MAC_MASK, mac_mask)

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