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1.1 root 1: #if !defined(__QEMU_MIPS_EXEC_H__)
2: #define __QEMU_MIPS_EXEC_H__
3:
1.1.1.2 root 4: //#define DEBUG_OP
1.1 root 5:
1.1.1.5 ! root 6: #include "config.h"
1.1 root 7: #include "mips-defs.h"
8: #include "dyngen-exec.h"
9:
1.1.1.5 ! root 10: #if defined(__sparc__)
! 11: struct CPUMIPSState *env;
! 12: #else
1.1 root 13: register struct CPUMIPSState *env asm(AREG0);
1.1.1.5 ! root 14: #endif
1.1 root 15:
16: #if defined (USE_64BITS_REGS)
17: typedef int64_t host_int_t;
18: typedef uint64_t host_uint_t;
19: #else
20: typedef int32_t host_int_t;
21: typedef uint32_t host_uint_t;
22: #endif
23:
1.1.1.5 ! root 24: #if defined(__sparc__)
! 25: host_uint_t T0;
! 26: host_uint_t T1;
! 27: host_uint_t T2;
! 28: #else
! 29: #if TARGET_LONG_BITS > HOST_LONG_BITS
! 30: #define T0 (env->t0)
! 31: #define T1 (env->t1)
! 32: #define T2 (env->t2)
! 33: #else
1.1 root 34: register host_uint_t T0 asm(AREG1);
35: register host_uint_t T1 asm(AREG2);
36: register host_uint_t T2 asm(AREG3);
1.1.1.5 ! root 37: #endif
! 38: #endif
1.1 root 39:
40: #if defined (USE_HOST_FLOAT_REGS)
1.1.1.4 root 41: #error "implement me."
1.1 root 42: #else
1.1.1.4 root 43: #define FDT0 (env->ft0.fd)
44: #define FDT1 (env->ft1.fd)
45: #define FDT2 (env->ft2.fd)
46: #define FST0 (env->ft0.fs[FP_ENDIAN_IDX])
47: #define FST1 (env->ft1.fs[FP_ENDIAN_IDX])
48: #define FST2 (env->ft2.fs[FP_ENDIAN_IDX])
49: #define DT0 (env->ft0.d)
50: #define DT1 (env->ft1.d)
51: #define DT2 (env->ft2.d)
52: #define WT0 (env->ft0.w[FP_ENDIAN_IDX])
53: #define WT1 (env->ft1.w[FP_ENDIAN_IDX])
54: #define WT2 (env->ft2.w[FP_ENDIAN_IDX])
1.1 root 55: #endif
56:
57: #if defined (DEBUG_OP)
1.1.1.5 ! root 58: # define RETURN() __asm__ __volatile__("nop" : : : "memory");
1.1 root 59: #else
1.1.1.5 ! root 60: # define RETURN() __asm__ __volatile__("" : : : "memory");
1.1 root 61: #endif
62:
63: #include "cpu.h"
64: #include "exec-all.h"
65:
66: #if !defined(CONFIG_USER_ONLY)
1.1.1.2 root 67: #include "softmmu_exec.h"
1.1 root 68: #endif /* !defined(CONFIG_USER_ONLY) */
69:
70: static inline void env_to_regs(void)
71: {
72: }
73:
74: static inline void regs_to_env(void)
75: {
76: }
77:
1.1.1.5 ! root 78: #ifdef MIPS_HAS_MIPS64
! 79: #if TARGET_LONG_BITS > HOST_LONG_BITS
! 80: void do_dsll (void);
! 81: void do_dsll32 (void);
! 82: void do_dsra (void);
! 83: void do_dsra32 (void);
! 84: void do_dsrl (void);
! 85: void do_dsrl32 (void);
! 86: void do_drotr (void);
! 87: void do_drotr32 (void);
! 88: void do_dsllv (void);
! 89: void do_dsrav (void);
! 90: void do_dsrlv (void);
! 91: void do_drotrv (void);
! 92: #endif
! 93: #endif
! 94:
! 95: #if TARGET_LONG_BITS > HOST_LONG_BITS
1.1 root 96: void do_mult (void);
97: void do_multu (void);
98: void do_madd (void);
99: void do_maddu (void);
100: void do_msub (void);
101: void do_msubu (void);
1.1.1.5 ! root 102: void do_ddiv (void);
! 103: void do_ddivu (void);
1.1 root 104: #endif
1.1.1.5 ! root 105: #ifdef MIPS_HAS_MIPS64
! 106: void do_dmult (void);
! 107: void do_dmultu (void);
! 108: #endif
! 109: void do_mfc0_random(void);
! 110: void do_mfc0_count(void);
! 111: void do_mtc0_entryhi(uint32_t in);
! 112: void do_mtc0_status_debug(uint32_t old, uint32_t val);
! 113: void do_mtc0_status_irqraise_debug(void);
1.1 root 114: void do_tlbwi (void);
115: void do_tlbwr (void);
116: void do_tlbp (void);
117: void do_tlbr (void);
1.1.1.4 root 118: #ifdef MIPS_USES_FPU
119: void dump_fpu(CPUState *env);
120: void fpu_dump_state(CPUState *env, FILE *f,
121: int (*fpu_fprintf)(FILE *f, const char *fmt, ...),
122: int flags);
123: #endif
124: void dump_sc (void);
1.1.1.2 root 125: void do_lwl_raw (uint32_t);
126: void do_lwr_raw (uint32_t);
127: uint32_t do_swl_raw (uint32_t);
128: uint32_t do_swr_raw (uint32_t);
1.1.1.5 ! root 129: #ifdef MIPS_HAS_MIPS64
! 130: void do_ldl_raw (uint64_t);
! 131: void do_ldr_raw (uint64_t);
! 132: uint64_t do_sdl_raw (uint64_t);
! 133: uint64_t do_sdr_raw (uint64_t);
! 134: #endif
1.1 root 135: #if !defined(CONFIG_USER_ONLY)
1.1.1.2 root 136: void do_lwl_user (uint32_t);
137: void do_lwl_kernel (uint32_t);
138: void do_lwr_user (uint32_t);
139: void do_lwr_kernel (uint32_t);
140: uint32_t do_swl_user (uint32_t);
141: uint32_t do_swl_kernel (uint32_t);
142: uint32_t do_swr_user (uint32_t);
143: uint32_t do_swr_kernel (uint32_t);
1.1.1.5 ! root 144: #ifdef MIPS_HAS_MIPS64
! 145: void do_ldl_user (uint64_t);
! 146: void do_ldl_kernel (uint64_t);
! 147: void do_ldr_user (uint64_t);
! 148: void do_ldr_kernel (uint64_t);
! 149: uint64_t do_sdl_user (uint64_t);
! 150: uint64_t do_sdl_kernel (uint64_t);
! 151: uint64_t do_sdr_user (uint64_t);
! 152: uint64_t do_sdr_kernel (uint64_t);
! 153: #endif
1.1 root 154: #endif
155: void do_pmon (int function);
156:
1.1.1.3 root 157: void dump_sc (void);
158:
1.1 root 159: int cpu_mips_handle_mmu_fault (CPUState *env, target_ulong address, int rw,
160: int is_user, int is_softmmu);
161: void do_interrupt (CPUState *env);
1.1.1.5 ! root 162: void invalidate_tlb (CPUState *env, int idx, int use_extra);
1.1 root 163:
164: void cpu_loop_exit(void);
165: void do_raise_exception_err (uint32_t exception, int error_code);
166: void do_raise_exception (uint32_t exception);
1.1.1.2 root 167: void do_raise_exception_direct (uint32_t exception);
1.1 root 168:
169: void cpu_dump_state(CPUState *env, FILE *f,
170: int (*cpu_fprintf)(FILE *f, const char *fmt, ...),
171: int flags);
172: void cpu_mips_irqctrl_init (void);
173: uint32_t cpu_mips_get_random (CPUState *env);
174: uint32_t cpu_mips_get_count (CPUState *env);
175: void cpu_mips_store_count (CPUState *env, uint32_t value);
176: void cpu_mips_store_compare (CPUState *env, uint32_t value);
1.1.1.5 ! root 177: void cpu_mips_update_irq(CPUState *env);
1.1 root 178: void cpu_mips_clock_init (CPUState *env);
1.1.1.5 ! root 179: void cpu_mips_tlb_flush (CPUState *env, int flush_global);
1.1 root 180:
181: #endif /* !defined(__QEMU_MIPS_EXEC_H__) */
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