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1.1 root 1: #if !defined(__QEMU_MIPS_EXEC_H__)
2: #define __QEMU_MIPS_EXEC_H__
3:
1.1.1.2 root 4: //#define DEBUG_OP
1.1 root 5:
1.1.1.5 root 6: #include "config.h"
1.1 root 7: #include "mips-defs.h"
8: #include "dyngen-exec.h"
1.1.1.6 ! root 9: #include "cpu-defs.h"
1.1 root 10:
11: register struct CPUMIPSState *env asm(AREG0);
12:
1.1.1.5 root 13: #if TARGET_LONG_BITS > HOST_LONG_BITS
14: #define T0 (env->t0)
15: #define T1 (env->t1)
16: #define T2 (env->t2)
17: #else
1.1.1.6 ! root 18: register target_ulong T0 asm(AREG1);
! 19: register target_ulong T1 asm(AREG2);
! 20: register target_ulong T2 asm(AREG3);
1.1.1.5 root 21: #endif
1.1 root 22:
23: #if defined (USE_HOST_FLOAT_REGS)
1.1.1.4 root 24: #error "implement me."
1.1 root 25: #else
1.1.1.6 ! root 26: #define FDT0 (env->fpu->ft0.fd)
! 27: #define FDT1 (env->fpu->ft1.fd)
! 28: #define FDT2 (env->fpu->ft2.fd)
! 29: #define FST0 (env->fpu->ft0.fs[FP_ENDIAN_IDX])
! 30: #define FST1 (env->fpu->ft1.fs[FP_ENDIAN_IDX])
! 31: #define FST2 (env->fpu->ft2.fs[FP_ENDIAN_IDX])
! 32: #define FSTH0 (env->fpu->ft0.fs[!FP_ENDIAN_IDX])
! 33: #define FSTH1 (env->fpu->ft1.fs[!FP_ENDIAN_IDX])
! 34: #define FSTH2 (env->fpu->ft2.fs[!FP_ENDIAN_IDX])
! 35: #define DT0 (env->fpu->ft0.d)
! 36: #define DT1 (env->fpu->ft1.d)
! 37: #define DT2 (env->fpu->ft2.d)
! 38: #define WT0 (env->fpu->ft0.w[FP_ENDIAN_IDX])
! 39: #define WT1 (env->fpu->ft1.w[FP_ENDIAN_IDX])
! 40: #define WT2 (env->fpu->ft2.w[FP_ENDIAN_IDX])
! 41: #define WTH0 (env->fpu->ft0.w[!FP_ENDIAN_IDX])
! 42: #define WTH1 (env->fpu->ft1.w[!FP_ENDIAN_IDX])
! 43: #define WTH2 (env->fpu->ft2.w[!FP_ENDIAN_IDX])
1.1 root 44: #endif
45:
46: #include "cpu.h"
47: #include "exec-all.h"
48:
49: #if !defined(CONFIG_USER_ONLY)
1.1.1.2 root 50: #include "softmmu_exec.h"
1.1 root 51: #endif /* !defined(CONFIG_USER_ONLY) */
52:
1.1.1.6 ! root 53: #if defined(TARGET_MIPS64)
1.1.1.5 root 54: #if TARGET_LONG_BITS > HOST_LONG_BITS
55: void do_dsll (void);
56: void do_dsll32 (void);
57: void do_dsra (void);
58: void do_dsra32 (void);
59: void do_dsrl (void);
60: void do_dsrl32 (void);
61: void do_drotr (void);
62: void do_drotr32 (void);
63: void do_dsllv (void);
64: void do_dsrav (void);
65: void do_dsrlv (void);
66: void do_drotrv (void);
1.1.1.6 ! root 67: void do_dclo (void);
! 68: void do_dclz (void);
1.1.1.5 root 69: #endif
70: #endif
71:
1.1.1.6 ! root 72: #if HOST_LONG_BITS < 64
! 73: void do_div (void);
! 74: #endif
1.1.1.5 root 75: #if TARGET_LONG_BITS > HOST_LONG_BITS
1.1 root 76: void do_mult (void);
77: void do_multu (void);
78: void do_madd (void);
79: void do_maddu (void);
80: void do_msub (void);
81: void do_msubu (void);
1.1.1.6 ! root 82: void do_muls (void);
! 83: void do_mulsu (void);
! 84: void do_macc (void);
! 85: void do_macchi (void);
! 86: void do_maccu (void);
! 87: void do_macchiu (void);
! 88: void do_msac (void);
! 89: void do_msachi (void);
! 90: void do_msacu (void);
! 91: void do_msachiu (void);
! 92: void do_mulhi (void);
! 93: void do_mulhiu (void);
! 94: void do_mulshi (void);
! 95: void do_mulshiu (void);
! 96: #endif
! 97: #if defined(TARGET_MIPS64)
1.1.1.5 root 98: void do_ddiv (void);
1.1.1.6 ! root 99: #if TARGET_LONG_BITS > HOST_LONG_BITS
1.1.1.5 root 100: void do_ddivu (void);
1.1 root 101: #endif
1.1.1.5 root 102: #endif
103: void do_mfc0_random(void);
104: void do_mfc0_count(void);
105: void do_mtc0_entryhi(uint32_t in);
106: void do_mtc0_status_debug(uint32_t old, uint32_t val);
107: void do_mtc0_status_irqraise_debug(void);
1.1.1.4 root 108: void dump_fpu(CPUState *env);
1.1.1.6 ! root 109: void fpu_dump_state(CPUState *env, FILE *f,
1.1.1.4 root 110: int (*fpu_fprintf)(FILE *f, const char *fmt, ...),
111: int flags);
112: void dump_sc (void);
1.1 root 113: void do_pmon (int function);
114:
1.1.1.3 root 115: void dump_sc (void);
116:
1.1 root 117: int cpu_mips_handle_mmu_fault (CPUState *env, target_ulong address, int rw,
1.1.1.6 ! root 118: int mmu_idx, int is_softmmu);
1.1 root 119: void do_interrupt (CPUState *env);
1.1.1.6 ! root 120: void r4k_invalidate_tlb (CPUState *env, int idx, int use_extra);
1.1 root 121:
122: void cpu_loop_exit(void);
123: void do_raise_exception_err (uint32_t exception, int error_code);
124: void do_raise_exception (uint32_t exception);
1.1.1.6 ! root 125: void do_raise_exception_direct_err (uint32_t exception, int error_code);
1.1.1.2 root 126: void do_raise_exception_direct (uint32_t exception);
1.1 root 127:
1.1.1.6 ! root 128: void cpu_dump_state(CPUState *env, FILE *f,
1.1 root 129: int (*cpu_fprintf)(FILE *f, const char *fmt, ...),
130: int flags);
131: void cpu_mips_irqctrl_init (void);
132: uint32_t cpu_mips_get_random (CPUState *env);
133: uint32_t cpu_mips_get_count (CPUState *env);
134: void cpu_mips_store_count (CPUState *env, uint32_t value);
135: void cpu_mips_store_compare (CPUState *env, uint32_t value);
1.1.1.6 ! root 136: void cpu_mips_start_count(CPUState *env);
! 137: void cpu_mips_stop_count(CPUState *env);
! 138: void cpu_mips_update_irq (CPUState *env);
1.1 root 139: void cpu_mips_clock_init (CPUState *env);
1.1.1.5 root 140: void cpu_mips_tlb_flush (CPUState *env, int flush_global);
1.1 root 141:
1.1.1.6 ! root 142: void do_cfc1 (int reg);
! 143: void do_ctc1 (int reg);
! 144:
! 145: #define FOP_PROTO(op) \
! 146: void do_float_ ## op ## _s(void); \
! 147: void do_float_ ## op ## _d(void);
! 148: FOP_PROTO(roundl)
! 149: FOP_PROTO(roundw)
! 150: FOP_PROTO(truncl)
! 151: FOP_PROTO(truncw)
! 152: FOP_PROTO(ceill)
! 153: FOP_PROTO(ceilw)
! 154: FOP_PROTO(floorl)
! 155: FOP_PROTO(floorw)
! 156: FOP_PROTO(rsqrt)
! 157: FOP_PROTO(recip)
! 158: #undef FOP_PROTO
! 159:
! 160: #define FOP_PROTO(op) \
! 161: void do_float_ ## op ## _s(void); \
! 162: void do_float_ ## op ## _d(void); \
! 163: void do_float_ ## op ## _ps(void);
! 164: FOP_PROTO(add)
! 165: FOP_PROTO(sub)
! 166: FOP_PROTO(mul)
! 167: FOP_PROTO(div)
! 168: FOP_PROTO(recip1)
! 169: FOP_PROTO(recip2)
! 170: FOP_PROTO(rsqrt1)
! 171: FOP_PROTO(rsqrt2)
! 172: #undef FOP_PROTO
! 173:
! 174: void do_float_cvtd_s(void);
! 175: void do_float_cvtd_w(void);
! 176: void do_float_cvtd_l(void);
! 177: void do_float_cvtl_d(void);
! 178: void do_float_cvtl_s(void);
! 179: void do_float_cvtps_pw(void);
! 180: void do_float_cvtpw_ps(void);
! 181: void do_float_cvts_d(void);
! 182: void do_float_cvts_w(void);
! 183: void do_float_cvts_l(void);
! 184: void do_float_cvts_pl(void);
! 185: void do_float_cvts_pu(void);
! 186: void do_float_cvtw_s(void);
! 187: void do_float_cvtw_d(void);
! 188:
! 189: void do_float_addr_ps(void);
! 190: void do_float_mulr_ps(void);
! 191:
! 192: #define FOP_PROTO(op) \
! 193: void do_cmp_d_ ## op(long cc); \
! 194: void do_cmpabs_d_ ## op(long cc); \
! 195: void do_cmp_s_ ## op(long cc); \
! 196: void do_cmpabs_s_ ## op(long cc); \
! 197: void do_cmp_ps_ ## op(long cc); \
! 198: void do_cmpabs_ps_ ## op(long cc);
! 199:
! 200: FOP_PROTO(f)
! 201: FOP_PROTO(un)
! 202: FOP_PROTO(eq)
! 203: FOP_PROTO(ueq)
! 204: FOP_PROTO(olt)
! 205: FOP_PROTO(ult)
! 206: FOP_PROTO(ole)
! 207: FOP_PROTO(ule)
! 208: FOP_PROTO(sf)
! 209: FOP_PROTO(ngle)
! 210: FOP_PROTO(seq)
! 211: FOP_PROTO(ngl)
! 212: FOP_PROTO(lt)
! 213: FOP_PROTO(nge)
! 214: FOP_PROTO(le)
! 215: FOP_PROTO(ngt)
! 216: #undef FOP_PROTO
! 217:
! 218: static always_inline void env_to_regs(void)
! 219: {
! 220: }
! 221:
! 222: static always_inline void regs_to_env(void)
! 223: {
! 224: }
! 225:
! 226: static always_inline int cpu_halted(CPUState *env)
! 227: {
! 228: if (!env->halted)
! 229: return 0;
! 230: if (env->interrupt_request &
! 231: (CPU_INTERRUPT_HARD | CPU_INTERRUPT_TIMER)) {
! 232: env->halted = 0;
! 233: return 0;
! 234: }
! 235: return EXCP_HALTED;
! 236: }
! 237:
! 238: static always_inline void compute_hflags(CPUState *env)
! 239: {
! 240: env->hflags &= ~(MIPS_HFLAG_COP1X | MIPS_HFLAG_64 | MIPS_HFLAG_CP0 |
! 241: MIPS_HFLAG_F64 | MIPS_HFLAG_FPU | MIPS_HFLAG_KSU);
! 242: if (!(env->CP0_Status & (1 << CP0St_EXL)) &&
! 243: !(env->CP0_Status & (1 << CP0St_ERL)) &&
! 244: !(env->hflags & MIPS_HFLAG_DM)) {
! 245: env->hflags |= (env->CP0_Status >> CP0St_KSU) & MIPS_HFLAG_KSU;
! 246: }
! 247: #if defined(TARGET_MIPS64)
! 248: if (((env->hflags & MIPS_HFLAG_KSU) != MIPS_HFLAG_UM) ||
! 249: (env->CP0_Status & (1 << CP0St_PX)) ||
! 250: (env->CP0_Status & (1 << CP0St_UX)))
! 251: env->hflags |= MIPS_HFLAG_64;
! 252: #endif
! 253: if ((env->CP0_Status & (1 << CP0St_CU0)) ||
! 254: !(env->hflags & MIPS_HFLAG_KSU))
! 255: env->hflags |= MIPS_HFLAG_CP0;
! 256: if (env->CP0_Status & (1 << CP0St_CU1))
! 257: env->hflags |= MIPS_HFLAG_FPU;
! 258: if (env->CP0_Status & (1 << CP0St_FR))
! 259: env->hflags |= MIPS_HFLAG_F64;
! 260: if (env->insn_flags & ISA_MIPS32R2) {
! 261: if (env->fpu->fcr0 & FCR0_F64)
! 262: env->hflags |= MIPS_HFLAG_COP1X;
! 263: } else if (env->insn_flags & ISA_MIPS32) {
! 264: if (env->hflags & MIPS_HFLAG_64)
! 265: env->hflags |= MIPS_HFLAG_COP1X;
! 266: } else if (env->insn_flags & ISA_MIPS4) {
! 267: /* All supported MIPS IV CPUs use the XX (CU3) to enable
! 268: and disable the MIPS IV extensions to the MIPS III ISA.
! 269: Some other MIPS IV CPUs ignore the bit, so the check here
! 270: would be too restrictive for them. */
! 271: if (env->CP0_Status & (1 << CP0St_CU3))
! 272: env->hflags |= MIPS_HFLAG_COP1X;
! 273: }
! 274: }
! 275:
1.1 root 276: #endif /* !defined(__QEMU_MIPS_EXEC_H__) */
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