Diff for /qemu/target-ppc/exec.h between versions and

version, 2018/04/24 16:46:15 version, 2018/04/24 16:49:04
Line 1 Line 1
 /*  /*
  *  PowerPC emulation definitions for qemu.   *  PowerPC emulation definitions for qemu.
  *    *
  *  Copyright (c) 2003-2005 Jocelyn Mayer   *  Copyright (c) 2003-2007 Jocelyn Mayer
  *   *
  * This library is free software; you can redistribute it and/or   * This library is free software; you can redistribute it and/or
  * modify it under the terms of the GNU Lesser General Public   * modify it under the terms of the GNU Lesser General Public
Line 24 Line 24
 #include "dyngen-exec.h"  #include "dyngen-exec.h"
 #define TARGET_LONG_BITS 32  #include "cpu.h"
   #include "exec-all.h"
   /* For normal operations, precise emulation should not be needed */
 register struct CPUPPCState *env asm(AREG0);  register struct CPUPPCState *env asm(AREG0);
 register uint32_t T0 asm(AREG1);  #if TARGET_LONG_BITS > HOST_LONG_BITS
 register uint32_t T1 asm(AREG2);  /* no registers can be used */
 register uint32_t T2 asm(AREG3);  #define T0 (env->t0)
   #define T1 (env->t1)
   #define T2 (env->t2)
   #define TDX "%016" PRIx64
   register unsigned long T0 asm(AREG1);
   register unsigned long T1 asm(AREG2);
   register unsigned long T2 asm(AREG3);
   #define TDX "%016lx"
   /* We may, sometime, need 64 bits registers on 32 bits targets */
   #if (HOST_LONG_BITS == 32)
   /* no registers can be used */
   #define T0_64 (env->t0)
   #define T1_64 (env->t1)
   #define T2_64 (env->t2)
   #define T0_64 T0
   #define T1_64 T1
   #define T2_64 T2
   /* Provision for Altivec */
   #define AVR0 (env->avr0)
   #define AVR1 (env->avr1)
   #define AVR2 (env->avr2)
 #define PARAM(n) ((uint32_t)PARAM##n)  
 #define SPARAM(n) ((int32_t)PARAM##n)  
 #define FT0 (env->ft0)  #define FT0 (env->ft0)
 #define FT1 (env->ft1)  #define FT1 (env->ft1)
 #define FT2 (env->ft2)  #define FT2 (env->ft2)
Line 43  register uint32_t T2 asm(AREG3); Line 70  register uint32_t T2 asm(AREG3);
 # define RETURN() __asm__ __volatile__("" : : : "memory");  # define RETURN() __asm__ __volatile__("" : : : "memory");
 #endif  #endif
 #include "cpu.h"  static always_inline target_ulong rotl8 (target_ulong i, int n)
 #include "exec-all.h"  {
       return (((uint8_t)i << n) | ((uint8_t)i >> (8 - n)));
 static inline uint32_t rotl (uint32_t i, int n)  static always_inline target_ulong rotl16 (target_ulong i, int n)
 {  {
     return ((i << n) | (i >> (32 - n)));      return (((uint16_t)i << n) | ((uint16_t)i >> (16 - n)));
 }  }
   static always_inline target_ulong rotl32 (target_ulong i, int n)
       return (((uint32_t)i << n) | ((uint32_t)i >> (32 - n)));
   #if defined(TARGET_PPC64)
   static always_inline target_ulong rotl64 (target_ulong i, int n)
       return (((uint64_t)i << n) | ((uint64_t)i >> (64 - n)));
 #if !defined(CONFIG_USER_ONLY)  #if !defined(CONFIG_USER_ONLY)
 #include "softmmu_exec.h"  #include "softmmu_exec.h"
 #endif /* !defined(CONFIG_USER_ONLY) */  #endif /* !defined(CONFIG_USER_ONLY) */
Line 58  static inline uint32_t rotl (uint32_t i, Line 99  static inline uint32_t rotl (uint32_t i,
 void do_raise_exception_err (uint32_t exception, int error_code);  void do_raise_exception_err (uint32_t exception, int error_code);
 void do_raise_exception (uint32_t exception);  void do_raise_exception (uint32_t exception);
 void do_sraw(void);  int get_physical_address (CPUState *env, mmu_ctx_t *ctx, target_ulong vaddr,
                             int rw, int access_type);
 void do_fctiw (void);  
 void do_fctiwz (void);  
 void do_fnmadd (void);  
 void do_fnmsub (void);  
 void do_fsqrt (void);  
 void do_fres (void);  
 void do_frsqrte (void);  
 void do_fsel (void);  
 void do_fcmpu (void);  
 void do_fcmpo (void);  
 void do_check_reservation (void);  void ppc6xx_tlb_store (CPUState *env, target_ulong EPN, int way, int is_code,
 void do_icbi (void);                         target_ulong pte0, target_ulong pte1);
 void do_tlbia (void);  
 void do_tlbie (void);  
 static inline void env_to_regs(void)  static always_inline void env_to_regs (void)
 {  {
 }  }
 static inline void regs_to_env(void)  static always_inline void regs_to_env (void)
 {  {
 }  }
 int cpu_ppc_handle_mmu_fault (CPUState *env, uint32_t address, int rw,  int cpu_ppc_handle_mmu_fault (CPUState *env, target_ulong address, int rw,
                               int is_user, int is_softmmu);                                int mmu_idx, int is_softmmu);
   static always_inline int cpu_halted (CPUState *env)
       if (!env->halted)
           return 0;
       if (msr_ee && (env->interrupt_request & CPU_INTERRUPT_HARD)) {
           env->halted = 0;
           return 0;
       return EXCP_HALTED;
 #endif /* !defined (__PPC_H__) */  #endif /* !defined (__PPC_H__) */

Removed from v.  
changed lines
  Added in v.