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1.1 root 1: /*
2: * PowerPC emulation definitions for qemu.
1.1.1.4 ! root 3: *
! 4: * Copyright (c) 2003-2007 Jocelyn Mayer
1.1 root 5: *
6: * This library is free software; you can redistribute it and/or
7: * modify it under the terms of the GNU Lesser General Public
8: * License as published by the Free Software Foundation; either
9: * version 2 of the License, or (at your option) any later version.
10: *
11: * This library is distributed in the hope that it will be useful,
12: * but WITHOUT ANY WARRANTY; without even the implied warranty of
13: * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14: * Lesser General Public License for more details.
15: *
16: * You should have received a copy of the GNU Lesser General Public
17: * License along with this library; if not, write to the Free Software
18: * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19: */
20: #if !defined (__PPC_H__)
21: #define __PPC_H__
22:
23: #include "config.h"
24:
25: #include "dyngen-exec.h"
26:
1.1.1.4 ! root 27: #include "cpu.h"
! 28: #include "exec-all.h"
! 29:
! 30: /* For normal operations, precise emulation should not be needed */
! 31: //#define USE_PRECISE_EMULATION 1
! 32: #define USE_PRECISE_EMULATION 0
1.1 root 33:
34: register struct CPUPPCState *env asm(AREG0);
1.1.1.4 ! root 35: #if TARGET_LONG_BITS > HOST_LONG_BITS
! 36: /* no registers can be used */
! 37: #define T0 (env->t0)
! 38: #define T1 (env->t1)
! 39: #define T2 (env->t2)
! 40: #define TDX "%016" PRIx64
! 41: #else
! 42: register unsigned long T0 asm(AREG1);
! 43: register unsigned long T1 asm(AREG2);
! 44: register unsigned long T2 asm(AREG3);
! 45: #define TDX "%016lx"
! 46: #endif
! 47: /* We may, sometime, need 64 bits registers on 32 bits targets */
! 48: #if (HOST_LONG_BITS == 32)
! 49: /* no registers can be used */
! 50: #define T0_64 (env->t0)
! 51: #define T1_64 (env->t1)
! 52: #define T2_64 (env->t2)
! 53: #else
! 54: #define T0_64 T0
! 55: #define T1_64 T1
! 56: #define T2_64 T2
! 57: #endif
! 58: /* Provision for Altivec */
! 59: #define AVR0 (env->avr0)
! 60: #define AVR1 (env->avr1)
! 61: #define AVR2 (env->avr2)
1.1 root 62:
63: #define FT0 (env->ft0)
64: #define FT1 (env->ft1)
65: #define FT2 (env->ft2)
66:
67: #if defined (DEBUG_OP)
1.1.1.3 root 68: # define RETURN() __asm__ __volatile__("nop" : : : "memory");
1.1 root 69: #else
1.1.1.3 root 70: # define RETURN() __asm__ __volatile__("" : : : "memory");
1.1 root 71: #endif
72:
1.1.1.4 ! root 73: static always_inline target_ulong rotl8 (target_ulong i, int n)
! 74: {
! 75: return (((uint8_t)i << n) | ((uint8_t)i >> (8 - n)));
! 76: }
1.1 root 77:
1.1.1.4 ! root 78: static always_inline target_ulong rotl16 (target_ulong i, int n)
1.1 root 79: {
1.1.1.4 ! root 80: return (((uint16_t)i << n) | ((uint16_t)i >> (16 - n)));
1.1 root 81: }
82:
1.1.1.4 ! root 83: static always_inline target_ulong rotl32 (target_ulong i, int n)
! 84: {
! 85: return (((uint32_t)i << n) | ((uint32_t)i >> (32 - n)));
! 86: }
! 87:
! 88: #if defined(TARGET_PPC64)
! 89: static always_inline target_ulong rotl64 (target_ulong i, int n)
! 90: {
! 91: return (((uint64_t)i << n) | ((uint64_t)i >> (64 - n)));
! 92: }
! 93: #endif
! 94:
1.1 root 95: #if !defined(CONFIG_USER_ONLY)
1.1.1.2 root 96: #include "softmmu_exec.h"
1.1 root 97: #endif /* !defined(CONFIG_USER_ONLY) */
98:
99: void do_raise_exception_err (uint32_t exception, int error_code);
100: void do_raise_exception (uint32_t exception);
101:
1.1.1.4 ! root 102: int get_physical_address (CPUState *env, mmu_ctx_t *ctx, target_ulong vaddr,
! 103: int rw, int access_type);
1.1 root 104:
1.1.1.4 ! root 105: void ppc6xx_tlb_store (CPUState *env, target_ulong EPN, int way, int is_code,
! 106: target_ulong pte0, target_ulong pte1);
1.1 root 107:
1.1.1.4 ! root 108: static always_inline void env_to_regs (void)
1.1 root 109: {
110: }
111:
1.1.1.4 ! root 112: static always_inline void regs_to_env (void)
1.1 root 113: {
114: }
115:
1.1.1.4 ! root 116: int cpu_ppc_handle_mmu_fault (CPUState *env, target_ulong address, int rw,
! 117: int mmu_idx, int is_softmmu);
! 118:
! 119: static always_inline int cpu_halted (CPUState *env)
! 120: {
! 121: if (!env->halted)
! 122: return 0;
! 123: if (msr_ee && (env->interrupt_request & CPU_INTERRUPT_HARD)) {
! 124: env->halted = 0;
! 125: return 0;
! 126: }
! 127: return EXCP_HALTED;
! 128: }
1.1 root 129:
130: #endif /* !defined (__PPC_H__) */
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