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1.1 root 1: /*
2: * PowerPC CPU initialization for qemu.
1.1.1.4 ! root 3: *
! 4: * Copyright (c) 2003-2007 Jocelyn Mayer
1.1 root 5: *
6: * This library is free software; you can redistribute it and/or
7: * modify it under the terms of the GNU Lesser General Public
8: * License as published by the Free Software Foundation; either
9: * version 2 of the License, or (at your option) any later version.
10: *
11: * This library is distributed in the hope that it will be useful,
12: * but WITHOUT ANY WARRANTY; without even the implied warranty of
13: * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14: * Lesser General Public License for more details.
15: *
16: * You should have received a copy of the GNU Lesser General Public
17: * License along with this library; if not, write to the Free Software
18: * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19: */
20:
21: /* A lot of PowerPC definition have been included here.
22: * Most of them are not usable for now but have been kept
23: * inside "#if defined(TODO) ... #endif" statements to make tests easier.
24: */
25:
1.1.1.4 ! root 26: #include "dis-asm.h"
! 27: #include "host-utils.h"
! 28:
1.1 root 29: //#define PPC_DUMP_CPU
30: //#define PPC_DEBUG_SPR
1.1.1.4 ! root 31: //#define PPC_DUMP_SPR_ACCESSES
! 32: #if defined(CONFIG_USER_ONLY)
! 33: #define TODO_USER_ONLY 1
! 34: #endif
1.1 root 35:
36: struct ppc_def_t {
37: const unsigned char *name;
38: uint32_t pvr;
1.1.1.4 ! root 39: uint32_t svr;
! 40: uint64_t insns_flags;
1.1 root 41: uint64_t msr_mask;
1.1.1.4 ! root 42: powerpc_mmu_t mmu_model;
! 43: powerpc_excp_t excp_model;
! 44: powerpc_input_t bus_model;
! 45: uint32_t flags;
! 46: int bfd_mach;
! 47: void (*init_proc)(CPUPPCState *env);
! 48: int (*check_pow)(CPUPPCState *env);
1.1 root 49: };
50:
1.1.1.4 ! root 51: /* For user-mode emulation, we don't emulate any IRQ controller */
! 52: #if defined(CONFIG_USER_ONLY)
! 53: #define PPC_IRQ_INIT_FN(name) \
! 54: static inline void glue(glue(ppc, name),_irq_init) (CPUPPCState *env) \
! 55: { \
! 56: }
! 57: #else
! 58: #define PPC_IRQ_INIT_FN(name) \
! 59: void glue(glue(ppc, name),_irq_init) (CPUPPCState *env);
! 60: #endif
! 61:
! 62: PPC_IRQ_INIT_FN(40x);
! 63: PPC_IRQ_INIT_FN(6xx);
! 64: PPC_IRQ_INIT_FN(970);
! 65:
1.1 root 66: /* Generic callbacks:
67: * do nothing but store/retrieve spr value
68: */
1.1.1.4 ! root 69: #ifdef PPC_DUMP_SPR_ACCESSES
! 70: static void spr_read_generic (void *opaque, int sprn)
! 71: {
! 72: gen_op_load_dump_spr(sprn);
! 73: }
! 74:
! 75: static void spr_write_generic (void *opaque, int sprn)
! 76: {
! 77: gen_op_store_dump_spr(sprn);
! 78: }
! 79: #else
1.1 root 80: static void spr_read_generic (void *opaque, int sprn)
81: {
82: gen_op_load_spr(sprn);
83: }
84:
85: static void spr_write_generic (void *opaque, int sprn)
86: {
87: gen_op_store_spr(sprn);
88: }
1.1.1.4 ! root 89: #endif
! 90:
! 91: #if !defined(CONFIG_USER_ONLY)
! 92: static void spr_write_clear (void *opaque, int sprn)
! 93: {
! 94: gen_op_mask_spr(sprn);
! 95: }
! 96: #endif
1.1 root 97:
1.1.1.4 ! root 98: /* SPR common to all PowerPC */
1.1 root 99: /* XER */
100: static void spr_read_xer (void *opaque, int sprn)
101: {
102: gen_op_load_xer();
103: }
104:
105: static void spr_write_xer (void *opaque, int sprn)
106: {
107: gen_op_store_xer();
108: }
109:
110: /* LR */
111: static void spr_read_lr (void *opaque, int sprn)
112: {
113: gen_op_load_lr();
114: }
115:
116: static void spr_write_lr (void *opaque, int sprn)
117: {
118: gen_op_store_lr();
119: }
120:
121: /* CTR */
122: static void spr_read_ctr (void *opaque, int sprn)
123: {
124: gen_op_load_ctr();
125: }
126:
127: static void spr_write_ctr (void *opaque, int sprn)
128: {
129: gen_op_store_ctr();
130: }
131:
132: /* User read access to SPR */
133: /* USPRx */
134: /* UMMCRx */
135: /* UPMCx */
136: /* USIA */
137: /* UDECR */
138: static void spr_read_ureg (void *opaque, int sprn)
139: {
140: gen_op_load_spr(sprn + 0x10);
141: }
142:
1.1.1.4 ! root 143: /* SPR common to all non-embedded PowerPC */
1.1 root 144: /* DECR */
1.1.1.4 ! root 145: #if !defined(CONFIG_USER_ONLY)
1.1 root 146: static void spr_read_decr (void *opaque, int sprn)
147: {
148: gen_op_load_decr();
149: }
150:
151: static void spr_write_decr (void *opaque, int sprn)
152: {
153: gen_op_store_decr();
154: }
1.1.1.4 ! root 155: #endif
1.1 root 156:
1.1.1.4 ! root 157: /* SPR common to all non-embedded PowerPC, except 601 */
1.1 root 158: /* Time base */
159: static void spr_read_tbl (void *opaque, int sprn)
160: {
161: gen_op_load_tbl();
162: }
163:
1.1.1.4 ! root 164: static void spr_read_tbu (void *opaque, int sprn)
1.1 root 165: {
1.1.1.4 ! root 166: gen_op_load_tbu();
1.1 root 167: }
168:
1.1.1.4 ! root 169: __attribute__ (( unused ))
! 170: static void spr_read_atbl (void *opaque, int sprn)
1.1 root 171: {
1.1.1.4 ! root 172: gen_op_load_atbl();
! 173: }
! 174:
! 175: __attribute__ (( unused ))
! 176: static void spr_read_atbu (void *opaque, int sprn)
! 177: {
! 178: gen_op_load_atbu();
! 179: }
! 180:
! 181: #if !defined(CONFIG_USER_ONLY)
! 182: static void spr_write_tbl (void *opaque, int sprn)
! 183: {
! 184: gen_op_store_tbl();
1.1 root 185: }
186:
187: static void spr_write_tbu (void *opaque, int sprn)
188: {
189: gen_op_store_tbu();
190: }
191:
1.1.1.4 ! root 192: __attribute__ (( unused ))
! 193: static void spr_write_atbl (void *opaque, int sprn)
! 194: {
! 195: gen_op_store_atbl();
! 196: }
! 197:
! 198: __attribute__ (( unused ))
! 199: static void spr_write_atbu (void *opaque, int sprn)
! 200: {
! 201: gen_op_store_atbu();
! 202: }
! 203: #endif
! 204:
! 205: #if !defined(CONFIG_USER_ONLY)
1.1 root 206: /* IBAT0U...IBAT0U */
207: /* IBAT0L...IBAT7L */
208: static void spr_read_ibat (void *opaque, int sprn)
209: {
210: gen_op_load_ibat(sprn & 1, (sprn - SPR_IBAT0U) / 2);
211: }
212:
213: static void spr_read_ibat_h (void *opaque, int sprn)
214: {
215: gen_op_load_ibat(sprn & 1, (sprn - SPR_IBAT4U) / 2);
216: }
217:
218: static void spr_write_ibatu (void *opaque, int sprn)
219: {
220: gen_op_store_ibatu((sprn - SPR_IBAT0U) / 2);
221: }
222:
223: static void spr_write_ibatu_h (void *opaque, int sprn)
224: {
225: gen_op_store_ibatu((sprn - SPR_IBAT4U) / 2);
226: }
227:
228: static void spr_write_ibatl (void *opaque, int sprn)
229: {
230: gen_op_store_ibatl((sprn - SPR_IBAT0L) / 2);
231: }
232:
233: static void spr_write_ibatl_h (void *opaque, int sprn)
234: {
235: gen_op_store_ibatl((sprn - SPR_IBAT4L) / 2);
236: }
237:
238: /* DBAT0U...DBAT7U */
239: /* DBAT0L...DBAT7L */
240: static void spr_read_dbat (void *opaque, int sprn)
241: {
242: gen_op_load_dbat(sprn & 1, (sprn - SPR_DBAT0U) / 2);
243: }
244:
245: static void spr_read_dbat_h (void *opaque, int sprn)
246: {
1.1.1.4 ! root 247: gen_op_load_dbat(sprn & 1, ((sprn - SPR_DBAT4U) / 2) + 4);
1.1 root 248: }
249:
250: static void spr_write_dbatu (void *opaque, int sprn)
251: {
252: gen_op_store_dbatu((sprn - SPR_DBAT0U) / 2);
253: }
254:
255: static void spr_write_dbatu_h (void *opaque, int sprn)
256: {
1.1.1.4 ! root 257: gen_op_store_dbatu(((sprn - SPR_DBAT4U) / 2) + 4);
1.1 root 258: }
259:
260: static void spr_write_dbatl (void *opaque, int sprn)
261: {
262: gen_op_store_dbatl((sprn - SPR_DBAT0L) / 2);
263: }
264:
265: static void spr_write_dbatl_h (void *opaque, int sprn)
266: {
1.1.1.4 ! root 267: gen_op_store_dbatl(((sprn - SPR_DBAT4L) / 2) + 4);
1.1 root 268: }
269:
270: /* SDR1 */
271: static void spr_read_sdr1 (void *opaque, int sprn)
272: {
273: gen_op_load_sdr1();
274: }
275:
276: static void spr_write_sdr1 (void *opaque, int sprn)
277: {
1.1.1.4 ! root 278: gen_op_store_sdr1();
! 279: }
! 280:
! 281: /* 64 bits PowerPC specific SPRs */
! 282: /* ASR */
! 283: #if defined(TARGET_PPC64)
! 284: static void spr_read_asr (void *opaque, int sprn)
! 285: {
! 286: gen_op_load_asr();
! 287: }
! 288:
! 289: static void spr_write_asr (void *opaque, int sprn)
! 290: {
! 291: gen_op_store_asr();
! 292: }
! 293: #endif
! 294: #endif
! 295:
! 296: /* PowerPC 601 specific registers */
! 297: /* RTC */
! 298: static void spr_read_601_rtcl (void *opaque, int sprn)
! 299: {
! 300: gen_op_load_601_rtcl();
! 301: }
! 302:
! 303: static void spr_read_601_rtcu (void *opaque, int sprn)
! 304: {
! 305: gen_op_load_601_rtcu();
! 306: }
! 307:
! 308: #if !defined(CONFIG_USER_ONLY)
! 309: static void spr_write_601_rtcu (void *opaque, int sprn)
! 310: {
! 311: gen_op_store_601_rtcu();
! 312: }
! 313:
! 314: static void spr_write_601_rtcl (void *opaque, int sprn)
! 315: {
! 316: gen_op_store_601_rtcl();
! 317: }
! 318:
! 319: static void spr_write_hid0_601 (void *opaque, int sprn)
! 320: {
1.1 root 321: DisasContext *ctx = opaque;
322:
1.1.1.4 ! root 323: gen_op_store_hid0_601();
! 324: /* Must stop the translation as endianness may have changed */
! 325: GEN_STOP(ctx);
! 326: }
! 327: #endif
! 328:
! 329: /* Unified bats */
! 330: #if !defined(CONFIG_USER_ONLY)
! 331: static void spr_read_601_ubat (void *opaque, int sprn)
! 332: {
! 333: gen_op_load_601_bat(sprn & 1, (sprn - SPR_IBAT0U) / 2);
! 334: }
! 335:
! 336: static void spr_write_601_ubatu (void *opaque, int sprn)
! 337: {
! 338: gen_op_store_601_batu((sprn - SPR_IBAT0U) / 2);
! 339: }
! 340:
! 341: static void spr_write_601_ubatl (void *opaque, int sprn)
! 342: {
! 343: gen_op_store_601_batl((sprn - SPR_IBAT0L) / 2);
! 344: }
! 345: #endif
! 346:
! 347: /* PowerPC 40x specific registers */
! 348: #if !defined(CONFIG_USER_ONLY)
! 349: static void spr_read_40x_pit (void *opaque, int sprn)
! 350: {
! 351: gen_op_load_40x_pit();
! 352: }
! 353:
! 354: static void spr_write_40x_pit (void *opaque, int sprn)
! 355: {
! 356: gen_op_store_40x_pit();
! 357: }
! 358:
! 359: static void spr_write_40x_dbcr0 (void *opaque, int sprn)
! 360: {
! 361: DisasContext *ctx = opaque;
! 362:
! 363: gen_op_store_40x_dbcr0();
! 364: /* We must stop translation as we may have rebooted */
! 365: GEN_STOP(ctx);
! 366: }
! 367:
! 368: static void spr_write_40x_sler (void *opaque, int sprn)
! 369: {
! 370: gen_op_store_40x_sler();
! 371: }
! 372:
! 373: static void spr_write_booke_tcr (void *opaque, int sprn)
! 374: {
! 375: gen_op_store_booke_tcr();
! 376: }
! 377:
! 378: static void spr_write_booke_tsr (void *opaque, int sprn)
! 379: {
! 380: gen_op_store_booke_tsr();
! 381: }
! 382: #endif
! 383:
! 384: /* PowerPC 403 specific registers */
! 385: /* PBL1 / PBU1 / PBL2 / PBU2 */
! 386: #if !defined(CONFIG_USER_ONLY)
! 387: static void spr_read_403_pbr (void *opaque, int sprn)
! 388: {
! 389: gen_op_load_403_pb(sprn - SPR_403_PBL1);
! 390: }
! 391:
! 392: static void spr_write_403_pbr (void *opaque, int sprn)
! 393: {
! 394: gen_op_store_403_pb(sprn - SPR_403_PBL1);
1.1 root 395: }
396:
397: static void spr_write_pir (void *opaque, int sprn)
398: {
399: gen_op_store_pir();
400: }
1.1.1.4 ! root 401: #endif
! 402:
! 403: #if !defined(CONFIG_USER_ONLY)
! 404: /* Callback used to write the exception vector base */
! 405: static void spr_write_excp_prefix (void *opaque, int sprn)
! 406: {
! 407: gen_op_store_excp_prefix();
! 408: gen_op_store_spr(sprn);
! 409: }
! 410:
! 411: static void spr_write_excp_vector (void *opaque, int sprn)
! 412: {
! 413: DisasContext *ctx = opaque;
! 414:
! 415: if (sprn >= SPR_BOOKE_IVOR0 && sprn <= SPR_BOOKE_IVOR15) {
! 416: gen_op_store_excp_vector(sprn - SPR_BOOKE_IVOR0);
! 417: gen_op_store_spr(sprn);
! 418: } else if (sprn >= SPR_BOOKE_IVOR32 && sprn <= SPR_BOOKE_IVOR37) {
! 419: gen_op_store_excp_vector(sprn - SPR_BOOKE_IVOR32 + 32);
! 420: gen_op_store_spr(sprn);
! 421: } else {
! 422: printf("Trying to write an unknown exception vector %d %03x\n",
! 423: sprn, sprn);
! 424: GEN_EXCP_PRIVREG(ctx);
! 425: }
! 426: }
! 427: #endif
1.1 root 428:
1.1.1.4 ! root 429: #if defined(CONFIG_USER_ONLY)
! 430: #define spr_register(env, num, name, uea_read, uea_write, \
! 431: oea_read, oea_write, initial_value) \
! 432: do { \
! 433: _spr_register(env, num, name, uea_read, uea_write, initial_value); \
! 434: } while (0)
! 435: static inline void _spr_register (CPUPPCState *env, int num,
! 436: const unsigned char *name,
! 437: void (*uea_read)(void *opaque, int sprn),
! 438: void (*uea_write)(void *opaque, int sprn),
! 439: target_ulong initial_value)
! 440: #else
1.1 root 441: static inline void spr_register (CPUPPCState *env, int num,
442: const unsigned char *name,
443: void (*uea_read)(void *opaque, int sprn),
444: void (*uea_write)(void *opaque, int sprn),
445: void (*oea_read)(void *opaque, int sprn),
446: void (*oea_write)(void *opaque, int sprn),
447: target_ulong initial_value)
1.1.1.4 ! root 448: #endif
1.1 root 449: {
450: ppc_spr_t *spr;
451:
452: spr = &env->spr_cb[num];
453: if (spr->name != NULL ||env-> spr[num] != 0x00000000 ||
1.1.1.4 ! root 454: #if !defined(CONFIG_USER_ONLY)
! 455: spr->oea_read != NULL || spr->oea_write != NULL ||
! 456: #endif
! 457: spr->uea_read != NULL || spr->uea_write != NULL) {
1.1 root 458: printf("Error: Trying to register SPR %d (%03x) twice !\n", num, num);
459: exit(1);
460: }
461: #if defined(PPC_DEBUG_SPR)
1.1.1.4 ! root 462: printf("*** register spr %d (%03x) %s val " ADDRX "\n", num, num, name,
! 463: initial_value);
1.1 root 464: #endif
465: spr->name = name;
466: spr->uea_read = uea_read;
467: spr->uea_write = uea_write;
1.1.1.4 ! root 468: #if !defined(CONFIG_USER_ONLY)
1.1 root 469: spr->oea_read = oea_read;
470: spr->oea_write = oea_write;
1.1.1.4 ! root 471: #endif
1.1 root 472: env->spr[num] = initial_value;
473: }
474:
475: /* Generic PowerPC SPRs */
476: static void gen_spr_generic (CPUPPCState *env)
477: {
478: /* Integer processing */
479: spr_register(env, SPR_XER, "XER",
480: &spr_read_xer, &spr_write_xer,
481: &spr_read_xer, &spr_write_xer,
482: 0x00000000);
483: /* Branch contol */
484: spr_register(env, SPR_LR, "LR",
485: &spr_read_lr, &spr_write_lr,
486: &spr_read_lr, &spr_write_lr,
487: 0x00000000);
488: spr_register(env, SPR_CTR, "CTR",
489: &spr_read_ctr, &spr_write_ctr,
490: &spr_read_ctr, &spr_write_ctr,
491: 0x00000000);
492: /* Interrupt processing */
493: spr_register(env, SPR_SRR0, "SRR0",
494: SPR_NOACCESS, SPR_NOACCESS,
495: &spr_read_generic, &spr_write_generic,
496: 0x00000000);
497: spr_register(env, SPR_SRR1, "SRR1",
498: SPR_NOACCESS, SPR_NOACCESS,
499: &spr_read_generic, &spr_write_generic,
500: 0x00000000);
501: /* Processor control */
502: spr_register(env, SPR_SPRG0, "SPRG0",
503: SPR_NOACCESS, SPR_NOACCESS,
504: &spr_read_generic, &spr_write_generic,
505: 0x00000000);
506: spr_register(env, SPR_SPRG1, "SPRG1",
507: SPR_NOACCESS, SPR_NOACCESS,
508: &spr_read_generic, &spr_write_generic,
509: 0x00000000);
510: spr_register(env, SPR_SPRG2, "SPRG2",
511: SPR_NOACCESS, SPR_NOACCESS,
512: &spr_read_generic, &spr_write_generic,
513: 0x00000000);
514: spr_register(env, SPR_SPRG3, "SPRG3",
515: SPR_NOACCESS, SPR_NOACCESS,
516: &spr_read_generic, &spr_write_generic,
517: 0x00000000);
518: }
519:
520: /* SPR common to all non-embedded PowerPC, including 601 */
521: static void gen_spr_ne_601 (CPUPPCState *env)
522: {
523: /* Exception processing */
524: spr_register(env, SPR_DSISR, "DSISR",
525: SPR_NOACCESS, SPR_NOACCESS,
526: &spr_read_generic, &spr_write_generic,
527: 0x00000000);
528: spr_register(env, SPR_DAR, "DAR",
529: SPR_NOACCESS, SPR_NOACCESS,
530: &spr_read_generic, &spr_write_generic,
531: 0x00000000);
532: /* Timer */
533: spr_register(env, SPR_DECR, "DECR",
534: SPR_NOACCESS, SPR_NOACCESS,
535: &spr_read_decr, &spr_write_decr,
536: 0x00000000);
537: /* Memory management */
538: spr_register(env, SPR_SDR1, "SDR1",
539: SPR_NOACCESS, SPR_NOACCESS,
540: &spr_read_sdr1, &spr_write_sdr1,
541: 0x00000000);
542: }
543:
544: /* BATs 0-3 */
545: static void gen_low_BATs (CPUPPCState *env)
546: {
1.1.1.4 ! root 547: #if !defined(CONFIG_USER_ONLY)
1.1 root 548: spr_register(env, SPR_IBAT0U, "IBAT0U",
549: SPR_NOACCESS, SPR_NOACCESS,
550: &spr_read_ibat, &spr_write_ibatu,
551: 0x00000000);
552: spr_register(env, SPR_IBAT0L, "IBAT0L",
553: SPR_NOACCESS, SPR_NOACCESS,
554: &spr_read_ibat, &spr_write_ibatl,
555: 0x00000000);
556: spr_register(env, SPR_IBAT1U, "IBAT1U",
557: SPR_NOACCESS, SPR_NOACCESS,
558: &spr_read_ibat, &spr_write_ibatu,
559: 0x00000000);
560: spr_register(env, SPR_IBAT1L, "IBAT1L",
561: SPR_NOACCESS, SPR_NOACCESS,
562: &spr_read_ibat, &spr_write_ibatl,
563: 0x00000000);
564: spr_register(env, SPR_IBAT2U, "IBAT2U",
565: SPR_NOACCESS, SPR_NOACCESS,
566: &spr_read_ibat, &spr_write_ibatu,
567: 0x00000000);
568: spr_register(env, SPR_IBAT2L, "IBAT2L",
569: SPR_NOACCESS, SPR_NOACCESS,
570: &spr_read_ibat, &spr_write_ibatl,
571: 0x00000000);
572: spr_register(env, SPR_IBAT3U, "IBAT3U",
573: SPR_NOACCESS, SPR_NOACCESS,
574: &spr_read_ibat, &spr_write_ibatu,
575: 0x00000000);
576: spr_register(env, SPR_IBAT3L, "IBAT3L",
577: SPR_NOACCESS, SPR_NOACCESS,
578: &spr_read_ibat, &spr_write_ibatl,
579: 0x00000000);
580: spr_register(env, SPR_DBAT0U, "DBAT0U",
581: SPR_NOACCESS, SPR_NOACCESS,
582: &spr_read_dbat, &spr_write_dbatu,
583: 0x00000000);
584: spr_register(env, SPR_DBAT0L, "DBAT0L",
585: SPR_NOACCESS, SPR_NOACCESS,
586: &spr_read_dbat, &spr_write_dbatl,
587: 0x00000000);
588: spr_register(env, SPR_DBAT1U, "DBAT1U",
589: SPR_NOACCESS, SPR_NOACCESS,
590: &spr_read_dbat, &spr_write_dbatu,
591: 0x00000000);
592: spr_register(env, SPR_DBAT1L, "DBAT1L",
593: SPR_NOACCESS, SPR_NOACCESS,
594: &spr_read_dbat, &spr_write_dbatl,
595: 0x00000000);
596: spr_register(env, SPR_DBAT2U, "DBAT2U",
597: SPR_NOACCESS, SPR_NOACCESS,
598: &spr_read_dbat, &spr_write_dbatu,
599: 0x00000000);
600: spr_register(env, SPR_DBAT2L, "DBAT2L",
601: SPR_NOACCESS, SPR_NOACCESS,
602: &spr_read_dbat, &spr_write_dbatl,
603: 0x00000000);
604: spr_register(env, SPR_DBAT3U, "DBAT3U",
605: SPR_NOACCESS, SPR_NOACCESS,
606: &spr_read_dbat, &spr_write_dbatu,
607: 0x00000000);
608: spr_register(env, SPR_DBAT3L, "DBAT3L",
609: SPR_NOACCESS, SPR_NOACCESS,
610: &spr_read_dbat, &spr_write_dbatl,
611: 0x00000000);
1.1.1.4 ! root 612: env->nb_BATs += 4;
! 613: #endif
1.1 root 614: }
615:
616: /* BATs 4-7 */
617: static void gen_high_BATs (CPUPPCState *env)
618: {
1.1.1.4 ! root 619: #if !defined(CONFIG_USER_ONLY)
1.1 root 620: spr_register(env, SPR_IBAT4U, "IBAT4U",
621: SPR_NOACCESS, SPR_NOACCESS,
622: &spr_read_ibat_h, &spr_write_ibatu_h,
623: 0x00000000);
624: spr_register(env, SPR_IBAT4L, "IBAT4L",
625: SPR_NOACCESS, SPR_NOACCESS,
626: &spr_read_ibat_h, &spr_write_ibatl_h,
627: 0x00000000);
628: spr_register(env, SPR_IBAT5U, "IBAT5U",
629: SPR_NOACCESS, SPR_NOACCESS,
630: &spr_read_ibat_h, &spr_write_ibatu_h,
631: 0x00000000);
632: spr_register(env, SPR_IBAT5L, "IBAT5L",
633: SPR_NOACCESS, SPR_NOACCESS,
634: &spr_read_ibat_h, &spr_write_ibatl_h,
635: 0x00000000);
636: spr_register(env, SPR_IBAT6U, "IBAT6U",
637: SPR_NOACCESS, SPR_NOACCESS,
638: &spr_read_ibat_h, &spr_write_ibatu_h,
639: 0x00000000);
640: spr_register(env, SPR_IBAT6L, "IBAT6L",
641: SPR_NOACCESS, SPR_NOACCESS,
642: &spr_read_ibat_h, &spr_write_ibatl_h,
643: 0x00000000);
644: spr_register(env, SPR_IBAT7U, "IBAT7U",
645: SPR_NOACCESS, SPR_NOACCESS,
646: &spr_read_ibat_h, &spr_write_ibatu_h,
647: 0x00000000);
648: spr_register(env, SPR_IBAT7L, "IBAT7L",
649: SPR_NOACCESS, SPR_NOACCESS,
650: &spr_read_ibat_h, &spr_write_ibatl_h,
651: 0x00000000);
652: spr_register(env, SPR_DBAT4U, "DBAT4U",
653: SPR_NOACCESS, SPR_NOACCESS,
654: &spr_read_dbat_h, &spr_write_dbatu_h,
655: 0x00000000);
656: spr_register(env, SPR_DBAT4L, "DBAT4L",
657: SPR_NOACCESS, SPR_NOACCESS,
658: &spr_read_dbat_h, &spr_write_dbatl_h,
659: 0x00000000);
660: spr_register(env, SPR_DBAT5U, "DBAT5U",
661: SPR_NOACCESS, SPR_NOACCESS,
662: &spr_read_dbat_h, &spr_write_dbatu_h,
663: 0x00000000);
664: spr_register(env, SPR_DBAT5L, "DBAT5L",
665: SPR_NOACCESS, SPR_NOACCESS,
666: &spr_read_dbat_h, &spr_write_dbatl_h,
667: 0x00000000);
668: spr_register(env, SPR_DBAT6U, "DBAT6U",
669: SPR_NOACCESS, SPR_NOACCESS,
670: &spr_read_dbat_h, &spr_write_dbatu_h,
671: 0x00000000);
672: spr_register(env, SPR_DBAT6L, "DBAT6L",
673: SPR_NOACCESS, SPR_NOACCESS,
674: &spr_read_dbat_h, &spr_write_dbatl_h,
675: 0x00000000);
676: spr_register(env, SPR_DBAT7U, "DBAT7U",
677: SPR_NOACCESS, SPR_NOACCESS,
678: &spr_read_dbat_h, &spr_write_dbatu_h,
679: 0x00000000);
680: spr_register(env, SPR_DBAT7L, "DBAT7L",
681: SPR_NOACCESS, SPR_NOACCESS,
682: &spr_read_dbat_h, &spr_write_dbatl_h,
683: 0x00000000);
1.1.1.4 ! root 684: env->nb_BATs += 4;
! 685: #endif
1.1 root 686: }
687:
688: /* Generic PowerPC time base */
689: static void gen_tbl (CPUPPCState *env)
690: {
691: spr_register(env, SPR_VTBL, "TBL",
692: &spr_read_tbl, SPR_NOACCESS,
693: &spr_read_tbl, SPR_NOACCESS,
694: 0x00000000);
695: spr_register(env, SPR_TBL, "TBL",
696: SPR_NOACCESS, SPR_NOACCESS,
697: SPR_NOACCESS, &spr_write_tbl,
698: 0x00000000);
699: spr_register(env, SPR_VTBU, "TBU",
700: &spr_read_tbu, SPR_NOACCESS,
701: &spr_read_tbu, SPR_NOACCESS,
702: 0x00000000);
703: spr_register(env, SPR_TBU, "TBU",
704: SPR_NOACCESS, SPR_NOACCESS,
705: SPR_NOACCESS, &spr_write_tbu,
706: 0x00000000);
707: }
708:
1.1.1.4 ! root 709: /* Softare table search registers */
! 710: static void gen_6xx_7xx_soft_tlb (CPUPPCState *env, int nb_tlbs, int nb_ways)
! 711: {
! 712: #if !defined(CONFIG_USER_ONLY)
! 713: env->nb_tlb = nb_tlbs;
! 714: env->nb_ways = nb_ways;
! 715: env->id_tlbs = 1;
! 716: spr_register(env, SPR_DMISS, "DMISS",
! 717: SPR_NOACCESS, SPR_NOACCESS,
! 718: &spr_read_generic, SPR_NOACCESS,
! 719: 0x00000000);
! 720: spr_register(env, SPR_DCMP, "DCMP",
! 721: SPR_NOACCESS, SPR_NOACCESS,
! 722: &spr_read_generic, SPR_NOACCESS,
! 723: 0x00000000);
! 724: spr_register(env, SPR_HASH1, "HASH1",
! 725: SPR_NOACCESS, SPR_NOACCESS,
! 726: &spr_read_generic, SPR_NOACCESS,
! 727: 0x00000000);
! 728: spr_register(env, SPR_HASH2, "HASH2",
! 729: SPR_NOACCESS, SPR_NOACCESS,
! 730: &spr_read_generic, SPR_NOACCESS,
! 731: 0x00000000);
! 732: spr_register(env, SPR_IMISS, "IMISS",
! 733: SPR_NOACCESS, SPR_NOACCESS,
! 734: &spr_read_generic, SPR_NOACCESS,
! 735: 0x00000000);
! 736: spr_register(env, SPR_ICMP, "ICMP",
! 737: SPR_NOACCESS, SPR_NOACCESS,
! 738: &spr_read_generic, SPR_NOACCESS,
! 739: 0x00000000);
! 740: spr_register(env, SPR_RPA, "RPA",
! 741: SPR_NOACCESS, SPR_NOACCESS,
! 742: &spr_read_generic, &spr_write_generic,
! 743: 0x00000000);
! 744: #endif
! 745: }
! 746:
! 747: /* SPR common to MPC755 and G2 */
! 748: static void gen_spr_G2_755 (CPUPPCState *env)
! 749: {
! 750: /* SGPRs */
! 751: spr_register(env, SPR_SPRG4, "SPRG4",
! 752: SPR_NOACCESS, SPR_NOACCESS,
! 753: &spr_read_generic, &spr_write_generic,
! 754: 0x00000000);
! 755: spr_register(env, SPR_SPRG5, "SPRG5",
! 756: SPR_NOACCESS, SPR_NOACCESS,
! 757: &spr_read_generic, &spr_write_generic,
! 758: 0x00000000);
! 759: spr_register(env, SPR_SPRG6, "SPRG6",
! 760: SPR_NOACCESS, SPR_NOACCESS,
! 761: &spr_read_generic, &spr_write_generic,
! 762: 0x00000000);
! 763: spr_register(env, SPR_SPRG7, "SPRG7",
! 764: SPR_NOACCESS, SPR_NOACCESS,
! 765: &spr_read_generic, &spr_write_generic,
! 766: 0x00000000);
! 767: }
! 768:
1.1 root 769: /* SPR common to all 7xx PowerPC implementations */
770: static void gen_spr_7xx (CPUPPCState *env)
771: {
772: /* Breakpoints */
773: /* XXX : not implemented */
774: spr_register(env, SPR_DABR, "DABR",
775: SPR_NOACCESS, SPR_NOACCESS,
776: &spr_read_generic, &spr_write_generic,
777: 0x00000000);
778: /* XXX : not implemented */
779: spr_register(env, SPR_IABR, "IABR",
780: SPR_NOACCESS, SPR_NOACCESS,
781: &spr_read_generic, &spr_write_generic,
782: 0x00000000);
783: /* Cache management */
784: /* XXX : not implemented */
785: spr_register(env, SPR_ICTC, "ICTC",
786: SPR_NOACCESS, SPR_NOACCESS,
787: &spr_read_generic, &spr_write_generic,
788: 0x00000000);
789: /* Performance monitors */
790: /* XXX : not implemented */
791: spr_register(env, SPR_MMCR0, "MMCR0",
792: SPR_NOACCESS, SPR_NOACCESS,
793: &spr_read_generic, &spr_write_generic,
794: 0x00000000);
795: /* XXX : not implemented */
796: spr_register(env, SPR_MMCR1, "MMCR1",
797: SPR_NOACCESS, SPR_NOACCESS,
798: &spr_read_generic, &spr_write_generic,
799: 0x00000000);
800: /* XXX : not implemented */
801: spr_register(env, SPR_PMC1, "PMC1",
802: SPR_NOACCESS, SPR_NOACCESS,
803: &spr_read_generic, &spr_write_generic,
804: 0x00000000);
805: /* XXX : not implemented */
806: spr_register(env, SPR_PMC2, "PMC2",
807: SPR_NOACCESS, SPR_NOACCESS,
808: &spr_read_generic, &spr_write_generic,
809: 0x00000000);
810: /* XXX : not implemented */
811: spr_register(env, SPR_PMC3, "PMC3",
812: SPR_NOACCESS, SPR_NOACCESS,
813: &spr_read_generic, &spr_write_generic,
814: 0x00000000);
815: /* XXX : not implemented */
816: spr_register(env, SPR_PMC4, "PMC4",
817: SPR_NOACCESS, SPR_NOACCESS,
818: &spr_read_generic, &spr_write_generic,
819: 0x00000000);
820: /* XXX : not implemented */
1.1.1.4 ! root 821: spr_register(env, SPR_SIAR, "SIAR",
1.1 root 822: SPR_NOACCESS, SPR_NOACCESS,
823: &spr_read_generic, SPR_NOACCESS,
824: 0x00000000);
1.1.1.4 ! root 825: /* XXX : not implemented */
1.1 root 826: spr_register(env, SPR_UMMCR0, "UMMCR0",
827: &spr_read_ureg, SPR_NOACCESS,
828: &spr_read_ureg, SPR_NOACCESS,
829: 0x00000000);
1.1.1.4 ! root 830: /* XXX : not implemented */
1.1 root 831: spr_register(env, SPR_UMMCR1, "UMMCR1",
832: &spr_read_ureg, SPR_NOACCESS,
833: &spr_read_ureg, SPR_NOACCESS,
834: 0x00000000);
1.1.1.4 ! root 835: /* XXX : not implemented */
1.1 root 836: spr_register(env, SPR_UPMC1, "UPMC1",
837: &spr_read_ureg, SPR_NOACCESS,
838: &spr_read_ureg, SPR_NOACCESS,
839: 0x00000000);
1.1.1.4 ! root 840: /* XXX : not implemented */
1.1 root 841: spr_register(env, SPR_UPMC2, "UPMC2",
842: &spr_read_ureg, SPR_NOACCESS,
843: &spr_read_ureg, SPR_NOACCESS,
844: 0x00000000);
1.1.1.4 ! root 845: /* XXX : not implemented */
1.1 root 846: spr_register(env, SPR_UPMC3, "UPMC3",
847: &spr_read_ureg, SPR_NOACCESS,
848: &spr_read_ureg, SPR_NOACCESS,
849: 0x00000000);
1.1.1.4 ! root 850: /* XXX : not implemented */
1.1 root 851: spr_register(env, SPR_UPMC4, "UPMC4",
852: &spr_read_ureg, SPR_NOACCESS,
853: &spr_read_ureg, SPR_NOACCESS,
854: 0x00000000);
1.1.1.4 ! root 855: /* XXX : not implemented */
! 856: spr_register(env, SPR_USIAR, "USIAR",
1.1 root 857: &spr_read_ureg, SPR_NOACCESS,
858: &spr_read_ureg, SPR_NOACCESS,
859: 0x00000000);
1.1.1.4 ! root 860: /* External access control */
1.1 root 861: /* XXX : not implemented */
1.1.1.4 ! root 862: spr_register(env, SPR_EAR, "EAR",
1.1 root 863: SPR_NOACCESS, SPR_NOACCESS,
864: &spr_read_generic, &spr_write_generic,
865: 0x00000000);
1.1.1.4 ! root 866: }
! 867:
! 868: static void gen_spr_thrm (CPUPPCState *env)
! 869: {
! 870: /* Thermal management */
1.1 root 871: /* XXX : not implemented */
1.1.1.4 ! root 872: spr_register(env, SPR_THRM1, "THRM1",
1.1 root 873: SPR_NOACCESS, SPR_NOACCESS,
874: &spr_read_generic, &spr_write_generic,
875: 0x00000000);
876: /* XXX : not implemented */
1.1.1.4 ! root 877: spr_register(env, SPR_THRM2, "THRM2",
1.1 root 878: SPR_NOACCESS, SPR_NOACCESS,
879: &spr_read_generic, &spr_write_generic,
880: 0x00000000);
881: /* XXX : not implemented */
1.1.1.4 ! root 882: spr_register(env, SPR_THRM3, "THRM3",
1.1 root 883: SPR_NOACCESS, SPR_NOACCESS,
884: &spr_read_generic, &spr_write_generic,
885: 0x00000000);
886: }
887:
888: /* SPR specific to PowerPC 604 implementation */
889: static void gen_spr_604 (CPUPPCState *env)
890: {
891: /* Processor identification */
892: spr_register(env, SPR_PIR, "PIR",
893: SPR_NOACCESS, SPR_NOACCESS,
894: &spr_read_generic, &spr_write_pir,
895: 0x00000000);
896: /* Breakpoints */
897: /* XXX : not implemented */
898: spr_register(env, SPR_IABR, "IABR",
899: SPR_NOACCESS, SPR_NOACCESS,
900: &spr_read_generic, &spr_write_generic,
901: 0x00000000);
902: /* XXX : not implemented */
903: spr_register(env, SPR_DABR, "DABR",
904: SPR_NOACCESS, SPR_NOACCESS,
905: &spr_read_generic, &spr_write_generic,
906: 0x00000000);
907: /* Performance counters */
908: /* XXX : not implemented */
909: spr_register(env, SPR_MMCR0, "MMCR0",
910: SPR_NOACCESS, SPR_NOACCESS,
911: &spr_read_generic, &spr_write_generic,
912: 0x00000000);
913: /* XXX : not implemented */
914: spr_register(env, SPR_PMC1, "PMC1",
915: SPR_NOACCESS, SPR_NOACCESS,
916: &spr_read_generic, &spr_write_generic,
917: 0x00000000);
918: /* XXX : not implemented */
919: spr_register(env, SPR_PMC2, "PMC2",
920: SPR_NOACCESS, SPR_NOACCESS,
921: &spr_read_generic, &spr_write_generic,
922: 0x00000000);
923: /* XXX : not implemented */
1.1.1.4 ! root 924: spr_register(env, SPR_SIAR, "SIAR",
1.1 root 925: SPR_NOACCESS, SPR_NOACCESS,
926: &spr_read_generic, SPR_NOACCESS,
927: 0x00000000);
928: /* XXX : not implemented */
929: spr_register(env, SPR_SDA, "SDA",
930: SPR_NOACCESS, SPR_NOACCESS,
931: &spr_read_generic, SPR_NOACCESS,
932: 0x00000000);
933: /* External access control */
934: /* XXX : not implemented */
935: spr_register(env, SPR_EAR, "EAR",
936: SPR_NOACCESS, SPR_NOACCESS,
937: &spr_read_generic, &spr_write_generic,
938: 0x00000000);
939: }
940:
1.1.1.4 ! root 941: /* SPR specific to PowerPC 603 implementation */
! 942: static void gen_spr_603 (CPUPPCState *env)
1.1 root 943: {
1.1.1.4 ! root 944: /* External access control */
! 945: /* XXX : not implemented */
! 946: spr_register(env, SPR_EAR, "EAR",
1.1 root 947: SPR_NOACCESS, SPR_NOACCESS,
1.1.1.4 ! root 948: &spr_read_generic, &spr_write_generic,
! 949: 0x00000000);
! 950: }
1.1 root 951:
1.1.1.4 ! root 952: /* SPR specific to PowerPC G2 implementation */
! 953: static void gen_spr_G2 (CPUPPCState *env)
! 954: {
! 955: /* Memory base address */
! 956: /* MBAR */
! 957: /* XXX : not implemented */
! 958: spr_register(env, SPR_MBAR, "MBAR",
1.1 root 959: SPR_NOACCESS, SPR_NOACCESS,
1.1.1.4 ! root 960: &spr_read_generic, &spr_write_generic,
! 961: 0x00000000);
! 962: /* Exception processing */
! 963: spr_register(env, SPR_BOOKE_CSRR0, "CSRR0",
! 964: SPR_NOACCESS, SPR_NOACCESS,
! 965: &spr_read_generic, &spr_write_generic,
! 966: 0x00000000);
! 967: spr_register(env, SPR_BOOKE_CSRR1, "CSRR1",
! 968: SPR_NOACCESS, SPR_NOACCESS,
! 969: &spr_read_generic, &spr_write_generic,
! 970: 0x00000000);
! 971: /* Breakpoints */
! 972: /* XXX : not implemented */
! 973: spr_register(env, SPR_DABR, "DABR",
! 974: SPR_NOACCESS, SPR_NOACCESS,
! 975: &spr_read_generic, &spr_write_generic,
! 976: 0x00000000);
! 977: /* XXX : not implemented */
! 978: spr_register(env, SPR_DABR2, "DABR2",
! 979: SPR_NOACCESS, SPR_NOACCESS,
! 980: &spr_read_generic, &spr_write_generic,
! 981: 0x00000000);
! 982: /* XXX : not implemented */
! 983: spr_register(env, SPR_IABR, "IABR",
! 984: SPR_NOACCESS, SPR_NOACCESS,
! 985: &spr_read_generic, &spr_write_generic,
! 986: 0x00000000);
! 987: /* XXX : not implemented */
! 988: spr_register(env, SPR_IABR2, "IABR2",
! 989: SPR_NOACCESS, SPR_NOACCESS,
! 990: &spr_read_generic, &spr_write_generic,
! 991: 0x00000000);
! 992: /* XXX : not implemented */
! 993: spr_register(env, SPR_IBCR, "IBCR",
! 994: SPR_NOACCESS, SPR_NOACCESS,
! 995: &spr_read_generic, &spr_write_generic,
! 996: 0x00000000);
! 997: /* XXX : not implemented */
! 998: spr_register(env, SPR_DBCR, "DBCR",
! 999: SPR_NOACCESS, SPR_NOACCESS,
! 1000: &spr_read_generic, &spr_write_generic,
! 1001: 0x00000000);
1.1 root 1002: }
1003:
1.1.1.4 ! root 1004: /* SPR specific to PowerPC 602 implementation */
! 1005: static void gen_spr_602 (CPUPPCState *env)
1.1 root 1006: {
1.1.1.4 ! root 1007: /* ESA registers */
! 1008: /* XXX : not implemented */
! 1009: spr_register(env, SPR_SER, "SER",
! 1010: SPR_NOACCESS, SPR_NOACCESS,
! 1011: &spr_read_generic, &spr_write_generic,
! 1012: 0x00000000);
! 1013: /* XXX : not implemented */
! 1014: spr_register(env, SPR_SEBR, "SEBR",
! 1015: SPR_NOACCESS, SPR_NOACCESS,
! 1016: &spr_read_generic, &spr_write_generic,
! 1017: 0x00000000);
! 1018: /* XXX : not implemented */
! 1019: spr_register(env, SPR_ESASRR, "ESASRR",
! 1020: SPR_NOACCESS, SPR_NOACCESS,
! 1021: &spr_read_generic, &spr_write_generic,
! 1022: 0x00000000);
! 1023: /* Floating point status */
! 1024: /* XXX : not implemented */
! 1025: spr_register(env, SPR_SP, "SP",
! 1026: SPR_NOACCESS, SPR_NOACCESS,
! 1027: &spr_read_generic, &spr_write_generic,
! 1028: 0x00000000);
! 1029: /* XXX : not implemented */
! 1030: spr_register(env, SPR_LT, "LT",
! 1031: SPR_NOACCESS, SPR_NOACCESS,
! 1032: &spr_read_generic, &spr_write_generic,
! 1033: 0x00000000);
! 1034: /* Watchdog timer */
! 1035: /* XXX : not implemented */
! 1036: spr_register(env, SPR_TCR, "TCR",
! 1037: SPR_NOACCESS, SPR_NOACCESS,
! 1038: &spr_read_generic, &spr_write_generic,
! 1039: 0x00000000);
! 1040: /* Interrupt base */
! 1041: spr_register(env, SPR_IBR, "IBR",
! 1042: SPR_NOACCESS, SPR_NOACCESS,
! 1043: &spr_read_generic, &spr_write_generic,
! 1044: 0x00000000);
! 1045: /* XXX : not implemented */
! 1046: spr_register(env, SPR_IABR, "IABR",
! 1047: SPR_NOACCESS, SPR_NOACCESS,
! 1048: &spr_read_generic, &spr_write_generic,
! 1049: 0x00000000);
1.1 root 1050: }
1051:
1.1.1.4 ! root 1052: /* SPR specific to PowerPC 601 implementation */
! 1053: static void gen_spr_601 (CPUPPCState *env)
1.1 root 1054: {
1.1.1.4 ! root 1055: /* Multiplication/division register */
! 1056: /* MQ */
! 1057: spr_register(env, SPR_MQ, "MQ",
! 1058: &spr_read_generic, &spr_write_generic,
! 1059: &spr_read_generic, &spr_write_generic,
! 1060: 0x00000000);
! 1061: /* RTC registers */
! 1062: spr_register(env, SPR_601_RTCU, "RTCU",
! 1063: SPR_NOACCESS, SPR_NOACCESS,
! 1064: SPR_NOACCESS, &spr_write_601_rtcu,
! 1065: 0x00000000);
! 1066: spr_register(env, SPR_601_VRTCU, "RTCU",
! 1067: &spr_read_601_rtcu, SPR_NOACCESS,
! 1068: &spr_read_601_rtcu, SPR_NOACCESS,
! 1069: 0x00000000);
! 1070: spr_register(env, SPR_601_RTCL, "RTCL",
! 1071: SPR_NOACCESS, SPR_NOACCESS,
! 1072: SPR_NOACCESS, &spr_write_601_rtcl,
! 1073: 0x00000000);
! 1074: spr_register(env, SPR_601_VRTCL, "RTCL",
! 1075: &spr_read_601_rtcl, SPR_NOACCESS,
! 1076: &spr_read_601_rtcl, SPR_NOACCESS,
! 1077: 0x00000000);
! 1078: /* Timer */
! 1079: #if 0 /* ? */
! 1080: spr_register(env, SPR_601_UDECR, "UDECR",
! 1081: &spr_read_decr, SPR_NOACCESS,
! 1082: &spr_read_decr, SPR_NOACCESS,
! 1083: 0x00000000);
! 1084: #endif
! 1085: /* External access control */
! 1086: /* XXX : not implemented */
! 1087: spr_register(env, SPR_EAR, "EAR",
! 1088: SPR_NOACCESS, SPR_NOACCESS,
! 1089: &spr_read_generic, &spr_write_generic,
! 1090: 0x00000000);
! 1091: /* Memory management */
! 1092: #if !defined(CONFIG_USER_ONLY)
! 1093: spr_register(env, SPR_IBAT0U, "IBAT0U",
! 1094: SPR_NOACCESS, SPR_NOACCESS,
! 1095: &spr_read_601_ubat, &spr_write_601_ubatu,
! 1096: 0x00000000);
! 1097: spr_register(env, SPR_IBAT0L, "IBAT0L",
! 1098: SPR_NOACCESS, SPR_NOACCESS,
! 1099: &spr_read_601_ubat, &spr_write_601_ubatl,
! 1100: 0x00000000);
! 1101: spr_register(env, SPR_IBAT1U, "IBAT1U",
! 1102: SPR_NOACCESS, SPR_NOACCESS,
! 1103: &spr_read_601_ubat, &spr_write_601_ubatu,
! 1104: 0x00000000);
! 1105: spr_register(env, SPR_IBAT1L, "IBAT1L",
! 1106: SPR_NOACCESS, SPR_NOACCESS,
! 1107: &spr_read_601_ubat, &spr_write_601_ubatl,
! 1108: 0x00000000);
! 1109: spr_register(env, SPR_IBAT2U, "IBAT2U",
! 1110: SPR_NOACCESS, SPR_NOACCESS,
! 1111: &spr_read_601_ubat, &spr_write_601_ubatu,
! 1112: 0x00000000);
! 1113: spr_register(env, SPR_IBAT2L, "IBAT2L",
! 1114: SPR_NOACCESS, SPR_NOACCESS,
! 1115: &spr_read_601_ubat, &spr_write_601_ubatl,
! 1116: 0x00000000);
! 1117: spr_register(env, SPR_IBAT3U, "IBAT3U",
! 1118: SPR_NOACCESS, SPR_NOACCESS,
! 1119: &spr_read_601_ubat, &spr_write_601_ubatu,
! 1120: 0x00000000);
! 1121: spr_register(env, SPR_IBAT3L, "IBAT3L",
! 1122: SPR_NOACCESS, SPR_NOACCESS,
! 1123: &spr_read_601_ubat, &spr_write_601_ubatl,
! 1124: 0x00000000);
! 1125: env->nb_BATs = 4;
! 1126: #endif
1.1 root 1127: }
1128:
1.1.1.4 ! root 1129: static void gen_spr_74xx (CPUPPCState *env)
1.1 root 1130: {
1.1.1.4 ! root 1131: /* Processor identification */
! 1132: spr_register(env, SPR_PIR, "PIR",
! 1133: SPR_NOACCESS, SPR_NOACCESS,
! 1134: &spr_read_generic, &spr_write_pir,
! 1135: 0x00000000);
! 1136: /* XXX : not implemented */
! 1137: spr_register(env, SPR_MMCR2, "MMCR2",
! 1138: SPR_NOACCESS, SPR_NOACCESS,
! 1139: &spr_read_generic, &spr_write_generic,
! 1140: 0x00000000);
! 1141: /* XXX : not implemented */
! 1142: spr_register(env, SPR_UMMCR2, "UMMCR2",
! 1143: &spr_read_ureg, SPR_NOACCESS,
! 1144: &spr_read_ureg, SPR_NOACCESS,
! 1145: 0x00000000);
! 1146: /* XXX: not implemented */
! 1147: spr_register(env, SPR_BAMR, "BAMR",
! 1148: SPR_NOACCESS, SPR_NOACCESS,
! 1149: &spr_read_generic, &spr_write_generic,
! 1150: 0x00000000);
! 1151: /* XXX : not implemented */
! 1152: spr_register(env, SPR_MSSCR0, "MSSCR0",
! 1153: SPR_NOACCESS, SPR_NOACCESS,
! 1154: &spr_read_generic, &spr_write_generic,
! 1155: 0x00000000);
! 1156: /* Hardware implementation registers */
! 1157: /* XXX : not implemented */
! 1158: spr_register(env, SPR_HID0, "HID0",
! 1159: SPR_NOACCESS, SPR_NOACCESS,
! 1160: &spr_read_generic, &spr_write_generic,
! 1161: 0x00000000);
! 1162: /* XXX : not implemented */
! 1163: spr_register(env, SPR_HID1, "HID1",
! 1164: SPR_NOACCESS, SPR_NOACCESS,
! 1165: &spr_read_generic, &spr_write_generic,
! 1166: 0x00000000);
! 1167: /* Altivec */
! 1168: spr_register(env, SPR_VRSAVE, "VRSAVE",
! 1169: &spr_read_generic, &spr_write_generic,
! 1170: &spr_read_generic, &spr_write_generic,
! 1171: 0x00000000);
! 1172: /* XXX : not implemented */
! 1173: spr_register(env, SPR_L2CR, "L2CR",
! 1174: SPR_NOACCESS, SPR_NOACCESS,
! 1175: &spr_read_generic, &spr_write_generic,
! 1176: 0x00000000);
1.1 root 1177: }
1178:
1.1.1.4 ! root 1179: static void gen_l3_ctrl (CPUPPCState *env)
1.1 root 1180: {
1.1.1.4 ! root 1181: /* L3CR */
! 1182: /* XXX : not implemented */
! 1183: spr_register(env, SPR_L3CR, "L3CR",
! 1184: SPR_NOACCESS, SPR_NOACCESS,
! 1185: &spr_read_generic, &spr_write_generic,
! 1186: 0x00000000);
! 1187: /* L3ITCR0 */
! 1188: /* XXX : not implemented */
! 1189: spr_register(env, SPR_L3ITCR0, "L3ITCR0",
! 1190: SPR_NOACCESS, SPR_NOACCESS,
! 1191: &spr_read_generic, &spr_write_generic,
! 1192: 0x00000000);
! 1193: /* L3PM */
! 1194: /* XXX : not implemented */
! 1195: spr_register(env, SPR_L3PM, "L3PM",
! 1196: SPR_NOACCESS, SPR_NOACCESS,
! 1197: &spr_read_generic, &spr_write_generic,
! 1198: 0x00000000);
1.1 root 1199: }
1200:
1.1.1.4 ! root 1201: static void gen_74xx_soft_tlb (CPUPPCState *env, int nb_tlbs, int nb_ways)
1.1 root 1202: {
1.1.1.4 ! root 1203: #if !defined(CONFIG_USER_ONLY)
! 1204: env->nb_tlb = nb_tlbs;
! 1205: env->nb_ways = nb_ways;
! 1206: env->id_tlbs = 1;
! 1207: /* XXX : not implemented */
! 1208: spr_register(env, SPR_PTEHI, "PTEHI",
! 1209: SPR_NOACCESS, SPR_NOACCESS,
! 1210: &spr_read_generic, &spr_write_generic,
! 1211: 0x00000000);
! 1212: /* XXX : not implemented */
! 1213: spr_register(env, SPR_PTELO, "PTELO",
! 1214: SPR_NOACCESS, SPR_NOACCESS,
! 1215: &spr_read_generic, &spr_write_generic,
! 1216: 0x00000000);
! 1217: /* XXX : not implemented */
! 1218: spr_register(env, SPR_TLBMISS, "TLBMISS",
! 1219: SPR_NOACCESS, SPR_NOACCESS,
! 1220: &spr_read_generic, &spr_write_generic,
! 1221: 0x00000000);
! 1222: #endif
! 1223: }
1.1 root 1224:
1.1.1.4 ! root 1225: static void gen_spr_usprgh (CPUPPCState *env)
1.1 root 1226: {
1.1.1.4 ! root 1227: spr_register(env, SPR_USPRG4, "USPRG4",
! 1228: &spr_read_ureg, SPR_NOACCESS,
! 1229: &spr_read_ureg, SPR_NOACCESS,
! 1230: 0x00000000);
! 1231: spr_register(env, SPR_USPRG5, "USPRG5",
! 1232: &spr_read_ureg, SPR_NOACCESS,
! 1233: &spr_read_ureg, SPR_NOACCESS,
! 1234: 0x00000000);
! 1235: spr_register(env, SPR_USPRG6, "USPRG6",
! 1236: &spr_read_ureg, SPR_NOACCESS,
! 1237: &spr_read_ureg, SPR_NOACCESS,
! 1238: 0x00000000);
! 1239: spr_register(env, SPR_USPRG7, "USPRG7",
! 1240: &spr_read_ureg, SPR_NOACCESS,
! 1241: &spr_read_ureg, SPR_NOACCESS,
! 1242: 0x00000000);
1.1 root 1243: }
1244:
1.1.1.4 ! root 1245: /* PowerPC BookE SPR */
! 1246: static void gen_spr_BookE (CPUPPCState *env, uint64_t ivor_mask)
1.1 root 1247: {
1.1.1.4 ! root 1248: const unsigned char *ivor_names[64] = {
! 1249: "IVOR0", "IVOR1", "IVOR2", "IVOR3",
! 1250: "IVOR4", "IVOR5", "IVOR6", "IVOR7",
! 1251: "IVOR8", "IVOR9", "IVOR10", "IVOR11",
! 1252: "IVOR12", "IVOR13", "IVOR14", "IVOR15",
! 1253: "IVOR16", "IVOR17", "IVOR18", "IVOR19",
! 1254: "IVOR20", "IVOR21", "IVOR22", "IVOR23",
! 1255: "IVOR24", "IVOR25", "IVOR26", "IVOR27",
! 1256: "IVOR28", "IVOR29", "IVOR30", "IVOR31",
! 1257: "IVOR32", "IVOR33", "IVOR34", "IVOR35",
! 1258: "IVOR36", "IVOR37", "IVOR38", "IVOR39",
! 1259: "IVOR40", "IVOR41", "IVOR42", "IVOR43",
! 1260: "IVOR44", "IVOR45", "IVOR46", "IVOR47",
! 1261: "IVOR48", "IVOR49", "IVOR50", "IVOR51",
! 1262: "IVOR52", "IVOR53", "IVOR54", "IVOR55",
! 1263: "IVOR56", "IVOR57", "IVOR58", "IVOR59",
! 1264: "IVOR60", "IVOR61", "IVOR62", "IVOR63",
! 1265: };
! 1266: #define SPR_BOOKE_IVORxx (-1)
! 1267: int ivor_sprn[64] = {
! 1268: SPR_BOOKE_IVOR0, SPR_BOOKE_IVOR1, SPR_BOOKE_IVOR2, SPR_BOOKE_IVOR3,
! 1269: SPR_BOOKE_IVOR4, SPR_BOOKE_IVOR5, SPR_BOOKE_IVOR6, SPR_BOOKE_IVOR7,
! 1270: SPR_BOOKE_IVOR8, SPR_BOOKE_IVOR9, SPR_BOOKE_IVOR10, SPR_BOOKE_IVOR11,
! 1271: SPR_BOOKE_IVOR12, SPR_BOOKE_IVOR13, SPR_BOOKE_IVOR14, SPR_BOOKE_IVOR15,
! 1272: SPR_BOOKE_IVORxx, SPR_BOOKE_IVORxx, SPR_BOOKE_IVORxx, SPR_BOOKE_IVORxx,
! 1273: SPR_BOOKE_IVORxx, SPR_BOOKE_IVORxx, SPR_BOOKE_IVORxx, SPR_BOOKE_IVORxx,
! 1274: SPR_BOOKE_IVORxx, SPR_BOOKE_IVORxx, SPR_BOOKE_IVORxx, SPR_BOOKE_IVORxx,
! 1275: SPR_BOOKE_IVORxx, SPR_BOOKE_IVORxx, SPR_BOOKE_IVORxx, SPR_BOOKE_IVORxx,
! 1276: SPR_BOOKE_IVOR32, SPR_BOOKE_IVOR33, SPR_BOOKE_IVOR34, SPR_BOOKE_IVOR35,
! 1277: SPR_BOOKE_IVOR36, SPR_BOOKE_IVOR37, SPR_BOOKE_IVORxx, SPR_BOOKE_IVORxx,
! 1278: SPR_BOOKE_IVORxx, SPR_BOOKE_IVORxx, SPR_BOOKE_IVORxx, SPR_BOOKE_IVORxx,
! 1279: SPR_BOOKE_IVORxx, SPR_BOOKE_IVORxx, SPR_BOOKE_IVORxx, SPR_BOOKE_IVORxx,
! 1280: SPR_BOOKE_IVORxx, SPR_BOOKE_IVORxx, SPR_BOOKE_IVORxx, SPR_BOOKE_IVORxx,
! 1281: SPR_BOOKE_IVORxx, SPR_BOOKE_IVORxx, SPR_BOOKE_IVORxx, SPR_BOOKE_IVORxx,
! 1282: SPR_BOOKE_IVORxx, SPR_BOOKE_IVORxx, SPR_BOOKE_IVORxx, SPR_BOOKE_IVORxx,
! 1283: SPR_BOOKE_IVORxx, SPR_BOOKE_IVORxx, SPR_BOOKE_IVORxx, SPR_BOOKE_IVORxx,
! 1284: };
! 1285: int i;
1.1 root 1286:
1.1.1.4 ! root 1287: /* Interrupt processing */
! 1288: spr_register(env, SPR_BOOKE_CSRR0, "CSRR0",
! 1289: SPR_NOACCESS, SPR_NOACCESS,
! 1290: &spr_read_generic, &spr_write_generic,
! 1291: 0x00000000);
! 1292: spr_register(env, SPR_BOOKE_CSRR1, "CSRR1",
! 1293: SPR_NOACCESS, SPR_NOACCESS,
! 1294: &spr_read_generic, &spr_write_generic,
! 1295: 0x00000000);
! 1296: /* Debug */
! 1297: /* XXX : not implemented */
! 1298: spr_register(env, SPR_BOOKE_IAC1, "IAC1",
! 1299: SPR_NOACCESS, SPR_NOACCESS,
! 1300: &spr_read_generic, &spr_write_generic,
! 1301: 0x00000000);
! 1302: /* XXX : not implemented */
! 1303: spr_register(env, SPR_BOOKE_IAC2, "IAC2",
! 1304: SPR_NOACCESS, SPR_NOACCESS,
! 1305: &spr_read_generic, &spr_write_generic,
! 1306: 0x00000000);
! 1307: /* XXX : not implemented */
! 1308: spr_register(env, SPR_BOOKE_DAC1, "DAC1",
! 1309: SPR_NOACCESS, SPR_NOACCESS,
! 1310: &spr_read_generic, &spr_write_generic,
! 1311: 0x00000000);
! 1312: /* XXX : not implemented */
! 1313: spr_register(env, SPR_BOOKE_DAC2, "DAC2",
! 1314: SPR_NOACCESS, SPR_NOACCESS,
! 1315: &spr_read_generic, &spr_write_generic,
! 1316: 0x00000000);
! 1317: /* XXX : not implemented */
! 1318: spr_register(env, SPR_BOOKE_DBCR0, "DBCR0",
! 1319: SPR_NOACCESS, SPR_NOACCESS,
! 1320: &spr_read_generic, &spr_write_generic,
! 1321: 0x00000000);
! 1322: /* XXX : not implemented */
! 1323: spr_register(env, SPR_BOOKE_DBCR1, "DBCR1",
! 1324: SPR_NOACCESS, SPR_NOACCESS,
! 1325: &spr_read_generic, &spr_write_generic,
! 1326: 0x00000000);
! 1327: /* XXX : not implemented */
! 1328: spr_register(env, SPR_BOOKE_DBCR2, "DBCR2",
! 1329: SPR_NOACCESS, SPR_NOACCESS,
! 1330: &spr_read_generic, &spr_write_generic,
! 1331: 0x00000000);
! 1332: /* XXX : not implemented */
! 1333: spr_register(env, SPR_BOOKE_DBSR, "DBSR",
! 1334: SPR_NOACCESS, SPR_NOACCESS,
! 1335: &spr_read_generic, &spr_write_clear,
! 1336: 0x00000000);
! 1337: spr_register(env, SPR_BOOKE_DEAR, "DEAR",
! 1338: SPR_NOACCESS, SPR_NOACCESS,
! 1339: &spr_read_generic, &spr_write_generic,
! 1340: 0x00000000);
! 1341: spr_register(env, SPR_BOOKE_ESR, "ESR",
! 1342: SPR_NOACCESS, SPR_NOACCESS,
! 1343: &spr_read_generic, &spr_write_generic,
! 1344: 0x00000000);
! 1345: spr_register(env, SPR_BOOKE_IVPR, "IVPR",
! 1346: SPR_NOACCESS, SPR_NOACCESS,
! 1347: &spr_read_generic, &spr_write_excp_prefix,
! 1348: 0x00000000);
! 1349: /* Exception vectors */
! 1350: for (i = 0; i < 64; i++) {
! 1351: if (ivor_mask & (1ULL << i)) {
! 1352: if (ivor_sprn[i] == SPR_BOOKE_IVORxx) {
! 1353: fprintf(stderr, "ERROR: IVOR %d SPR is not defined\n", i);
! 1354: exit(1);
! 1355: }
! 1356: spr_register(env, ivor_sprn[i], ivor_names[i],
! 1357: SPR_NOACCESS, SPR_NOACCESS,
! 1358: &spr_read_generic, &spr_write_excp_vector,
! 1359: 0x00000000);
1.1 root 1360: }
1361: }
1.1.1.4 ! root 1362: spr_register(env, SPR_BOOKE_PID, "PID",
! 1363: SPR_NOACCESS, SPR_NOACCESS,
! 1364: &spr_read_generic, &spr_write_generic,
! 1365: 0x00000000);
! 1366: spr_register(env, SPR_BOOKE_TCR, "TCR",
! 1367: SPR_NOACCESS, SPR_NOACCESS,
! 1368: &spr_read_generic, &spr_write_booke_tcr,
! 1369: 0x00000000);
! 1370: spr_register(env, SPR_BOOKE_TSR, "TSR",
! 1371: SPR_NOACCESS, SPR_NOACCESS,
! 1372: &spr_read_generic, &spr_write_booke_tsr,
! 1373: 0x00000000);
! 1374: /* Timer */
! 1375: spr_register(env, SPR_DECR, "DECR",
! 1376: SPR_NOACCESS, SPR_NOACCESS,
! 1377: &spr_read_decr, &spr_write_decr,
! 1378: 0x00000000);
! 1379: spr_register(env, SPR_BOOKE_DECAR, "DECAR",
! 1380: SPR_NOACCESS, SPR_NOACCESS,
! 1381: SPR_NOACCESS, &spr_write_generic,
! 1382: 0x00000000);
! 1383: /* SPRGs */
! 1384: spr_register(env, SPR_USPRG0, "USPRG0",
! 1385: &spr_read_generic, &spr_write_generic,
! 1386: &spr_read_generic, &spr_write_generic,
! 1387: 0x00000000);
! 1388: spr_register(env, SPR_SPRG4, "SPRG4",
! 1389: SPR_NOACCESS, SPR_NOACCESS,
! 1390: &spr_read_generic, &spr_write_generic,
! 1391: 0x00000000);
! 1392: spr_register(env, SPR_SPRG5, "SPRG5",
! 1393: SPR_NOACCESS, SPR_NOACCESS,
! 1394: &spr_read_generic, &spr_write_generic,
! 1395: 0x00000000);
! 1396: spr_register(env, SPR_SPRG6, "SPRG6",
! 1397: SPR_NOACCESS, SPR_NOACCESS,
! 1398: &spr_read_generic, &spr_write_generic,
! 1399: 0x00000000);
! 1400: spr_register(env, SPR_SPRG7, "SPRG7",
! 1401: SPR_NOACCESS, SPR_NOACCESS,
! 1402: &spr_read_generic, &spr_write_generic,
! 1403: 0x00000000);
1.1 root 1404: }
1405:
1.1.1.4 ! root 1406: /* FSL storage control registers */
! 1407: static void gen_spr_BookE_FSL (CPUPPCState *env, uint32_t mas_mask)
1.1 root 1408: {
1.1.1.4 ! root 1409: #if !defined(CONFIG_USER_ONLY)
! 1410: const unsigned char *mas_names[8] = {
! 1411: "MAS0", "MAS1", "MAS2", "MAS3", "MAS4", "MAS5", "MAS6", "MAS7",
! 1412: };
! 1413: int mas_sprn[8] = {
! 1414: SPR_BOOKE_MAS0, SPR_BOOKE_MAS1, SPR_BOOKE_MAS2, SPR_BOOKE_MAS3,
! 1415: SPR_BOOKE_MAS4, SPR_BOOKE_MAS5, SPR_BOOKE_MAS6, SPR_BOOKE_MAS7,
! 1416: };
! 1417: int i;
1.1 root 1418:
1.1.1.4 ! root 1419: /* TLB assist registers */
! 1420: /* XXX : not implemented */
! 1421: for (i = 0; i < 8; i++) {
! 1422: if (mas_mask & (1 << i)) {
! 1423: spr_register(env, mas_sprn[i], mas_names[i],
! 1424: SPR_NOACCESS, SPR_NOACCESS,
! 1425: &spr_read_generic, &spr_write_generic,
! 1426: 0x00000000);
! 1427: }
! 1428: }
! 1429: if (env->nb_pids > 1) {
! 1430: /* XXX : not implemented */
! 1431: spr_register(env, SPR_BOOKE_PID1, "PID1",
! 1432: SPR_NOACCESS, SPR_NOACCESS,
! 1433: &spr_read_generic, &spr_write_generic,
! 1434: 0x00000000);
! 1435: }
! 1436: if (env->nb_pids > 2) {
! 1437: /* XXX : not implemented */
! 1438: spr_register(env, SPR_BOOKE_PID2, "PID2",
! 1439: SPR_NOACCESS, SPR_NOACCESS,
! 1440: &spr_read_generic, &spr_write_generic,
! 1441: 0x00000000);
! 1442: }
! 1443: /* XXX : not implemented */
! 1444: spr_register(env, SPR_MMUCFG, "MMUCFG",
! 1445: SPR_NOACCESS, SPR_NOACCESS,
! 1446: &spr_read_generic, SPR_NOACCESS,
! 1447: 0x00000000); /* TOFIX */
! 1448: /* XXX : not implemented */
! 1449: spr_register(env, SPR_MMUCSR0, "MMUCSR0",
! 1450: SPR_NOACCESS, SPR_NOACCESS,
! 1451: &spr_read_generic, &spr_write_generic,
! 1452: 0x00000000); /* TOFIX */
! 1453: switch (env->nb_ways) {
! 1454: case 4:
! 1455: /* XXX : not implemented */
! 1456: spr_register(env, SPR_BOOKE_TLB3CFG, "TLB3CFG",
! 1457: SPR_NOACCESS, SPR_NOACCESS,
! 1458: &spr_read_generic, SPR_NOACCESS,
! 1459: 0x00000000); /* TOFIX */
! 1460: /* Fallthru */
! 1461: case 3:
! 1462: /* XXX : not implemented */
! 1463: spr_register(env, SPR_BOOKE_TLB2CFG, "TLB2CFG",
! 1464: SPR_NOACCESS, SPR_NOACCESS,
! 1465: &spr_read_generic, SPR_NOACCESS,
! 1466: 0x00000000); /* TOFIX */
! 1467: /* Fallthru */
! 1468: case 2:
! 1469: /* XXX : not implemented */
! 1470: spr_register(env, SPR_BOOKE_TLB1CFG, "TLB1CFG",
! 1471: SPR_NOACCESS, SPR_NOACCESS,
! 1472: &spr_read_generic, SPR_NOACCESS,
! 1473: 0x00000000); /* TOFIX */
! 1474: /* Fallthru */
! 1475: case 1:
! 1476: /* XXX : not implemented */
! 1477: spr_register(env, SPR_BOOKE_TLB0CFG, "TLB0CFG",
! 1478: SPR_NOACCESS, SPR_NOACCESS,
! 1479: &spr_read_generic, SPR_NOACCESS,
! 1480: 0x00000000); /* TOFIX */
! 1481: /* Fallthru */
! 1482: case 0:
! 1483: default:
! 1484: break;
! 1485: }
! 1486: #endif
1.1 root 1487: }
1488:
1.1.1.4 ! root 1489: /* SPR specific to PowerPC 440 implementation */
! 1490: static void gen_spr_440 (CPUPPCState *env)
1.1 root 1491: {
1.1.1.4 ! root 1492: /* Cache control */
! 1493: /* XXX : not implemented */
! 1494: spr_register(env, SPR_440_DNV0, "DNV0",
! 1495: SPR_NOACCESS, SPR_NOACCESS,
! 1496: &spr_read_generic, &spr_write_generic,
! 1497: 0x00000000);
! 1498: /* XXX : not implemented */
! 1499: spr_register(env, SPR_440_DNV1, "DNV1",
! 1500: SPR_NOACCESS, SPR_NOACCESS,
! 1501: &spr_read_generic, &spr_write_generic,
! 1502: 0x00000000);
! 1503: /* XXX : not implemented */
! 1504: spr_register(env, SPR_440_DNV2, "DNV2",
! 1505: SPR_NOACCESS, SPR_NOACCESS,
! 1506: &spr_read_generic, &spr_write_generic,
! 1507: 0x00000000);
! 1508: /* XXX : not implemented */
! 1509: spr_register(env, SPR_440_DNV3, "DNV3",
! 1510: SPR_NOACCESS, SPR_NOACCESS,
! 1511: &spr_read_generic, &spr_write_generic,
! 1512: 0x00000000);
! 1513: /* XXX : not implemented */
! 1514: spr_register(env, SPR_440_DTV0, "DTV0",
! 1515: SPR_NOACCESS, SPR_NOACCESS,
! 1516: &spr_read_generic, &spr_write_generic,
! 1517: 0x00000000);
! 1518: /* XXX : not implemented */
! 1519: spr_register(env, SPR_440_DTV1, "DTV1",
! 1520: SPR_NOACCESS, SPR_NOACCESS,
! 1521: &spr_read_generic, &spr_write_generic,
! 1522: 0x00000000);
! 1523: /* XXX : not implemented */
! 1524: spr_register(env, SPR_440_DTV2, "DTV2",
! 1525: SPR_NOACCESS, SPR_NOACCESS,
! 1526: &spr_read_generic, &spr_write_generic,
! 1527: 0x00000000);
! 1528: /* XXX : not implemented */
! 1529: spr_register(env, SPR_440_DTV3, "DTV3",
! 1530: SPR_NOACCESS, SPR_NOACCESS,
! 1531: &spr_read_generic, &spr_write_generic,
! 1532: 0x00000000);
! 1533: /* XXX : not implemented */
! 1534: spr_register(env, SPR_440_DVLIM, "DVLIM",
! 1535: SPR_NOACCESS, SPR_NOACCESS,
! 1536: &spr_read_generic, &spr_write_generic,
! 1537: 0x00000000);
! 1538: /* XXX : not implemented */
! 1539: spr_register(env, SPR_440_INV0, "INV0",
! 1540: SPR_NOACCESS, SPR_NOACCESS,
! 1541: &spr_read_generic, &spr_write_generic,
! 1542: 0x00000000);
! 1543: /* XXX : not implemented */
! 1544: spr_register(env, SPR_440_INV1, "INV1",
! 1545: SPR_NOACCESS, SPR_NOACCESS,
! 1546: &spr_read_generic, &spr_write_generic,
! 1547: 0x00000000);
! 1548: /* XXX : not implemented */
! 1549: spr_register(env, SPR_440_INV2, "INV2",
! 1550: SPR_NOACCESS, SPR_NOACCESS,
! 1551: &spr_read_generic, &spr_write_generic,
! 1552: 0x00000000);
! 1553: /* XXX : not implemented */
! 1554: spr_register(env, SPR_440_INV3, "INV3",
! 1555: SPR_NOACCESS, SPR_NOACCESS,
! 1556: &spr_read_generic, &spr_write_generic,
! 1557: 0x00000000);
! 1558: /* XXX : not implemented */
! 1559: spr_register(env, SPR_440_ITV0, "ITV0",
! 1560: SPR_NOACCESS, SPR_NOACCESS,
! 1561: &spr_read_generic, &spr_write_generic,
! 1562: 0x00000000);
! 1563: /* XXX : not implemented */
! 1564: spr_register(env, SPR_440_ITV1, "ITV1",
! 1565: SPR_NOACCESS, SPR_NOACCESS,
! 1566: &spr_read_generic, &spr_write_generic,
! 1567: 0x00000000);
! 1568: /* XXX : not implemented */
! 1569: spr_register(env, SPR_440_ITV2, "ITV2",
! 1570: SPR_NOACCESS, SPR_NOACCESS,
! 1571: &spr_read_generic, &spr_write_generic,
! 1572: 0x00000000);
! 1573: /* XXX : not implemented */
! 1574: spr_register(env, SPR_440_ITV3, "ITV3",
! 1575: SPR_NOACCESS, SPR_NOACCESS,
! 1576: &spr_read_generic, &spr_write_generic,
! 1577: 0x00000000);
! 1578: /* XXX : not implemented */
! 1579: spr_register(env, SPR_440_IVLIM, "IVLIM",
! 1580: SPR_NOACCESS, SPR_NOACCESS,
! 1581: &spr_read_generic, &spr_write_generic,
! 1582: 0x00000000);
! 1583: /* Cache debug */
! 1584: /* XXX : not implemented */
! 1585: spr_register(env, SPR_BOOKE_DCDBTRH, "DCDBTRH",
! 1586: SPR_NOACCESS, SPR_NOACCESS,
! 1587: &spr_read_generic, SPR_NOACCESS,
! 1588: 0x00000000);
! 1589: /* XXX : not implemented */
! 1590: spr_register(env, SPR_BOOKE_DCDBTRL, "DCDBTRL",
! 1591: SPR_NOACCESS, SPR_NOACCESS,
! 1592: &spr_read_generic, SPR_NOACCESS,
! 1593: 0x00000000);
! 1594: /* XXX : not implemented */
! 1595: spr_register(env, SPR_BOOKE_ICDBDR, "ICDBDR",
! 1596: SPR_NOACCESS, SPR_NOACCESS,
! 1597: &spr_read_generic, SPR_NOACCESS,
! 1598: 0x00000000);
! 1599: /* XXX : not implemented */
! 1600: spr_register(env, SPR_BOOKE_ICDBTRH, "ICDBTRH",
! 1601: SPR_NOACCESS, SPR_NOACCESS,
! 1602: &spr_read_generic, SPR_NOACCESS,
! 1603: 0x00000000);
! 1604: /* XXX : not implemented */
! 1605: spr_register(env, SPR_BOOKE_ICDBTRL, "ICDBTRL",
! 1606: SPR_NOACCESS, SPR_NOACCESS,
! 1607: &spr_read_generic, SPR_NOACCESS,
! 1608: 0x00000000);
! 1609: /* XXX : not implemented */
! 1610: spr_register(env, SPR_440_DBDR, "DBDR",
! 1611: SPR_NOACCESS, SPR_NOACCESS,
! 1612: &spr_read_generic, &spr_write_generic,
! 1613: 0x00000000);
! 1614: /* Processor control */
! 1615: spr_register(env, SPR_4xx_CCR0, "CCR0",
! 1616: SPR_NOACCESS, SPR_NOACCESS,
! 1617: &spr_read_generic, &spr_write_generic,
! 1618: 0x00000000);
! 1619: spr_register(env, SPR_440_RSTCFG, "RSTCFG",
! 1620: SPR_NOACCESS, SPR_NOACCESS,
! 1621: &spr_read_generic, SPR_NOACCESS,
! 1622: 0x00000000);
! 1623: /* Storage control */
! 1624: spr_register(env, SPR_440_MMUCR, "MMUCR",
! 1625: SPR_NOACCESS, SPR_NOACCESS,
! 1626: &spr_read_generic, &spr_write_generic,
! 1627: 0x00000000);
! 1628: }
! 1629:
! 1630: /* SPR shared between PowerPC 40x implementations */
! 1631: static void gen_spr_40x (CPUPPCState *env)
! 1632: {
! 1633: /* Cache */
! 1634: /* not emulated, as Qemu do not emulate caches */
! 1635: spr_register(env, SPR_40x_DCCR, "DCCR",
! 1636: SPR_NOACCESS, SPR_NOACCESS,
! 1637: &spr_read_generic, &spr_write_generic,
! 1638: 0x00000000);
! 1639: /* not emulated, as Qemu do not emulate caches */
! 1640: spr_register(env, SPR_40x_ICCR, "ICCR",
! 1641: SPR_NOACCESS, SPR_NOACCESS,
! 1642: &spr_read_generic, &spr_write_generic,
! 1643: 0x00000000);
! 1644: /* not emulated, as Qemu do not emulate caches */
! 1645: spr_register(env, SPR_BOOKE_ICDBDR, "ICDBDR",
! 1646: SPR_NOACCESS, SPR_NOACCESS,
! 1647: &spr_read_generic, SPR_NOACCESS,
! 1648: 0x00000000);
! 1649: /* Exception */
! 1650: spr_register(env, SPR_40x_DEAR, "DEAR",
! 1651: SPR_NOACCESS, SPR_NOACCESS,
! 1652: &spr_read_generic, &spr_write_generic,
! 1653: 0x00000000);
! 1654: spr_register(env, SPR_40x_ESR, "ESR",
! 1655: SPR_NOACCESS, SPR_NOACCESS,
! 1656: &spr_read_generic, &spr_write_generic,
! 1657: 0x00000000);
! 1658: spr_register(env, SPR_40x_EVPR, "EVPR",
! 1659: SPR_NOACCESS, SPR_NOACCESS,
! 1660: &spr_read_generic, &spr_write_excp_prefix,
! 1661: 0x00000000);
! 1662: spr_register(env, SPR_40x_SRR2, "SRR2",
! 1663: &spr_read_generic, &spr_write_generic,
! 1664: &spr_read_generic, &spr_write_generic,
! 1665: 0x00000000);
! 1666: spr_register(env, SPR_40x_SRR3, "SRR3",
! 1667: &spr_read_generic, &spr_write_generic,
! 1668: &spr_read_generic, &spr_write_generic,
! 1669: 0x00000000);
! 1670: /* Timers */
! 1671: spr_register(env, SPR_40x_PIT, "PIT",
! 1672: SPR_NOACCESS, SPR_NOACCESS,
! 1673: &spr_read_40x_pit, &spr_write_40x_pit,
! 1674: 0x00000000);
! 1675: spr_register(env, SPR_40x_TCR, "TCR",
! 1676: SPR_NOACCESS, SPR_NOACCESS,
! 1677: &spr_read_generic, &spr_write_booke_tcr,
! 1678: 0x00000000);
! 1679: spr_register(env, SPR_40x_TSR, "TSR",
! 1680: SPR_NOACCESS, SPR_NOACCESS,
! 1681: &spr_read_generic, &spr_write_booke_tsr,
! 1682: 0x00000000);
! 1683: }
! 1684:
! 1685: /* SPR specific to PowerPC 405 implementation */
! 1686: static void gen_spr_405 (CPUPPCState *env)
! 1687: {
! 1688: /* MMU */
! 1689: spr_register(env, SPR_40x_PID, "PID",
! 1690: SPR_NOACCESS, SPR_NOACCESS,
! 1691: &spr_read_generic, &spr_write_generic,
! 1692: 0x00000000);
! 1693: spr_register(env, SPR_4xx_CCR0, "CCR0",
! 1694: SPR_NOACCESS, SPR_NOACCESS,
! 1695: &spr_read_generic, &spr_write_generic,
! 1696: 0x00700000);
! 1697: /* Debug interface */
! 1698: /* XXX : not implemented */
! 1699: spr_register(env, SPR_40x_DBCR0, "DBCR0",
! 1700: SPR_NOACCESS, SPR_NOACCESS,
! 1701: &spr_read_generic, &spr_write_40x_dbcr0,
! 1702: 0x00000000);
! 1703: /* XXX : not implemented */
! 1704: spr_register(env, SPR_405_DBCR1, "DBCR1",
! 1705: SPR_NOACCESS, SPR_NOACCESS,
! 1706: &spr_read_generic, &spr_write_generic,
! 1707: 0x00000000);
! 1708: /* XXX : not implemented */
! 1709: spr_register(env, SPR_40x_DBSR, "DBSR",
! 1710: SPR_NOACCESS, SPR_NOACCESS,
! 1711: &spr_read_generic, &spr_write_clear,
! 1712: /* Last reset was system reset */
! 1713: 0x00000300);
! 1714: /* XXX : not implemented */
! 1715: spr_register(env, SPR_40x_DAC1, "DAC1",
! 1716: SPR_NOACCESS, SPR_NOACCESS,
! 1717: &spr_read_generic, &spr_write_generic,
! 1718: 0x00000000);
! 1719: spr_register(env, SPR_40x_DAC2, "DAC2",
! 1720: SPR_NOACCESS, SPR_NOACCESS,
! 1721: &spr_read_generic, &spr_write_generic,
! 1722: 0x00000000);
! 1723: /* XXX : not implemented */
! 1724: spr_register(env, SPR_405_DVC1, "DVC1",
! 1725: SPR_NOACCESS, SPR_NOACCESS,
! 1726: &spr_read_generic, &spr_write_generic,
! 1727: 0x00000000);
! 1728: /* XXX : not implemented */
! 1729: spr_register(env, SPR_405_DVC2, "DVC2",
! 1730: SPR_NOACCESS, SPR_NOACCESS,
! 1731: &spr_read_generic, &spr_write_generic,
! 1732: 0x00000000);
! 1733: /* XXX : not implemented */
! 1734: spr_register(env, SPR_40x_IAC1, "IAC1",
! 1735: SPR_NOACCESS, SPR_NOACCESS,
! 1736: &spr_read_generic, &spr_write_generic,
! 1737: 0x00000000);
! 1738: spr_register(env, SPR_40x_IAC2, "IAC2",
! 1739: SPR_NOACCESS, SPR_NOACCESS,
! 1740: &spr_read_generic, &spr_write_generic,
! 1741: 0x00000000);
! 1742: /* XXX : not implemented */
! 1743: spr_register(env, SPR_405_IAC3, "IAC3",
! 1744: SPR_NOACCESS, SPR_NOACCESS,
! 1745: &spr_read_generic, &spr_write_generic,
! 1746: 0x00000000);
! 1747: /* XXX : not implemented */
! 1748: spr_register(env, SPR_405_IAC4, "IAC4",
! 1749: SPR_NOACCESS, SPR_NOACCESS,
! 1750: &spr_read_generic, &spr_write_generic,
! 1751: 0x00000000);
! 1752: /* Storage control */
! 1753: /* XXX: TODO: not implemented */
! 1754: spr_register(env, SPR_405_SLER, "SLER",
! 1755: SPR_NOACCESS, SPR_NOACCESS,
! 1756: &spr_read_generic, &spr_write_40x_sler,
! 1757: 0x00000000);
! 1758: spr_register(env, SPR_40x_ZPR, "ZPR",
! 1759: SPR_NOACCESS, SPR_NOACCESS,
! 1760: &spr_read_generic, &spr_write_generic,
! 1761: 0x00000000);
! 1762: /* XXX : not implemented */
! 1763: spr_register(env, SPR_405_SU0R, "SU0R",
! 1764: SPR_NOACCESS, SPR_NOACCESS,
! 1765: &spr_read_generic, &spr_write_generic,
! 1766: 0x00000000);
! 1767: /* SPRG */
! 1768: spr_register(env, SPR_USPRG0, "USPRG0",
! 1769: &spr_read_ureg, SPR_NOACCESS,
! 1770: &spr_read_ureg, SPR_NOACCESS,
! 1771: 0x00000000);
! 1772: spr_register(env, SPR_SPRG4, "SPRG4",
! 1773: SPR_NOACCESS, SPR_NOACCESS,
! 1774: &spr_read_generic, &spr_write_generic,
! 1775: 0x00000000);
! 1776: spr_register(env, SPR_SPRG5, "SPRG5",
! 1777: SPR_NOACCESS, SPR_NOACCESS,
! 1778: spr_read_generic, &spr_write_generic,
! 1779: 0x00000000);
! 1780: spr_register(env, SPR_SPRG6, "SPRG6",
! 1781: SPR_NOACCESS, SPR_NOACCESS,
! 1782: spr_read_generic, &spr_write_generic,
! 1783: 0x00000000);
! 1784: spr_register(env, SPR_SPRG7, "SPRG7",
! 1785: SPR_NOACCESS, SPR_NOACCESS,
! 1786: spr_read_generic, &spr_write_generic,
! 1787: 0x00000000);
! 1788: gen_spr_usprgh(env);
! 1789: }
! 1790:
! 1791: /* SPR shared between PowerPC 401 & 403 implementations */
! 1792: static void gen_spr_401_403 (CPUPPCState *env)
! 1793: {
! 1794: /* Time base */
! 1795: spr_register(env, SPR_403_VTBL, "TBL",
! 1796: &spr_read_tbl, SPR_NOACCESS,
! 1797: &spr_read_tbl, SPR_NOACCESS,
! 1798: 0x00000000);
! 1799: spr_register(env, SPR_403_TBL, "TBL",
! 1800: SPR_NOACCESS, SPR_NOACCESS,
! 1801: SPR_NOACCESS, &spr_write_tbl,
! 1802: 0x00000000);
! 1803: spr_register(env, SPR_403_VTBU, "TBU",
! 1804: &spr_read_tbu, SPR_NOACCESS,
! 1805: &spr_read_tbu, SPR_NOACCESS,
! 1806: 0x00000000);
! 1807: spr_register(env, SPR_403_TBU, "TBU",
! 1808: SPR_NOACCESS, SPR_NOACCESS,
! 1809: SPR_NOACCESS, &spr_write_tbu,
! 1810: 0x00000000);
! 1811: /* Debug */
! 1812: /* not emulated, as Qemu do not emulate caches */
! 1813: spr_register(env, SPR_403_CDBCR, "CDBCR",
! 1814: SPR_NOACCESS, SPR_NOACCESS,
! 1815: &spr_read_generic, &spr_write_generic,
! 1816: 0x00000000);
! 1817: }
! 1818:
! 1819: /* SPR specific to PowerPC 401 implementation */
! 1820: static void gen_spr_401 (CPUPPCState *env)
! 1821: {
! 1822: /* Debug interface */
! 1823: /* XXX : not implemented */
! 1824: spr_register(env, SPR_40x_DBCR0, "DBCR",
! 1825: SPR_NOACCESS, SPR_NOACCESS,
! 1826: &spr_read_generic, &spr_write_40x_dbcr0,
! 1827: 0x00000000);
! 1828: /* XXX : not implemented */
! 1829: spr_register(env, SPR_40x_DBSR, "DBSR",
! 1830: SPR_NOACCESS, SPR_NOACCESS,
! 1831: &spr_read_generic, &spr_write_clear,
! 1832: /* Last reset was system reset */
! 1833: 0x00000300);
! 1834: /* XXX : not implemented */
! 1835: spr_register(env, SPR_40x_DAC1, "DAC",
! 1836: SPR_NOACCESS, SPR_NOACCESS,
! 1837: &spr_read_generic, &spr_write_generic,
! 1838: 0x00000000);
! 1839: /* XXX : not implemented */
! 1840: spr_register(env, SPR_40x_IAC1, "IAC",
! 1841: SPR_NOACCESS, SPR_NOACCESS,
! 1842: &spr_read_generic, &spr_write_generic,
! 1843: 0x00000000);
! 1844: /* Storage control */
! 1845: /* XXX: TODO: not implemented */
! 1846: spr_register(env, SPR_405_SLER, "SLER",
! 1847: SPR_NOACCESS, SPR_NOACCESS,
! 1848: &spr_read_generic, &spr_write_40x_sler,
! 1849: 0x00000000);
! 1850: /* not emulated, as Qemu never does speculative access */
! 1851: spr_register(env, SPR_40x_SGR, "SGR",
! 1852: SPR_NOACCESS, SPR_NOACCESS,
! 1853: &spr_read_generic, &spr_write_generic,
! 1854: 0xFFFFFFFF);
! 1855: /* not emulated, as Qemu do not emulate caches */
! 1856: spr_register(env, SPR_40x_DCWR, "DCWR",
! 1857: SPR_NOACCESS, SPR_NOACCESS,
! 1858: &spr_read_generic, &spr_write_generic,
! 1859: 0x00000000);
! 1860: }
! 1861:
! 1862: static void gen_spr_401x2 (CPUPPCState *env)
! 1863: {
! 1864: gen_spr_401(env);
! 1865: spr_register(env, SPR_40x_PID, "PID",
! 1866: SPR_NOACCESS, SPR_NOACCESS,
! 1867: &spr_read_generic, &spr_write_generic,
! 1868: 0x00000000);
! 1869: spr_register(env, SPR_40x_ZPR, "ZPR",
! 1870: SPR_NOACCESS, SPR_NOACCESS,
! 1871: &spr_read_generic, &spr_write_generic,
! 1872: 0x00000000);
! 1873: }
! 1874:
! 1875: /* SPR specific to PowerPC 403 implementation */
! 1876: static void gen_spr_403 (CPUPPCState *env)
! 1877: {
! 1878: /* Debug interface */
! 1879: /* XXX : not implemented */
! 1880: spr_register(env, SPR_40x_DBCR0, "DBCR0",
! 1881: SPR_NOACCESS, SPR_NOACCESS,
! 1882: &spr_read_generic, &spr_write_40x_dbcr0,
! 1883: 0x00000000);
! 1884: /* XXX : not implemented */
! 1885: spr_register(env, SPR_40x_DBSR, "DBSR",
! 1886: SPR_NOACCESS, SPR_NOACCESS,
! 1887: &spr_read_generic, &spr_write_clear,
! 1888: /* Last reset was system reset */
! 1889: 0x00000300);
! 1890: /* XXX : not implemented */
! 1891: spr_register(env, SPR_40x_DAC1, "DAC1",
! 1892: SPR_NOACCESS, SPR_NOACCESS,
! 1893: &spr_read_generic, &spr_write_generic,
! 1894: 0x00000000);
! 1895: /* XXX : not implemented */
! 1896: spr_register(env, SPR_40x_DAC2, "DAC2",
! 1897: SPR_NOACCESS, SPR_NOACCESS,
! 1898: &spr_read_generic, &spr_write_generic,
! 1899: 0x00000000);
! 1900: /* XXX : not implemented */
! 1901: spr_register(env, SPR_40x_IAC1, "IAC1",
! 1902: SPR_NOACCESS, SPR_NOACCESS,
! 1903: &spr_read_generic, &spr_write_generic,
! 1904: 0x00000000);
! 1905: /* XXX : not implemented */
! 1906: spr_register(env, SPR_40x_IAC2, "IAC2",
! 1907: SPR_NOACCESS, SPR_NOACCESS,
! 1908: &spr_read_generic, &spr_write_generic,
! 1909: 0x00000000);
! 1910: }
! 1911:
! 1912: static void gen_spr_403_real (CPUPPCState *env)
! 1913: {
! 1914: spr_register(env, SPR_403_PBL1, "PBL1",
! 1915: SPR_NOACCESS, SPR_NOACCESS,
! 1916: &spr_read_403_pbr, &spr_write_403_pbr,
! 1917: 0x00000000);
! 1918: spr_register(env, SPR_403_PBU1, "PBU1",
! 1919: SPR_NOACCESS, SPR_NOACCESS,
! 1920: &spr_read_403_pbr, &spr_write_403_pbr,
! 1921: 0x00000000);
! 1922: spr_register(env, SPR_403_PBL2, "PBL2",
! 1923: SPR_NOACCESS, SPR_NOACCESS,
! 1924: &spr_read_403_pbr, &spr_write_403_pbr,
! 1925: 0x00000000);
! 1926: spr_register(env, SPR_403_PBU2, "PBU2",
! 1927: SPR_NOACCESS, SPR_NOACCESS,
! 1928: &spr_read_403_pbr, &spr_write_403_pbr,
! 1929: 0x00000000);
! 1930: }
! 1931:
! 1932: static void gen_spr_403_mmu (CPUPPCState *env)
! 1933: {
! 1934: /* MMU */
! 1935: spr_register(env, SPR_40x_PID, "PID",
! 1936: SPR_NOACCESS, SPR_NOACCESS,
! 1937: &spr_read_generic, &spr_write_generic,
! 1938: 0x00000000);
! 1939: spr_register(env, SPR_40x_ZPR, "ZPR",
! 1940: SPR_NOACCESS, SPR_NOACCESS,
! 1941: &spr_read_generic, &spr_write_generic,
! 1942: 0x00000000);
! 1943: }
! 1944:
! 1945: /* SPR specific to PowerPC compression coprocessor extension */
! 1946: static void gen_spr_compress (CPUPPCState *env)
! 1947: {
! 1948: /* XXX : not implemented */
! 1949: spr_register(env, SPR_401_SKR, "SKR",
! 1950: SPR_NOACCESS, SPR_NOACCESS,
! 1951: &spr_read_generic, &spr_write_generic,
! 1952: 0x00000000);
! 1953: }
! 1954:
! 1955: #if defined (TARGET_PPC64)
! 1956: /* SPR specific to PowerPC 620 */
! 1957: static void gen_spr_620 (CPUPPCState *env)
! 1958: {
! 1959: /* Processor identification */
! 1960: spr_register(env, SPR_PIR, "PIR",
! 1961: SPR_NOACCESS, SPR_NOACCESS,
! 1962: &spr_read_generic, &spr_write_pir,
! 1963: 0x00000000);
! 1964: spr_register(env, SPR_ASR, "ASR",
! 1965: SPR_NOACCESS, SPR_NOACCESS,
! 1966: &spr_read_asr, &spr_write_asr,
! 1967: 0x00000000);
! 1968: /* Breakpoints */
! 1969: /* XXX : not implemented */
! 1970: spr_register(env, SPR_IABR, "IABR",
! 1971: SPR_NOACCESS, SPR_NOACCESS,
! 1972: &spr_read_generic, &spr_write_generic,
! 1973: 0x00000000);
! 1974: /* XXX : not implemented */
! 1975: spr_register(env, SPR_DABR, "DABR",
! 1976: SPR_NOACCESS, SPR_NOACCESS,
! 1977: &spr_read_generic, &spr_write_generic,
! 1978: 0x00000000);
! 1979: /* XXX : not implemented */
! 1980: spr_register(env, SPR_SIAR, "SIAR",
! 1981: SPR_NOACCESS, SPR_NOACCESS,
! 1982: &spr_read_generic, SPR_NOACCESS,
! 1983: 0x00000000);
! 1984: /* XXX : not implemented */
! 1985: spr_register(env, SPR_SDA, "SDA",
! 1986: SPR_NOACCESS, SPR_NOACCESS,
! 1987: &spr_read_generic, SPR_NOACCESS,
! 1988: 0x00000000);
! 1989: /* XXX : not implemented */
! 1990: spr_register(env, SPR_620_PMC1R, "PMC1",
! 1991: SPR_NOACCESS, SPR_NOACCESS,
! 1992: &spr_read_generic, SPR_NOACCESS,
! 1993: 0x00000000);
! 1994: spr_register(env, SPR_620_PMC1W, "PMC1",
! 1995: SPR_NOACCESS, SPR_NOACCESS,
! 1996: SPR_NOACCESS, &spr_write_generic,
! 1997: 0x00000000);
! 1998: /* XXX : not implemented */
! 1999: spr_register(env, SPR_620_PMC2R, "PMC2",
! 2000: SPR_NOACCESS, SPR_NOACCESS,
! 2001: &spr_read_generic, SPR_NOACCESS,
! 2002: 0x00000000);
! 2003: spr_register(env, SPR_620_PMC2W, "PMC2",
! 2004: SPR_NOACCESS, SPR_NOACCESS,
! 2005: SPR_NOACCESS, &spr_write_generic,
! 2006: 0x00000000);
! 2007: /* XXX : not implemented */
! 2008: spr_register(env, SPR_620_MMCR0R, "MMCR0",
! 2009: SPR_NOACCESS, SPR_NOACCESS,
! 2010: &spr_read_generic, SPR_NOACCESS,
! 2011: 0x00000000);
! 2012: spr_register(env, SPR_620_MMCR0W, "MMCR0",
! 2013: SPR_NOACCESS, SPR_NOACCESS,
! 2014: SPR_NOACCESS, &spr_write_generic,
! 2015: 0x00000000);
! 2016: /* External access control */
! 2017: /* XXX : not implemented */
! 2018: spr_register(env, SPR_EAR, "EAR",
! 2019: SPR_NOACCESS, SPR_NOACCESS,
! 2020: &spr_read_generic, &spr_write_generic,
! 2021: 0x00000000);
! 2022: #if 0 // XXX: check this
! 2023: /* XXX : not implemented */
! 2024: spr_register(env, SPR_620_PMR0, "PMR0",
! 2025: SPR_NOACCESS, SPR_NOACCESS,
! 2026: &spr_read_generic, &spr_write_generic,
! 2027: 0x00000000);
! 2028: /* XXX : not implemented */
! 2029: spr_register(env, SPR_620_PMR1, "PMR1",
! 2030: SPR_NOACCESS, SPR_NOACCESS,
! 2031: &spr_read_generic, &spr_write_generic,
! 2032: 0x00000000);
! 2033: /* XXX : not implemented */
! 2034: spr_register(env, SPR_620_PMR2, "PMR2",
! 2035: SPR_NOACCESS, SPR_NOACCESS,
! 2036: &spr_read_generic, &spr_write_generic,
! 2037: 0x00000000);
! 2038: /* XXX : not implemented */
! 2039: spr_register(env, SPR_620_PMR3, "PMR3",
! 2040: SPR_NOACCESS, SPR_NOACCESS,
! 2041: &spr_read_generic, &spr_write_generic,
! 2042: 0x00000000);
! 2043: /* XXX : not implemented */
! 2044: spr_register(env, SPR_620_PMR4, "PMR4",
! 2045: SPR_NOACCESS, SPR_NOACCESS,
! 2046: &spr_read_generic, &spr_write_generic,
! 2047: 0x00000000);
! 2048: /* XXX : not implemented */
! 2049: spr_register(env, SPR_620_PMR5, "PMR5",
! 2050: SPR_NOACCESS, SPR_NOACCESS,
! 2051: &spr_read_generic, &spr_write_generic,
! 2052: 0x00000000);
! 2053: /* XXX : not implemented */
! 2054: spr_register(env, SPR_620_PMR6, "PMR6",
! 2055: SPR_NOACCESS, SPR_NOACCESS,
! 2056: &spr_read_generic, &spr_write_generic,
! 2057: 0x00000000);
! 2058: /* XXX : not implemented */
! 2059: spr_register(env, SPR_620_PMR7, "PMR7",
! 2060: SPR_NOACCESS, SPR_NOACCESS,
! 2061: &spr_read_generic, &spr_write_generic,
! 2062: 0x00000000);
! 2063: /* XXX : not implemented */
! 2064: spr_register(env, SPR_620_PMR8, "PMR8",
! 2065: SPR_NOACCESS, SPR_NOACCESS,
! 2066: &spr_read_generic, &spr_write_generic,
! 2067: 0x00000000);
! 2068: /* XXX : not implemented */
! 2069: spr_register(env, SPR_620_PMR9, "PMR9",
! 2070: SPR_NOACCESS, SPR_NOACCESS,
! 2071: &spr_read_generic, &spr_write_generic,
! 2072: 0x00000000);
! 2073: /* XXX : not implemented */
! 2074: spr_register(env, SPR_620_PMRA, "PMR10",
! 2075: SPR_NOACCESS, SPR_NOACCESS,
! 2076: &spr_read_generic, &spr_write_generic,
! 2077: 0x00000000);
! 2078: /* XXX : not implemented */
! 2079: spr_register(env, SPR_620_PMRB, "PMR11",
! 2080: SPR_NOACCESS, SPR_NOACCESS,
! 2081: &spr_read_generic, &spr_write_generic,
! 2082: 0x00000000);
! 2083: /* XXX : not implemented */
! 2084: spr_register(env, SPR_620_PMRC, "PMR12",
! 2085: SPR_NOACCESS, SPR_NOACCESS,
! 2086: &spr_read_generic, &spr_write_generic,
! 2087: 0x00000000);
! 2088: /* XXX : not implemented */
! 2089: spr_register(env, SPR_620_PMRD, "PMR13",
! 2090: SPR_NOACCESS, SPR_NOACCESS,
! 2091: &spr_read_generic, &spr_write_generic,
! 2092: 0x00000000);
! 2093: /* XXX : not implemented */
! 2094: spr_register(env, SPR_620_PMRE, "PMR14",
! 2095: SPR_NOACCESS, SPR_NOACCESS,
! 2096: &spr_read_generic, &spr_write_generic,
! 2097: 0x00000000);
! 2098: /* XXX : not implemented */
! 2099: spr_register(env, SPR_620_PMRF, "PMR15",
! 2100: SPR_NOACCESS, SPR_NOACCESS,
! 2101: &spr_read_generic, &spr_write_generic,
! 2102: 0x00000000);
! 2103: #endif
! 2104: /* XXX : not implemented */
! 2105: spr_register(env, SPR_620_BUSCSR, "BUSCSR",
! 2106: SPR_NOACCESS, SPR_NOACCESS,
! 2107: &spr_read_generic, &spr_write_generic,
! 2108: 0x00000000);
! 2109: /* XXX : not implemented */
! 2110: spr_register(env, SPR_620_L2CR, "L2CR",
! 2111: SPR_NOACCESS, SPR_NOACCESS,
! 2112: &spr_read_generic, &spr_write_generic,
! 2113: 0x00000000);
! 2114: /* XXX : not implemented */
! 2115: spr_register(env, SPR_620_L2SR, "L2SR",
! 2116: SPR_NOACCESS, SPR_NOACCESS,
! 2117: &spr_read_generic, &spr_write_generic,
! 2118: 0x00000000);
! 2119: }
! 2120: #endif /* defined (TARGET_PPC64) */
! 2121:
! 2122: static void gen_spr_5xx_8xx (CPUPPCState *env)
! 2123: {
! 2124: /* Exception processing */
! 2125: spr_register(env, SPR_DSISR, "DSISR",
! 2126: SPR_NOACCESS, SPR_NOACCESS,
! 2127: &spr_read_generic, &spr_write_generic,
! 2128: 0x00000000);
! 2129: spr_register(env, SPR_DAR, "DAR",
! 2130: SPR_NOACCESS, SPR_NOACCESS,
! 2131: &spr_read_generic, &spr_write_generic,
! 2132: 0x00000000);
! 2133: /* Timer */
! 2134: spr_register(env, SPR_DECR, "DECR",
! 2135: SPR_NOACCESS, SPR_NOACCESS,
! 2136: &spr_read_decr, &spr_write_decr,
! 2137: 0x00000000);
! 2138: /* XXX : not implemented */
! 2139: spr_register(env, SPR_MPC_EIE, "EIE",
! 2140: SPR_NOACCESS, SPR_NOACCESS,
! 2141: &spr_read_generic, &spr_write_generic,
! 2142: 0x00000000);
! 2143: /* XXX : not implemented */
! 2144: spr_register(env, SPR_MPC_EID, "EID",
! 2145: SPR_NOACCESS, SPR_NOACCESS,
! 2146: &spr_read_generic, &spr_write_generic,
! 2147: 0x00000000);
! 2148: /* XXX : not implemented */
! 2149: spr_register(env, SPR_MPC_NRI, "NRI",
! 2150: SPR_NOACCESS, SPR_NOACCESS,
! 2151: &spr_read_generic, &spr_write_generic,
! 2152: 0x00000000);
! 2153: /* XXX : not implemented */
! 2154: spr_register(env, SPR_MPC_CMPA, "CMPA",
! 2155: SPR_NOACCESS, SPR_NOACCESS,
! 2156: &spr_read_generic, &spr_write_generic,
! 2157: 0x00000000);
! 2158: /* XXX : not implemented */
! 2159: spr_register(env, SPR_MPC_CMPB, "CMPB",
! 2160: SPR_NOACCESS, SPR_NOACCESS,
! 2161: &spr_read_generic, &spr_write_generic,
! 2162: 0x00000000);
! 2163: /* XXX : not implemented */
! 2164: spr_register(env, SPR_MPC_CMPC, "CMPC",
! 2165: SPR_NOACCESS, SPR_NOACCESS,
! 2166: &spr_read_generic, &spr_write_generic,
! 2167: 0x00000000);
! 2168: /* XXX : not implemented */
! 2169: spr_register(env, SPR_MPC_CMPD, "CMPD",
! 2170: SPR_NOACCESS, SPR_NOACCESS,
! 2171: &spr_read_generic, &spr_write_generic,
! 2172: 0x00000000);
! 2173: /* XXX : not implemented */
! 2174: spr_register(env, SPR_MPC_ECR, "ECR",
! 2175: SPR_NOACCESS, SPR_NOACCESS,
! 2176: &spr_read_generic, &spr_write_generic,
! 2177: 0x00000000);
! 2178: /* XXX : not implemented */
! 2179: spr_register(env, SPR_MPC_DER, "DER",
! 2180: SPR_NOACCESS, SPR_NOACCESS,
! 2181: &spr_read_generic, &spr_write_generic,
! 2182: 0x00000000);
! 2183: /* XXX : not implemented */
! 2184: spr_register(env, SPR_MPC_COUNTA, "COUNTA",
! 2185: SPR_NOACCESS, SPR_NOACCESS,
! 2186: &spr_read_generic, &spr_write_generic,
! 2187: 0x00000000);
! 2188: /* XXX : not implemented */
! 2189: spr_register(env, SPR_MPC_COUNTB, "COUNTB",
! 2190: SPR_NOACCESS, SPR_NOACCESS,
! 2191: &spr_read_generic, &spr_write_generic,
! 2192: 0x00000000);
! 2193: /* XXX : not implemented */
! 2194: spr_register(env, SPR_MPC_CMPE, "CMPE",
! 2195: SPR_NOACCESS, SPR_NOACCESS,
! 2196: &spr_read_generic, &spr_write_generic,
! 2197: 0x00000000);
! 2198: /* XXX : not implemented */
! 2199: spr_register(env, SPR_MPC_CMPF, "CMPF",
! 2200: SPR_NOACCESS, SPR_NOACCESS,
! 2201: &spr_read_generic, &spr_write_generic,
! 2202: 0x00000000);
! 2203: /* XXX : not implemented */
! 2204: spr_register(env, SPR_MPC_CMPG, "CMPG",
! 2205: SPR_NOACCESS, SPR_NOACCESS,
! 2206: &spr_read_generic, &spr_write_generic,
! 2207: 0x00000000);
! 2208: /* XXX : not implemented */
! 2209: spr_register(env, SPR_MPC_CMPH, "CMPH",
! 2210: SPR_NOACCESS, SPR_NOACCESS,
! 2211: &spr_read_generic, &spr_write_generic,
! 2212: 0x00000000);
! 2213: /* XXX : not implemented */
! 2214: spr_register(env, SPR_MPC_LCTRL1, "LCTRL1",
! 2215: SPR_NOACCESS, SPR_NOACCESS,
! 2216: &spr_read_generic, &spr_write_generic,
! 2217: 0x00000000);
! 2218: /* XXX : not implemented */
! 2219: spr_register(env, SPR_MPC_LCTRL2, "LCTRL2",
! 2220: SPR_NOACCESS, SPR_NOACCESS,
! 2221: &spr_read_generic, &spr_write_generic,
! 2222: 0x00000000);
! 2223: /* XXX : not implemented */
! 2224: spr_register(env, SPR_MPC_BAR, "BAR",
! 2225: SPR_NOACCESS, SPR_NOACCESS,
! 2226: &spr_read_generic, &spr_write_generic,
! 2227: 0x00000000);
! 2228: /* XXX : not implemented */
! 2229: spr_register(env, SPR_MPC_DPDR, "DPDR",
! 2230: SPR_NOACCESS, SPR_NOACCESS,
! 2231: &spr_read_generic, &spr_write_generic,
! 2232: 0x00000000);
! 2233: /* XXX : not implemented */
! 2234: spr_register(env, SPR_MPC_IMMR, "IMMR",
! 2235: SPR_NOACCESS, SPR_NOACCESS,
! 2236: &spr_read_generic, &spr_write_generic,
! 2237: 0x00000000);
! 2238: }
! 2239:
! 2240: static void gen_spr_5xx (CPUPPCState *env)
! 2241: {
! 2242: /* XXX : not implemented */
! 2243: spr_register(env, SPR_RCPU_MI_GRA, "MI_GRA",
! 2244: SPR_NOACCESS, SPR_NOACCESS,
! 2245: &spr_read_generic, &spr_write_generic,
! 2246: 0x00000000);
! 2247: /* XXX : not implemented */
! 2248: spr_register(env, SPR_RCPU_L2U_GRA, "L2U_GRA",
! 2249: SPR_NOACCESS, SPR_NOACCESS,
! 2250: &spr_read_generic, &spr_write_generic,
! 2251: 0x00000000);
! 2252: /* XXX : not implemented */
! 2253: spr_register(env, SPR_RPCU_BBCMCR, "L2U_BBCMCR",
! 2254: SPR_NOACCESS, SPR_NOACCESS,
! 2255: &spr_read_generic, &spr_write_generic,
! 2256: 0x00000000);
! 2257: /* XXX : not implemented */
! 2258: spr_register(env, SPR_RCPU_L2U_MCR, "L2U_MCR",
! 2259: SPR_NOACCESS, SPR_NOACCESS,
! 2260: &spr_read_generic, &spr_write_generic,
! 2261: 0x00000000);
! 2262: /* XXX : not implemented */
! 2263: spr_register(env, SPR_RCPU_MI_RBA0, "MI_RBA0",
! 2264: SPR_NOACCESS, SPR_NOACCESS,
! 2265: &spr_read_generic, &spr_write_generic,
! 2266: 0x00000000);
! 2267: /* XXX : not implemented */
! 2268: spr_register(env, SPR_RCPU_MI_RBA1, "MI_RBA1",
! 2269: SPR_NOACCESS, SPR_NOACCESS,
! 2270: &spr_read_generic, &spr_write_generic,
! 2271: 0x00000000);
! 2272: /* XXX : not implemented */
! 2273: spr_register(env, SPR_RCPU_MI_RBA2, "MI_RBA2",
! 2274: SPR_NOACCESS, SPR_NOACCESS,
! 2275: &spr_read_generic, &spr_write_generic,
! 2276: 0x00000000);
! 2277: /* XXX : not implemented */
! 2278: spr_register(env, SPR_RCPU_MI_RBA3, "MI_RBA3",
! 2279: SPR_NOACCESS, SPR_NOACCESS,
! 2280: &spr_read_generic, &spr_write_generic,
! 2281: 0x00000000);
! 2282: /* XXX : not implemented */
! 2283: spr_register(env, SPR_RCPU_L2U_RBA0, "L2U_RBA0",
! 2284: SPR_NOACCESS, SPR_NOACCESS,
! 2285: &spr_read_generic, &spr_write_generic,
! 2286: 0x00000000);
! 2287: /* XXX : not implemented */
! 2288: spr_register(env, SPR_RCPU_L2U_RBA1, "L2U_RBA1",
! 2289: SPR_NOACCESS, SPR_NOACCESS,
! 2290: &spr_read_generic, &spr_write_generic,
! 2291: 0x00000000);
! 2292: /* XXX : not implemented */
! 2293: spr_register(env, SPR_RCPU_L2U_RBA2, "L2U_RBA2",
! 2294: SPR_NOACCESS, SPR_NOACCESS,
! 2295: &spr_read_generic, &spr_write_generic,
! 2296: 0x00000000);
! 2297: /* XXX : not implemented */
! 2298: spr_register(env, SPR_RCPU_L2U_RBA3, "L2U_RBA3",
! 2299: SPR_NOACCESS, SPR_NOACCESS,
! 2300: &spr_read_generic, &spr_write_generic,
! 2301: 0x00000000);
! 2302: /* XXX : not implemented */
! 2303: spr_register(env, SPR_RCPU_MI_RA0, "MI_RA0",
! 2304: SPR_NOACCESS, SPR_NOACCESS,
! 2305: &spr_read_generic, &spr_write_generic,
! 2306: 0x00000000);
! 2307: /* XXX : not implemented */
! 2308: spr_register(env, SPR_RCPU_MI_RA1, "MI_RA1",
! 2309: SPR_NOACCESS, SPR_NOACCESS,
! 2310: &spr_read_generic, &spr_write_generic,
! 2311: 0x00000000);
! 2312: /* XXX : not implemented */
! 2313: spr_register(env, SPR_RCPU_MI_RA2, "MI_RA2",
! 2314: SPR_NOACCESS, SPR_NOACCESS,
! 2315: &spr_read_generic, &spr_write_generic,
! 2316: 0x00000000);
! 2317: /* XXX : not implemented */
! 2318: spr_register(env, SPR_RCPU_MI_RA3, "MI_RA3",
! 2319: SPR_NOACCESS, SPR_NOACCESS,
! 2320: &spr_read_generic, &spr_write_generic,
! 2321: 0x00000000);
! 2322: /* XXX : not implemented */
! 2323: spr_register(env, SPR_RCPU_L2U_RA0, "L2U_RA0",
! 2324: SPR_NOACCESS, SPR_NOACCESS,
! 2325: &spr_read_generic, &spr_write_generic,
! 2326: 0x00000000);
! 2327: /* XXX : not implemented */
! 2328: spr_register(env, SPR_RCPU_L2U_RA1, "L2U_RA1",
! 2329: SPR_NOACCESS, SPR_NOACCESS,
! 2330: &spr_read_generic, &spr_write_generic,
! 2331: 0x00000000);
! 2332: /* XXX : not implemented */
! 2333: spr_register(env, SPR_RCPU_L2U_RA2, "L2U_RA2",
! 2334: SPR_NOACCESS, SPR_NOACCESS,
! 2335: &spr_read_generic, &spr_write_generic,
! 2336: 0x00000000);
! 2337: /* XXX : not implemented */
! 2338: spr_register(env, SPR_RCPU_L2U_RA3, "L2U_RA3",
! 2339: SPR_NOACCESS, SPR_NOACCESS,
! 2340: &spr_read_generic, &spr_write_generic,
! 2341: 0x00000000);
! 2342: /* XXX : not implemented */
! 2343: spr_register(env, SPR_RCPU_FPECR, "FPECR",
! 2344: SPR_NOACCESS, SPR_NOACCESS,
! 2345: &spr_read_generic, &spr_write_generic,
! 2346: 0x00000000);
! 2347: }
! 2348:
! 2349: static void gen_spr_8xx (CPUPPCState *env)
! 2350: {
! 2351: /* XXX : not implemented */
! 2352: spr_register(env, SPR_MPC_IC_CST, "IC_CST",
! 2353: SPR_NOACCESS, SPR_NOACCESS,
! 2354: &spr_read_generic, &spr_write_generic,
! 2355: 0x00000000);
! 2356: /* XXX : not implemented */
! 2357: spr_register(env, SPR_MPC_IC_ADR, "IC_ADR",
! 2358: SPR_NOACCESS, SPR_NOACCESS,
! 2359: &spr_read_generic, &spr_write_generic,
! 2360: 0x00000000);
! 2361: /* XXX : not implemented */
! 2362: spr_register(env, SPR_MPC_IC_DAT, "IC_DAT",
! 2363: SPR_NOACCESS, SPR_NOACCESS,
! 2364: &spr_read_generic, &spr_write_generic,
! 2365: 0x00000000);
! 2366: /* XXX : not implemented */
! 2367: spr_register(env, SPR_MPC_DC_CST, "DC_CST",
! 2368: SPR_NOACCESS, SPR_NOACCESS,
! 2369: &spr_read_generic, &spr_write_generic,
! 2370: 0x00000000);
! 2371: /* XXX : not implemented */
! 2372: spr_register(env, SPR_MPC_DC_ADR, "DC_ADR",
! 2373: SPR_NOACCESS, SPR_NOACCESS,
! 2374: &spr_read_generic, &spr_write_generic,
! 2375: 0x00000000);
! 2376: /* XXX : not implemented */
! 2377: spr_register(env, SPR_MPC_DC_DAT, "DC_DAT",
! 2378: SPR_NOACCESS, SPR_NOACCESS,
! 2379: &spr_read_generic, &spr_write_generic,
! 2380: 0x00000000);
! 2381: /* XXX : not implemented */
! 2382: spr_register(env, SPR_MPC_MI_CTR, "MI_CTR",
! 2383: SPR_NOACCESS, SPR_NOACCESS,
! 2384: &spr_read_generic, &spr_write_generic,
! 2385: 0x00000000);
! 2386: /* XXX : not implemented */
! 2387: spr_register(env, SPR_MPC_MI_AP, "MI_AP",
! 2388: SPR_NOACCESS, SPR_NOACCESS,
! 2389: &spr_read_generic, &spr_write_generic,
! 2390: 0x00000000);
! 2391: /* XXX : not implemented */
! 2392: spr_register(env, SPR_MPC_MI_EPN, "MI_EPN",
! 2393: SPR_NOACCESS, SPR_NOACCESS,
! 2394: &spr_read_generic, &spr_write_generic,
! 2395: 0x00000000);
! 2396: /* XXX : not implemented */
! 2397: spr_register(env, SPR_MPC_MI_TWC, "MI_TWC",
! 2398: SPR_NOACCESS, SPR_NOACCESS,
! 2399: &spr_read_generic, &spr_write_generic,
! 2400: 0x00000000);
! 2401: /* XXX : not implemented */
! 2402: spr_register(env, SPR_MPC_MI_RPN, "MI_RPN",
! 2403: SPR_NOACCESS, SPR_NOACCESS,
! 2404: &spr_read_generic, &spr_write_generic,
! 2405: 0x00000000);
! 2406: /* XXX : not implemented */
! 2407: spr_register(env, SPR_MPC_MI_DBCAM, "MI_DBCAM",
! 2408: SPR_NOACCESS, SPR_NOACCESS,
! 2409: &spr_read_generic, &spr_write_generic,
! 2410: 0x00000000);
! 2411: /* XXX : not implemented */
! 2412: spr_register(env, SPR_MPC_MI_DBRAM0, "MI_DBRAM0",
! 2413: SPR_NOACCESS, SPR_NOACCESS,
! 2414: &spr_read_generic, &spr_write_generic,
! 2415: 0x00000000);
! 2416: /* XXX : not implemented */
! 2417: spr_register(env, SPR_MPC_MI_DBRAM1, "MI_DBRAM1",
! 2418: SPR_NOACCESS, SPR_NOACCESS,
! 2419: &spr_read_generic, &spr_write_generic,
! 2420: 0x00000000);
! 2421: /* XXX : not implemented */
! 2422: spr_register(env, SPR_MPC_MD_CTR, "MD_CTR",
! 2423: SPR_NOACCESS, SPR_NOACCESS,
! 2424: &spr_read_generic, &spr_write_generic,
! 2425: 0x00000000);
! 2426: /* XXX : not implemented */
! 2427: spr_register(env, SPR_MPC_MD_CASID, "MD_CASID",
! 2428: SPR_NOACCESS, SPR_NOACCESS,
! 2429: &spr_read_generic, &spr_write_generic,
! 2430: 0x00000000);
! 2431: /* XXX : not implemented */
! 2432: spr_register(env, SPR_MPC_MD_AP, "MD_AP",
! 2433: SPR_NOACCESS, SPR_NOACCESS,
! 2434: &spr_read_generic, &spr_write_generic,
! 2435: 0x00000000);
! 2436: /* XXX : not implemented */
! 2437: spr_register(env, SPR_MPC_MD_EPN, "MD_EPN",
! 2438: SPR_NOACCESS, SPR_NOACCESS,
! 2439: &spr_read_generic, &spr_write_generic,
! 2440: 0x00000000);
! 2441: /* XXX : not implemented */
! 2442: spr_register(env, SPR_MPC_MD_TWB, "MD_TWB",
! 2443: SPR_NOACCESS, SPR_NOACCESS,
! 2444: &spr_read_generic, &spr_write_generic,
! 2445: 0x00000000);
! 2446: /* XXX : not implemented */
! 2447: spr_register(env, SPR_MPC_MD_TWC, "MD_TWC",
! 2448: SPR_NOACCESS, SPR_NOACCESS,
! 2449: &spr_read_generic, &spr_write_generic,
! 2450: 0x00000000);
! 2451: /* XXX : not implemented */
! 2452: spr_register(env, SPR_MPC_MD_RPN, "MD_RPN",
! 2453: SPR_NOACCESS, SPR_NOACCESS,
! 2454: &spr_read_generic, &spr_write_generic,
! 2455: 0x00000000);
! 2456: /* XXX : not implemented */
! 2457: spr_register(env, SPR_MPC_MD_TW, "MD_TW",
! 2458: SPR_NOACCESS, SPR_NOACCESS,
! 2459: &spr_read_generic, &spr_write_generic,
! 2460: 0x00000000);
! 2461: /* XXX : not implemented */
! 2462: spr_register(env, SPR_MPC_MD_DBCAM, "MD_DBCAM",
! 2463: SPR_NOACCESS, SPR_NOACCESS,
! 2464: &spr_read_generic, &spr_write_generic,
! 2465: 0x00000000);
! 2466: /* XXX : not implemented */
! 2467: spr_register(env, SPR_MPC_MD_DBRAM0, "MD_DBRAM0",
! 2468: SPR_NOACCESS, SPR_NOACCESS,
! 2469: &spr_read_generic, &spr_write_generic,
! 2470: 0x00000000);
! 2471: /* XXX : not implemented */
! 2472: spr_register(env, SPR_MPC_MD_DBRAM1, "MD_DBRAM1",
! 2473: SPR_NOACCESS, SPR_NOACCESS,
! 2474: &spr_read_generic, &spr_write_generic,
! 2475: 0x00000000);
! 2476: }
! 2477:
! 2478: // XXX: TODO
! 2479: /*
! 2480: * AMR => SPR 29 (Power 2.04)
! 2481: * CTRL => SPR 136 (Power 2.04)
! 2482: * CTRL => SPR 152 (Power 2.04)
! 2483: * SCOMC => SPR 276 (64 bits ?)
! 2484: * SCOMD => SPR 277 (64 bits ?)
! 2485: * TBU40 => SPR 286 (Power 2.04 hypv)
! 2486: * HSPRG0 => SPR 304 (Power 2.04 hypv)
! 2487: * HSPRG1 => SPR 305 (Power 2.04 hypv)
! 2488: * HDSISR => SPR 306 (Power 2.04 hypv)
! 2489: * HDAR => SPR 307 (Power 2.04 hypv)
! 2490: * PURR => SPR 309 (Power 2.04 hypv)
! 2491: * HDEC => SPR 310 (Power 2.04 hypv)
! 2492: * HIOR => SPR 311 (hypv)
! 2493: * RMOR => SPR 312 (970)
! 2494: * HRMOR => SPR 313 (Power 2.04 hypv)
! 2495: * HSRR0 => SPR 314 (Power 2.04 hypv)
! 2496: * HSRR1 => SPR 315 (Power 2.04 hypv)
! 2497: * LPCR => SPR 316 (970)
! 2498: * LPIDR => SPR 317 (970)
! 2499: * SPEFSCR => SPR 512 (Power 2.04 emb)
! 2500: * EPR => SPR 702 (Power 2.04 emb)
! 2501: * perf => 768-783 (Power 2.04)
! 2502: * perf => 784-799 (Power 2.04)
! 2503: * PPR => SPR 896 (Power 2.04)
! 2504: * EPLC => SPR 947 (Power 2.04 emb)
! 2505: * EPSC => SPR 948 (Power 2.04 emb)
! 2506: * DABRX => 1015 (Power 2.04 hypv)
! 2507: * FPECR => SPR 1022 (?)
! 2508: * ... and more (thermal management, performance counters, ...)
! 2509: */
! 2510:
! 2511: /*****************************************************************************/
! 2512: /* Exception vectors models */
! 2513: static void init_excp_4xx_real (CPUPPCState *env)
! 2514: {
! 2515: #if !defined(CONFIG_USER_ONLY)
! 2516: env->excp_vectors[POWERPC_EXCP_CRITICAL] = 0x00000100;
! 2517: env->excp_vectors[POWERPC_EXCP_MCHECK] = 0x00000200;
! 2518: env->excp_vectors[POWERPC_EXCP_EXTERNAL] = 0x00000500;
! 2519: env->excp_vectors[POWERPC_EXCP_ALIGN] = 0x00000600;
! 2520: env->excp_vectors[POWERPC_EXCP_PROGRAM] = 0x00000700;
! 2521: env->excp_vectors[POWERPC_EXCP_SYSCALL] = 0x00000C00;
! 2522: env->excp_vectors[POWERPC_EXCP_PIT] = 0x00001000;
! 2523: env->excp_vectors[POWERPC_EXCP_FIT] = 0x00001010;
! 2524: env->excp_vectors[POWERPC_EXCP_WDT] = 0x00001020;
! 2525: env->excp_vectors[POWERPC_EXCP_DEBUG] = 0x00002000;
! 2526: env->excp_prefix = 0x00000000UL;
! 2527: env->ivor_mask = 0x0000FFF0UL;
! 2528: env->ivpr_mask = 0xFFFF0000UL;
! 2529: /* Hardware reset vector */
! 2530: env->hreset_vector = 0xFFFFFFFCUL;
! 2531: #endif
! 2532: }
! 2533:
! 2534: static void init_excp_4xx_softmmu (CPUPPCState *env)
! 2535: {
! 2536: #if !defined(CONFIG_USER_ONLY)
! 2537: env->excp_vectors[POWERPC_EXCP_CRITICAL] = 0x00000100;
! 2538: env->excp_vectors[POWERPC_EXCP_MCHECK] = 0x00000200;
! 2539: env->excp_vectors[POWERPC_EXCP_DSI] = 0x00000300;
! 2540: env->excp_vectors[POWERPC_EXCP_ISI] = 0x00000400;
! 2541: env->excp_vectors[POWERPC_EXCP_EXTERNAL] = 0x00000500;
! 2542: env->excp_vectors[POWERPC_EXCP_ALIGN] = 0x00000600;
! 2543: env->excp_vectors[POWERPC_EXCP_PROGRAM] = 0x00000700;
! 2544: env->excp_vectors[POWERPC_EXCP_SYSCALL] = 0x00000C00;
! 2545: env->excp_vectors[POWERPC_EXCP_PIT] = 0x00001000;
! 2546: env->excp_vectors[POWERPC_EXCP_FIT] = 0x00001010;
! 2547: env->excp_vectors[POWERPC_EXCP_WDT] = 0x00001020;
! 2548: env->excp_vectors[POWERPC_EXCP_DTLB] = 0x00001100;
! 2549: env->excp_vectors[POWERPC_EXCP_ITLB] = 0x00001200;
! 2550: env->excp_vectors[POWERPC_EXCP_DEBUG] = 0x00002000;
! 2551: env->excp_prefix = 0x00000000UL;
! 2552: env->ivor_mask = 0x0000FFF0UL;
! 2553: env->ivpr_mask = 0xFFFF0000UL;
! 2554: /* Hardware reset vector */
! 2555: env->hreset_vector = 0xFFFFFFFCUL;
! 2556: #endif
! 2557: }
! 2558:
! 2559: static void init_excp_MPC5xx (CPUPPCState *env)
! 2560: {
! 2561: #if !defined(CONFIG_USER_ONLY)
! 2562: env->excp_vectors[POWERPC_EXCP_RESET] = 0x00000100;
! 2563: env->excp_vectors[POWERPC_EXCP_MCHECK] = 0x00000200;
! 2564: env->excp_vectors[POWERPC_EXCP_EXTERNAL] = 0x00000500;
! 2565: env->excp_vectors[POWERPC_EXCP_ALIGN] = 0x00000600;
! 2566: env->excp_vectors[POWERPC_EXCP_PROGRAM] = 0x00000700;
! 2567: env->excp_vectors[POWERPC_EXCP_FPU] = 0x00000900;
! 2568: env->excp_vectors[POWERPC_EXCP_DECR] = 0x00000900;
! 2569: env->excp_vectors[POWERPC_EXCP_SYSCALL] = 0x00000C00;
! 2570: env->excp_vectors[POWERPC_EXCP_TRACE] = 0x00000D00;
! 2571: env->excp_vectors[POWERPC_EXCP_FPA] = 0x00000E00;
! 2572: env->excp_vectors[POWERPC_EXCP_EMUL] = 0x00001000;
! 2573: env->excp_vectors[POWERPC_EXCP_DABR] = 0x00001C00;
! 2574: env->excp_vectors[POWERPC_EXCP_IABR] = 0x00001C00;
! 2575: env->excp_vectors[POWERPC_EXCP_MEXTBR] = 0x00001E00;
! 2576: env->excp_vectors[POWERPC_EXCP_NMEXTBR] = 0x00001F00;
! 2577: env->excp_prefix = 0x00000000UL;
! 2578: env->ivor_mask = 0x0000FFF0UL;
! 2579: env->ivpr_mask = 0xFFFF0000UL;
! 2580: /* Hardware reset vector */
! 2581: env->hreset_vector = 0xFFFFFFFCUL;
! 2582: #endif
! 2583: }
! 2584:
! 2585: static void init_excp_MPC8xx (CPUPPCState *env)
! 2586: {
! 2587: #if !defined(CONFIG_USER_ONLY)
! 2588: env->excp_vectors[POWERPC_EXCP_RESET] = 0x00000100;
! 2589: env->excp_vectors[POWERPC_EXCP_MCHECK] = 0x00000200;
! 2590: env->excp_vectors[POWERPC_EXCP_DSI] = 0x00000300;
! 2591: env->excp_vectors[POWERPC_EXCP_ISI] = 0x00000400;
! 2592: env->excp_vectors[POWERPC_EXCP_EXTERNAL] = 0x00000500;
! 2593: env->excp_vectors[POWERPC_EXCP_ALIGN] = 0x00000600;
! 2594: env->excp_vectors[POWERPC_EXCP_PROGRAM] = 0x00000700;
! 2595: env->excp_vectors[POWERPC_EXCP_FPU] = 0x00000900;
! 2596: env->excp_vectors[POWERPC_EXCP_DECR] = 0x00000900;
! 2597: env->excp_vectors[POWERPC_EXCP_SYSCALL] = 0x00000C00;
! 2598: env->excp_vectors[POWERPC_EXCP_TRACE] = 0x00000D00;
! 2599: env->excp_vectors[POWERPC_EXCP_FPA] = 0x00000E00;
! 2600: env->excp_vectors[POWERPC_EXCP_EMUL] = 0x00001000;
! 2601: env->excp_vectors[POWERPC_EXCP_ITLB] = 0x00001100;
! 2602: env->excp_vectors[POWERPC_EXCP_DTLB] = 0x00001200;
! 2603: env->excp_vectors[POWERPC_EXCP_ITLBE] = 0x00001300;
! 2604: env->excp_vectors[POWERPC_EXCP_DTLBE] = 0x00001400;
! 2605: env->excp_vectors[POWERPC_EXCP_DABR] = 0x00001C00;
! 2606: env->excp_vectors[POWERPC_EXCP_IABR] = 0x00001C00;
! 2607: env->excp_vectors[POWERPC_EXCP_MEXTBR] = 0x00001E00;
! 2608: env->excp_vectors[POWERPC_EXCP_NMEXTBR] = 0x00001F00;
! 2609: env->excp_prefix = 0x00000000UL;
! 2610: env->ivor_mask = 0x0000FFF0UL;
! 2611: env->ivpr_mask = 0xFFFF0000UL;
! 2612: /* Hardware reset vector */
! 2613: env->hreset_vector = 0xFFFFFFFCUL;
! 2614: #endif
! 2615: }
! 2616:
! 2617: static void init_excp_G2 (CPUPPCState *env)
! 2618: {
! 2619: #if !defined(CONFIG_USER_ONLY)
! 2620: env->excp_vectors[POWERPC_EXCP_RESET] = 0x00000100;
! 2621: env->excp_vectors[POWERPC_EXCP_MCHECK] = 0x00000200;
! 2622: env->excp_vectors[POWERPC_EXCP_DSI] = 0x00000300;
! 2623: env->excp_vectors[POWERPC_EXCP_ISI] = 0x00000400;
! 2624: env->excp_vectors[POWERPC_EXCP_EXTERNAL] = 0x00000500;
! 2625: env->excp_vectors[POWERPC_EXCP_ALIGN] = 0x00000600;
! 2626: env->excp_vectors[POWERPC_EXCP_PROGRAM] = 0x00000700;
! 2627: env->excp_vectors[POWERPC_EXCP_FPU] = 0x00000800;
! 2628: env->excp_vectors[POWERPC_EXCP_DECR] = 0x00000900;
! 2629: env->excp_vectors[POWERPC_EXCP_CRITICAL] = 0x00000A00;
! 2630: env->excp_vectors[POWERPC_EXCP_SYSCALL] = 0x00000C00;
! 2631: env->excp_vectors[POWERPC_EXCP_TRACE] = 0x00000D00;
! 2632: env->excp_vectors[POWERPC_EXCP_IFTLB] = 0x00001000;
! 2633: env->excp_vectors[POWERPC_EXCP_DLTLB] = 0x00001100;
! 2634: env->excp_vectors[POWERPC_EXCP_DSTLB] = 0x00001200;
! 2635: env->excp_vectors[POWERPC_EXCP_IABR] = 0x00001300;
! 2636: env->excp_vectors[POWERPC_EXCP_SMI] = 0x00001400;
! 2637: env->excp_prefix = 0x00000000UL;
! 2638: /* Hardware reset vector */
! 2639: env->hreset_vector = 0xFFFFFFFCUL;
! 2640: #endif
! 2641: }
! 2642:
! 2643: static void init_excp_e200 (CPUPPCState *env)
! 2644: {
! 2645: #if !defined(CONFIG_USER_ONLY)
! 2646: env->excp_vectors[POWERPC_EXCP_RESET] = 0x00000FFC;
! 2647: env->excp_vectors[POWERPC_EXCP_CRITICAL] = 0x00000000;
! 2648: env->excp_vectors[POWERPC_EXCP_MCHECK] = 0x00000000;
! 2649: env->excp_vectors[POWERPC_EXCP_DSI] = 0x00000000;
! 2650: env->excp_vectors[POWERPC_EXCP_ISI] = 0x00000000;
! 2651: env->excp_vectors[POWERPC_EXCP_EXTERNAL] = 0x00000000;
! 2652: env->excp_vectors[POWERPC_EXCP_ALIGN] = 0x00000000;
! 2653: env->excp_vectors[POWERPC_EXCP_PROGRAM] = 0x00000000;
! 2654: env->excp_vectors[POWERPC_EXCP_FPU] = 0x00000000;
! 2655: env->excp_vectors[POWERPC_EXCP_SYSCALL] = 0x00000000;
! 2656: env->excp_vectors[POWERPC_EXCP_APU] = 0x00000000;
! 2657: env->excp_vectors[POWERPC_EXCP_DECR] = 0x00000000;
! 2658: env->excp_vectors[POWERPC_EXCP_FIT] = 0x00000000;
! 2659: env->excp_vectors[POWERPC_EXCP_WDT] = 0x00000000;
! 2660: env->excp_vectors[POWERPC_EXCP_DTLB] = 0x00000000;
! 2661: env->excp_vectors[POWERPC_EXCP_ITLB] = 0x00000000;
! 2662: env->excp_vectors[POWERPC_EXCP_DEBUG] = 0x00000000;
! 2663: env->excp_vectors[POWERPC_EXCP_SPEU] = 0x00000000;
! 2664: env->excp_vectors[POWERPC_EXCP_EFPDI] = 0x00000000;
! 2665: env->excp_vectors[POWERPC_EXCP_EFPRI] = 0x00000000;
! 2666: env->excp_prefix = 0x00000000UL;
! 2667: env->ivor_mask = 0x0000FFF7UL;
! 2668: env->ivpr_mask = 0xFFFF0000UL;
! 2669: /* Hardware reset vector */
! 2670: env->hreset_vector = 0xFFFFFFFCUL;
! 2671: #endif
! 2672: }
! 2673:
! 2674: static void init_excp_BookE (CPUPPCState *env)
! 2675: {
! 2676: #if !defined(CONFIG_USER_ONLY)
! 2677: env->excp_vectors[POWERPC_EXCP_CRITICAL] = 0x00000000;
! 2678: env->excp_vectors[POWERPC_EXCP_MCHECK] = 0x00000000;
! 2679: env->excp_vectors[POWERPC_EXCP_DSI] = 0x00000000;
! 2680: env->excp_vectors[POWERPC_EXCP_ISI] = 0x00000000;
! 2681: env->excp_vectors[POWERPC_EXCP_EXTERNAL] = 0x00000000;
! 2682: env->excp_vectors[POWERPC_EXCP_ALIGN] = 0x00000000;
! 2683: env->excp_vectors[POWERPC_EXCP_PROGRAM] = 0x00000000;
! 2684: env->excp_vectors[POWERPC_EXCP_FPU] = 0x00000000;
! 2685: env->excp_vectors[POWERPC_EXCP_SYSCALL] = 0x00000000;
! 2686: env->excp_vectors[POWERPC_EXCP_APU] = 0x00000000;
! 2687: env->excp_vectors[POWERPC_EXCP_DECR] = 0x00000000;
! 2688: env->excp_vectors[POWERPC_EXCP_FIT] = 0x00000000;
! 2689: env->excp_vectors[POWERPC_EXCP_WDT] = 0x00000000;
! 2690: env->excp_vectors[POWERPC_EXCP_DTLB] = 0x00000000;
! 2691: env->excp_vectors[POWERPC_EXCP_ITLB] = 0x00000000;
! 2692: env->excp_vectors[POWERPC_EXCP_DEBUG] = 0x00000000;
! 2693: env->excp_prefix = 0x00000000UL;
! 2694: env->ivor_mask = 0x0000FFE0UL;
! 2695: env->ivpr_mask = 0xFFFF0000UL;
! 2696: /* Hardware reset vector */
! 2697: env->hreset_vector = 0xFFFFFFFCUL;
! 2698: #endif
! 2699: }
! 2700:
! 2701: static void init_excp_601 (CPUPPCState *env)
! 2702: {
! 2703: #if !defined(CONFIG_USER_ONLY)
! 2704: env->excp_vectors[POWERPC_EXCP_RESET] = 0x00000100;
! 2705: env->excp_vectors[POWERPC_EXCP_MCHECK] = 0x00000200;
! 2706: env->excp_vectors[POWERPC_EXCP_DSI] = 0x00000300;
! 2707: env->excp_vectors[POWERPC_EXCP_ISI] = 0x00000400;
! 2708: env->excp_vectors[POWERPC_EXCP_EXTERNAL] = 0x00000500;
! 2709: env->excp_vectors[POWERPC_EXCP_ALIGN] = 0x00000600;
! 2710: env->excp_vectors[POWERPC_EXCP_PROGRAM] = 0x00000700;
! 2711: env->excp_vectors[POWERPC_EXCP_FPU] = 0x00000800;
! 2712: env->excp_vectors[POWERPC_EXCP_DECR] = 0x00000900;
! 2713: env->excp_vectors[POWERPC_EXCP_IO] = 0x00000A00;
! 2714: env->excp_vectors[POWERPC_EXCP_SYSCALL] = 0x00000C00;
! 2715: env->excp_vectors[POWERPC_EXCP_RUNM] = 0x00002000;
! 2716: env->excp_prefix = 0xFFF00000UL;
! 2717: /* Hardware reset vector */
! 2718: env->hreset_vector = 0x00000100UL;
! 2719: #endif
! 2720: }
! 2721:
! 2722: static void init_excp_602 (CPUPPCState *env)
! 2723: {
! 2724: #if !defined(CONFIG_USER_ONLY)
! 2725: /* XXX: exception prefix has a special behavior on 602 */
! 2726: env->excp_vectors[POWERPC_EXCP_RESET] = 0x00000100;
! 2727: env->excp_vectors[POWERPC_EXCP_MCHECK] = 0x00000200;
! 2728: env->excp_vectors[POWERPC_EXCP_DSI] = 0x00000300;
! 2729: env->excp_vectors[POWERPC_EXCP_ISI] = 0x00000400;
! 2730: env->excp_vectors[POWERPC_EXCP_EXTERNAL] = 0x00000500;
! 2731: env->excp_vectors[POWERPC_EXCP_ALIGN] = 0x00000600;
! 2732: env->excp_vectors[POWERPC_EXCP_PROGRAM] = 0x00000700;
! 2733: env->excp_vectors[POWERPC_EXCP_FPU] = 0x00000800;
! 2734: env->excp_vectors[POWERPC_EXCP_DECR] = 0x00000900;
! 2735: env->excp_vectors[POWERPC_EXCP_SYSCALL] = 0x00000C00;
! 2736: env->excp_vectors[POWERPC_EXCP_TRACE] = 0x00000D00;
! 2737: env->excp_vectors[POWERPC_EXCP_IFTLB] = 0x00001000;
! 2738: env->excp_vectors[POWERPC_EXCP_DLTLB] = 0x00001100;
! 2739: env->excp_vectors[POWERPC_EXCP_DSTLB] = 0x00001200;
! 2740: env->excp_vectors[POWERPC_EXCP_IABR] = 0x00001300;
! 2741: env->excp_vectors[POWERPC_EXCP_SMI] = 0x00001400;
! 2742: env->excp_vectors[POWERPC_EXCP_WDT] = 0x00001500;
! 2743: env->excp_vectors[POWERPC_EXCP_EMUL] = 0x00001600;
! 2744: env->excp_prefix = 0xFFF00000UL;
! 2745: /* Hardware reset vector */
! 2746: env->hreset_vector = 0xFFFFFFFCUL;
! 2747: #endif
! 2748: }
! 2749:
! 2750: static void init_excp_603 (CPUPPCState *env)
! 2751: {
! 2752: #if !defined(CONFIG_USER_ONLY)
! 2753: env->excp_vectors[POWERPC_EXCP_RESET] = 0x00000100;
! 2754: env->excp_vectors[POWERPC_EXCP_MCHECK] = 0x00000200;
! 2755: env->excp_vectors[POWERPC_EXCP_DSI] = 0x00000300;
! 2756: env->excp_vectors[POWERPC_EXCP_ISI] = 0x00000400;
! 2757: env->excp_vectors[POWERPC_EXCP_EXTERNAL] = 0x00000500;
! 2758: env->excp_vectors[POWERPC_EXCP_ALIGN] = 0x00000600;
! 2759: env->excp_vectors[POWERPC_EXCP_PROGRAM] = 0x00000700;
! 2760: env->excp_vectors[POWERPC_EXCP_FPU] = 0x00000800;
! 2761: env->excp_vectors[POWERPC_EXCP_DECR] = 0x00000900;
! 2762: env->excp_vectors[POWERPC_EXCP_SYSCALL] = 0x00000C00;
! 2763: env->excp_vectors[POWERPC_EXCP_TRACE] = 0x00000D00;
! 2764: env->excp_vectors[POWERPC_EXCP_IFTLB] = 0x00001000;
! 2765: env->excp_vectors[POWERPC_EXCP_DLTLB] = 0x00001100;
! 2766: env->excp_vectors[POWERPC_EXCP_DSTLB] = 0x00001200;
! 2767: env->excp_vectors[POWERPC_EXCP_IABR] = 0x00001300;
! 2768: env->excp_vectors[POWERPC_EXCP_SMI] = 0x00001400;
! 2769: env->excp_prefix = 0x00000000UL;
! 2770: /* Hardware reset vector */
! 2771: env->hreset_vector = 0xFFFFFFFCUL;
! 2772: #endif
! 2773: }
! 2774:
! 2775: static void init_excp_604 (CPUPPCState *env)
! 2776: {
! 2777: #if !defined(CONFIG_USER_ONLY)
! 2778: env->excp_vectors[POWERPC_EXCP_RESET] = 0x00000100;
! 2779: env->excp_vectors[POWERPC_EXCP_MCHECK] = 0x00000200;
! 2780: env->excp_vectors[POWERPC_EXCP_DSI] = 0x00000300;
! 2781: env->excp_vectors[POWERPC_EXCP_ISI] = 0x00000400;
! 2782: env->excp_vectors[POWERPC_EXCP_EXTERNAL] = 0x00000500;
! 2783: env->excp_vectors[POWERPC_EXCP_ALIGN] = 0x00000600;
! 2784: env->excp_vectors[POWERPC_EXCP_PROGRAM] = 0x00000700;
! 2785: env->excp_vectors[POWERPC_EXCP_FPU] = 0x00000800;
! 2786: env->excp_vectors[POWERPC_EXCP_DECR] = 0x00000900;
! 2787: env->excp_vectors[POWERPC_EXCP_SYSCALL] = 0x00000C00;
! 2788: env->excp_vectors[POWERPC_EXCP_TRACE] = 0x00000D00;
! 2789: env->excp_vectors[POWERPC_EXCP_PERFM] = 0x00000F00;
! 2790: env->excp_vectors[POWERPC_EXCP_IABR] = 0x00001300;
! 2791: env->excp_vectors[POWERPC_EXCP_SMI] = 0x00001400;
! 2792: env->excp_prefix = 0x00000000UL;
! 2793: /* Hardware reset vector */
! 2794: env->hreset_vector = 0xFFFFFFFCUL;
! 2795: #endif
! 2796: }
! 2797:
! 2798: #if defined(TARGET_PPC64)
! 2799: static void init_excp_620 (CPUPPCState *env)
! 2800: {
! 2801: #if !defined(CONFIG_USER_ONLY)
! 2802: env->excp_vectors[POWERPC_EXCP_RESET] = 0x00000100;
! 2803: env->excp_vectors[POWERPC_EXCP_MCHECK] = 0x00000200;
! 2804: env->excp_vectors[POWERPC_EXCP_DSI] = 0x00000300;
! 2805: env->excp_vectors[POWERPC_EXCP_ISI] = 0x00000400;
! 2806: env->excp_vectors[POWERPC_EXCP_EXTERNAL] = 0x00000500;
! 2807: env->excp_vectors[POWERPC_EXCP_ALIGN] = 0x00000600;
! 2808: env->excp_vectors[POWERPC_EXCP_PROGRAM] = 0x00000700;
! 2809: env->excp_vectors[POWERPC_EXCP_FPU] = 0x00000800;
! 2810: env->excp_vectors[POWERPC_EXCP_DECR] = 0x00000900;
! 2811: env->excp_vectors[POWERPC_EXCP_SYSCALL] = 0x00000C00;
! 2812: env->excp_vectors[POWERPC_EXCP_TRACE] = 0x00000D00;
! 2813: env->excp_vectors[POWERPC_EXCP_PERFM] = 0x00000F00;
! 2814: env->excp_vectors[POWERPC_EXCP_IABR] = 0x00001300;
! 2815: env->excp_vectors[POWERPC_EXCP_SMI] = 0x00001400;
! 2816: env->excp_prefix = 0xFFF00000UL;
! 2817: /* Hardware reset vector */
! 2818: env->hreset_vector = 0x0000000000000100ULL;
! 2819: #endif
! 2820: }
! 2821: #endif /* defined(TARGET_PPC64) */
! 2822:
! 2823: static void init_excp_7x0 (CPUPPCState *env)
! 2824: {
! 2825: #if !defined(CONFIG_USER_ONLY)
! 2826: env->excp_vectors[POWERPC_EXCP_RESET] = 0x00000100;
! 2827: env->excp_vectors[POWERPC_EXCP_MCHECK] = 0x00000200;
! 2828: env->excp_vectors[POWERPC_EXCP_DSI] = 0x00000300;
! 2829: env->excp_vectors[POWERPC_EXCP_ISI] = 0x00000400;
! 2830: env->excp_vectors[POWERPC_EXCP_EXTERNAL] = 0x00000500;
! 2831: env->excp_vectors[POWERPC_EXCP_ALIGN] = 0x00000600;
! 2832: env->excp_vectors[POWERPC_EXCP_PROGRAM] = 0x00000700;
! 2833: env->excp_vectors[POWERPC_EXCP_FPU] = 0x00000800;
! 2834: env->excp_vectors[POWERPC_EXCP_DECR] = 0x00000900;
! 2835: env->excp_vectors[POWERPC_EXCP_SYSCALL] = 0x00000C00;
! 2836: env->excp_vectors[POWERPC_EXCP_TRACE] = 0x00000D00;
! 2837: env->excp_vectors[POWERPC_EXCP_PERFM] = 0x00000F00;
! 2838: env->excp_vectors[POWERPC_EXCP_IABR] = 0x00001300;
! 2839: env->excp_vectors[POWERPC_EXCP_SMI] = 0x00001400;
! 2840: env->excp_vectors[POWERPC_EXCP_THERM] = 0x00001700;
! 2841: env->excp_prefix = 0x00000000UL;
! 2842: /* Hardware reset vector */
! 2843: env->hreset_vector = 0xFFFFFFFCUL;
! 2844: #endif
! 2845: }
! 2846:
! 2847: static void init_excp_750cl (CPUPPCState *env)
! 2848: {
! 2849: #if !defined(CONFIG_USER_ONLY)
! 2850: env->excp_vectors[POWERPC_EXCP_RESET] = 0x00000100;
! 2851: env->excp_vectors[POWERPC_EXCP_MCHECK] = 0x00000200;
! 2852: env->excp_vectors[POWERPC_EXCP_DSI] = 0x00000300;
! 2853: env->excp_vectors[POWERPC_EXCP_ISI] = 0x00000400;
! 2854: env->excp_vectors[POWERPC_EXCP_EXTERNAL] = 0x00000500;
! 2855: env->excp_vectors[POWERPC_EXCP_ALIGN] = 0x00000600;
! 2856: env->excp_vectors[POWERPC_EXCP_PROGRAM] = 0x00000700;
! 2857: env->excp_vectors[POWERPC_EXCP_FPU] = 0x00000800;
! 2858: env->excp_vectors[POWERPC_EXCP_DECR] = 0x00000900;
! 2859: env->excp_vectors[POWERPC_EXCP_SYSCALL] = 0x00000C00;
! 2860: env->excp_vectors[POWERPC_EXCP_TRACE] = 0x00000D00;
! 2861: env->excp_vectors[POWERPC_EXCP_PERFM] = 0x00000F00;
! 2862: env->excp_vectors[POWERPC_EXCP_IABR] = 0x00001300;
! 2863: env->excp_vectors[POWERPC_EXCP_SMI] = 0x00001400;
! 2864: env->excp_prefix = 0x00000000UL;
! 2865: /* Hardware reset vector */
! 2866: env->hreset_vector = 0xFFFFFFFCUL;
! 2867: #endif
! 2868: }
! 2869:
! 2870: static void init_excp_750cx (CPUPPCState *env)
! 2871: {
! 2872: #if !defined(CONFIG_USER_ONLY)
! 2873: env->excp_vectors[POWERPC_EXCP_RESET] = 0x00000100;
! 2874: env->excp_vectors[POWERPC_EXCP_MCHECK] = 0x00000200;
! 2875: env->excp_vectors[POWERPC_EXCP_DSI] = 0x00000300;
! 2876: env->excp_vectors[POWERPC_EXCP_ISI] = 0x00000400;
! 2877: env->excp_vectors[POWERPC_EXCP_EXTERNAL] = 0x00000500;
! 2878: env->excp_vectors[POWERPC_EXCP_ALIGN] = 0x00000600;
! 2879: env->excp_vectors[POWERPC_EXCP_PROGRAM] = 0x00000700;
! 2880: env->excp_vectors[POWERPC_EXCP_FPU] = 0x00000800;
! 2881: env->excp_vectors[POWERPC_EXCP_DECR] = 0x00000900;
! 2882: env->excp_vectors[POWERPC_EXCP_SYSCALL] = 0x00000C00;
! 2883: env->excp_vectors[POWERPC_EXCP_TRACE] = 0x00000D00;
! 2884: env->excp_vectors[POWERPC_EXCP_PERFM] = 0x00000F00;
! 2885: env->excp_vectors[POWERPC_EXCP_IABR] = 0x00001300;
! 2886: env->excp_vectors[POWERPC_EXCP_THERM] = 0x00001700;
! 2887: env->excp_prefix = 0x00000000UL;
! 2888: /* Hardware reset vector */
! 2889: env->hreset_vector = 0xFFFFFFFCUL;
! 2890: #endif
! 2891: }
! 2892:
! 2893: /* XXX: Check if this is correct */
! 2894: static void init_excp_7x5 (CPUPPCState *env)
! 2895: {
! 2896: #if !defined(CONFIG_USER_ONLY)
! 2897: env->excp_vectors[POWERPC_EXCP_RESET] = 0x00000100;
! 2898: env->excp_vectors[POWERPC_EXCP_MCHECK] = 0x00000200;
! 2899: env->excp_vectors[POWERPC_EXCP_DSI] = 0x00000300;
! 2900: env->excp_vectors[POWERPC_EXCP_ISI] = 0x00000400;
! 2901: env->excp_vectors[POWERPC_EXCP_EXTERNAL] = 0x00000500;
! 2902: env->excp_vectors[POWERPC_EXCP_ALIGN] = 0x00000600;
! 2903: env->excp_vectors[POWERPC_EXCP_PROGRAM] = 0x00000700;
! 2904: env->excp_vectors[POWERPC_EXCP_FPU] = 0x00000800;
! 2905: env->excp_vectors[POWERPC_EXCP_DECR] = 0x00000900;
! 2906: env->excp_vectors[POWERPC_EXCP_SYSCALL] = 0x00000C00;
! 2907: env->excp_vectors[POWERPC_EXCP_TRACE] = 0x00000D00;
! 2908: env->excp_vectors[POWERPC_EXCP_PERFM] = 0x00000F00;
! 2909: env->excp_vectors[POWERPC_EXCP_IFTLB] = 0x00001000;
! 2910: env->excp_vectors[POWERPC_EXCP_DLTLB] = 0x00001100;
! 2911: env->excp_vectors[POWERPC_EXCP_DSTLB] = 0x00001200;
! 2912: env->excp_vectors[POWERPC_EXCP_IABR] = 0x00001300;
! 2913: env->excp_vectors[POWERPC_EXCP_SMI] = 0x00001400;
! 2914: env->excp_vectors[POWERPC_EXCP_THERM] = 0x00001700;
! 2915: env->excp_prefix = 0x00000000UL;
! 2916: /* Hardware reset vector */
! 2917: env->hreset_vector = 0xFFFFFFFCUL;
! 2918: #endif
! 2919: }
! 2920:
! 2921: static void init_excp_7400 (CPUPPCState *env)
! 2922: {
! 2923: #if !defined(CONFIG_USER_ONLY)
! 2924: env->excp_vectors[POWERPC_EXCP_RESET] = 0x00000100;
! 2925: env->excp_vectors[POWERPC_EXCP_MCHECK] = 0x00000200;
! 2926: env->excp_vectors[POWERPC_EXCP_DSI] = 0x00000300;
! 2927: env->excp_vectors[POWERPC_EXCP_ISI] = 0x00000400;
! 2928: env->excp_vectors[POWERPC_EXCP_EXTERNAL] = 0x00000500;
! 2929: env->excp_vectors[POWERPC_EXCP_ALIGN] = 0x00000600;
! 2930: env->excp_vectors[POWERPC_EXCP_PROGRAM] = 0x00000700;
! 2931: env->excp_vectors[POWERPC_EXCP_FPU] = 0x00000800;
! 2932: env->excp_vectors[POWERPC_EXCP_DECR] = 0x00000900;
! 2933: env->excp_vectors[POWERPC_EXCP_SYSCALL] = 0x00000C00;
! 2934: env->excp_vectors[POWERPC_EXCP_TRACE] = 0x00000D00;
! 2935: env->excp_vectors[POWERPC_EXCP_PERFM] = 0x00000F00;
! 2936: env->excp_vectors[POWERPC_EXCP_VPU] = 0x00000F20;
! 2937: env->excp_vectors[POWERPC_EXCP_IABR] = 0x00001300;
! 2938: env->excp_vectors[POWERPC_EXCP_SMI] = 0x00001400;
! 2939: env->excp_vectors[POWERPC_EXCP_VPUA] = 0x00001600;
! 2940: env->excp_vectors[POWERPC_EXCP_THERM] = 0x00001700;
! 2941: env->excp_prefix = 0x00000000UL;
! 2942: /* Hardware reset vector */
! 2943: env->hreset_vector = 0xFFFFFFFCUL;
! 2944: #endif
! 2945: }
! 2946:
! 2947: static void init_excp_7450 (CPUPPCState *env)
! 2948: {
! 2949: #if !defined(CONFIG_USER_ONLY)
! 2950: env->excp_vectors[POWERPC_EXCP_RESET] = 0x00000100;
! 2951: env->excp_vectors[POWERPC_EXCP_MCHECK] = 0x00000200;
! 2952: env->excp_vectors[POWERPC_EXCP_DSI] = 0x00000300;
! 2953: env->excp_vectors[POWERPC_EXCP_ISI] = 0x00000400;
! 2954: env->excp_vectors[POWERPC_EXCP_EXTERNAL] = 0x00000500;
! 2955: env->excp_vectors[POWERPC_EXCP_ALIGN] = 0x00000600;
! 2956: env->excp_vectors[POWERPC_EXCP_PROGRAM] = 0x00000700;
! 2957: env->excp_vectors[POWERPC_EXCP_FPU] = 0x00000800;
! 2958: env->excp_vectors[POWERPC_EXCP_DECR] = 0x00000900;
! 2959: env->excp_vectors[POWERPC_EXCP_SYSCALL] = 0x00000C00;
! 2960: env->excp_vectors[POWERPC_EXCP_TRACE] = 0x00000D00;
! 2961: env->excp_vectors[POWERPC_EXCP_PERFM] = 0x00000F00;
! 2962: env->excp_vectors[POWERPC_EXCP_VPU] = 0x00000F20;
! 2963: env->excp_vectors[POWERPC_EXCP_IFTLB] = 0x00001000;
! 2964: env->excp_vectors[POWERPC_EXCP_DLTLB] = 0x00001100;
! 2965: env->excp_vectors[POWERPC_EXCP_DSTLB] = 0x00001200;
! 2966: env->excp_vectors[POWERPC_EXCP_IABR] = 0x00001300;
! 2967: env->excp_vectors[POWERPC_EXCP_SMI] = 0x00001400;
! 2968: env->excp_vectors[POWERPC_EXCP_VPUA] = 0x00001600;
! 2969: env->excp_prefix = 0x00000000UL;
! 2970: /* Hardware reset vector */
! 2971: env->hreset_vector = 0xFFFFFFFCUL;
! 2972: #endif
! 2973: }
! 2974:
! 2975: #if defined (TARGET_PPC64)
! 2976: static void init_excp_970 (CPUPPCState *env)
! 2977: {
! 2978: #if !defined(CONFIG_USER_ONLY)
! 2979: env->excp_vectors[POWERPC_EXCP_RESET] = 0x00000100;
! 2980: env->excp_vectors[POWERPC_EXCP_MCHECK] = 0x00000200;
! 2981: env->excp_vectors[POWERPC_EXCP_DSI] = 0x00000300;
! 2982: env->excp_vectors[POWERPC_EXCP_DSEG] = 0x00000380;
! 2983: env->excp_vectors[POWERPC_EXCP_ISI] = 0x00000400;
! 2984: env->excp_vectors[POWERPC_EXCP_ISEG] = 0x00000480;
! 2985: env->excp_vectors[POWERPC_EXCP_EXTERNAL] = 0x00000500;
! 2986: env->excp_vectors[POWERPC_EXCP_ALIGN] = 0x00000600;
! 2987: env->excp_vectors[POWERPC_EXCP_PROGRAM] = 0x00000700;
! 2988: env->excp_vectors[POWERPC_EXCP_FPU] = 0x00000800;
! 2989: env->excp_vectors[POWERPC_EXCP_DECR] = 0x00000900;
! 2990: env->excp_vectors[POWERPC_EXCP_HDECR] = 0x00000980;
! 2991: env->excp_vectors[POWERPC_EXCP_SYSCALL] = 0x00000C00;
! 2992: env->excp_vectors[POWERPC_EXCP_TRACE] = 0x00000D00;
! 2993: env->excp_vectors[POWERPC_EXCP_PERFM] = 0x00000F00;
! 2994: env->excp_vectors[POWERPC_EXCP_VPU] = 0x00000F20;
! 2995: env->excp_vectors[POWERPC_EXCP_IABR] = 0x00001300;
! 2996: env->excp_vectors[POWERPC_EXCP_MAINT] = 0x00001600;
! 2997: env->excp_vectors[POWERPC_EXCP_VPUA] = 0x00001700;
! 2998: env->excp_vectors[POWERPC_EXCP_THERM] = 0x00001800;
! 2999: env->excp_prefix = 0x00000000FFF00000ULL;
! 3000: /* Hardware reset vector */
! 3001: env->hreset_vector = 0x0000000000000100ULL;
! 3002: #endif
! 3003: }
! 3004: #endif
! 3005:
! 3006: /*****************************************************************************/
! 3007: /* Power management enable checks */
! 3008: static int check_pow_none (CPUPPCState *env)
! 3009: {
! 3010: return 0;
! 3011: }
! 3012:
! 3013: static int check_pow_nocheck (CPUPPCState *env)
! 3014: {
! 3015: return 1;
! 3016: }
! 3017:
! 3018: static int check_pow_hid0 (CPUPPCState *env)
! 3019: {
! 3020: if (env->spr[SPR_HID0] & 0x00E00000)
! 3021: return 1;
! 3022:
! 3023: return 0;
! 3024: }
! 3025:
! 3026: static int check_pow_hid0_74xx (CPUPPCState *env)
! 3027: {
! 3028: if (env->spr[SPR_HID0] & 0x00600000)
! 3029: return 1;
! 3030:
! 3031: return 0;
! 3032: }
! 3033:
! 3034: /*****************************************************************************/
! 3035: /* PowerPC implementations definitions */
! 3036:
! 3037: /* PowerPC 401 */
! 3038: #define POWERPC_INSNS_401 (PPC_INSNS_BASE | PPC_STRING | \
! 3039: PPC_WRTEE | PPC_DCR | \
! 3040: PPC_CACHE | PPC_CACHE_ICBI | PPC_40x_ICBT | \
! 3041: PPC_CACHE_DCBZ | \
! 3042: PPC_MEM_SYNC | PPC_MEM_EIEIO | \
! 3043: PPC_4xx_COMMON | PPC_40x_EXCP)
! 3044: #define POWERPC_MSRM_401 (0x00000000000FD201ULL)
! 3045: #define POWERPC_MMU_401 (POWERPC_MMU_REAL)
! 3046: #define POWERPC_EXCP_401 (POWERPC_EXCP_40x)
! 3047: #define POWERPC_INPUT_401 (PPC_FLAGS_INPUT_401)
! 3048: #define POWERPC_BFDM_401 (bfd_mach_ppc_403)
! 3049: #define POWERPC_FLAG_401 (POWERPC_FLAG_CE | POWERPC_FLAG_DE | \
! 3050: POWERPC_FLAG_BUS_CLK)
! 3051: #define check_pow_401 check_pow_nocheck
! 3052:
! 3053: static void init_proc_401 (CPUPPCState *env)
! 3054: {
! 3055: gen_spr_40x(env);
! 3056: gen_spr_401_403(env);
! 3057: gen_spr_401(env);
! 3058: init_excp_4xx_real(env);
! 3059: env->dcache_line_size = 32;
! 3060: env->icache_line_size = 32;
! 3061: /* Allocate hardware IRQ controller */
! 3062: ppc40x_irq_init(env);
! 3063: }
! 3064:
! 3065: /* PowerPC 401x2 */
! 3066: #define POWERPC_INSNS_401x2 (PPC_INSNS_BASE | PPC_STRING | PPC_MFTB | \
! 3067: PPC_DCR | PPC_WRTEE | \
! 3068: PPC_CACHE | PPC_CACHE_ICBI | PPC_40x_ICBT | \
! 3069: PPC_CACHE_DCBZ | PPC_CACHE_DCBA | \
! 3070: PPC_MEM_SYNC | PPC_MEM_EIEIO | \
! 3071: PPC_40x_TLB | PPC_MEM_TLBIA | PPC_MEM_TLBSYNC | \
! 3072: PPC_4xx_COMMON | PPC_40x_EXCP)
! 3073: #define POWERPC_MSRM_401x2 (0x00000000001FD231ULL)
! 3074: #define POWERPC_MMU_401x2 (POWERPC_MMU_SOFT_4xx_Z)
! 3075: #define POWERPC_EXCP_401x2 (POWERPC_EXCP_40x)
! 3076: #define POWERPC_INPUT_401x2 (PPC_FLAGS_INPUT_401)
! 3077: #define POWERPC_BFDM_401x2 (bfd_mach_ppc_403)
! 3078: #define POWERPC_FLAG_401x2 (POWERPC_FLAG_CE | POWERPC_FLAG_DE | \
! 3079: POWERPC_FLAG_BUS_CLK)
! 3080: #define check_pow_401x2 check_pow_nocheck
! 3081:
! 3082: static void init_proc_401x2 (CPUPPCState *env)
! 3083: {
! 3084: gen_spr_40x(env);
! 3085: gen_spr_401_403(env);
! 3086: gen_spr_401x2(env);
! 3087: gen_spr_compress(env);
! 3088: /* Memory management */
! 3089: #if !defined(CONFIG_USER_ONLY)
! 3090: env->nb_tlb = 64;
! 3091: env->nb_ways = 1;
! 3092: env->id_tlbs = 0;
! 3093: #endif
! 3094: init_excp_4xx_softmmu(env);
! 3095: env->dcache_line_size = 32;
! 3096: env->icache_line_size = 32;
! 3097: /* Allocate hardware IRQ controller */
! 3098: ppc40x_irq_init(env);
! 3099: }
! 3100:
! 3101: /* PowerPC 401x3 */
! 3102: #define POWERPC_INSNS_401x3 (PPC_INSNS_BASE | PPC_STRING | PPC_MFTB | \
! 3103: PPC_DCR | PPC_WRTEE | \
! 3104: PPC_CACHE | PPC_CACHE_ICBI | PPC_40x_ICBT | \
! 3105: PPC_CACHE_DCBZ | PPC_CACHE_DCBA | \
! 3106: PPC_MEM_SYNC | PPC_MEM_EIEIO | \
! 3107: PPC_40x_TLB | PPC_MEM_TLBIA | PPC_MEM_TLBSYNC | \
! 3108: PPC_4xx_COMMON | PPC_40x_EXCP)
! 3109: #define POWERPC_MSRM_401x3 (0x00000000001FD631ULL)
! 3110: #define POWERPC_MMU_401x3 (POWERPC_MMU_SOFT_4xx_Z)
! 3111: #define POWERPC_EXCP_401x3 (POWERPC_EXCP_40x)
! 3112: #define POWERPC_INPUT_401x3 (PPC_FLAGS_INPUT_401)
! 3113: #define POWERPC_BFDM_401x3 (bfd_mach_ppc_403)
! 3114: #define POWERPC_FLAG_401x3 (POWERPC_FLAG_CE | POWERPC_FLAG_DE | \
! 3115: POWERPC_FLAG_BUS_CLK)
! 3116: #define check_pow_401x3 check_pow_nocheck
! 3117:
! 3118: __attribute__ (( unused ))
! 3119: static void init_proc_401x3 (CPUPPCState *env)
! 3120: {
! 3121: gen_spr_40x(env);
! 3122: gen_spr_401_403(env);
! 3123: gen_spr_401(env);
! 3124: gen_spr_401x2(env);
! 3125: gen_spr_compress(env);
! 3126: init_excp_4xx_softmmu(env);
! 3127: env->dcache_line_size = 32;
! 3128: env->icache_line_size = 32;
! 3129: /* Allocate hardware IRQ controller */
! 3130: ppc40x_irq_init(env);
! 3131: }
! 3132:
! 3133: /* IOP480 */
! 3134: #define POWERPC_INSNS_IOP480 (PPC_INSNS_BASE | PPC_STRING | \
! 3135: PPC_DCR | PPC_WRTEE | \
! 3136: PPC_CACHE | PPC_CACHE_ICBI | PPC_40x_ICBT | \
! 3137: PPC_CACHE_DCBZ | PPC_CACHE_DCBA | \
! 3138: PPC_MEM_SYNC | PPC_MEM_EIEIO | \
! 3139: PPC_40x_TLB | PPC_MEM_TLBIA | PPC_MEM_TLBSYNC | \
! 3140: PPC_4xx_COMMON | PPC_40x_EXCP)
! 3141: #define POWERPC_MSRM_IOP480 (0x00000000001FD231ULL)
! 3142: #define POWERPC_MMU_IOP480 (POWERPC_MMU_SOFT_4xx_Z)
! 3143: #define POWERPC_EXCP_IOP480 (POWERPC_EXCP_40x)
! 3144: #define POWERPC_INPUT_IOP480 (PPC_FLAGS_INPUT_401)
! 3145: #define POWERPC_BFDM_IOP480 (bfd_mach_ppc_403)
! 3146: #define POWERPC_FLAG_IOP480 (POWERPC_FLAG_CE | POWERPC_FLAG_DE | \
! 3147: POWERPC_FLAG_BUS_CLK)
! 3148: #define check_pow_IOP480 check_pow_nocheck
! 3149:
! 3150: static void init_proc_IOP480 (CPUPPCState *env)
! 3151: {
! 3152: gen_spr_40x(env);
! 3153: gen_spr_401_403(env);
! 3154: gen_spr_401x2(env);
! 3155: gen_spr_compress(env);
! 3156: /* Memory management */
! 3157: #if !defined(CONFIG_USER_ONLY)
! 3158: env->nb_tlb = 64;
! 3159: env->nb_ways = 1;
! 3160: env->id_tlbs = 0;
! 3161: #endif
! 3162: init_excp_4xx_softmmu(env);
! 3163: env->dcache_line_size = 32;
! 3164: env->icache_line_size = 32;
! 3165: /* Allocate hardware IRQ controller */
! 3166: ppc40x_irq_init(env);
! 3167: }
! 3168:
! 3169: /* PowerPC 403 */
! 3170: #define POWERPC_INSNS_403 (PPC_INSNS_BASE | PPC_STRING | \
! 3171: PPC_DCR | PPC_WRTEE | \
! 3172: PPC_CACHE | PPC_CACHE_ICBI | PPC_40x_ICBT | \
! 3173: PPC_CACHE_DCBZ | \
! 3174: PPC_MEM_SYNC | PPC_MEM_EIEIO | \
! 3175: PPC_4xx_COMMON | PPC_40x_EXCP)
! 3176: #define POWERPC_MSRM_403 (0x000000000007D00DULL)
! 3177: #define POWERPC_MMU_403 (POWERPC_MMU_REAL)
! 3178: #define POWERPC_EXCP_403 (POWERPC_EXCP_40x)
! 3179: #define POWERPC_INPUT_403 (PPC_FLAGS_INPUT_401)
! 3180: #define POWERPC_BFDM_403 (bfd_mach_ppc_403)
! 3181: #define POWERPC_FLAG_403 (POWERPC_FLAG_CE | POWERPC_FLAG_PX | \
! 3182: POWERPC_FLAG_BUS_CLK)
! 3183: #define check_pow_403 check_pow_nocheck
! 3184:
! 3185: static void init_proc_403 (CPUPPCState *env)
! 3186: {
! 3187: gen_spr_40x(env);
! 3188: gen_spr_401_403(env);
! 3189: gen_spr_403(env);
! 3190: gen_spr_403_real(env);
! 3191: init_excp_4xx_real(env);
! 3192: env->dcache_line_size = 32;
! 3193: env->icache_line_size = 32;
! 3194: /* Allocate hardware IRQ controller */
! 3195: ppc40x_irq_init(env);
! 3196: }
! 3197:
! 3198: /* PowerPC 403 GCX */
! 3199: #define POWERPC_INSNS_403GCX (PPC_INSNS_BASE | PPC_STRING | \
! 3200: PPC_DCR | PPC_WRTEE | \
! 3201: PPC_CACHE | PPC_CACHE_ICBI | PPC_40x_ICBT | \
! 3202: PPC_CACHE_DCBZ | \
! 3203: PPC_MEM_SYNC | PPC_MEM_EIEIO | \
! 3204: PPC_40x_TLB | PPC_MEM_TLBIA | PPC_MEM_TLBSYNC | \
! 3205: PPC_4xx_COMMON | PPC_40x_EXCP)
! 3206: #define POWERPC_MSRM_403GCX (0x000000000007D00DULL)
! 3207: #define POWERPC_MMU_403GCX (POWERPC_MMU_SOFT_4xx_Z)
! 3208: #define POWERPC_EXCP_403GCX (POWERPC_EXCP_40x)
! 3209: #define POWERPC_INPUT_403GCX (PPC_FLAGS_INPUT_401)
! 3210: #define POWERPC_BFDM_403GCX (bfd_mach_ppc_403)
! 3211: #define POWERPC_FLAG_403GCX (POWERPC_FLAG_CE | POWERPC_FLAG_PX | \
! 3212: POWERPC_FLAG_BUS_CLK)
! 3213: #define check_pow_403GCX check_pow_nocheck
! 3214:
! 3215: static void init_proc_403GCX (CPUPPCState *env)
! 3216: {
! 3217: gen_spr_40x(env);
! 3218: gen_spr_401_403(env);
! 3219: gen_spr_403(env);
! 3220: gen_spr_403_real(env);
! 3221: gen_spr_403_mmu(env);
! 3222: /* Bus access control */
! 3223: /* not emulated, as Qemu never does speculative access */
! 3224: spr_register(env, SPR_40x_SGR, "SGR",
! 3225: SPR_NOACCESS, SPR_NOACCESS,
! 3226: &spr_read_generic, &spr_write_generic,
! 3227: 0xFFFFFFFF);
! 3228: /* not emulated, as Qemu do not emulate caches */
! 3229: spr_register(env, SPR_40x_DCWR, "DCWR",
! 3230: SPR_NOACCESS, SPR_NOACCESS,
! 3231: &spr_read_generic, &spr_write_generic,
! 3232: 0x00000000);
! 3233: /* Memory management */
! 3234: #if !defined(CONFIG_USER_ONLY)
! 3235: env->nb_tlb = 64;
! 3236: env->nb_ways = 1;
! 3237: env->id_tlbs = 0;
! 3238: #endif
! 3239: init_excp_4xx_softmmu(env);
! 3240: env->dcache_line_size = 32;
! 3241: env->icache_line_size = 32;
! 3242: /* Allocate hardware IRQ controller */
! 3243: ppc40x_irq_init(env);
! 3244: }
! 3245:
! 3246: /* PowerPC 405 */
! 3247: #define POWERPC_INSNS_405 (PPC_INSNS_BASE | PPC_STRING | PPC_MFTB | \
! 3248: PPC_DCR | PPC_WRTEE | \
! 3249: PPC_CACHE | PPC_CACHE_ICBI | PPC_40x_ICBT | \
! 3250: PPC_CACHE_DCBZ | PPC_CACHE_DCBA | \
! 3251: PPC_MEM_SYNC | PPC_MEM_EIEIO | \
! 3252: PPC_40x_TLB | PPC_MEM_TLBIA | PPC_MEM_TLBSYNC | \
! 3253: PPC_4xx_COMMON | PPC_405_MAC | PPC_40x_EXCP)
! 3254: #define POWERPC_MSRM_405 (0x000000000006E630ULL)
! 3255: #define POWERPC_MMU_405 (POWERPC_MMU_SOFT_4xx)
! 3256: #define POWERPC_EXCP_405 (POWERPC_EXCP_40x)
! 3257: #define POWERPC_INPUT_405 (PPC_FLAGS_INPUT_405)
! 3258: #define POWERPC_BFDM_405 (bfd_mach_ppc_403)
! 3259: #define POWERPC_FLAG_405 (POWERPC_FLAG_CE | POWERPC_FLAG_DWE | \
! 3260: POWERPC_FLAG_DE | POWERPC_FLAG_BUS_CLK)
! 3261: #define check_pow_405 check_pow_nocheck
! 3262:
! 3263: static void init_proc_405 (CPUPPCState *env)
! 3264: {
! 3265: /* Time base */
! 3266: gen_tbl(env);
! 3267: gen_spr_40x(env);
! 3268: gen_spr_405(env);
! 3269: /* Bus access control */
! 3270: /* not emulated, as Qemu never does speculative access */
! 3271: spr_register(env, SPR_40x_SGR, "SGR",
! 3272: SPR_NOACCESS, SPR_NOACCESS,
! 3273: &spr_read_generic, &spr_write_generic,
! 3274: 0xFFFFFFFF);
! 3275: /* not emulated, as Qemu do not emulate caches */
! 3276: spr_register(env, SPR_40x_DCWR, "DCWR",
! 3277: SPR_NOACCESS, SPR_NOACCESS,
! 3278: &spr_read_generic, &spr_write_generic,
! 3279: 0x00000000);
! 3280: /* Memory management */
! 3281: #if !defined(CONFIG_USER_ONLY)
! 3282: env->nb_tlb = 64;
! 3283: env->nb_ways = 1;
! 3284: env->id_tlbs = 0;
! 3285: #endif
! 3286: init_excp_4xx_softmmu(env);
! 3287: env->dcache_line_size = 32;
! 3288: env->icache_line_size = 32;
! 3289: /* Allocate hardware IRQ controller */
! 3290: ppc40x_irq_init(env);
! 3291: }
! 3292:
! 3293: /* PowerPC 440 EP */
! 3294: #define POWERPC_INSNS_440EP (PPC_INSNS_BASE | PPC_STRING | \
! 3295: PPC_DCR | PPC_WRTEE | PPC_RFMCI | \
! 3296: PPC_CACHE | PPC_CACHE_ICBI | \
! 3297: PPC_CACHE_DCBZ | PPC_CACHE_DCBA | \
! 3298: PPC_MEM_TLBSYNC | \
! 3299: PPC_BOOKE | PPC_4xx_COMMON | PPC_405_MAC | \
! 3300: PPC_440_SPEC)
! 3301: #define POWERPC_MSRM_440EP (0x000000000006D630ULL)
! 3302: #define POWERPC_MMU_440EP (POWERPC_MMU_BOOKE)
! 3303: #define POWERPC_EXCP_440EP (POWERPC_EXCP_BOOKE)
! 3304: #define POWERPC_INPUT_440EP (PPC_FLAGS_INPUT_BookE)
! 3305: #define POWERPC_BFDM_440EP (bfd_mach_ppc_403)
! 3306: #define POWERPC_FLAG_440EP (POWERPC_FLAG_CE | POWERPC_FLAG_DWE | \
! 3307: POWERPC_FLAG_DE | POWERPC_FLAG_BUS_CLK)
! 3308: #define check_pow_440EP check_pow_nocheck
! 3309:
! 3310: __attribute__ (( unused ))
! 3311: static void init_proc_440EP (CPUPPCState *env)
! 3312: {
! 3313: /* Time base */
! 3314: gen_tbl(env);
! 3315: gen_spr_BookE(env, 0x000000000000FFFFULL);
! 3316: gen_spr_440(env);
! 3317: gen_spr_usprgh(env);
! 3318: /* Processor identification */
! 3319: spr_register(env, SPR_BOOKE_PIR, "PIR",
! 3320: SPR_NOACCESS, SPR_NOACCESS,
! 3321: &spr_read_generic, &spr_write_pir,
! 3322: 0x00000000);
! 3323: /* XXX : not implemented */
! 3324: spr_register(env, SPR_BOOKE_IAC3, "IAC3",
! 3325: SPR_NOACCESS, SPR_NOACCESS,
! 3326: &spr_read_generic, &spr_write_generic,
! 3327: 0x00000000);
! 3328: /* XXX : not implemented */
! 3329: spr_register(env, SPR_BOOKE_IAC4, "IAC4",
! 3330: SPR_NOACCESS, SPR_NOACCESS,
! 3331: &spr_read_generic, &spr_write_generic,
! 3332: 0x00000000);
! 3333: /* XXX : not implemented */
! 3334: spr_register(env, SPR_BOOKE_DVC1, "DVC1",
! 3335: SPR_NOACCESS, SPR_NOACCESS,
! 3336: &spr_read_generic, &spr_write_generic,
! 3337: 0x00000000);
! 3338: /* XXX : not implemented */
! 3339: spr_register(env, SPR_BOOKE_DVC2, "DVC2",
! 3340: SPR_NOACCESS, SPR_NOACCESS,
! 3341: &spr_read_generic, &spr_write_generic,
! 3342: 0x00000000);
! 3343: /* XXX : not implemented */
! 3344: spr_register(env, SPR_BOOKE_MCSR, "MCSR",
! 3345: SPR_NOACCESS, SPR_NOACCESS,
! 3346: &spr_read_generic, &spr_write_generic,
! 3347: 0x00000000);
! 3348: spr_register(env, SPR_BOOKE_MCSRR0, "MCSRR0",
! 3349: SPR_NOACCESS, SPR_NOACCESS,
! 3350: &spr_read_generic, &spr_write_generic,
! 3351: 0x00000000);
! 3352: spr_register(env, SPR_BOOKE_MCSRR1, "MCSRR1",
! 3353: SPR_NOACCESS, SPR_NOACCESS,
! 3354: &spr_read_generic, &spr_write_generic,
! 3355: 0x00000000);
! 3356: /* XXX : not implemented */
! 3357: spr_register(env, SPR_440_CCR1, "CCR1",
! 3358: SPR_NOACCESS, SPR_NOACCESS,
! 3359: &spr_read_generic, &spr_write_generic,
! 3360: 0x00000000);
! 3361: /* Memory management */
! 3362: #if !defined(CONFIG_USER_ONLY)
! 3363: env->nb_tlb = 64;
! 3364: env->nb_ways = 1;
! 3365: env->id_tlbs = 0;
! 3366: #endif
! 3367: init_excp_BookE(env);
! 3368: env->dcache_line_size = 32;
! 3369: env->icache_line_size = 32;
! 3370: /* XXX: TODO: allocate internal IRQ controller */
! 3371: }
! 3372:
! 3373: /* PowerPC 440 GP */
! 3374: #define POWERPC_INSNS_440GP (PPC_INSNS_BASE | PPC_STRING | \
! 3375: PPC_DCR | PPC_DCRX | PPC_WRTEE | PPC_MFAPIDI | \
! 3376: PPC_CACHE | PPC_CACHE_ICBI | \
! 3377: PPC_CACHE_DCBZ | PPC_CACHE_DCBA | \
! 3378: PPC_MEM_TLBSYNC | PPC_TLBIVA | \
! 3379: PPC_BOOKE | PPC_4xx_COMMON | PPC_405_MAC | \
! 3380: PPC_440_SPEC)
! 3381: #define POWERPC_MSRM_440GP (0x000000000006FF30ULL)
! 3382: #define POWERPC_MMU_440GP (POWERPC_MMU_BOOKE)
! 3383: #define POWERPC_EXCP_440GP (POWERPC_EXCP_BOOKE)
! 3384: #define POWERPC_INPUT_440GP (PPC_FLAGS_INPUT_BookE)
! 3385: #define POWERPC_BFDM_440GP (bfd_mach_ppc_403)
! 3386: #define POWERPC_FLAG_440GP (POWERPC_FLAG_CE | POWERPC_FLAG_DWE | \
! 3387: POWERPC_FLAG_DE | POWERPC_FLAG_BUS_CLK)
! 3388: #define check_pow_440GP check_pow_nocheck
! 3389:
! 3390: __attribute__ (( unused ))
! 3391: static void init_proc_440GP (CPUPPCState *env)
! 3392: {
! 3393: /* Time base */
! 3394: gen_tbl(env);
! 3395: gen_spr_BookE(env, 0x000000000000FFFFULL);
! 3396: gen_spr_440(env);
! 3397: gen_spr_usprgh(env);
! 3398: /* Processor identification */
! 3399: spr_register(env, SPR_BOOKE_PIR, "PIR",
! 3400: SPR_NOACCESS, SPR_NOACCESS,
! 3401: &spr_read_generic, &spr_write_pir,
! 3402: 0x00000000);
! 3403: /* XXX : not implemented */
! 3404: spr_register(env, SPR_BOOKE_IAC3, "IAC3",
! 3405: SPR_NOACCESS, SPR_NOACCESS,
! 3406: &spr_read_generic, &spr_write_generic,
! 3407: 0x00000000);
! 3408: /* XXX : not implemented */
! 3409: spr_register(env, SPR_BOOKE_IAC4, "IAC4",
! 3410: SPR_NOACCESS, SPR_NOACCESS,
! 3411: &spr_read_generic, &spr_write_generic,
! 3412: 0x00000000);
! 3413: /* XXX : not implemented */
! 3414: spr_register(env, SPR_BOOKE_DVC1, "DVC1",
! 3415: SPR_NOACCESS, SPR_NOACCESS,
! 3416: &spr_read_generic, &spr_write_generic,
! 3417: 0x00000000);
! 3418: /* XXX : not implemented */
! 3419: spr_register(env, SPR_BOOKE_DVC2, "DVC2",
! 3420: SPR_NOACCESS, SPR_NOACCESS,
! 3421: &spr_read_generic, &spr_write_generic,
! 3422: 0x00000000);
! 3423: /* Memory management */
! 3424: #if !defined(CONFIG_USER_ONLY)
! 3425: env->nb_tlb = 64;
! 3426: env->nb_ways = 1;
! 3427: env->id_tlbs = 0;
! 3428: #endif
! 3429: init_excp_BookE(env);
! 3430: env->dcache_line_size = 32;
! 3431: env->icache_line_size = 32;
! 3432: /* XXX: TODO: allocate internal IRQ controller */
! 3433: }
! 3434:
! 3435: /* PowerPC 440x4 */
! 3436: #define POWERPC_INSNS_440x4 (PPC_INSNS_BASE | PPC_STRING | \
! 3437: PPC_DCR | PPC_WRTEE | \
! 3438: PPC_CACHE | PPC_CACHE_ICBI | \
! 3439: PPC_CACHE_DCBZ | PPC_CACHE_DCBA | \
! 3440: PPC_MEM_TLBSYNC | \
! 3441: PPC_BOOKE | PPC_4xx_COMMON | PPC_405_MAC | \
! 3442: PPC_440_SPEC)
! 3443: #define POWERPC_MSRM_440x4 (0x000000000006FF30ULL)
! 3444: #define POWERPC_MMU_440x4 (POWERPC_MMU_BOOKE)
! 3445: #define POWERPC_EXCP_440x4 (POWERPC_EXCP_BOOKE)
! 3446: #define POWERPC_INPUT_440x4 (PPC_FLAGS_INPUT_BookE)
! 3447: #define POWERPC_BFDM_440x4 (bfd_mach_ppc_403)
! 3448: #define POWERPC_FLAG_440x4 (POWERPC_FLAG_CE | POWERPC_FLAG_DWE | \
! 3449: POWERPC_FLAG_DE | POWERPC_FLAG_BUS_CLK)
! 3450: #define check_pow_440x4 check_pow_nocheck
! 3451:
! 3452: __attribute__ (( unused ))
! 3453: static void init_proc_440x4 (CPUPPCState *env)
! 3454: {
! 3455: /* Time base */
! 3456: gen_tbl(env);
! 3457: gen_spr_BookE(env, 0x000000000000FFFFULL);
! 3458: gen_spr_440(env);
! 3459: gen_spr_usprgh(env);
! 3460: /* Processor identification */
! 3461: spr_register(env, SPR_BOOKE_PIR, "PIR",
! 3462: SPR_NOACCESS, SPR_NOACCESS,
! 3463: &spr_read_generic, &spr_write_pir,
! 3464: 0x00000000);
! 3465: /* XXX : not implemented */
! 3466: spr_register(env, SPR_BOOKE_IAC3, "IAC3",
! 3467: SPR_NOACCESS, SPR_NOACCESS,
! 3468: &spr_read_generic, &spr_write_generic,
! 3469: 0x00000000);
! 3470: /* XXX : not implemented */
! 3471: spr_register(env, SPR_BOOKE_IAC4, "IAC4",
! 3472: SPR_NOACCESS, SPR_NOACCESS,
! 3473: &spr_read_generic, &spr_write_generic,
! 3474: 0x00000000);
! 3475: /* XXX : not implemented */
! 3476: spr_register(env, SPR_BOOKE_DVC1, "DVC1",
! 3477: SPR_NOACCESS, SPR_NOACCESS,
! 3478: &spr_read_generic, &spr_write_generic,
! 3479: 0x00000000);
! 3480: /* XXX : not implemented */
! 3481: spr_register(env, SPR_BOOKE_DVC2, "DVC2",
! 3482: SPR_NOACCESS, SPR_NOACCESS,
! 3483: &spr_read_generic, &spr_write_generic,
! 3484: 0x00000000);
! 3485: /* Memory management */
! 3486: #if !defined(CONFIG_USER_ONLY)
! 3487: env->nb_tlb = 64;
! 3488: env->nb_ways = 1;
! 3489: env->id_tlbs = 0;
! 3490: #endif
! 3491: init_excp_BookE(env);
! 3492: env->dcache_line_size = 32;
! 3493: env->icache_line_size = 32;
! 3494: /* XXX: TODO: allocate internal IRQ controller */
! 3495: }
! 3496:
! 3497: /* PowerPC 440x5 */
! 3498: #define POWERPC_INSNS_440x5 (PPC_INSNS_BASE | PPC_STRING | \
! 3499: PPC_DCR | PPC_WRTEE | PPC_RFMCI | \
! 3500: PPC_CACHE | PPC_CACHE_ICBI | \
! 3501: PPC_CACHE_DCBZ | PPC_CACHE_DCBA | \
! 3502: PPC_MEM_TLBSYNC | \
! 3503: PPC_BOOKE | PPC_4xx_COMMON | PPC_405_MAC | \
! 3504: PPC_440_SPEC)
! 3505: #define POWERPC_MSRM_440x5 (0x000000000006FF30ULL)
! 3506: #define POWERPC_MMU_440x5 (POWERPC_MMU_BOOKE)
! 3507: #define POWERPC_EXCP_440x5 (POWERPC_EXCP_BOOKE)
! 3508: #define POWERPC_INPUT_440x5 (PPC_FLAGS_INPUT_BookE)
! 3509: #define POWERPC_BFDM_440x5 (bfd_mach_ppc_403)
! 3510: #define POWERPC_FLAG_440x5 (POWERPC_FLAG_CE | POWERPC_FLAG_DWE | \
! 3511: POWERPC_FLAG_DE | POWERPC_FLAG_BUS_CLK)
! 3512: #define check_pow_440x5 check_pow_nocheck
! 3513:
! 3514: __attribute__ (( unused ))
! 3515: static void init_proc_440x5 (CPUPPCState *env)
! 3516: {
! 3517: /* Time base */
! 3518: gen_tbl(env);
! 3519: gen_spr_BookE(env, 0x000000000000FFFFULL);
! 3520: gen_spr_440(env);
! 3521: gen_spr_usprgh(env);
! 3522: /* Processor identification */
! 3523: spr_register(env, SPR_BOOKE_PIR, "PIR",
! 3524: SPR_NOACCESS, SPR_NOACCESS,
! 3525: &spr_read_generic, &spr_write_pir,
! 3526: 0x00000000);
! 3527: /* XXX : not implemented */
! 3528: spr_register(env, SPR_BOOKE_IAC3, "IAC3",
! 3529: SPR_NOACCESS, SPR_NOACCESS,
! 3530: &spr_read_generic, &spr_write_generic,
! 3531: 0x00000000);
! 3532: /* XXX : not implemented */
! 3533: spr_register(env, SPR_BOOKE_IAC4, "IAC4",
! 3534: SPR_NOACCESS, SPR_NOACCESS,
! 3535: &spr_read_generic, &spr_write_generic,
! 3536: 0x00000000);
! 3537: /* XXX : not implemented */
! 3538: spr_register(env, SPR_BOOKE_DVC1, "DVC1",
! 3539: SPR_NOACCESS, SPR_NOACCESS,
! 3540: &spr_read_generic, &spr_write_generic,
! 3541: 0x00000000);
! 3542: /* XXX : not implemented */
! 3543: spr_register(env, SPR_BOOKE_DVC2, "DVC2",
! 3544: SPR_NOACCESS, SPR_NOACCESS,
! 3545: &spr_read_generic, &spr_write_generic,
! 3546: 0x00000000);
! 3547: /* XXX : not implemented */
! 3548: spr_register(env, SPR_BOOKE_MCSR, "MCSR",
! 3549: SPR_NOACCESS, SPR_NOACCESS,
! 3550: &spr_read_generic, &spr_write_generic,
! 3551: 0x00000000);
! 3552: spr_register(env, SPR_BOOKE_MCSRR0, "MCSRR0",
! 3553: SPR_NOACCESS, SPR_NOACCESS,
! 3554: &spr_read_generic, &spr_write_generic,
! 3555: 0x00000000);
! 3556: spr_register(env, SPR_BOOKE_MCSRR1, "MCSRR1",
! 3557: SPR_NOACCESS, SPR_NOACCESS,
! 3558: &spr_read_generic, &spr_write_generic,
! 3559: 0x00000000);
! 3560: /* XXX : not implemented */
! 3561: spr_register(env, SPR_440_CCR1, "CCR1",
! 3562: SPR_NOACCESS, SPR_NOACCESS,
! 3563: &spr_read_generic, &spr_write_generic,
! 3564: 0x00000000);
! 3565: /* Memory management */
! 3566: #if !defined(CONFIG_USER_ONLY)
! 3567: env->nb_tlb = 64;
! 3568: env->nb_ways = 1;
! 3569: env->id_tlbs = 0;
! 3570: #endif
! 3571: init_excp_BookE(env);
! 3572: env->dcache_line_size = 32;
! 3573: env->icache_line_size = 32;
! 3574: /* XXX: TODO: allocate internal IRQ controller */
! 3575: }
! 3576:
! 3577: /* PowerPC 460 (guessed) */
! 3578: #define POWERPC_INSNS_460 (PPC_INSNS_BASE | PPC_STRING | \
! 3579: PPC_DCR | PPC_DCRX | PPC_DCRUX | \
! 3580: PPC_WRTEE | PPC_MFAPIDI | \
! 3581: PPC_CACHE | PPC_CACHE_ICBI | \
! 3582: PPC_CACHE_DCBZ | PPC_CACHE_DCBA | \
! 3583: PPC_MEM_TLBSYNC | PPC_TLBIVA | \
! 3584: PPC_BOOKE | PPC_4xx_COMMON | PPC_405_MAC | \
! 3585: PPC_440_SPEC)
! 3586: #define POWERPC_MSRM_460 (0x000000000006FF30ULL)
! 3587: #define POWERPC_MMU_460 (POWERPC_MMU_BOOKE)
! 3588: #define POWERPC_EXCP_460 (POWERPC_EXCP_BOOKE)
! 3589: #define POWERPC_INPUT_460 (PPC_FLAGS_INPUT_BookE)
! 3590: #define POWERPC_BFDM_460 (bfd_mach_ppc_403)
! 3591: #define POWERPC_FLAG_460 (POWERPC_FLAG_CE | POWERPC_FLAG_DWE | \
! 3592: POWERPC_FLAG_DE | POWERPC_FLAG_BUS_CLK)
! 3593: #define check_pow_460 check_pow_nocheck
! 3594:
! 3595: __attribute__ (( unused ))
! 3596: static void init_proc_460 (CPUPPCState *env)
! 3597: {
! 3598: /* Time base */
! 3599: gen_tbl(env);
! 3600: gen_spr_BookE(env, 0x000000000000FFFFULL);
! 3601: gen_spr_440(env);
! 3602: gen_spr_usprgh(env);
! 3603: /* Processor identification */
! 3604: spr_register(env, SPR_BOOKE_PIR, "PIR",
! 3605: SPR_NOACCESS, SPR_NOACCESS,
! 3606: &spr_read_generic, &spr_write_pir,
! 3607: 0x00000000);
! 3608: /* XXX : not implemented */
! 3609: spr_register(env, SPR_BOOKE_IAC3, "IAC3",
! 3610: SPR_NOACCESS, SPR_NOACCESS,
! 3611: &spr_read_generic, &spr_write_generic,
! 3612: 0x00000000);
! 3613: /* XXX : not implemented */
! 3614: spr_register(env, SPR_BOOKE_IAC4, "IAC4",
! 3615: SPR_NOACCESS, SPR_NOACCESS,
! 3616: &spr_read_generic, &spr_write_generic,
! 3617: 0x00000000);
! 3618: /* XXX : not implemented */
! 3619: spr_register(env, SPR_BOOKE_DVC1, "DVC1",
! 3620: SPR_NOACCESS, SPR_NOACCESS,
! 3621: &spr_read_generic, &spr_write_generic,
! 3622: 0x00000000);
! 3623: /* XXX : not implemented */
! 3624: spr_register(env, SPR_BOOKE_DVC2, "DVC2",
! 3625: SPR_NOACCESS, SPR_NOACCESS,
! 3626: &spr_read_generic, &spr_write_generic,
! 3627: 0x00000000);
! 3628: /* XXX : not implemented */
! 3629: spr_register(env, SPR_BOOKE_MCSR, "MCSR",
! 3630: SPR_NOACCESS, SPR_NOACCESS,
! 3631: &spr_read_generic, &spr_write_generic,
! 3632: 0x00000000);
! 3633: spr_register(env, SPR_BOOKE_MCSRR0, "MCSRR0",
! 3634: SPR_NOACCESS, SPR_NOACCESS,
! 3635: &spr_read_generic, &spr_write_generic,
! 3636: 0x00000000);
! 3637: spr_register(env, SPR_BOOKE_MCSRR1, "MCSRR1",
! 3638: SPR_NOACCESS, SPR_NOACCESS,
! 3639: &spr_read_generic, &spr_write_generic,
! 3640: 0x00000000);
! 3641: /* XXX : not implemented */
! 3642: spr_register(env, SPR_440_CCR1, "CCR1",
! 3643: SPR_NOACCESS, SPR_NOACCESS,
! 3644: &spr_read_generic, &spr_write_generic,
! 3645: 0x00000000);
! 3646: /* XXX : not implemented */
! 3647: spr_register(env, SPR_DCRIPR, "SPR_DCRIPR",
! 3648: &spr_read_generic, &spr_write_generic,
! 3649: &spr_read_generic, &spr_write_generic,
! 3650: 0x00000000);
! 3651: /* Memory management */
! 3652: #if !defined(CONFIG_USER_ONLY)
! 3653: env->nb_tlb = 64;
! 3654: env->nb_ways = 1;
! 3655: env->id_tlbs = 0;
! 3656: #endif
! 3657: init_excp_BookE(env);
! 3658: env->dcache_line_size = 32;
! 3659: env->icache_line_size = 32;
! 3660: /* XXX: TODO: allocate internal IRQ controller */
! 3661: }
! 3662:
! 3663: /* PowerPC 460F (guessed) */
! 3664: #define POWERPC_INSNS_460F (PPC_INSNS_BASE | PPC_STRING | \
! 3665: PPC_FLOAT | PPC_FLOAT_FRES | PPC_FLOAT_FSEL | \
! 3666: PPC_FLOAT_FSQRT | PPC_FLOAT_FRSQRTE | \
! 3667: PPC_FLOAT_STFIWX | \
! 3668: PPC_DCR | PPC_DCRX | PPC_DCRUX | \
! 3669: PPC_WRTEE | PPC_MFAPIDI | \
! 3670: PPC_CACHE | PPC_CACHE_ICBI | \
! 3671: PPC_CACHE_DCBZ | PPC_CACHE_DCBA | \
! 3672: PPC_MEM_TLBSYNC | PPC_TLBIVA | \
! 3673: PPC_BOOKE | PPC_4xx_COMMON | PPC_405_MAC | \
! 3674: PPC_440_SPEC)
! 3675: #define POWERPC_MSRM_460 (0x000000000006FF30ULL)
! 3676: #define POWERPC_MMU_460F (POWERPC_MMU_BOOKE)
! 3677: #define POWERPC_EXCP_460F (POWERPC_EXCP_BOOKE)
! 3678: #define POWERPC_INPUT_460F (PPC_FLAGS_INPUT_BookE)
! 3679: #define POWERPC_BFDM_460F (bfd_mach_ppc_403)
! 3680: #define POWERPC_FLAG_460F (POWERPC_FLAG_CE | POWERPC_FLAG_DWE | \
! 3681: POWERPC_FLAG_DE | POWERPC_FLAG_BUS_CLK)
! 3682: #define check_pow_460F check_pow_nocheck
! 3683:
! 3684: __attribute__ (( unused ))
! 3685: static void init_proc_460F (CPUPPCState *env)
! 3686: {
! 3687: /* Time base */
! 3688: gen_tbl(env);
! 3689: gen_spr_BookE(env, 0x000000000000FFFFULL);
! 3690: gen_spr_440(env);
! 3691: gen_spr_usprgh(env);
! 3692: /* Processor identification */
! 3693: spr_register(env, SPR_BOOKE_PIR, "PIR",
! 3694: SPR_NOACCESS, SPR_NOACCESS,
! 3695: &spr_read_generic, &spr_write_pir,
! 3696: 0x00000000);
! 3697: /* XXX : not implemented */
! 3698: spr_register(env, SPR_BOOKE_IAC3, "IAC3",
! 3699: SPR_NOACCESS, SPR_NOACCESS,
! 3700: &spr_read_generic, &spr_write_generic,
! 3701: 0x00000000);
! 3702: /* XXX : not implemented */
! 3703: spr_register(env, SPR_BOOKE_IAC4, "IAC4",
! 3704: SPR_NOACCESS, SPR_NOACCESS,
! 3705: &spr_read_generic, &spr_write_generic,
! 3706: 0x00000000);
! 3707: /* XXX : not implemented */
! 3708: spr_register(env, SPR_BOOKE_DVC1, "DVC1",
! 3709: SPR_NOACCESS, SPR_NOACCESS,
! 3710: &spr_read_generic, &spr_write_generic,
! 3711: 0x00000000);
! 3712: /* XXX : not implemented */
! 3713: spr_register(env, SPR_BOOKE_DVC2, "DVC2",
! 3714: SPR_NOACCESS, SPR_NOACCESS,
! 3715: &spr_read_generic, &spr_write_generic,
! 3716: 0x00000000);
! 3717: /* XXX : not implemented */
! 3718: spr_register(env, SPR_BOOKE_MCSR, "MCSR",
! 3719: SPR_NOACCESS, SPR_NOACCESS,
! 3720: &spr_read_generic, &spr_write_generic,
! 3721: 0x00000000);
! 3722: spr_register(env, SPR_BOOKE_MCSRR0, "MCSRR0",
! 3723: SPR_NOACCESS, SPR_NOACCESS,
! 3724: &spr_read_generic, &spr_write_generic,
! 3725: 0x00000000);
! 3726: spr_register(env, SPR_BOOKE_MCSRR1, "MCSRR1",
! 3727: SPR_NOACCESS, SPR_NOACCESS,
! 3728: &spr_read_generic, &spr_write_generic,
! 3729: 0x00000000);
! 3730: /* XXX : not implemented */
! 3731: spr_register(env, SPR_440_CCR1, "CCR1",
! 3732: SPR_NOACCESS, SPR_NOACCESS,
! 3733: &spr_read_generic, &spr_write_generic,
! 3734: 0x00000000);
! 3735: /* XXX : not implemented */
! 3736: spr_register(env, SPR_DCRIPR, "SPR_DCRIPR",
! 3737: &spr_read_generic, &spr_write_generic,
! 3738: &spr_read_generic, &spr_write_generic,
! 3739: 0x00000000);
! 3740: /* Memory management */
! 3741: #if !defined(CONFIG_USER_ONLY)
! 3742: env->nb_tlb = 64;
! 3743: env->nb_ways = 1;
! 3744: env->id_tlbs = 0;
! 3745: #endif
! 3746: init_excp_BookE(env);
! 3747: env->dcache_line_size = 32;
! 3748: env->icache_line_size = 32;
! 3749: /* XXX: TODO: allocate internal IRQ controller */
! 3750: }
! 3751:
! 3752: /* Freescale 5xx cores (aka RCPU) */
! 3753: #define POWERPC_INSNS_MPC5xx (PPC_INSNS_BASE | PPC_STRING | \
! 3754: PPC_MEM_EIEIO | PPC_MEM_SYNC | \
! 3755: PPC_CACHE_ICBI | PPC_FLOAT | PPC_FLOAT_STFIWX | \
! 3756: PPC_MFTB)
! 3757: #define POWERPC_MSRM_MPC5xx (0x000000000001FF43ULL)
! 3758: #define POWERPC_MMU_MPC5xx (POWERPC_MMU_REAL)
! 3759: #define POWERPC_EXCP_MPC5xx (POWERPC_EXCP_603)
! 3760: #define POWERPC_INPUT_MPC5xx (PPC_FLAGS_INPUT_RCPU)
! 3761: #define POWERPC_BFDM_MPC5xx (bfd_mach_ppc_505)
! 3762: #define POWERPC_FLAG_MPC5xx (POWERPC_FLAG_SE | POWERPC_FLAG_BE | \
! 3763: POWERPC_FLAG_BUS_CLK)
! 3764: #define check_pow_MPC5xx check_pow_none
! 3765:
! 3766: __attribute__ (( unused ))
! 3767: static void init_proc_MPC5xx (CPUPPCState *env)
! 3768: {
! 3769: /* Time base */
! 3770: gen_tbl(env);
! 3771: gen_spr_5xx_8xx(env);
! 3772: gen_spr_5xx(env);
! 3773: init_excp_MPC5xx(env);
! 3774: env->dcache_line_size = 32;
! 3775: env->icache_line_size = 32;
! 3776: /* XXX: TODO: allocate internal IRQ controller */
! 3777: }
! 3778:
! 3779: /* Freescale 8xx cores (aka PowerQUICC) */
! 3780: #define POWERPC_INSNS_MPC8xx (PPC_INSNS_BASE | PPC_STRING | \
! 3781: PPC_MEM_EIEIO | PPC_MEM_SYNC | \
! 3782: PPC_CACHE_ICBI | PPC_MFTB)
! 3783: #define POWERPC_MSRM_MPC8xx (0x000000000001F673ULL)
! 3784: #define POWERPC_MMU_MPC8xx (POWERPC_MMU_MPC8xx)
! 3785: #define POWERPC_EXCP_MPC8xx (POWERPC_EXCP_603)
! 3786: #define POWERPC_INPUT_MPC8xx (PPC_FLAGS_INPUT_RCPU)
! 3787: #define POWERPC_BFDM_MPC8xx (bfd_mach_ppc_860)
! 3788: #define POWERPC_FLAG_MPC8xx (POWERPC_FLAG_SE | POWERPC_FLAG_BE | \
! 3789: POWERPC_FLAG_BUS_CLK)
! 3790: #define check_pow_MPC8xx check_pow_none
! 3791:
! 3792: __attribute__ (( unused ))
! 3793: static void init_proc_MPC8xx (CPUPPCState *env)
! 3794: {
! 3795: /* Time base */
! 3796: gen_tbl(env);
! 3797: gen_spr_5xx_8xx(env);
! 3798: gen_spr_8xx(env);
! 3799: init_excp_MPC8xx(env);
! 3800: env->dcache_line_size = 32;
! 3801: env->icache_line_size = 32;
! 3802: /* XXX: TODO: allocate internal IRQ controller */
! 3803: }
! 3804:
! 3805: /* Freescale 82xx cores (aka PowerQUICC-II) */
! 3806: /* PowerPC G2 */
! 3807: #define POWERPC_INSNS_G2 (PPC_INSNS_BASE | PPC_STRING | PPC_MFTB | \
! 3808: PPC_FLOAT | PPC_FLOAT_FSEL | PPC_FLOAT_FRES | \
! 3809: PPC_FLOAT_STFIWX | \
! 3810: PPC_CACHE | PPC_CACHE_ICBI | PPC_CACHE_DCBZ | \
! 3811: PPC_MEM_SYNC | PPC_MEM_EIEIO | \
! 3812: PPC_MEM_TLBIE | PPC_MEM_TLBSYNC | PPC_6xx_TLB | \
! 3813: PPC_SEGMENT | PPC_EXTERN)
! 3814: #define POWERPC_MSRM_G2 (0x000000000006FFF2ULL)
! 3815: #define POWERPC_MMU_G2 (POWERPC_MMU_SOFT_6xx)
! 3816: //#define POWERPC_EXCP_G2 (POWERPC_EXCP_G2)
! 3817: #define POWERPC_INPUT_G2 (PPC_FLAGS_INPUT_6xx)
! 3818: #define POWERPC_BFDM_G2 (bfd_mach_ppc_ec603e)
! 3819: #define POWERPC_FLAG_G2 (POWERPC_FLAG_TGPR | POWERPC_FLAG_SE | \
! 3820: POWERPC_FLAG_BE | POWERPC_FLAG_BUS_CLK)
! 3821: #define check_pow_G2 check_pow_hid0
! 3822:
! 3823: static void init_proc_G2 (CPUPPCState *env)
! 3824: {
! 3825: gen_spr_ne_601(env);
! 3826: gen_spr_G2_755(env);
! 3827: gen_spr_G2(env);
! 3828: /* Time base */
! 3829: gen_tbl(env);
! 3830: /* External access control */
! 3831: /* XXX : not implemented */
! 3832: spr_register(env, SPR_EAR, "EAR",
! 3833: SPR_NOACCESS, SPR_NOACCESS,
! 3834: &spr_read_generic, &spr_write_generic,
! 3835: 0x00000000);
! 3836: /* Hardware implementation register */
! 3837: /* XXX : not implemented */
! 3838: spr_register(env, SPR_HID0, "HID0",
! 3839: SPR_NOACCESS, SPR_NOACCESS,
! 3840: &spr_read_generic, &spr_write_generic,
! 3841: 0x00000000);
! 3842: /* XXX : not implemented */
! 3843: spr_register(env, SPR_HID1, "HID1",
! 3844: SPR_NOACCESS, SPR_NOACCESS,
! 3845: &spr_read_generic, &spr_write_generic,
! 3846: 0x00000000);
! 3847: /* XXX : not implemented */
! 3848: spr_register(env, SPR_HID2, "HID2",
! 3849: SPR_NOACCESS, SPR_NOACCESS,
! 3850: &spr_read_generic, &spr_write_generic,
! 3851: 0x00000000);
! 3852: /* Memory management */
! 3853: gen_low_BATs(env);
! 3854: gen_high_BATs(env);
! 3855: gen_6xx_7xx_soft_tlb(env, 64, 2);
! 3856: init_excp_G2(env);
! 3857: env->dcache_line_size = 32;
! 3858: env->icache_line_size = 32;
! 3859: /* Allocate hardware IRQ controller */
! 3860: ppc6xx_irq_init(env);
! 3861: }
! 3862:
! 3863: /* PowerPC G2LE */
! 3864: #define POWERPC_INSNS_G2LE (PPC_INSNS_BASE | PPC_STRING | PPC_MFTB | \
! 3865: PPC_FLOAT | PPC_FLOAT_FSEL | PPC_FLOAT_FRES | \
! 3866: PPC_FLOAT_STFIWX | \
! 3867: PPC_CACHE | PPC_CACHE_ICBI | PPC_CACHE_DCBZ | \
! 3868: PPC_MEM_SYNC | PPC_MEM_EIEIO | \
! 3869: PPC_MEM_TLBIE | PPC_MEM_TLBSYNC | PPC_6xx_TLB | \
! 3870: PPC_SEGMENT | PPC_EXTERN)
! 3871: #define POWERPC_MSRM_G2LE (0x000000000007FFF3ULL)
! 3872: #define POWERPC_MMU_G2LE (POWERPC_MMU_SOFT_6xx)
! 3873: #define POWERPC_EXCP_G2LE (POWERPC_EXCP_G2)
! 3874: #define POWERPC_INPUT_G2LE (PPC_FLAGS_INPUT_6xx)
! 3875: #define POWERPC_BFDM_G2LE (bfd_mach_ppc_ec603e)
! 3876: #define POWERPC_FLAG_G2LE (POWERPC_FLAG_TGPR | POWERPC_FLAG_SE | \
! 3877: POWERPC_FLAG_BE | POWERPC_FLAG_BUS_CLK)
! 3878: #define check_pow_G2LE check_pow_hid0
! 3879:
! 3880: static void init_proc_G2LE (CPUPPCState *env)
! 3881: {
! 3882: gen_spr_ne_601(env);
! 3883: gen_spr_G2_755(env);
! 3884: gen_spr_G2(env);
! 3885: /* Time base */
! 3886: gen_tbl(env);
! 3887: /* External access control */
! 3888: /* XXX : not implemented */
! 3889: spr_register(env, SPR_EAR, "EAR",
! 3890: SPR_NOACCESS, SPR_NOACCESS,
! 3891: &spr_read_generic, &spr_write_generic,
! 3892: 0x00000000);
! 3893: /* Hardware implementation register */
! 3894: /* XXX : not implemented */
! 3895: spr_register(env, SPR_HID0, "HID0",
! 3896: SPR_NOACCESS, SPR_NOACCESS,
! 3897: &spr_read_generic, &spr_write_generic,
! 3898: 0x00000000);
! 3899: /* XXX : not implemented */
! 3900: spr_register(env, SPR_HID1, "HID1",
! 3901: SPR_NOACCESS, SPR_NOACCESS,
! 3902: &spr_read_generic, &spr_write_generic,
! 3903: 0x00000000);
! 3904: /* XXX : not implemented */
! 3905: spr_register(env, SPR_HID2, "HID2",
! 3906: SPR_NOACCESS, SPR_NOACCESS,
! 3907: &spr_read_generic, &spr_write_generic,
! 3908: 0x00000000);
! 3909: /* Memory management */
! 3910: gen_low_BATs(env);
! 3911: gen_high_BATs(env);
! 3912: gen_6xx_7xx_soft_tlb(env, 64, 2);
! 3913: init_excp_G2(env);
! 3914: env->dcache_line_size = 32;
! 3915: env->icache_line_size = 32;
! 3916: /* Allocate hardware IRQ controller */
! 3917: ppc6xx_irq_init(env);
! 3918: }
! 3919:
! 3920: /* e200 core */
! 3921: /* XXX: unimplemented instructions:
! 3922: * dcblc
! 3923: * dcbtlst
! 3924: * dcbtstls
! 3925: * icblc
! 3926: * icbtls
! 3927: * tlbivax
! 3928: * all SPE multiply-accumulate instructions
! 3929: */
! 3930: #define POWERPC_INSNS_e200 (PPC_INSNS_BASE | PPC_ISEL | \
! 3931: PPC_SPE | PPC_SPEFPU | \
! 3932: PPC_WRTEE | PPC_RFDI | \
! 3933: PPC_CACHE | PPC_CACHE_LOCK | PPC_CACHE_ICBI | \
! 3934: PPC_CACHE_DCBZ | PPC_CACHE_DCBA | \
! 3935: PPC_MEM_TLBSYNC | PPC_TLBIVAX | \
! 3936: PPC_BOOKE)
! 3937: #define POWERPC_MSRM_e200 (0x000000000606FF30ULL)
! 3938: #define POWERPC_MMU_e200 (POWERPC_MMU_BOOKE_FSL)
! 3939: #define POWERPC_EXCP_e200 (POWERPC_EXCP_BOOKE)
! 3940: #define POWERPC_INPUT_e200 (PPC_FLAGS_INPUT_BookE)
! 3941: #define POWERPC_BFDM_e200 (bfd_mach_ppc_860)
! 3942: #define POWERPC_FLAG_e200 (POWERPC_FLAG_SPE | POWERPC_FLAG_CE | \
! 3943: POWERPC_FLAG_UBLE | POWERPC_FLAG_DE | \
! 3944: POWERPC_FLAG_BUS_CLK)
! 3945: #define check_pow_e200 check_pow_hid0
! 3946:
! 3947: __attribute__ (( unused ))
! 3948: static void init_proc_e200 (CPUPPCState *env)
! 3949: {
! 3950: /* Time base */
! 3951: gen_tbl(env);
! 3952: gen_spr_BookE(env, 0x000000070000FFFFULL);
! 3953: /* XXX : not implemented */
! 3954: spr_register(env, SPR_BOOKE_SPEFSCR, "SPEFSCR",
! 3955: SPR_NOACCESS, SPR_NOACCESS,
! 3956: &spr_read_generic, &spr_write_generic,
! 3957: 0x00000000);
! 3958: /* Memory management */
! 3959: gen_spr_BookE_FSL(env, 0x0000005D);
! 3960: /* XXX : not implemented */
! 3961: spr_register(env, SPR_HID0, "HID0",
! 3962: SPR_NOACCESS, SPR_NOACCESS,
! 3963: &spr_read_generic, &spr_write_generic,
! 3964: 0x00000000);
! 3965: /* XXX : not implemented */
! 3966: spr_register(env, SPR_HID1, "HID1",
! 3967: SPR_NOACCESS, SPR_NOACCESS,
! 3968: &spr_read_generic, &spr_write_generic,
! 3969: 0x00000000);
! 3970: /* XXX : not implemented */
! 3971: spr_register(env, SPR_Exxx_ALTCTXCR, "ALTCTXCR",
! 3972: SPR_NOACCESS, SPR_NOACCESS,
! 3973: &spr_read_generic, &spr_write_generic,
! 3974: 0x00000000);
! 3975: /* XXX : not implemented */
! 3976: spr_register(env, SPR_Exxx_BUCSR, "BUCSR",
! 3977: SPR_NOACCESS, SPR_NOACCESS,
! 3978: &spr_read_generic, &spr_write_generic,
! 3979: 0x00000000);
! 3980: /* XXX : not implemented */
! 3981: spr_register(env, SPR_Exxx_CTXCR, "CTXCR",
! 3982: SPR_NOACCESS, SPR_NOACCESS,
! 3983: &spr_read_generic, &spr_write_generic,
! 3984: 0x00000000);
! 3985: /* XXX : not implemented */
! 3986: spr_register(env, SPR_Exxx_DBCNT, "DBCNT",
! 3987: SPR_NOACCESS, SPR_NOACCESS,
! 3988: &spr_read_generic, &spr_write_generic,
! 3989: 0x00000000);
! 3990: /* XXX : not implemented */
! 3991: spr_register(env, SPR_Exxx_DBCR3, "DBCR3",
! 3992: SPR_NOACCESS, SPR_NOACCESS,
! 3993: &spr_read_generic, &spr_write_generic,
! 3994: 0x00000000);
! 3995: /* XXX : not implemented */
! 3996: spr_register(env, SPR_Exxx_L1CFG0, "L1CFG0",
! 3997: SPR_NOACCESS, SPR_NOACCESS,
! 3998: &spr_read_generic, &spr_write_generic,
! 3999: 0x00000000);
! 4000: /* XXX : not implemented */
! 4001: spr_register(env, SPR_Exxx_L1CSR0, "L1CSR0",
! 4002: SPR_NOACCESS, SPR_NOACCESS,
! 4003: &spr_read_generic, &spr_write_generic,
! 4004: 0x00000000);
! 4005: /* XXX : not implemented */
! 4006: spr_register(env, SPR_Exxx_L1FINV0, "L1FINV0",
! 4007: SPR_NOACCESS, SPR_NOACCESS,
! 4008: &spr_read_generic, &spr_write_generic,
! 4009: 0x00000000);
! 4010: /* XXX : not implemented */
! 4011: spr_register(env, SPR_BOOKE_TLB0CFG, "TLB0CFG",
! 4012: SPR_NOACCESS, SPR_NOACCESS,
! 4013: &spr_read_generic, &spr_write_generic,
! 4014: 0x00000000);
! 4015: /* XXX : not implemented */
! 4016: spr_register(env, SPR_BOOKE_TLB1CFG, "TLB1CFG",
! 4017: SPR_NOACCESS, SPR_NOACCESS,
! 4018: &spr_read_generic, &spr_write_generic,
! 4019: 0x00000000);
! 4020: /* XXX : not implemented */
! 4021: spr_register(env, SPR_BOOKE_IAC3, "IAC3",
! 4022: SPR_NOACCESS, SPR_NOACCESS,
! 4023: &spr_read_generic, &spr_write_generic,
! 4024: 0x00000000);
! 4025: /* XXX : not implemented */
! 4026: spr_register(env, SPR_BOOKE_IAC4, "IAC4",
! 4027: SPR_NOACCESS, SPR_NOACCESS,
! 4028: &spr_read_generic, &spr_write_generic,
! 4029: 0x00000000);
! 4030: spr_register(env, SPR_BOOKE_DSRR0, "DSRR0",
! 4031: SPR_NOACCESS, SPR_NOACCESS,
! 4032: &spr_read_generic, &spr_write_generic,
! 4033: 0x00000000);
! 4034: spr_register(env, SPR_BOOKE_DSRR1, "DSRR1",
! 4035: SPR_NOACCESS, SPR_NOACCESS,
! 4036: &spr_read_generic, &spr_write_generic,
! 4037: 0x00000000);
! 4038: #if !defined(CONFIG_USER_ONLY)
! 4039: env->nb_tlb = 64;
! 4040: env->nb_ways = 1;
! 4041: env->id_tlbs = 0;
! 4042: #endif
! 4043: init_excp_e200(env);
! 4044: env->dcache_line_size = 32;
! 4045: env->icache_line_size = 32;
! 4046: /* XXX: TODO: allocate internal IRQ controller */
! 4047: }
! 4048:
! 4049: /* e300 core */
! 4050: #define POWERPC_INSNS_e300 (PPC_INSNS_BASE | PPC_STRING | PPC_MFTB | \
! 4051: PPC_FLOAT | PPC_FLOAT_FSEL | PPC_FLOAT_FRES | \
! 4052: PPC_FLOAT_STFIWX | \
! 4053: PPC_CACHE | PPC_CACHE_ICBI | PPC_CACHE_DCBZ | \
! 4054: PPC_MEM_SYNC | PPC_MEM_EIEIO | \
! 4055: PPC_MEM_TLBIE | PPC_MEM_TLBSYNC | PPC_6xx_TLB | \
! 4056: PPC_SEGMENT | PPC_EXTERN)
! 4057: #define POWERPC_MSRM_e300 (0x000000000007FFF3ULL)
! 4058: #define POWERPC_MMU_e300 (POWERPC_MMU_SOFT_6xx)
! 4059: #define POWERPC_EXCP_e300 (POWERPC_EXCP_603)
! 4060: #define POWERPC_INPUT_e300 (PPC_FLAGS_INPUT_6xx)
! 4061: #define POWERPC_BFDM_e300 (bfd_mach_ppc_603)
! 4062: #define POWERPC_FLAG_e300 (POWERPC_FLAG_TGPR | POWERPC_FLAG_SE | \
! 4063: POWERPC_FLAG_BE | POWERPC_FLAG_BUS_CLK)
! 4064: #define check_pow_e300 check_pow_hid0
! 4065:
! 4066: __attribute__ (( unused ))
! 4067: static void init_proc_e300 (CPUPPCState *env)
! 4068: {
! 4069: gen_spr_ne_601(env);
! 4070: gen_spr_603(env);
! 4071: /* Time base */
! 4072: gen_tbl(env);
! 4073: /* hardware implementation registers */
! 4074: /* XXX : not implemented */
! 4075: spr_register(env, SPR_HID0, "HID0",
! 4076: SPR_NOACCESS, SPR_NOACCESS,
! 4077: &spr_read_generic, &spr_write_generic,
! 4078: 0x00000000);
! 4079: /* XXX : not implemented */
! 4080: spr_register(env, SPR_HID1, "HID1",
! 4081: SPR_NOACCESS, SPR_NOACCESS,
! 4082: &spr_read_generic, &spr_write_generic,
! 4083: 0x00000000);
! 4084: /* Memory management */
! 4085: gen_low_BATs(env);
! 4086: gen_6xx_7xx_soft_tlb(env, 64, 2);
! 4087: init_excp_603(env);
! 4088: env->dcache_line_size = 32;
! 4089: env->icache_line_size = 32;
! 4090: /* Allocate hardware IRQ controller */
! 4091: ppc6xx_irq_init(env);
! 4092: }
! 4093:
! 4094: /* e500 core */
! 4095: #define POWERPC_INSNS_e500 (PPC_INSNS_BASE | PPC_ISEL | \
! 4096: PPC_SPE | PPC_SPEFPU | \
! 4097: PPC_WRTEE | PPC_RFDI | \
! 4098: PPC_CACHE | PPC_CACHE_LOCK | PPC_CACHE_ICBI | \
! 4099: PPC_CACHE_DCBZ | PPC_CACHE_DCBA | \
! 4100: PPC_MEM_TLBSYNC | PPC_TLBIVAX | \
! 4101: PPC_BOOKE)
! 4102: #define POWERPC_MSRM_e500 (0x000000000606FF30ULL)
! 4103: #define POWERPC_MMU_e500 (POWERPC_MMU_BOOKE_FSL)
! 4104: #define POWERPC_EXCP_e500 (POWERPC_EXCP_BOOKE)
! 4105: #define POWERPC_INPUT_e500 (PPC_FLAGS_INPUT_BookE)
! 4106: #define POWERPC_BFDM_e500 (bfd_mach_ppc_860)
! 4107: #define POWERPC_FLAG_e500 (POWERPC_FLAG_SPE | POWERPC_FLAG_CE | \
! 4108: POWERPC_FLAG_UBLE | POWERPC_FLAG_DE | \
! 4109: POWERPC_FLAG_BUS_CLK)
! 4110: #define check_pow_e500 check_pow_hid0
! 4111:
! 4112: __attribute__ (( unused ))
! 4113: static void init_proc_e500 (CPUPPCState *env)
! 4114: {
! 4115: /* Time base */
! 4116: gen_tbl(env);
! 4117: gen_spr_BookE(env, 0x0000000F0000FD7FULL);
! 4118: /* Processor identification */
! 4119: spr_register(env, SPR_BOOKE_PIR, "PIR",
! 4120: SPR_NOACCESS, SPR_NOACCESS,
! 4121: &spr_read_generic, &spr_write_pir,
! 4122: 0x00000000);
! 4123: /* XXX : not implemented */
! 4124: spr_register(env, SPR_BOOKE_SPEFSCR, "SPEFSCR",
! 4125: SPR_NOACCESS, SPR_NOACCESS,
! 4126: &spr_read_generic, &spr_write_generic,
! 4127: 0x00000000);
! 4128: /* Memory management */
! 4129: #if !defined(CONFIG_USER_ONLY)
! 4130: env->nb_pids = 3;
! 4131: #endif
! 4132: gen_spr_BookE_FSL(env, 0x0000005F);
! 4133: /* XXX : not implemented */
! 4134: spr_register(env, SPR_HID0, "HID0",
! 4135: SPR_NOACCESS, SPR_NOACCESS,
! 4136: &spr_read_generic, &spr_write_generic,
! 4137: 0x00000000);
! 4138: /* XXX : not implemented */
! 4139: spr_register(env, SPR_HID1, "HID1",
! 4140: SPR_NOACCESS, SPR_NOACCESS,
! 4141: &spr_read_generic, &spr_write_generic,
! 4142: 0x00000000);
! 4143: /* XXX : not implemented */
! 4144: spr_register(env, SPR_Exxx_BBEAR, "BBEAR",
! 4145: SPR_NOACCESS, SPR_NOACCESS,
! 4146: &spr_read_generic, &spr_write_generic,
! 4147: 0x00000000);
! 4148: /* XXX : not implemented */
! 4149: spr_register(env, SPR_Exxx_BBTAR, "BBTAR",
! 4150: SPR_NOACCESS, SPR_NOACCESS,
! 4151: &spr_read_generic, &spr_write_generic,
! 4152: 0x00000000);
! 4153: /* XXX : not implemented */
! 4154: spr_register(env, SPR_Exxx_MCAR, "MCAR",
! 4155: SPR_NOACCESS, SPR_NOACCESS,
! 4156: &spr_read_generic, &spr_write_generic,
! 4157: 0x00000000);
! 4158: /* XXX : not implemented */
! 4159: spr_register(env, SPR_BOOKE_MCSR, "MCSR",
! 4160: SPR_NOACCESS, SPR_NOACCESS,
! 4161: &spr_read_generic, &spr_write_generic,
! 4162: 0x00000000);
! 4163: /* XXX : not implemented */
! 4164: spr_register(env, SPR_Exxx_NPIDR, "NPIDR",
! 4165: SPR_NOACCESS, SPR_NOACCESS,
! 4166: &spr_read_generic, &spr_write_generic,
! 4167: 0x00000000);
! 4168: /* XXX : not implemented */
! 4169: spr_register(env, SPR_Exxx_BUCSR, "BUCSR",
! 4170: SPR_NOACCESS, SPR_NOACCESS,
! 4171: &spr_read_generic, &spr_write_generic,
! 4172: 0x00000000);
! 4173: /* XXX : not implemented */
! 4174: spr_register(env, SPR_Exxx_L1CFG0, "L1CFG0",
! 4175: SPR_NOACCESS, SPR_NOACCESS,
! 4176: &spr_read_generic, &spr_write_generic,
! 4177: 0x00000000);
! 4178: /* XXX : not implemented */
! 4179: spr_register(env, SPR_Exxx_L1CSR0, "L1CSR0",
! 4180: SPR_NOACCESS, SPR_NOACCESS,
! 4181: &spr_read_generic, &spr_write_generic,
! 4182: 0x00000000);
! 4183: /* XXX : not implemented */
! 4184: spr_register(env, SPR_Exxx_L1CSR1, "L1CSR1",
! 4185: SPR_NOACCESS, SPR_NOACCESS,
! 4186: &spr_read_generic, &spr_write_generic,
! 4187: 0x00000000);
! 4188: /* XXX : not implemented */
! 4189: spr_register(env, SPR_BOOKE_TLB0CFG, "TLB0CFG",
! 4190: SPR_NOACCESS, SPR_NOACCESS,
! 4191: &spr_read_generic, &spr_write_generic,
! 4192: 0x00000000);
! 4193: /* XXX : not implemented */
! 4194: spr_register(env, SPR_BOOKE_TLB1CFG, "TLB1CFG",
! 4195: SPR_NOACCESS, SPR_NOACCESS,
! 4196: &spr_read_generic, &spr_write_generic,
! 4197: 0x00000000);
! 4198: spr_register(env, SPR_BOOKE_MCSRR0, "MCSRR0",
! 4199: SPR_NOACCESS, SPR_NOACCESS,
! 4200: &spr_read_generic, &spr_write_generic,
! 4201: 0x00000000);
! 4202: spr_register(env, SPR_BOOKE_MCSRR1, "MCSRR1",
! 4203: SPR_NOACCESS, SPR_NOACCESS,
! 4204: &spr_read_generic, &spr_write_generic,
! 4205: 0x00000000);
! 4206: #if !defined(CONFIG_USER_ONLY)
! 4207: env->nb_tlb = 64;
! 4208: env->nb_ways = 1;
! 4209: env->id_tlbs = 0;
! 4210: #endif
! 4211: init_excp_e200(env);
! 4212: env->dcache_line_size = 32;
! 4213: env->icache_line_size = 32;
! 4214: /* XXX: TODO: allocate internal IRQ controller */
! 4215: }
! 4216:
! 4217: /* Non-embedded PowerPC */
! 4218:
! 4219: /* POWER : same as 601, without mfmsr, mfsr */
! 4220: #if defined(TODO)
! 4221: #define POWERPC_INSNS_POWER (XXX_TODO)
! 4222: /* POWER RSC (from RAD6000) */
! 4223: #define POWERPC_MSRM_POWER (0x00000000FEF0ULL)
! 4224: #endif /* TODO */
! 4225:
! 4226: /* PowerPC 601 */
! 4227: #define POWERPC_INSNS_601 (PPC_INSNS_BASE | PPC_STRING | PPC_POWER_BR | \
! 4228: PPC_FLOAT | \
! 4229: PPC_CACHE | PPC_CACHE_ICBI | PPC_CACHE_DCBZ | \
! 4230: PPC_MEM_SYNC | PPC_MEM_EIEIO | PPC_MEM_TLBIE | \
! 4231: PPC_SEGMENT | PPC_EXTERN)
! 4232: #define POWERPC_MSRM_601 (0x000000000000FD70ULL)
! 4233: #define POWERPC_MSRR_601 (0x0000000000001040ULL)
! 4234: //#define POWERPC_MMU_601 (POWERPC_MMU_601)
! 4235: //#define POWERPC_EXCP_601 (POWERPC_EXCP_601)
! 4236: #define POWERPC_INPUT_601 (PPC_FLAGS_INPUT_6xx)
! 4237: #define POWERPC_BFDM_601 (bfd_mach_ppc_601)
! 4238: #define POWERPC_FLAG_601 (POWERPC_FLAG_SE | POWERPC_FLAG_RTC_CLK)
! 4239: #define check_pow_601 check_pow_none
! 4240:
! 4241: static void init_proc_601 (CPUPPCState *env)
! 4242: {
! 4243: gen_spr_ne_601(env);
! 4244: gen_spr_601(env);
! 4245: /* Hardware implementation registers */
! 4246: /* XXX : not implemented */
! 4247: spr_register(env, SPR_HID0, "HID0",
! 4248: SPR_NOACCESS, SPR_NOACCESS,
! 4249: &spr_read_generic, &spr_write_hid0_601,
! 4250: 0x80010080);
! 4251: /* XXX : not implemented */
! 4252: spr_register(env, SPR_HID1, "HID1",
! 4253: SPR_NOACCESS, SPR_NOACCESS,
! 4254: &spr_read_generic, &spr_write_generic,
! 4255: 0x00000000);
! 4256: /* XXX : not implemented */
! 4257: spr_register(env, SPR_601_HID2, "HID2",
! 4258: SPR_NOACCESS, SPR_NOACCESS,
! 4259: &spr_read_generic, &spr_write_generic,
! 4260: 0x00000000);
! 4261: /* XXX : not implemented */
! 4262: spr_register(env, SPR_601_HID5, "HID5",
! 4263: SPR_NOACCESS, SPR_NOACCESS,
! 4264: &spr_read_generic, &spr_write_generic,
! 4265: 0x00000000);
! 4266: /* Memory management */
! 4267: init_excp_601(env);
! 4268: /* XXX: beware that dcache line size is 64
! 4269: * but dcbz uses 32 bytes "sectors"
! 4270: * XXX: this breaks clcs instruction !
! 4271: */
! 4272: env->dcache_line_size = 32;
! 4273: env->icache_line_size = 64;
! 4274: /* Allocate hardware IRQ controller */
! 4275: ppc6xx_irq_init(env);
! 4276: }
! 4277:
! 4278: /* PowerPC 601v */
! 4279: #define POWERPC_INSNS_601v (PPC_INSNS_BASE | PPC_STRING | PPC_POWER_BR | \
! 4280: PPC_FLOAT | \
! 4281: PPC_CACHE | PPC_CACHE_ICBI | PPC_CACHE_DCBZ | \
! 4282: PPC_MEM_SYNC | PPC_MEM_EIEIO | PPC_MEM_TLBIE | \
! 4283: PPC_SEGMENT | PPC_EXTERN)
! 4284: #define POWERPC_MSRM_601v (0x000000000000FD70ULL)
! 4285: #define POWERPC_MSRR_601v (0x0000000000001040ULL)
! 4286: #define POWERPC_MMU_601v (POWERPC_MMU_601)
! 4287: #define POWERPC_EXCP_601v (POWERPC_EXCP_601)
! 4288: #define POWERPC_INPUT_601v (PPC_FLAGS_INPUT_6xx)
! 4289: #define POWERPC_BFDM_601v (bfd_mach_ppc_601)
! 4290: #define POWERPC_FLAG_601v (POWERPC_FLAG_SE | POWERPC_FLAG_RTC_CLK)
! 4291: #define check_pow_601v check_pow_none
! 4292:
! 4293: static void init_proc_601v (CPUPPCState *env)
! 4294: {
! 4295: init_proc_601(env);
! 4296: /* XXX : not implemented */
! 4297: spr_register(env, SPR_601_HID15, "HID15",
! 4298: SPR_NOACCESS, SPR_NOACCESS,
! 4299: &spr_read_generic, &spr_write_generic,
! 4300: 0x00000000);
! 4301: }
! 4302:
! 4303: /* PowerPC 602 */
! 4304: #define POWERPC_INSNS_602 (PPC_INSNS_BASE | PPC_STRING | PPC_MFTB | \
! 4305: PPC_FLOAT | PPC_FLOAT_FSEL | PPC_FLOAT_FRES | \
! 4306: PPC_FLOAT_FRSQRTE | PPC_FLOAT_STFIWX | \
! 4307: PPC_CACHE | PPC_CACHE_ICBI | PPC_CACHE_DCBZ | \
! 4308: PPC_MEM_SYNC | PPC_MEM_EIEIO | \
! 4309: PPC_MEM_TLBIE | PPC_6xx_TLB | PPC_MEM_TLBSYNC | \
! 4310: PPC_SEGMENT | PPC_602_SPEC)
! 4311: #define POWERPC_MSRM_602 (0x0000000000C7FF73ULL)
! 4312: /* XXX: 602 MMU is quite specific. Should add a special case */
! 4313: #define POWERPC_MMU_602 (POWERPC_MMU_SOFT_6xx)
! 4314: //#define POWERPC_EXCP_602 (POWERPC_EXCP_602)
! 4315: #define POWERPC_INPUT_602 (PPC_FLAGS_INPUT_6xx)
! 4316: #define POWERPC_BFDM_602 (bfd_mach_ppc_602)
! 4317: #define POWERPC_FLAG_602 (POWERPC_FLAG_TGPR | POWERPC_FLAG_SE | \
! 4318: POWERPC_FLAG_BE | POWERPC_FLAG_BUS_CLK)
! 4319: #define check_pow_602 check_pow_hid0
! 4320:
! 4321: static void init_proc_602 (CPUPPCState *env)
! 4322: {
! 4323: gen_spr_ne_601(env);
! 4324: gen_spr_602(env);
! 4325: /* Time base */
! 4326: gen_tbl(env);
! 4327: /* hardware implementation registers */
! 4328: /* XXX : not implemented */
! 4329: spr_register(env, SPR_HID0, "HID0",
! 4330: SPR_NOACCESS, SPR_NOACCESS,
! 4331: &spr_read_generic, &spr_write_generic,
! 4332: 0x00000000);
! 4333: /* XXX : not implemented */
! 4334: spr_register(env, SPR_HID1, "HID1",
! 4335: SPR_NOACCESS, SPR_NOACCESS,
! 4336: &spr_read_generic, &spr_write_generic,
! 4337: 0x00000000);
! 4338: /* Memory management */
! 4339: gen_low_BATs(env);
! 4340: gen_6xx_7xx_soft_tlb(env, 64, 2);
! 4341: init_excp_602(env);
! 4342: env->dcache_line_size = 32;
! 4343: env->icache_line_size = 32;
! 4344: /* Allocate hardware IRQ controller */
! 4345: ppc6xx_irq_init(env);
! 4346: }
! 4347:
! 4348: /* PowerPC 603 */
! 4349: #define POWERPC_INSNS_603 (PPC_INSNS_BASE | PPC_STRING | PPC_MFTB | \
! 4350: PPC_FLOAT | PPC_FLOAT_FSEL | PPC_FLOAT_FRES | \
! 4351: PPC_FLOAT_FRSQRTE | PPC_FLOAT_STFIWX | \
! 4352: PPC_CACHE | PPC_CACHE_ICBI | PPC_CACHE_DCBZ | \
! 4353: PPC_MEM_SYNC | PPC_MEM_EIEIO | \
! 4354: PPC_MEM_TLBIE | PPC_MEM_TLBSYNC | PPC_6xx_TLB | \
! 4355: PPC_SEGMENT | PPC_EXTERN)
! 4356: #define POWERPC_MSRM_603 (0x000000000007FF73ULL)
! 4357: #define POWERPC_MMU_603 (POWERPC_MMU_SOFT_6xx)
! 4358: //#define POWERPC_EXCP_603 (POWERPC_EXCP_603)
! 4359: #define POWERPC_INPUT_603 (PPC_FLAGS_INPUT_6xx)
! 4360: #define POWERPC_BFDM_603 (bfd_mach_ppc_603)
! 4361: #define POWERPC_FLAG_603 (POWERPC_FLAG_TGPR | POWERPC_FLAG_SE | \
! 4362: POWERPC_FLAG_BE | POWERPC_FLAG_BUS_CLK)
! 4363: #define check_pow_603 check_pow_hid0
! 4364:
! 4365: static void init_proc_603 (CPUPPCState *env)
! 4366: {
! 4367: gen_spr_ne_601(env);
! 4368: gen_spr_603(env);
! 4369: /* Time base */
! 4370: gen_tbl(env);
! 4371: /* hardware implementation registers */
! 4372: /* XXX : not implemented */
! 4373: spr_register(env, SPR_HID0, "HID0",
! 4374: SPR_NOACCESS, SPR_NOACCESS,
! 4375: &spr_read_generic, &spr_write_generic,
! 4376: 0x00000000);
! 4377: /* XXX : not implemented */
! 4378: spr_register(env, SPR_HID1, "HID1",
! 4379: SPR_NOACCESS, SPR_NOACCESS,
! 4380: &spr_read_generic, &spr_write_generic,
! 4381: 0x00000000);
! 4382: /* Memory management */
! 4383: gen_low_BATs(env);
! 4384: gen_6xx_7xx_soft_tlb(env, 64, 2);
! 4385: init_excp_603(env);
! 4386: env->dcache_line_size = 32;
! 4387: env->icache_line_size = 32;
! 4388: /* Allocate hardware IRQ controller */
! 4389: ppc6xx_irq_init(env);
! 4390: }
! 4391:
! 4392: /* PowerPC 603e */
! 4393: #define POWERPC_INSNS_603E (PPC_INSNS_BASE | PPC_STRING | PPC_MFTB | \
! 4394: PPC_FLOAT | PPC_FLOAT_FSEL | PPC_FLOAT_FRES | \
! 4395: PPC_FLOAT_FRSQRTE | PPC_FLOAT_STFIWX | \
! 4396: PPC_CACHE | PPC_CACHE_ICBI | PPC_CACHE_DCBZ | \
! 4397: PPC_MEM_SYNC | PPC_MEM_EIEIO | \
! 4398: PPC_MEM_TLBIE | PPC_MEM_TLBSYNC | PPC_6xx_TLB | \
! 4399: PPC_SEGMENT | PPC_EXTERN)
! 4400: #define POWERPC_MSRM_603E (0x000000000007FF73ULL)
! 4401: #define POWERPC_MMU_603E (POWERPC_MMU_SOFT_6xx)
! 4402: //#define POWERPC_EXCP_603E (POWERPC_EXCP_603E)
! 4403: #define POWERPC_INPUT_603E (PPC_FLAGS_INPUT_6xx)
! 4404: #define POWERPC_BFDM_603E (bfd_mach_ppc_ec603e)
! 4405: #define POWERPC_FLAG_603E (POWERPC_FLAG_TGPR | POWERPC_FLAG_SE | \
! 4406: POWERPC_FLAG_BE | POWERPC_FLAG_BUS_CLK)
! 4407: #define check_pow_603E check_pow_hid0
! 4408:
! 4409: static void init_proc_603E (CPUPPCState *env)
! 4410: {
! 4411: gen_spr_ne_601(env);
! 4412: gen_spr_603(env);
! 4413: /* Time base */
! 4414: gen_tbl(env);
! 4415: /* hardware implementation registers */
! 4416: /* XXX : not implemented */
! 4417: spr_register(env, SPR_HID0, "HID0",
! 4418: SPR_NOACCESS, SPR_NOACCESS,
! 4419: &spr_read_generic, &spr_write_generic,
! 4420: 0x00000000);
! 4421: /* XXX : not implemented */
! 4422: spr_register(env, SPR_HID1, "HID1",
! 4423: SPR_NOACCESS, SPR_NOACCESS,
! 4424: &spr_read_generic, &spr_write_generic,
! 4425: 0x00000000);
! 4426: /* XXX : not implemented */
! 4427: spr_register(env, SPR_IABR, "IABR",
! 4428: SPR_NOACCESS, SPR_NOACCESS,
! 4429: &spr_read_generic, &spr_write_generic,
! 4430: 0x00000000);
! 4431: /* Memory management */
! 4432: gen_low_BATs(env);
! 4433: gen_6xx_7xx_soft_tlb(env, 64, 2);
! 4434: init_excp_603(env);
! 4435: env->dcache_line_size = 32;
! 4436: env->icache_line_size = 32;
! 4437: /* Allocate hardware IRQ controller */
! 4438: ppc6xx_irq_init(env);
! 4439: }
! 4440:
! 4441: /* PowerPC 604 */
! 4442: #define POWERPC_INSNS_604 (PPC_INSNS_BASE | PPC_STRING | PPC_MFTB | \
! 4443: PPC_FLOAT | PPC_FLOAT_FSEL | PPC_FLOAT_FRES | \
! 4444: PPC_FLOAT_FRSQRTE | PPC_FLOAT_STFIWX | \
! 4445: PPC_CACHE | PPC_CACHE_ICBI | PPC_CACHE_DCBZ | \
! 4446: PPC_MEM_SYNC | PPC_MEM_EIEIO | \
! 4447: PPC_MEM_TLBIE | PPC_MEM_TLBSYNC | \
! 4448: PPC_SEGMENT | PPC_EXTERN)
! 4449: #define POWERPC_MSRM_604 (0x000000000005FF77ULL)
! 4450: #define POWERPC_MMU_604 (POWERPC_MMU_32B)
! 4451: //#define POWERPC_EXCP_604 (POWERPC_EXCP_604)
! 4452: #define POWERPC_INPUT_604 (PPC_FLAGS_INPUT_6xx)
! 4453: #define POWERPC_BFDM_604 (bfd_mach_ppc_604)
! 4454: #define POWERPC_FLAG_604 (POWERPC_FLAG_SE | POWERPC_FLAG_BE | \
! 4455: POWERPC_FLAG_PMM | POWERPC_FLAG_BUS_CLK)
! 4456: #define check_pow_604 check_pow_nocheck
! 4457:
! 4458: static void init_proc_604 (CPUPPCState *env)
! 4459: {
! 4460: gen_spr_ne_601(env);
! 4461: gen_spr_604(env);
! 4462: /* Time base */
! 4463: gen_tbl(env);
! 4464: /* Hardware implementation registers */
! 4465: /* XXX : not implemented */
! 4466: spr_register(env, SPR_HID0, "HID0",
! 4467: SPR_NOACCESS, SPR_NOACCESS,
! 4468: &spr_read_generic, &spr_write_generic,
! 4469: 0x00000000);
! 4470: /* Memory management */
! 4471: gen_low_BATs(env);
! 4472: init_excp_604(env);
! 4473: env->dcache_line_size = 32;
! 4474: env->icache_line_size = 32;
! 4475: /* Allocate hardware IRQ controller */
! 4476: ppc6xx_irq_init(env);
! 4477: }
! 4478:
! 4479: /* PowerPC 604E */
! 4480: #define POWERPC_INSNS_604E (PPC_INSNS_BASE | PPC_STRING | PPC_MFTB | \
! 4481: PPC_FLOAT | PPC_FLOAT_FSEL | PPC_FLOAT_FRES | \
! 4482: PPC_FLOAT_FRSQRTE | PPC_FLOAT_STFIWX | \
! 4483: PPC_CACHE | PPC_CACHE_ICBI | PPC_CACHE_DCBZ | \
! 4484: PPC_MEM_SYNC | PPC_MEM_EIEIO | \
! 4485: PPC_MEM_TLBIE | PPC_MEM_TLBSYNC | \
! 4486: PPC_SEGMENT | PPC_EXTERN)
! 4487: #define POWERPC_MSRM_604E (0x000000000005FF77ULL)
! 4488: #define POWERPC_MMU_604E (POWERPC_MMU_32B)
! 4489: #define POWERPC_EXCP_604E (POWERPC_EXCP_604)
! 4490: #define POWERPC_INPUT_604E (PPC_FLAGS_INPUT_6xx)
! 4491: #define POWERPC_BFDM_604E (bfd_mach_ppc_604)
! 4492: #define POWERPC_FLAG_604E (POWERPC_FLAG_SE | POWERPC_FLAG_BE | \
! 4493: POWERPC_FLAG_PMM | POWERPC_FLAG_BUS_CLK)
! 4494: #define check_pow_604E check_pow_nocheck
! 4495:
! 4496: static void init_proc_604E (CPUPPCState *env)
! 4497: {
! 4498: gen_spr_ne_601(env);
! 4499: gen_spr_604(env);
! 4500: /* XXX : not implemented */
! 4501: spr_register(env, SPR_MMCR1, "MMCR1",
! 4502: SPR_NOACCESS, SPR_NOACCESS,
! 4503: &spr_read_generic, &spr_write_generic,
! 4504: 0x00000000);
! 4505: /* XXX : not implemented */
! 4506: spr_register(env, SPR_PMC3, "PMC3",
! 4507: SPR_NOACCESS, SPR_NOACCESS,
! 4508: &spr_read_generic, &spr_write_generic,
! 4509: 0x00000000);
! 4510: /* XXX : not implemented */
! 4511: spr_register(env, SPR_PMC4, "PMC4",
! 4512: SPR_NOACCESS, SPR_NOACCESS,
! 4513: &spr_read_generic, &spr_write_generic,
! 4514: 0x00000000);
! 4515: /* Time base */
! 4516: gen_tbl(env);
! 4517: /* Hardware implementation registers */
! 4518: /* XXX : not implemented */
! 4519: spr_register(env, SPR_HID0, "HID0",
! 4520: SPR_NOACCESS, SPR_NOACCESS,
! 4521: &spr_read_generic, &spr_write_generic,
! 4522: 0x00000000);
! 4523: /* XXX : not implemented */
! 4524: spr_register(env, SPR_HID1, "HID1",
! 4525: SPR_NOACCESS, SPR_NOACCESS,
! 4526: &spr_read_generic, &spr_write_generic,
! 4527: 0x00000000);
! 4528: /* Memory management */
! 4529: gen_low_BATs(env);
! 4530: init_excp_604(env);
! 4531: env->dcache_line_size = 32;
! 4532: env->icache_line_size = 32;
! 4533: /* Allocate hardware IRQ controller */
! 4534: ppc6xx_irq_init(env);
! 4535: }
! 4536:
! 4537: /* PowerPC 740 */
! 4538: #define POWERPC_INSNS_740 (PPC_INSNS_BASE | PPC_STRING | PPC_MFTB | \
! 4539: PPC_FLOAT | PPC_FLOAT_FSEL | PPC_FLOAT_FRES | \
! 4540: PPC_FLOAT_FRSQRTE | PPC_FLOAT_STFIWX | \
! 4541: PPC_CACHE | PPC_CACHE_ICBI | PPC_CACHE_DCBZ | \
! 4542: PPC_MEM_SYNC | PPC_MEM_EIEIO | \
! 4543: PPC_MEM_TLBIE | PPC_MEM_TLBSYNC | \
! 4544: PPC_SEGMENT | PPC_EXTERN)
! 4545: #define POWERPC_MSRM_740 (0x000000000005FF77ULL)
! 4546: #define POWERPC_MMU_740 (POWERPC_MMU_32B)
! 4547: #define POWERPC_EXCP_740 (POWERPC_EXCP_7x0)
! 4548: #define POWERPC_INPUT_740 (PPC_FLAGS_INPUT_6xx)
! 4549: #define POWERPC_BFDM_740 (bfd_mach_ppc_750)
! 4550: #define POWERPC_FLAG_740 (POWERPC_FLAG_SE | POWERPC_FLAG_BE | \
! 4551: POWERPC_FLAG_PMM | POWERPC_FLAG_BUS_CLK)
! 4552: #define check_pow_740 check_pow_hid0
! 4553:
! 4554: static void init_proc_740 (CPUPPCState *env)
! 4555: {
! 4556: gen_spr_ne_601(env);
! 4557: gen_spr_7xx(env);
! 4558: /* Time base */
! 4559: gen_tbl(env);
! 4560: /* Thermal management */
! 4561: gen_spr_thrm(env);
! 4562: /* Hardware implementation registers */
! 4563: /* XXX : not implemented */
! 4564: spr_register(env, SPR_HID0, "HID0",
! 4565: SPR_NOACCESS, SPR_NOACCESS,
! 4566: &spr_read_generic, &spr_write_generic,
! 4567: 0x00000000);
! 4568: /* XXX : not implemented */
! 4569: spr_register(env, SPR_HID1, "HID1",
! 4570: SPR_NOACCESS, SPR_NOACCESS,
! 4571: &spr_read_generic, &spr_write_generic,
! 4572: 0x00000000);
! 4573: /* Memory management */
! 4574: gen_low_BATs(env);
! 4575: init_excp_7x0(env);
! 4576: env->dcache_line_size = 32;
! 4577: env->icache_line_size = 32;
! 4578: /* Allocate hardware IRQ controller */
! 4579: ppc6xx_irq_init(env);
! 4580: }
! 4581:
! 4582: /* PowerPC 750 */
! 4583: #define POWERPC_INSNS_750 (PPC_INSNS_BASE | PPC_STRING | PPC_MFTB | \
! 4584: PPC_FLOAT | PPC_FLOAT_FSEL | PPC_FLOAT_FRES | \
! 4585: PPC_FLOAT_FRSQRTE | PPC_FLOAT_STFIWX | \
! 4586: PPC_CACHE | PPC_CACHE_ICBI | PPC_CACHE_DCBZ | \
! 4587: PPC_MEM_SYNC | PPC_MEM_EIEIO | \
! 4588: PPC_MEM_TLBIE | PPC_MEM_TLBSYNC | \
! 4589: PPC_SEGMENT | PPC_EXTERN)
! 4590: #define POWERPC_MSRM_750 (0x000000000005FF77ULL)
! 4591: #define POWERPC_MMU_750 (POWERPC_MMU_32B)
! 4592: #define POWERPC_EXCP_750 (POWERPC_EXCP_7x0)
! 4593: #define POWERPC_INPUT_750 (PPC_FLAGS_INPUT_6xx)
! 4594: #define POWERPC_BFDM_750 (bfd_mach_ppc_750)
! 4595: #define POWERPC_FLAG_750 (POWERPC_FLAG_SE | POWERPC_FLAG_BE | \
! 4596: POWERPC_FLAG_PMM | POWERPC_FLAG_BUS_CLK)
! 4597: #define check_pow_750 check_pow_hid0
! 4598:
! 4599: static void init_proc_750 (CPUPPCState *env)
! 4600: {
! 4601: gen_spr_ne_601(env);
! 4602: gen_spr_7xx(env);
! 4603: /* XXX : not implemented */
! 4604: spr_register(env, SPR_L2CR, "L2CR",
! 4605: SPR_NOACCESS, SPR_NOACCESS,
! 4606: &spr_read_generic, &spr_write_generic,
! 4607: 0x00000000);
! 4608: /* Time base */
! 4609: gen_tbl(env);
! 4610: /* Thermal management */
! 4611: gen_spr_thrm(env);
! 4612: /* Hardware implementation registers */
! 4613: /* XXX : not implemented */
! 4614: spr_register(env, SPR_HID0, "HID0",
! 4615: SPR_NOACCESS, SPR_NOACCESS,
! 4616: &spr_read_generic, &spr_write_generic,
! 4617: 0x00000000);
! 4618: /* XXX : not implemented */
! 4619: spr_register(env, SPR_HID1, "HID1",
! 4620: SPR_NOACCESS, SPR_NOACCESS,
! 4621: &spr_read_generic, &spr_write_generic,
! 4622: 0x00000000);
! 4623: /* Memory management */
! 4624: gen_low_BATs(env);
! 4625: /* XXX: high BATs are also present but are known to be bugged on
! 4626: * die version 1.x
! 4627: */
! 4628: init_excp_7x0(env);
! 4629: env->dcache_line_size = 32;
! 4630: env->icache_line_size = 32;
! 4631: /* Allocate hardware IRQ controller */
! 4632: ppc6xx_irq_init(env);
! 4633: }
! 4634:
! 4635: /* PowerPC 750 CL */
! 4636: /* XXX: not implemented:
! 4637: * cache lock instructions:
! 4638: * dcbz_l
! 4639: * floating point paired instructions
! 4640: * psq_lux
! 4641: * psq_lx
! 4642: * psq_stux
! 4643: * psq_stx
! 4644: * ps_abs
! 4645: * ps_add
! 4646: * ps_cmpo0
! 4647: * ps_cmpo1
! 4648: * ps_cmpu0
! 4649: * ps_cmpu1
! 4650: * ps_div
! 4651: * ps_madd
! 4652: * ps_madds0
! 4653: * ps_madds1
! 4654: * ps_merge00
! 4655: * ps_merge01
! 4656: * ps_merge10
! 4657: * ps_merge11
! 4658: * ps_mr
! 4659: * ps_msub
! 4660: * ps_mul
! 4661: * ps_muls0
! 4662: * ps_muls1
! 4663: * ps_nabs
! 4664: * ps_neg
! 4665: * ps_nmadd
! 4666: * ps_nmsub
! 4667: * ps_res
! 4668: * ps_rsqrte
! 4669: * ps_sel
! 4670: * ps_sub
! 4671: * ps_sum0
! 4672: * ps_sum1
! 4673: */
! 4674: #define POWERPC_INSNS_750cl (PPC_INSNS_BASE | PPC_STRING | PPC_MFTB | \
! 4675: PPC_FLOAT | PPC_FLOAT_FSEL | PPC_FLOAT_FRES | \
! 4676: PPC_FLOAT_FRSQRTE | PPC_FLOAT_STFIWX | \
! 4677: PPC_CACHE | PPC_CACHE_ICBI | PPC_CACHE_DCBZ | \
! 4678: PPC_MEM_SYNC | PPC_MEM_EIEIO | \
! 4679: PPC_MEM_TLBIE | PPC_MEM_TLBSYNC | \
! 4680: PPC_SEGMENT | PPC_EXTERN)
! 4681: #define POWERPC_MSRM_750cl (0x000000000005FF77ULL)
! 4682: #define POWERPC_MMU_750cl (POWERPC_MMU_32B)
! 4683: #define POWERPC_EXCP_750cl (POWERPC_EXCP_7x0)
! 4684: #define POWERPC_INPUT_750cl (PPC_FLAGS_INPUT_6xx)
! 4685: #define POWERPC_BFDM_750cl (bfd_mach_ppc_750)
! 4686: #define POWERPC_FLAG_750cl (POWERPC_FLAG_SE | POWERPC_FLAG_BE | \
! 4687: POWERPC_FLAG_PMM | POWERPC_FLAG_BUS_CLK)
! 4688: #define check_pow_750cl check_pow_hid0
! 4689:
! 4690: static void init_proc_750cl (CPUPPCState *env)
! 4691: {
! 4692: gen_spr_ne_601(env);
! 4693: gen_spr_7xx(env);
! 4694: /* XXX : not implemented */
! 4695: spr_register(env, SPR_L2CR, "L2CR",
! 4696: SPR_NOACCESS, SPR_NOACCESS,
! 4697: &spr_read_generic, &spr_write_generic,
! 4698: 0x00000000);
! 4699: /* Time base */
! 4700: gen_tbl(env);
! 4701: /* Thermal management */
! 4702: /* Those registers are fake on 750CL */
! 4703: spr_register(env, SPR_THRM1, "THRM1",
! 4704: SPR_NOACCESS, SPR_NOACCESS,
! 4705: &spr_read_generic, &spr_write_generic,
! 4706: 0x00000000);
! 4707: spr_register(env, SPR_THRM2, "THRM2",
! 4708: SPR_NOACCESS, SPR_NOACCESS,
! 4709: &spr_read_generic, &spr_write_generic,
! 4710: 0x00000000);
! 4711: spr_register(env, SPR_THRM3, "THRM3",
! 4712: SPR_NOACCESS, SPR_NOACCESS,
! 4713: &spr_read_generic, &spr_write_generic,
! 4714: 0x00000000);
! 4715: /* XXX: not implemented */
! 4716: spr_register(env, SPR_750_TDCL, "TDCL",
! 4717: SPR_NOACCESS, SPR_NOACCESS,
! 4718: &spr_read_generic, &spr_write_generic,
! 4719: 0x00000000);
! 4720: spr_register(env, SPR_750_TDCH, "TDCH",
! 4721: SPR_NOACCESS, SPR_NOACCESS,
! 4722: &spr_read_generic, &spr_write_generic,
! 4723: 0x00000000);
! 4724: /* DMA */
! 4725: /* XXX : not implemented */
! 4726: spr_register(env, SPR_750_WPAR, "WPAR",
! 4727: SPR_NOACCESS, SPR_NOACCESS,
! 4728: &spr_read_generic, &spr_write_generic,
! 4729: 0x00000000);
! 4730: spr_register(env, SPR_750_DMAL, "DMAL",
! 4731: SPR_NOACCESS, SPR_NOACCESS,
! 4732: &spr_read_generic, &spr_write_generic,
! 4733: 0x00000000);
! 4734: spr_register(env, SPR_750_DMAU, "DMAU",
! 4735: SPR_NOACCESS, SPR_NOACCESS,
! 4736: &spr_read_generic, &spr_write_generic,
! 4737: 0x00000000);
! 4738: /* Hardware implementation registers */
! 4739: /* XXX : not implemented */
! 4740: spr_register(env, SPR_HID0, "HID0",
! 4741: SPR_NOACCESS, SPR_NOACCESS,
! 4742: &spr_read_generic, &spr_write_generic,
! 4743: 0x00000000);
! 4744: /* XXX : not implemented */
! 4745: spr_register(env, SPR_HID1, "HID1",
! 4746: SPR_NOACCESS, SPR_NOACCESS,
! 4747: &spr_read_generic, &spr_write_generic,
! 4748: 0x00000000);
! 4749: /* XXX : not implemented */
! 4750: spr_register(env, SPR_750CL_HID2, "HID2",
! 4751: SPR_NOACCESS, SPR_NOACCESS,
! 4752: &spr_read_generic, &spr_write_generic,
! 4753: 0x00000000);
! 4754: /* XXX : not implemented */
! 4755: spr_register(env, SPR_750CL_HID4, "HID4",
! 4756: SPR_NOACCESS, SPR_NOACCESS,
! 4757: &spr_read_generic, &spr_write_generic,
! 4758: 0x00000000);
! 4759: /* Quantization registers */
! 4760: /* XXX : not implemented */
! 4761: spr_register(env, SPR_750_GQR0, "GQR0",
! 4762: SPR_NOACCESS, SPR_NOACCESS,
! 4763: &spr_read_generic, &spr_write_generic,
! 4764: 0x00000000);
! 4765: /* XXX : not implemented */
! 4766: spr_register(env, SPR_750_GQR1, "GQR1",
! 4767: SPR_NOACCESS, SPR_NOACCESS,
! 4768: &spr_read_generic, &spr_write_generic,
! 4769: 0x00000000);
! 4770: /* XXX : not implemented */
! 4771: spr_register(env, SPR_750_GQR2, "GQR2",
! 4772: SPR_NOACCESS, SPR_NOACCESS,
! 4773: &spr_read_generic, &spr_write_generic,
! 4774: 0x00000000);
! 4775: /* XXX : not implemented */
! 4776: spr_register(env, SPR_750_GQR3, "GQR3",
! 4777: SPR_NOACCESS, SPR_NOACCESS,
! 4778: &spr_read_generic, &spr_write_generic,
! 4779: 0x00000000);
! 4780: /* XXX : not implemented */
! 4781: spr_register(env, SPR_750_GQR4, "GQR4",
! 4782: SPR_NOACCESS, SPR_NOACCESS,
! 4783: &spr_read_generic, &spr_write_generic,
! 4784: 0x00000000);
! 4785: /* XXX : not implemented */
! 4786: spr_register(env, SPR_750_GQR5, "GQR5",
! 4787: SPR_NOACCESS, SPR_NOACCESS,
! 4788: &spr_read_generic, &spr_write_generic,
! 4789: 0x00000000);
! 4790: /* XXX : not implemented */
! 4791: spr_register(env, SPR_750_GQR6, "GQR6",
! 4792: SPR_NOACCESS, SPR_NOACCESS,
! 4793: &spr_read_generic, &spr_write_generic,
! 4794: 0x00000000);
! 4795: /* XXX : not implemented */
! 4796: spr_register(env, SPR_750_GQR7, "GQR7",
! 4797: SPR_NOACCESS, SPR_NOACCESS,
! 4798: &spr_read_generic, &spr_write_generic,
! 4799: 0x00000000);
! 4800: /* Memory management */
! 4801: gen_low_BATs(env);
! 4802: /* PowerPC 750cl has 8 DBATs and 8 IBATs */
! 4803: gen_high_BATs(env);
! 4804: init_excp_750cl(env);
! 4805: env->dcache_line_size = 32;
! 4806: env->icache_line_size = 32;
! 4807: /* Allocate hardware IRQ controller */
! 4808: ppc6xx_irq_init(env);
! 4809: }
! 4810:
! 4811: /* PowerPC 750CX */
! 4812: #define POWERPC_INSNS_750cx (PPC_INSNS_BASE | PPC_STRING | PPC_MFTB | \
! 4813: PPC_FLOAT | PPC_FLOAT_FSEL | PPC_FLOAT_FRES | \
! 4814: PPC_FLOAT_FRSQRTE | PPC_FLOAT_STFIWX | \
! 4815: PPC_CACHE | PPC_CACHE_ICBI | PPC_CACHE_DCBZ | \
! 4816: PPC_MEM_SYNC | PPC_MEM_EIEIO | \
! 4817: PPC_MEM_TLBIE | PPC_MEM_TLBSYNC | \
! 4818: PPC_SEGMENT | PPC_EXTERN)
! 4819: #define POWERPC_MSRM_750cx (0x000000000005FF77ULL)
! 4820: #define POWERPC_MMU_750cx (POWERPC_MMU_32B)
! 4821: #define POWERPC_EXCP_750cx (POWERPC_EXCP_7x0)
! 4822: #define POWERPC_INPUT_750cx (PPC_FLAGS_INPUT_6xx)
! 4823: #define POWERPC_BFDM_750cx (bfd_mach_ppc_750)
! 4824: #define POWERPC_FLAG_750cx (POWERPC_FLAG_SE | POWERPC_FLAG_BE | \
! 4825: POWERPC_FLAG_PMM | POWERPC_FLAG_BUS_CLK)
! 4826: #define check_pow_750cx check_pow_hid0
! 4827:
! 4828: static void init_proc_750cx (CPUPPCState *env)
! 4829: {
! 4830: gen_spr_ne_601(env);
! 4831: gen_spr_7xx(env);
! 4832: /* XXX : not implemented */
! 4833: spr_register(env, SPR_L2CR, "L2CR",
! 4834: SPR_NOACCESS, SPR_NOACCESS,
! 4835: &spr_read_generic, &spr_write_generic,
! 4836: 0x00000000);
! 4837: /* Time base */
! 4838: gen_tbl(env);
! 4839: /* Thermal management */
! 4840: gen_spr_thrm(env);
! 4841: /* This register is not implemented but is present for compatibility */
! 4842: spr_register(env, SPR_SDA, "SDA",
! 4843: SPR_NOACCESS, SPR_NOACCESS,
! 4844: &spr_read_generic, &spr_write_generic,
! 4845: 0x00000000);
! 4846: /* Hardware implementation registers */
! 4847: /* XXX : not implemented */
! 4848: spr_register(env, SPR_HID0, "HID0",
! 4849: SPR_NOACCESS, SPR_NOACCESS,
! 4850: &spr_read_generic, &spr_write_generic,
! 4851: 0x00000000);
! 4852: /* XXX : not implemented */
! 4853: spr_register(env, SPR_HID1, "HID1",
! 4854: SPR_NOACCESS, SPR_NOACCESS,
! 4855: &spr_read_generic, &spr_write_generic,
! 4856: 0x00000000);
! 4857: /* Memory management */
! 4858: gen_low_BATs(env);
! 4859: /* PowerPC 750cx has 8 DBATs and 8 IBATs */
! 4860: gen_high_BATs(env);
! 4861: init_excp_750cx(env);
! 4862: env->dcache_line_size = 32;
! 4863: env->icache_line_size = 32;
! 4864: /* Allocate hardware IRQ controller */
! 4865: ppc6xx_irq_init(env);
! 4866: }
! 4867:
! 4868: /* PowerPC 750FX */
! 4869: #define POWERPC_INSNS_750fx (PPC_INSNS_BASE | PPC_STRING | PPC_MFTB | \
! 4870: PPC_FLOAT | PPC_FLOAT_FSEL | PPC_FLOAT_FRES | \
! 4871: PPC_FLOAT_FRSQRTE | PPC_FLOAT_STFIWX | \
! 4872: PPC_CACHE | PPC_CACHE_ICBI | PPC_CACHE_DCBZ | \
! 4873: PPC_MEM_SYNC | PPC_MEM_EIEIO | \
! 4874: PPC_MEM_TLBIE | PPC_MEM_TLBSYNC | \
! 4875: PPC_SEGMENT | PPC_EXTERN)
! 4876: #define POWERPC_MSRM_750fx (0x000000000005FF77ULL)
! 4877: #define POWERPC_MMU_750fx (POWERPC_MMU_32B)
! 4878: #define POWERPC_EXCP_750fx (POWERPC_EXCP_7x0)
! 4879: #define POWERPC_INPUT_750fx (PPC_FLAGS_INPUT_6xx)
! 4880: #define POWERPC_BFDM_750fx (bfd_mach_ppc_750)
! 4881: #define POWERPC_FLAG_750fx (POWERPC_FLAG_SE | POWERPC_FLAG_BE | \
! 4882: POWERPC_FLAG_PMM | POWERPC_FLAG_BUS_CLK)
! 4883: #define check_pow_750fx check_pow_hid0
! 4884:
! 4885: static void init_proc_750fx (CPUPPCState *env)
! 4886: {
! 4887: gen_spr_ne_601(env);
! 4888: gen_spr_7xx(env);
! 4889: /* XXX : not implemented */
! 4890: spr_register(env, SPR_L2CR, "L2CR",
! 4891: SPR_NOACCESS, SPR_NOACCESS,
! 4892: &spr_read_generic, &spr_write_generic,
! 4893: 0x00000000);
! 4894: /* Time base */
! 4895: gen_tbl(env);
! 4896: /* Thermal management */
! 4897: gen_spr_thrm(env);
! 4898: /* XXX : not implemented */
! 4899: spr_register(env, SPR_750_THRM4, "THRM4",
! 4900: SPR_NOACCESS, SPR_NOACCESS,
! 4901: &spr_read_generic, &spr_write_generic,
! 4902: 0x00000000);
! 4903: /* Hardware implementation registers */
! 4904: /* XXX : not implemented */
! 4905: spr_register(env, SPR_HID0, "HID0",
! 4906: SPR_NOACCESS, SPR_NOACCESS,
! 4907: &spr_read_generic, &spr_write_generic,
! 4908: 0x00000000);
! 4909: /* XXX : not implemented */
! 4910: spr_register(env, SPR_HID1, "HID1",
! 4911: SPR_NOACCESS, SPR_NOACCESS,
! 4912: &spr_read_generic, &spr_write_generic,
! 4913: 0x00000000);
! 4914: /* XXX : not implemented */
! 4915: spr_register(env, SPR_750FX_HID2, "HID2",
! 4916: SPR_NOACCESS, SPR_NOACCESS,
! 4917: &spr_read_generic, &spr_write_generic,
! 4918: 0x00000000);
! 4919: /* Memory management */
! 4920: gen_low_BATs(env);
! 4921: /* PowerPC 750fx & 750gx has 8 DBATs and 8 IBATs */
! 4922: gen_high_BATs(env);
! 4923: init_excp_7x0(env);
! 4924: env->dcache_line_size = 32;
! 4925: env->icache_line_size = 32;
! 4926: /* Allocate hardware IRQ controller */
! 4927: ppc6xx_irq_init(env);
! 4928: }
! 4929:
! 4930: /* PowerPC 750GX */
! 4931: #define POWERPC_INSNS_750gx (PPC_INSNS_BASE | PPC_STRING | PPC_MFTB | \
! 4932: PPC_FLOAT | PPC_FLOAT_FSEL | PPC_FLOAT_FRES | \
! 4933: PPC_FLOAT_FRSQRTE | PPC_FLOAT_STFIWX | \
! 4934: PPC_CACHE | PPC_CACHE_ICBI | PPC_CACHE_DCBZ | \
! 4935: PPC_MEM_SYNC | PPC_MEM_EIEIO | \
! 4936: PPC_MEM_TLBIE | PPC_MEM_TLBSYNC | \
! 4937: PPC_SEGMENT | PPC_EXTERN)
! 4938: #define POWERPC_MSRM_750gx (0x000000000005FF77ULL)
! 4939: #define POWERPC_MMU_750gx (POWERPC_MMU_32B)
! 4940: #define POWERPC_EXCP_750gx (POWERPC_EXCP_7x0)
! 4941: #define POWERPC_INPUT_750gx (PPC_FLAGS_INPUT_6xx)
! 4942: #define POWERPC_BFDM_750gx (bfd_mach_ppc_750)
! 4943: #define POWERPC_FLAG_750gx (POWERPC_FLAG_SE | POWERPC_FLAG_BE | \
! 4944: POWERPC_FLAG_PMM | POWERPC_FLAG_BUS_CLK)
! 4945: #define check_pow_750gx check_pow_hid0
! 4946:
! 4947: static void init_proc_750gx (CPUPPCState *env)
! 4948: {
! 4949: gen_spr_ne_601(env);
! 4950: gen_spr_7xx(env);
! 4951: /* XXX : not implemented (XXX: different from 750fx) */
! 4952: spr_register(env, SPR_L2CR, "L2CR",
! 4953: SPR_NOACCESS, SPR_NOACCESS,
! 4954: &spr_read_generic, &spr_write_generic,
! 4955: 0x00000000);
! 4956: /* Time base */
! 4957: gen_tbl(env);
! 4958: /* Thermal management */
! 4959: gen_spr_thrm(env);
! 4960: /* XXX : not implemented */
! 4961: spr_register(env, SPR_750_THRM4, "THRM4",
! 4962: SPR_NOACCESS, SPR_NOACCESS,
! 4963: &spr_read_generic, &spr_write_generic,
! 4964: 0x00000000);
! 4965: /* Hardware implementation registers */
! 4966: /* XXX : not implemented (XXX: different from 750fx) */
! 4967: spr_register(env, SPR_HID0, "HID0",
! 4968: SPR_NOACCESS, SPR_NOACCESS,
! 4969: &spr_read_generic, &spr_write_generic,
! 4970: 0x00000000);
! 4971: /* XXX : not implemented */
! 4972: spr_register(env, SPR_HID1, "HID1",
! 4973: SPR_NOACCESS, SPR_NOACCESS,
! 4974: &spr_read_generic, &spr_write_generic,
! 4975: 0x00000000);
! 4976: /* XXX : not implemented (XXX: different from 750fx) */
! 4977: spr_register(env, SPR_750FX_HID2, "HID2",
! 4978: SPR_NOACCESS, SPR_NOACCESS,
! 4979: &spr_read_generic, &spr_write_generic,
! 4980: 0x00000000);
! 4981: /* Memory management */
! 4982: gen_low_BATs(env);
! 4983: /* PowerPC 750fx & 750gx has 8 DBATs and 8 IBATs */
! 4984: gen_high_BATs(env);
! 4985: init_excp_7x0(env);
! 4986: env->dcache_line_size = 32;
! 4987: env->icache_line_size = 32;
! 4988: /* Allocate hardware IRQ controller */
! 4989: ppc6xx_irq_init(env);
! 4990: }
! 4991:
! 4992: /* PowerPC 745 */
! 4993: #define POWERPC_INSNS_745 (PPC_INSNS_BASE | PPC_STRING | PPC_MFTB | \
! 4994: PPC_FLOAT | PPC_FLOAT_FSEL | PPC_FLOAT_FRES | \
! 4995: PPC_FLOAT_FRSQRTE | PPC_FLOAT_STFIWX | \
! 4996: PPC_CACHE | PPC_CACHE_ICBI | PPC_CACHE_DCBZ | \
! 4997: PPC_MEM_SYNC | PPC_MEM_EIEIO | \
! 4998: PPC_MEM_TLBIE | PPC_MEM_TLBSYNC | PPC_6xx_TLB | \
! 4999: PPC_SEGMENT | PPC_EXTERN)
! 5000: #define POWERPC_MSRM_745 (0x000000000005FF77ULL)
! 5001: #define POWERPC_MMU_745 (POWERPC_MMU_SOFT_6xx)
! 5002: #define POWERPC_EXCP_745 (POWERPC_EXCP_7x5)
! 5003: #define POWERPC_INPUT_745 (PPC_FLAGS_INPUT_6xx)
! 5004: #define POWERPC_BFDM_745 (bfd_mach_ppc_750)
! 5005: #define POWERPC_FLAG_745 (POWERPC_FLAG_SE | POWERPC_FLAG_BE | \
! 5006: POWERPC_FLAG_PMM | POWERPC_FLAG_BUS_CLK)
! 5007: #define check_pow_745 check_pow_hid0
! 5008:
! 5009: static void init_proc_745 (CPUPPCState *env)
! 5010: {
! 5011: gen_spr_ne_601(env);
! 5012: gen_spr_7xx(env);
! 5013: gen_spr_G2_755(env);
! 5014: /* Time base */
! 5015: gen_tbl(env);
! 5016: /* Thermal management */
! 5017: gen_spr_thrm(env);
! 5018: /* Hardware implementation registers */
! 5019: /* XXX : not implemented */
! 5020: spr_register(env, SPR_HID0, "HID0",
! 5021: SPR_NOACCESS, SPR_NOACCESS,
! 5022: &spr_read_generic, &spr_write_generic,
! 5023: 0x00000000);
! 5024: /* XXX : not implemented */
! 5025: spr_register(env, SPR_HID1, "HID1",
! 5026: SPR_NOACCESS, SPR_NOACCESS,
! 5027: &spr_read_generic, &spr_write_generic,
! 5028: 0x00000000);
! 5029: /* XXX : not implemented */
! 5030: spr_register(env, SPR_HID2, "HID2",
! 5031: SPR_NOACCESS, SPR_NOACCESS,
! 5032: &spr_read_generic, &spr_write_generic,
! 5033: 0x00000000);
! 5034: /* Memory management */
! 5035: gen_low_BATs(env);
! 5036: gen_high_BATs(env);
! 5037: gen_6xx_7xx_soft_tlb(env, 64, 2);
! 5038: init_excp_7x5(env);
! 5039: env->dcache_line_size = 32;
! 5040: env->icache_line_size = 32;
! 5041: /* Allocate hardware IRQ controller */
! 5042: ppc6xx_irq_init(env);
! 5043: }
! 5044:
! 5045: /* PowerPC 755 */
! 5046: #define POWERPC_INSNS_755 (PPC_INSNS_BASE | PPC_STRING | PPC_MFTB | \
! 5047: PPC_FLOAT | PPC_FLOAT_FSEL | PPC_FLOAT_FRES | \
! 5048: PPC_FLOAT_FRSQRTE | PPC_FLOAT_STFIWX | \
! 5049: PPC_CACHE | PPC_CACHE_ICBI | PPC_CACHE_DCBZ | \
! 5050: PPC_MEM_SYNC | PPC_MEM_EIEIO | \
! 5051: PPC_MEM_TLBIE | PPC_MEM_TLBSYNC | PPC_6xx_TLB | \
! 5052: PPC_SEGMENT | PPC_EXTERN)
! 5053: #define POWERPC_MSRM_755 (0x000000000005FF77ULL)
! 5054: #define POWERPC_MMU_755 (POWERPC_MMU_SOFT_6xx)
! 5055: #define POWERPC_EXCP_755 (POWERPC_EXCP_7x5)
! 5056: #define POWERPC_INPUT_755 (PPC_FLAGS_INPUT_6xx)
! 5057: #define POWERPC_BFDM_755 (bfd_mach_ppc_750)
! 5058: #define POWERPC_FLAG_755 (POWERPC_FLAG_SE | POWERPC_FLAG_BE | \
! 5059: POWERPC_FLAG_PMM | POWERPC_FLAG_BUS_CLK)
! 5060: #define check_pow_755 check_pow_hid0
! 5061:
! 5062: static void init_proc_755 (CPUPPCState *env)
! 5063: {
! 5064: gen_spr_ne_601(env);
! 5065: gen_spr_7xx(env);
! 5066: gen_spr_G2_755(env);
! 5067: /* Time base */
! 5068: gen_tbl(env);
! 5069: /* L2 cache control */
! 5070: /* XXX : not implemented */
! 5071: spr_register(env, SPR_L2CR, "L2CR",
! 5072: SPR_NOACCESS, SPR_NOACCESS,
! 5073: &spr_read_generic, &spr_write_generic,
! 5074: 0x00000000);
! 5075: /* XXX : not implemented */
! 5076: spr_register(env, SPR_L2PMCR, "L2PMCR",
! 5077: SPR_NOACCESS, SPR_NOACCESS,
! 5078: &spr_read_generic, &spr_write_generic,
! 5079: 0x00000000);
! 5080: /* Thermal management */
! 5081: gen_spr_thrm(env);
! 5082: /* Hardware implementation registers */
! 5083: /* XXX : not implemented */
! 5084: spr_register(env, SPR_HID0, "HID0",
! 5085: SPR_NOACCESS, SPR_NOACCESS,
! 5086: &spr_read_generic, &spr_write_generic,
! 5087: 0x00000000);
! 5088: /* XXX : not implemented */
! 5089: spr_register(env, SPR_HID1, "HID1",
! 5090: SPR_NOACCESS, SPR_NOACCESS,
! 5091: &spr_read_generic, &spr_write_generic,
! 5092: 0x00000000);
! 5093: /* XXX : not implemented */
! 5094: spr_register(env, SPR_HID2, "HID2",
! 5095: SPR_NOACCESS, SPR_NOACCESS,
! 5096: &spr_read_generic, &spr_write_generic,
! 5097: 0x00000000);
! 5098: /* Memory management */
! 5099: gen_low_BATs(env);
! 5100: gen_high_BATs(env);
! 5101: gen_6xx_7xx_soft_tlb(env, 64, 2);
! 5102: init_excp_7x5(env);
! 5103: env->dcache_line_size = 32;
! 5104: env->icache_line_size = 32;
! 5105: /* Allocate hardware IRQ controller */
! 5106: ppc6xx_irq_init(env);
! 5107: }
! 5108:
! 5109: /* PowerPC 7400 (aka G4) */
! 5110: #define POWERPC_INSNS_7400 (PPC_INSNS_BASE | PPC_STRING | PPC_MFTB | \
! 5111: PPC_FLOAT | PPC_FLOAT_FSEL | PPC_FLOAT_FRES | \
! 5112: PPC_FLOAT_FSQRT | PPC_FLOAT_FRSQRTE | \
! 5113: PPC_FLOAT_STFIWX | \
! 5114: PPC_CACHE | PPC_CACHE_ICBI | \
! 5115: PPC_CACHE_DCBA | PPC_CACHE_DCBZ | \
! 5116: PPC_MEM_SYNC | PPC_MEM_EIEIO | \
! 5117: PPC_MEM_TLBIE | PPC_MEM_TLBSYNC | \
! 5118: PPC_MEM_TLBIA | \
! 5119: PPC_SEGMENT | PPC_EXTERN | \
! 5120: PPC_ALTIVEC)
! 5121: #define POWERPC_MSRM_7400 (0x000000000205FF77ULL)
! 5122: #define POWERPC_MMU_7400 (POWERPC_MMU_32B)
! 5123: #define POWERPC_EXCP_7400 (POWERPC_EXCP_74xx)
! 5124: #define POWERPC_INPUT_7400 (PPC_FLAGS_INPUT_6xx)
! 5125: #define POWERPC_BFDM_7400 (bfd_mach_ppc_7400)
! 5126: #define POWERPC_FLAG_7400 (POWERPC_FLAG_VRE | POWERPC_FLAG_SE | \
! 5127: POWERPC_FLAG_BE | POWERPC_FLAG_PMM | \
! 5128: POWERPC_FLAG_BUS_CLK)
! 5129: #define check_pow_7400 check_pow_hid0_74xx
! 5130:
! 5131: static void init_proc_7400 (CPUPPCState *env)
! 5132: {
! 5133: gen_spr_ne_601(env);
! 5134: gen_spr_7xx(env);
! 5135: /* Time base */
! 5136: gen_tbl(env);
! 5137: /* 74xx specific SPR */
! 5138: gen_spr_74xx(env);
! 5139: /* XXX : not implemented */
! 5140: spr_register(env, SPR_UBAMR, "UBAMR",
! 5141: &spr_read_ureg, SPR_NOACCESS,
! 5142: &spr_read_ureg, SPR_NOACCESS,
! 5143: 0x00000000);
! 5144: /* XXX: this seems not implemented on all revisions. */
! 5145: /* XXX : not implemented */
! 5146: spr_register(env, SPR_MSSCR1, "MSSCR1",
! 5147: SPR_NOACCESS, SPR_NOACCESS,
! 5148: &spr_read_generic, &spr_write_generic,
! 5149: 0x00000000);
! 5150: /* Thermal management */
! 5151: gen_spr_thrm(env);
! 5152: /* Memory management */
! 5153: gen_low_BATs(env);
! 5154: init_excp_7400(env);
! 5155: env->dcache_line_size = 32;
! 5156: env->icache_line_size = 32;
! 5157: /* Allocate hardware IRQ controller */
! 5158: ppc6xx_irq_init(env);
! 5159: }
! 5160:
! 5161: /* PowerPC 7410 (aka G4) */
! 5162: #define POWERPC_INSNS_7410 (PPC_INSNS_BASE | PPC_STRING | PPC_MFTB | \
! 5163: PPC_FLOAT | PPC_FLOAT_FSEL | PPC_FLOAT_FRES | \
! 5164: PPC_FLOAT_FSQRT | PPC_FLOAT_FRSQRTE | \
! 5165: PPC_FLOAT_STFIWX | \
! 5166: PPC_CACHE | PPC_CACHE_ICBI | \
! 5167: PPC_CACHE_DCBA | PPC_CACHE_DCBZ | \
! 5168: PPC_MEM_SYNC | PPC_MEM_EIEIO | \
! 5169: PPC_MEM_TLBIE | PPC_MEM_TLBSYNC | \
! 5170: PPC_MEM_TLBIA | \
! 5171: PPC_SEGMENT | PPC_EXTERN | \
! 5172: PPC_ALTIVEC)
! 5173: #define POWERPC_MSRM_7410 (0x000000000205FF77ULL)
! 5174: #define POWERPC_MMU_7410 (POWERPC_MMU_32B)
! 5175: #define POWERPC_EXCP_7410 (POWERPC_EXCP_74xx)
! 5176: #define POWERPC_INPUT_7410 (PPC_FLAGS_INPUT_6xx)
! 5177: #define POWERPC_BFDM_7410 (bfd_mach_ppc_7400)
! 5178: #define POWERPC_FLAG_7410 (POWERPC_FLAG_VRE | POWERPC_FLAG_SE | \
! 5179: POWERPC_FLAG_BE | POWERPC_FLAG_PMM | \
! 5180: POWERPC_FLAG_BUS_CLK)
! 5181: #define check_pow_7410 check_pow_hid0_74xx
! 5182:
! 5183: static void init_proc_7410 (CPUPPCState *env)
! 5184: {
! 5185: gen_spr_ne_601(env);
! 5186: gen_spr_7xx(env);
! 5187: /* Time base */
! 5188: gen_tbl(env);
! 5189: /* 74xx specific SPR */
! 5190: gen_spr_74xx(env);
! 5191: /* XXX : not implemented */
! 5192: spr_register(env, SPR_UBAMR, "UBAMR",
! 5193: &spr_read_ureg, SPR_NOACCESS,
! 5194: &spr_read_ureg, SPR_NOACCESS,
! 5195: 0x00000000);
! 5196: /* Thermal management */
! 5197: gen_spr_thrm(env);
! 5198: /* L2PMCR */
! 5199: /* XXX : not implemented */
! 5200: spr_register(env, SPR_L2PMCR, "L2PMCR",
! 5201: SPR_NOACCESS, SPR_NOACCESS,
! 5202: &spr_read_generic, &spr_write_generic,
! 5203: 0x00000000);
! 5204: /* LDSTDB */
! 5205: /* XXX : not implemented */
! 5206: spr_register(env, SPR_LDSTDB, "LDSTDB",
! 5207: SPR_NOACCESS, SPR_NOACCESS,
! 5208: &spr_read_generic, &spr_write_generic,
! 5209: 0x00000000);
! 5210: /* Memory management */
! 5211: gen_low_BATs(env);
! 5212: init_excp_7400(env);
! 5213: env->dcache_line_size = 32;
! 5214: env->icache_line_size = 32;
! 5215: /* Allocate hardware IRQ controller */
! 5216: ppc6xx_irq_init(env);
! 5217: }
! 5218:
! 5219: /* PowerPC 7440 (aka G4) */
! 5220: #define POWERPC_INSNS_7440 (PPC_INSNS_BASE | PPC_STRING | PPC_MFTB | \
! 5221: PPC_FLOAT | PPC_FLOAT_FSEL | PPC_FLOAT_FRES | \
! 5222: PPC_FLOAT_FSQRT | PPC_FLOAT_FRSQRTE | \
! 5223: PPC_FLOAT_STFIWX | \
! 5224: PPC_CACHE | PPC_CACHE_ICBI | \
! 5225: PPC_CACHE_DCBA | PPC_CACHE_DCBZ | \
! 5226: PPC_MEM_SYNC | PPC_MEM_EIEIO | \
! 5227: PPC_MEM_TLBIE | PPC_MEM_TLBSYNC | \
! 5228: PPC_MEM_TLBIA | PPC_74xx_TLB | \
! 5229: PPC_SEGMENT | PPC_EXTERN | \
! 5230: PPC_ALTIVEC)
! 5231: #define POWERPC_MSRM_7440 (0x000000000205FF77ULL)
! 5232: #define POWERPC_MMU_7440 (POWERPC_MMU_SOFT_74xx)
! 5233: #define POWERPC_EXCP_7440 (POWERPC_EXCP_74xx)
! 5234: #define POWERPC_INPUT_7440 (PPC_FLAGS_INPUT_6xx)
! 5235: #define POWERPC_BFDM_7440 (bfd_mach_ppc_7400)
! 5236: #define POWERPC_FLAG_7440 (POWERPC_FLAG_VRE | POWERPC_FLAG_SE | \
! 5237: POWERPC_FLAG_BE | POWERPC_FLAG_PMM | \
! 5238: POWERPC_FLAG_BUS_CLK)
! 5239: #define check_pow_7440 check_pow_hid0_74xx
! 5240:
! 5241: __attribute__ (( unused ))
! 5242: static void init_proc_7440 (CPUPPCState *env)
! 5243: {
! 5244: gen_spr_ne_601(env);
! 5245: gen_spr_7xx(env);
! 5246: /* Time base */
! 5247: gen_tbl(env);
! 5248: /* 74xx specific SPR */
! 5249: gen_spr_74xx(env);
! 5250: /* XXX : not implemented */
! 5251: spr_register(env, SPR_UBAMR, "UBAMR",
! 5252: &spr_read_ureg, SPR_NOACCESS,
! 5253: &spr_read_ureg, SPR_NOACCESS,
! 5254: 0x00000000);
! 5255: /* LDSTCR */
! 5256: /* XXX : not implemented */
! 5257: spr_register(env, SPR_LDSTCR, "LDSTCR",
! 5258: SPR_NOACCESS, SPR_NOACCESS,
! 5259: &spr_read_generic, &spr_write_generic,
! 5260: 0x00000000);
! 5261: /* ICTRL */
! 5262: /* XXX : not implemented */
! 5263: spr_register(env, SPR_ICTRL, "ICTRL",
! 5264: SPR_NOACCESS, SPR_NOACCESS,
! 5265: &spr_read_generic, &spr_write_generic,
! 5266: 0x00000000);
! 5267: /* MSSSR0 */
! 5268: /* XXX : not implemented */
! 5269: spr_register(env, SPR_MSSSR0, "MSSSR0",
! 5270: SPR_NOACCESS, SPR_NOACCESS,
! 5271: &spr_read_generic, &spr_write_generic,
! 5272: 0x00000000);
! 5273: /* PMC */
! 5274: /* XXX : not implemented */
! 5275: spr_register(env, SPR_PMC5, "PMC5",
! 5276: SPR_NOACCESS, SPR_NOACCESS,
! 5277: &spr_read_generic, &spr_write_generic,
! 5278: 0x00000000);
! 5279: /* XXX : not implemented */
! 5280: spr_register(env, SPR_UPMC5, "UPMC5",
! 5281: &spr_read_ureg, SPR_NOACCESS,
! 5282: &spr_read_ureg, SPR_NOACCESS,
! 5283: 0x00000000);
! 5284: /* XXX : not implemented */
! 5285: spr_register(env, SPR_PMC6, "PMC6",
! 5286: SPR_NOACCESS, SPR_NOACCESS,
! 5287: &spr_read_generic, &spr_write_generic,
! 5288: 0x00000000);
! 5289: /* XXX : not implemented */
! 5290: spr_register(env, SPR_UPMC6, "UPMC6",
! 5291: &spr_read_ureg, SPR_NOACCESS,
! 5292: &spr_read_ureg, SPR_NOACCESS,
! 5293: 0x00000000);
! 5294: /* Memory management */
! 5295: gen_low_BATs(env);
! 5296: gen_74xx_soft_tlb(env, 128, 2);
! 5297: init_excp_7450(env);
! 5298: env->dcache_line_size = 32;
! 5299: env->icache_line_size = 32;
! 5300: /* Allocate hardware IRQ controller */
! 5301: ppc6xx_irq_init(env);
! 5302: }
! 5303:
! 5304: /* PowerPC 7450 (aka G4) */
! 5305: #define POWERPC_INSNS_7450 (PPC_INSNS_BASE | PPC_STRING | PPC_MFTB | \
! 5306: PPC_FLOAT | PPC_FLOAT_FSEL | PPC_FLOAT_FRES | \
! 5307: PPC_FLOAT_FSQRT | PPC_FLOAT_FRSQRTE | \
! 5308: PPC_FLOAT_STFIWX | \
! 5309: PPC_CACHE | PPC_CACHE_ICBI | \
! 5310: PPC_CACHE_DCBA | PPC_CACHE_DCBZ | \
! 5311: PPC_MEM_SYNC | PPC_MEM_EIEIO | \
! 5312: PPC_MEM_TLBIE | PPC_MEM_TLBSYNC | \
! 5313: PPC_MEM_TLBIA | PPC_74xx_TLB | \
! 5314: PPC_SEGMENT | PPC_EXTERN | \
! 5315: PPC_ALTIVEC)
! 5316: #define POWERPC_MSRM_7450 (0x000000000205FF77ULL)
! 5317: #define POWERPC_MMU_7450 (POWERPC_MMU_SOFT_74xx)
! 5318: #define POWERPC_EXCP_7450 (POWERPC_EXCP_74xx)
! 5319: #define POWERPC_INPUT_7450 (PPC_FLAGS_INPUT_6xx)
! 5320: #define POWERPC_BFDM_7450 (bfd_mach_ppc_7400)
! 5321: #define POWERPC_FLAG_7450 (POWERPC_FLAG_VRE | POWERPC_FLAG_SE | \
! 5322: POWERPC_FLAG_BE | POWERPC_FLAG_PMM | \
! 5323: POWERPC_FLAG_BUS_CLK)
! 5324: #define check_pow_7450 check_pow_hid0_74xx
! 5325:
! 5326: __attribute__ (( unused ))
! 5327: static void init_proc_7450 (CPUPPCState *env)
! 5328: {
! 5329: gen_spr_ne_601(env);
! 5330: gen_spr_7xx(env);
! 5331: /* Time base */
! 5332: gen_tbl(env);
! 5333: /* 74xx specific SPR */
! 5334: gen_spr_74xx(env);
! 5335: /* Level 3 cache control */
! 5336: gen_l3_ctrl(env);
! 5337: /* L3ITCR1 */
! 5338: /* XXX : not implemented */
! 5339: spr_register(env, SPR_L3ITCR1, "L3ITCR1",
! 5340: SPR_NOACCESS, SPR_NOACCESS,
! 5341: &spr_read_generic, &spr_write_generic,
! 5342: 0x00000000);
! 5343: /* L3ITCR2 */
! 5344: /* XXX : not implemented */
! 5345: spr_register(env, SPR_L3ITCR2, "L3ITCR2",
! 5346: SPR_NOACCESS, SPR_NOACCESS,
! 5347: &spr_read_generic, &spr_write_generic,
! 5348: 0x00000000);
! 5349: /* L3ITCR3 */
! 5350: /* XXX : not implemented */
! 5351: spr_register(env, SPR_L3ITCR3, "L3ITCR3",
! 5352: SPR_NOACCESS, SPR_NOACCESS,
! 5353: &spr_read_generic, &spr_write_generic,
! 5354: 0x00000000);
! 5355: /* L3OHCR */
! 5356: /* XXX : not implemented */
! 5357: spr_register(env, SPR_L3OHCR, "L3OHCR",
! 5358: SPR_NOACCESS, SPR_NOACCESS,
! 5359: &spr_read_generic, &spr_write_generic,
! 5360: 0x00000000);
! 5361: /* XXX : not implemented */
! 5362: spr_register(env, SPR_UBAMR, "UBAMR",
! 5363: &spr_read_ureg, SPR_NOACCESS,
! 5364: &spr_read_ureg, SPR_NOACCESS,
! 5365: 0x00000000);
! 5366: /* LDSTCR */
! 5367: /* XXX : not implemented */
! 5368: spr_register(env, SPR_LDSTCR, "LDSTCR",
! 5369: SPR_NOACCESS, SPR_NOACCESS,
! 5370: &spr_read_generic, &spr_write_generic,
! 5371: 0x00000000);
! 5372: /* ICTRL */
! 5373: /* XXX : not implemented */
! 5374: spr_register(env, SPR_ICTRL, "ICTRL",
! 5375: SPR_NOACCESS, SPR_NOACCESS,
! 5376: &spr_read_generic, &spr_write_generic,
! 5377: 0x00000000);
! 5378: /* MSSSR0 */
! 5379: /* XXX : not implemented */
! 5380: spr_register(env, SPR_MSSSR0, "MSSSR0",
! 5381: SPR_NOACCESS, SPR_NOACCESS,
! 5382: &spr_read_generic, &spr_write_generic,
! 5383: 0x00000000);
! 5384: /* PMC */
! 5385: /* XXX : not implemented */
! 5386: spr_register(env, SPR_PMC5, "PMC5",
! 5387: SPR_NOACCESS, SPR_NOACCESS,
! 5388: &spr_read_generic, &spr_write_generic,
! 5389: 0x00000000);
! 5390: /* XXX : not implemented */
! 5391: spr_register(env, SPR_UPMC5, "UPMC5",
! 5392: &spr_read_ureg, SPR_NOACCESS,
! 5393: &spr_read_ureg, SPR_NOACCESS,
! 5394: 0x00000000);
! 5395: /* XXX : not implemented */
! 5396: spr_register(env, SPR_PMC6, "PMC6",
! 5397: SPR_NOACCESS, SPR_NOACCESS,
! 5398: &spr_read_generic, &spr_write_generic,
! 5399: 0x00000000);
! 5400: /* XXX : not implemented */
! 5401: spr_register(env, SPR_UPMC6, "UPMC6",
! 5402: &spr_read_ureg, SPR_NOACCESS,
! 5403: &spr_read_ureg, SPR_NOACCESS,
! 5404: 0x00000000);
! 5405: /* Memory management */
! 5406: gen_low_BATs(env);
! 5407: gen_74xx_soft_tlb(env, 128, 2);
! 5408: init_excp_7450(env);
! 5409: env->dcache_line_size = 32;
! 5410: env->icache_line_size = 32;
! 5411: /* Allocate hardware IRQ controller */
! 5412: ppc6xx_irq_init(env);
! 5413: }
! 5414:
! 5415: /* PowerPC 7445 (aka G4) */
! 5416: #define POWERPC_INSNS_7445 (PPC_INSNS_BASE | PPC_STRING | PPC_MFTB | \
! 5417: PPC_FLOAT | PPC_FLOAT_FSEL | PPC_FLOAT_FRES | \
! 5418: PPC_FLOAT_FSQRT | PPC_FLOAT_FRSQRTE | \
! 5419: PPC_FLOAT_STFIWX | \
! 5420: PPC_CACHE | PPC_CACHE_ICBI | \
! 5421: PPC_CACHE_DCBA | PPC_CACHE_DCBZ | \
! 5422: PPC_MEM_SYNC | PPC_MEM_EIEIO | \
! 5423: PPC_MEM_TLBIE | PPC_MEM_TLBSYNC | \
! 5424: PPC_MEM_TLBIA | PPC_74xx_TLB | \
! 5425: PPC_SEGMENT | PPC_EXTERN | \
! 5426: PPC_ALTIVEC)
! 5427: #define POWERPC_MSRM_7445 (0x000000000205FF77ULL)
! 5428: #define POWERPC_MMU_7445 (POWERPC_MMU_SOFT_74xx)
! 5429: #define POWERPC_EXCP_7445 (POWERPC_EXCP_74xx)
! 5430: #define POWERPC_INPUT_7445 (PPC_FLAGS_INPUT_6xx)
! 5431: #define POWERPC_BFDM_7445 (bfd_mach_ppc_7400)
! 5432: #define POWERPC_FLAG_7445 (POWERPC_FLAG_VRE | POWERPC_FLAG_SE | \
! 5433: POWERPC_FLAG_BE | POWERPC_FLAG_PMM | \
! 5434: POWERPC_FLAG_BUS_CLK)
! 5435: #define check_pow_7445 check_pow_hid0_74xx
! 5436:
! 5437: __attribute__ (( unused ))
! 5438: static void init_proc_7445 (CPUPPCState *env)
! 5439: {
! 5440: gen_spr_ne_601(env);
! 5441: gen_spr_7xx(env);
! 5442: /* Time base */
! 5443: gen_tbl(env);
! 5444: /* 74xx specific SPR */
! 5445: gen_spr_74xx(env);
! 5446: /* LDSTCR */
! 5447: /* XXX : not implemented */
! 5448: spr_register(env, SPR_LDSTCR, "LDSTCR",
! 5449: SPR_NOACCESS, SPR_NOACCESS,
! 5450: &spr_read_generic, &spr_write_generic,
! 5451: 0x00000000);
! 5452: /* ICTRL */
! 5453: /* XXX : not implemented */
! 5454: spr_register(env, SPR_ICTRL, "ICTRL",
! 5455: SPR_NOACCESS, SPR_NOACCESS,
! 5456: &spr_read_generic, &spr_write_generic,
! 5457: 0x00000000);
! 5458: /* MSSSR0 */
! 5459: /* XXX : not implemented */
! 5460: spr_register(env, SPR_MSSSR0, "MSSSR0",
! 5461: SPR_NOACCESS, SPR_NOACCESS,
! 5462: &spr_read_generic, &spr_write_generic,
! 5463: 0x00000000);
! 5464: /* PMC */
! 5465: /* XXX : not implemented */
! 5466: spr_register(env, SPR_PMC5, "PMC5",
! 5467: SPR_NOACCESS, SPR_NOACCESS,
! 5468: &spr_read_generic, &spr_write_generic,
! 5469: 0x00000000);
! 5470: /* XXX : not implemented */
! 5471: spr_register(env, SPR_UPMC5, "UPMC5",
! 5472: &spr_read_ureg, SPR_NOACCESS,
! 5473: &spr_read_ureg, SPR_NOACCESS,
! 5474: 0x00000000);
! 5475: /* XXX : not implemented */
! 5476: spr_register(env, SPR_PMC6, "PMC6",
! 5477: SPR_NOACCESS, SPR_NOACCESS,
! 5478: &spr_read_generic, &spr_write_generic,
! 5479: 0x00000000);
! 5480: /* XXX : not implemented */
! 5481: spr_register(env, SPR_UPMC6, "UPMC6",
! 5482: &spr_read_ureg, SPR_NOACCESS,
! 5483: &spr_read_ureg, SPR_NOACCESS,
! 5484: 0x00000000);
! 5485: /* SPRGs */
! 5486: spr_register(env, SPR_SPRG4, "SPRG4",
! 5487: SPR_NOACCESS, SPR_NOACCESS,
! 5488: &spr_read_generic, &spr_write_generic,
! 5489: 0x00000000);
! 5490: spr_register(env, SPR_USPRG4, "USPRG4",
! 5491: &spr_read_ureg, SPR_NOACCESS,
! 5492: &spr_read_ureg, SPR_NOACCESS,
! 5493: 0x00000000);
! 5494: spr_register(env, SPR_SPRG5, "SPRG5",
! 5495: SPR_NOACCESS, SPR_NOACCESS,
! 5496: &spr_read_generic, &spr_write_generic,
! 5497: 0x00000000);
! 5498: spr_register(env, SPR_USPRG5, "USPRG5",
! 5499: &spr_read_ureg, SPR_NOACCESS,
! 5500: &spr_read_ureg, SPR_NOACCESS,
! 5501: 0x00000000);
! 5502: spr_register(env, SPR_SPRG6, "SPRG6",
! 5503: SPR_NOACCESS, SPR_NOACCESS,
! 5504: &spr_read_generic, &spr_write_generic,
! 5505: 0x00000000);
! 5506: spr_register(env, SPR_USPRG6, "USPRG6",
! 5507: &spr_read_ureg, SPR_NOACCESS,
! 5508: &spr_read_ureg, SPR_NOACCESS,
! 5509: 0x00000000);
! 5510: spr_register(env, SPR_SPRG7, "SPRG7",
! 5511: SPR_NOACCESS, SPR_NOACCESS,
! 5512: &spr_read_generic, &spr_write_generic,
! 5513: 0x00000000);
! 5514: spr_register(env, SPR_USPRG7, "USPRG7",
! 5515: &spr_read_ureg, SPR_NOACCESS,
! 5516: &spr_read_ureg, SPR_NOACCESS,
! 5517: 0x00000000);
! 5518: /* Memory management */
! 5519: gen_low_BATs(env);
! 5520: gen_high_BATs(env);
! 5521: gen_74xx_soft_tlb(env, 128, 2);
! 5522: init_excp_7450(env);
! 5523: env->dcache_line_size = 32;
! 5524: env->icache_line_size = 32;
! 5525: /* Allocate hardware IRQ controller */
! 5526: ppc6xx_irq_init(env);
! 5527: }
! 5528:
! 5529: /* PowerPC 7455 (aka G4) */
! 5530: #define POWERPC_INSNS_7455 (PPC_INSNS_BASE | PPC_STRING | PPC_MFTB | \
! 5531: PPC_FLOAT | PPC_FLOAT_FSEL | PPC_FLOAT_FRES | \
! 5532: PPC_FLOAT_FSQRT | PPC_FLOAT_FRSQRTE | \
! 5533: PPC_FLOAT_STFIWX | \
! 5534: PPC_CACHE | PPC_CACHE_ICBI | \
! 5535: PPC_CACHE_DCBA | PPC_CACHE_DCBZ | \
! 5536: PPC_MEM_SYNC | PPC_MEM_EIEIO | \
! 5537: PPC_MEM_TLBIE | PPC_MEM_TLBSYNC | \
! 5538: PPC_MEM_TLBIA | PPC_74xx_TLB | \
! 5539: PPC_SEGMENT | PPC_EXTERN | \
! 5540: PPC_ALTIVEC)
! 5541: #define POWERPC_MSRM_7455 (0x000000000205FF77ULL)
! 5542: #define POWERPC_MMU_7455 (POWERPC_MMU_SOFT_74xx)
! 5543: #define POWERPC_EXCP_7455 (POWERPC_EXCP_74xx)
! 5544: #define POWERPC_INPUT_7455 (PPC_FLAGS_INPUT_6xx)
! 5545: #define POWERPC_BFDM_7455 (bfd_mach_ppc_7400)
! 5546: #define POWERPC_FLAG_7455 (POWERPC_FLAG_VRE | POWERPC_FLAG_SE | \
! 5547: POWERPC_FLAG_BE | POWERPC_FLAG_PMM | \
! 5548: POWERPC_FLAG_BUS_CLK)
! 5549: #define check_pow_7455 check_pow_hid0_74xx
! 5550:
! 5551: __attribute__ (( unused ))
! 5552: static void init_proc_7455 (CPUPPCState *env)
! 5553: {
! 5554: gen_spr_ne_601(env);
! 5555: gen_spr_7xx(env);
! 5556: /* Time base */
! 5557: gen_tbl(env);
! 5558: /* 74xx specific SPR */
! 5559: gen_spr_74xx(env);
! 5560: /* Level 3 cache control */
! 5561: gen_l3_ctrl(env);
! 5562: /* LDSTCR */
! 5563: /* XXX : not implemented */
! 5564: spr_register(env, SPR_LDSTCR, "LDSTCR",
! 5565: SPR_NOACCESS, SPR_NOACCESS,
! 5566: &spr_read_generic, &spr_write_generic,
! 5567: 0x00000000);
! 5568: /* ICTRL */
! 5569: /* XXX : not implemented */
! 5570: spr_register(env, SPR_ICTRL, "ICTRL",
! 5571: SPR_NOACCESS, SPR_NOACCESS,
! 5572: &spr_read_generic, &spr_write_generic,
! 5573: 0x00000000);
! 5574: /* MSSSR0 */
! 5575: /* XXX : not implemented */
! 5576: spr_register(env, SPR_MSSSR0, "MSSSR0",
! 5577: SPR_NOACCESS, SPR_NOACCESS,
! 5578: &spr_read_generic, &spr_write_generic,
! 5579: 0x00000000);
! 5580: /* PMC */
! 5581: /* XXX : not implemented */
! 5582: spr_register(env, SPR_PMC5, "PMC5",
! 5583: SPR_NOACCESS, SPR_NOACCESS,
! 5584: &spr_read_generic, &spr_write_generic,
! 5585: 0x00000000);
! 5586: /* XXX : not implemented */
! 5587: spr_register(env, SPR_UPMC5, "UPMC5",
! 5588: &spr_read_ureg, SPR_NOACCESS,
! 5589: &spr_read_ureg, SPR_NOACCESS,
! 5590: 0x00000000);
! 5591: /* XXX : not implemented */
! 5592: spr_register(env, SPR_PMC6, "PMC6",
! 5593: SPR_NOACCESS, SPR_NOACCESS,
! 5594: &spr_read_generic, &spr_write_generic,
! 5595: 0x00000000);
! 5596: /* XXX : not implemented */
! 5597: spr_register(env, SPR_UPMC6, "UPMC6",
! 5598: &spr_read_ureg, SPR_NOACCESS,
! 5599: &spr_read_ureg, SPR_NOACCESS,
! 5600: 0x00000000);
! 5601: /* SPRGs */
! 5602: spr_register(env, SPR_SPRG4, "SPRG4",
! 5603: SPR_NOACCESS, SPR_NOACCESS,
! 5604: &spr_read_generic, &spr_write_generic,
! 5605: 0x00000000);
! 5606: spr_register(env, SPR_USPRG4, "USPRG4",
! 5607: &spr_read_ureg, SPR_NOACCESS,
! 5608: &spr_read_ureg, SPR_NOACCESS,
! 5609: 0x00000000);
! 5610: spr_register(env, SPR_SPRG5, "SPRG5",
! 5611: SPR_NOACCESS, SPR_NOACCESS,
! 5612: &spr_read_generic, &spr_write_generic,
! 5613: 0x00000000);
! 5614: spr_register(env, SPR_USPRG5, "USPRG5",
! 5615: &spr_read_ureg, SPR_NOACCESS,
! 5616: &spr_read_ureg, SPR_NOACCESS,
! 5617: 0x00000000);
! 5618: spr_register(env, SPR_SPRG6, "SPRG6",
! 5619: SPR_NOACCESS, SPR_NOACCESS,
! 5620: &spr_read_generic, &spr_write_generic,
! 5621: 0x00000000);
! 5622: spr_register(env, SPR_USPRG6, "USPRG6",
! 5623: &spr_read_ureg, SPR_NOACCESS,
! 5624: &spr_read_ureg, SPR_NOACCESS,
! 5625: 0x00000000);
! 5626: spr_register(env, SPR_SPRG7, "SPRG7",
! 5627: SPR_NOACCESS, SPR_NOACCESS,
! 5628: &spr_read_generic, &spr_write_generic,
! 5629: 0x00000000);
! 5630: spr_register(env, SPR_USPRG7, "USPRG7",
! 5631: &spr_read_ureg, SPR_NOACCESS,
! 5632: &spr_read_ureg, SPR_NOACCESS,
! 5633: 0x00000000);
! 5634: /* Memory management */
! 5635: gen_low_BATs(env);
! 5636: gen_high_BATs(env);
! 5637: gen_74xx_soft_tlb(env, 128, 2);
! 5638: init_excp_7450(env);
! 5639: env->dcache_line_size = 32;
! 5640: env->icache_line_size = 32;
! 5641: /* Allocate hardware IRQ controller */
! 5642: ppc6xx_irq_init(env);
! 5643: }
! 5644:
! 5645: /* PowerPC 7457 (aka G4) */
! 5646: #define POWERPC_INSNS_7457 (PPC_INSNS_BASE | PPC_STRING | PPC_MFTB | \
! 5647: PPC_FLOAT | PPC_FLOAT_FSEL | PPC_FLOAT_FRES | \
! 5648: PPC_FLOAT_FSQRT | PPC_FLOAT_FRSQRTE | \
! 5649: PPC_FLOAT_STFIWX | \
! 5650: PPC_CACHE | PPC_CACHE_ICBI | \
! 5651: PPC_CACHE_DCBA | PPC_CACHE_DCBZ | \
! 5652: PPC_MEM_SYNC | PPC_MEM_EIEIO | \
! 5653: PPC_MEM_TLBIE | PPC_MEM_TLBSYNC | \
! 5654: PPC_MEM_TLBIA | PPC_74xx_TLB | \
! 5655: PPC_SEGMENT | PPC_EXTERN | \
! 5656: PPC_ALTIVEC)
! 5657: #define POWERPC_MSRM_7457 (0x000000000205FF77ULL)
! 5658: #define POWERPC_MMU_7457 (POWERPC_MMU_SOFT_74xx)
! 5659: #define POWERPC_EXCP_7457 (POWERPC_EXCP_74xx)
! 5660: #define POWERPC_INPUT_7457 (PPC_FLAGS_INPUT_6xx)
! 5661: #define POWERPC_BFDM_7457 (bfd_mach_ppc_7400)
! 5662: #define POWERPC_FLAG_7457 (POWERPC_FLAG_VRE | POWERPC_FLAG_SE | \
! 5663: POWERPC_FLAG_BE | POWERPC_FLAG_PMM | \
! 5664: POWERPC_FLAG_BUS_CLK)
! 5665: #define check_pow_7457 check_pow_hid0_74xx
! 5666:
! 5667: __attribute__ (( unused ))
! 5668: static void init_proc_7457 (CPUPPCState *env)
! 5669: {
! 5670: gen_spr_ne_601(env);
! 5671: gen_spr_7xx(env);
! 5672: /* Time base */
! 5673: gen_tbl(env);
! 5674: /* 74xx specific SPR */
! 5675: gen_spr_74xx(env);
! 5676: /* Level 3 cache control */
! 5677: gen_l3_ctrl(env);
! 5678: /* L3ITCR1 */
! 5679: /* XXX : not implemented */
! 5680: spr_register(env, SPR_L3ITCR1, "L3ITCR1",
! 5681: SPR_NOACCESS, SPR_NOACCESS,
! 5682: &spr_read_generic, &spr_write_generic,
! 5683: 0x00000000);
! 5684: /* L3ITCR2 */
! 5685: /* XXX : not implemented */
! 5686: spr_register(env, SPR_L3ITCR2, "L3ITCR2",
! 5687: SPR_NOACCESS, SPR_NOACCESS,
! 5688: &spr_read_generic, &spr_write_generic,
! 5689: 0x00000000);
! 5690: /* L3ITCR3 */
! 5691: /* XXX : not implemented */
! 5692: spr_register(env, SPR_L3ITCR3, "L3ITCR3",
! 5693: SPR_NOACCESS, SPR_NOACCESS,
! 5694: &spr_read_generic, &spr_write_generic,
! 5695: 0x00000000);
! 5696: /* L3OHCR */
! 5697: /* XXX : not implemented */
! 5698: spr_register(env, SPR_L3OHCR, "L3OHCR",
! 5699: SPR_NOACCESS, SPR_NOACCESS,
! 5700: &spr_read_generic, &spr_write_generic,
! 5701: 0x00000000);
! 5702: /* LDSTCR */
! 5703: /* XXX : not implemented */
! 5704: spr_register(env, SPR_LDSTCR, "LDSTCR",
! 5705: SPR_NOACCESS, SPR_NOACCESS,
! 5706: &spr_read_generic, &spr_write_generic,
! 5707: 0x00000000);
! 5708: /* ICTRL */
! 5709: /* XXX : not implemented */
! 5710: spr_register(env, SPR_ICTRL, "ICTRL",
! 5711: SPR_NOACCESS, SPR_NOACCESS,
! 5712: &spr_read_generic, &spr_write_generic,
! 5713: 0x00000000);
! 5714: /* MSSSR0 */
! 5715: /* XXX : not implemented */
! 5716: spr_register(env, SPR_MSSSR0, "MSSSR0",
! 5717: SPR_NOACCESS, SPR_NOACCESS,
! 5718: &spr_read_generic, &spr_write_generic,
! 5719: 0x00000000);
! 5720: /* PMC */
! 5721: /* XXX : not implemented */
! 5722: spr_register(env, SPR_PMC5, "PMC5",
! 5723: SPR_NOACCESS, SPR_NOACCESS,
! 5724: &spr_read_generic, &spr_write_generic,
! 5725: 0x00000000);
! 5726: /* XXX : not implemented */
! 5727: spr_register(env, SPR_UPMC5, "UPMC5",
! 5728: &spr_read_ureg, SPR_NOACCESS,
! 5729: &spr_read_ureg, SPR_NOACCESS,
! 5730: 0x00000000);
! 5731: /* XXX : not implemented */
! 5732: spr_register(env, SPR_PMC6, "PMC6",
! 5733: SPR_NOACCESS, SPR_NOACCESS,
! 5734: &spr_read_generic, &spr_write_generic,
! 5735: 0x00000000);
! 5736: /* XXX : not implemented */
! 5737: spr_register(env, SPR_UPMC6, "UPMC6",
! 5738: &spr_read_ureg, SPR_NOACCESS,
! 5739: &spr_read_ureg, SPR_NOACCESS,
! 5740: 0x00000000);
! 5741: /* SPRGs */
! 5742: spr_register(env, SPR_SPRG4, "SPRG4",
! 5743: SPR_NOACCESS, SPR_NOACCESS,
! 5744: &spr_read_generic, &spr_write_generic,
! 5745: 0x00000000);
! 5746: spr_register(env, SPR_USPRG4, "USPRG4",
! 5747: &spr_read_ureg, SPR_NOACCESS,
! 5748: &spr_read_ureg, SPR_NOACCESS,
! 5749: 0x00000000);
! 5750: spr_register(env, SPR_SPRG5, "SPRG5",
! 5751: SPR_NOACCESS, SPR_NOACCESS,
! 5752: &spr_read_generic, &spr_write_generic,
! 5753: 0x00000000);
! 5754: spr_register(env, SPR_USPRG5, "USPRG5",
! 5755: &spr_read_ureg, SPR_NOACCESS,
! 5756: &spr_read_ureg, SPR_NOACCESS,
! 5757: 0x00000000);
! 5758: spr_register(env, SPR_SPRG6, "SPRG6",
! 5759: SPR_NOACCESS, SPR_NOACCESS,
! 5760: &spr_read_generic, &spr_write_generic,
! 5761: 0x00000000);
! 5762: spr_register(env, SPR_USPRG6, "USPRG6",
! 5763: &spr_read_ureg, SPR_NOACCESS,
! 5764: &spr_read_ureg, SPR_NOACCESS,
! 5765: 0x00000000);
! 5766: spr_register(env, SPR_SPRG7, "SPRG7",
! 5767: SPR_NOACCESS, SPR_NOACCESS,
! 5768: &spr_read_generic, &spr_write_generic,
! 5769: 0x00000000);
! 5770: spr_register(env, SPR_USPRG7, "USPRG7",
! 5771: &spr_read_ureg, SPR_NOACCESS,
! 5772: &spr_read_ureg, SPR_NOACCESS,
! 5773: 0x00000000);
! 5774: /* Memory management */
! 5775: gen_low_BATs(env);
! 5776: gen_high_BATs(env);
! 5777: gen_74xx_soft_tlb(env, 128, 2);
! 5778: init_excp_7450(env);
! 5779: env->dcache_line_size = 32;
! 5780: env->icache_line_size = 32;
! 5781: /* Allocate hardware IRQ controller */
! 5782: ppc6xx_irq_init(env);
! 5783: }
! 5784:
! 5785: #if defined (TARGET_PPC64)
! 5786: /* PowerPC 970 */
! 5787: #define POWERPC_INSNS_970 (PPC_INSNS_BASE | PPC_STRING | PPC_MFTB | \
! 5788: PPC_FLOAT | PPC_FLOAT_FSEL | PPC_FLOAT_FRES | \
! 5789: PPC_FLOAT_FSQRT | PPC_FLOAT_FRSQRTE | \
! 5790: PPC_FLOAT_STFIWX | \
! 5791: PPC_CACHE | PPC_CACHE_ICBI | PPC_CACHE_DCBZT | \
! 5792: PPC_MEM_SYNC | PPC_MEM_EIEIO | \
! 5793: PPC_MEM_TLBIE | PPC_MEM_TLBSYNC | \
! 5794: PPC_64B | PPC_ALTIVEC | \
! 5795: PPC_SEGMENT_64B | PPC_SLBI)
! 5796: #define POWERPC_MSRM_970 (0x900000000204FF36ULL)
! 5797: #define POWERPC_MMU_970 (POWERPC_MMU_64B)
! 5798: //#define POWERPC_EXCP_970 (POWERPC_EXCP_970)
! 5799: #define POWERPC_INPUT_970 (PPC_FLAGS_INPUT_970)
! 5800: #define POWERPC_BFDM_970 (bfd_mach_ppc64)
! 5801: #define POWERPC_FLAG_970 (POWERPC_FLAG_VRE | POWERPC_FLAG_SE | \
! 5802: POWERPC_FLAG_BE | POWERPC_FLAG_PMM | \
! 5803: POWERPC_FLAG_BUS_CLK)
1.1 root 5804:
1.1.1.4 ! root 5805: #if defined(CONFIG_USER_ONLY)
! 5806: #define POWERPC970_HID5_INIT 0x00000080
! 5807: #else
! 5808: #define POWERPC970_HID5_INIT 0x00000000
! 5809: #endif
1.1 root 5810:
1.1.1.4 ! root 5811: static int check_pow_970 (CPUPPCState *env)
1.1 root 5812: {
1.1.1.4 ! root 5813: if (env->spr[SPR_HID0] & 0x00600000)
! 5814: return 1;
1.1 root 5815:
5816: return 0;
5817: }
5818:
1.1.1.4 ! root 5819: static void init_proc_970 (CPUPPCState *env)
1.1 root 5820: {
1.1.1.4 ! root 5821: gen_spr_ne_601(env);
! 5822: gen_spr_7xx(env);
! 5823: /* Time base */
! 5824: gen_tbl(env);
! 5825: /* Hardware implementation registers */
! 5826: /* XXX : not implemented */
! 5827: spr_register(env, SPR_HID0, "HID0",
! 5828: SPR_NOACCESS, SPR_NOACCESS,
! 5829: &spr_read_generic, &spr_write_clear,
! 5830: 0x60000000);
! 5831: /* XXX : not implemented */
! 5832: spr_register(env, SPR_HID1, "HID1",
! 5833: SPR_NOACCESS, SPR_NOACCESS,
! 5834: &spr_read_generic, &spr_write_generic,
! 5835: 0x00000000);
! 5836: /* XXX : not implemented */
! 5837: spr_register(env, SPR_750FX_HID2, "HID2",
! 5838: SPR_NOACCESS, SPR_NOACCESS,
! 5839: &spr_read_generic, &spr_write_generic,
! 5840: 0x00000000);
! 5841: /* XXX : not implemented */
! 5842: spr_register(env, SPR_970_HID5, "HID5",
! 5843: SPR_NOACCESS, SPR_NOACCESS,
! 5844: &spr_read_generic, &spr_write_generic,
! 5845: POWERPC970_HID5_INIT);
! 5846: /* XXX : not implemented */
! 5847: spr_register(env, SPR_L2CR, "L2CR",
! 5848: SPR_NOACCESS, SPR_NOACCESS,
! 5849: &spr_read_generic, &spr_write_generic,
! 5850: 0x00000000);
! 5851: /* Memory management */
! 5852: /* XXX: not correct */
! 5853: gen_low_BATs(env);
! 5854: /* XXX : not implemented */
! 5855: spr_register(env, SPR_MMUCFG, "MMUCFG",
! 5856: SPR_NOACCESS, SPR_NOACCESS,
! 5857: &spr_read_generic, SPR_NOACCESS,
! 5858: 0x00000000); /* TOFIX */
! 5859: /* XXX : not implemented */
! 5860: spr_register(env, SPR_MMUCSR0, "MMUCSR0",
! 5861: SPR_NOACCESS, SPR_NOACCESS,
! 5862: &spr_read_generic, &spr_write_generic,
! 5863: 0x00000000); /* TOFIX */
! 5864: spr_register(env, SPR_HIOR, "SPR_HIOR",
! 5865: SPR_NOACCESS, SPR_NOACCESS,
! 5866: &spr_read_generic, &spr_write_generic,
! 5867: 0xFFF00000); /* XXX: This is a hack */
! 5868: #if !defined(CONFIG_USER_ONLY)
! 5869: env->slb_nr = 32;
! 5870: #endif
! 5871: init_excp_970(env);
! 5872: env->dcache_line_size = 128;
! 5873: env->icache_line_size = 128;
! 5874: /* Allocate hardware IRQ controller */
! 5875: ppc970_irq_init(env);
! 5876: }
! 5877:
! 5878: /* PowerPC 970FX (aka G5) */
! 5879: #define POWERPC_INSNS_970FX (PPC_INSNS_BASE | PPC_STRING | PPC_MFTB | \
! 5880: PPC_FLOAT | PPC_FLOAT_FSEL | PPC_FLOAT_FRES | \
! 5881: PPC_FLOAT_FSQRT | PPC_FLOAT_FRSQRTE | \
! 5882: PPC_FLOAT_STFIWX | \
! 5883: PPC_CACHE | PPC_CACHE_ICBI | PPC_CACHE_DCBZT | \
! 5884: PPC_MEM_SYNC | PPC_MEM_EIEIO | \
! 5885: PPC_MEM_TLBIE | PPC_MEM_TLBSYNC | \
! 5886: PPC_64B | PPC_ALTIVEC | \
! 5887: PPC_SEGMENT_64B | PPC_SLBI)
! 5888: #define POWERPC_MSRM_970FX (0x800000000204FF36ULL)
! 5889: #define POWERPC_MMU_970FX (POWERPC_MMU_64B)
! 5890: #define POWERPC_EXCP_970FX (POWERPC_EXCP_970)
! 5891: #define POWERPC_INPUT_970FX (PPC_FLAGS_INPUT_970)
! 5892: #define POWERPC_BFDM_970FX (bfd_mach_ppc64)
! 5893: #define POWERPC_FLAG_970FX (POWERPC_FLAG_VRE | POWERPC_FLAG_SE | \
! 5894: POWERPC_FLAG_BE | POWERPC_FLAG_PMM | \
! 5895: POWERPC_FLAG_BUS_CLK)
1.1 root 5896:
1.1.1.4 ! root 5897: static int check_pow_970FX (CPUPPCState *env)
1.1 root 5898: {
1.1.1.4 ! root 5899: if (env->spr[SPR_HID0] & 0x00600000)
! 5900: return 1;
1.1 root 5901:
5902: return 0;
5903: }
5904:
1.1.1.4 ! root 5905: static void init_proc_970FX (CPUPPCState *env)
1.1 root 5906: {
1.1.1.4 ! root 5907: gen_spr_ne_601(env);
! 5908: gen_spr_7xx(env);
! 5909: /* Time base */
! 5910: gen_tbl(env);
! 5911: /* Hardware implementation registers */
! 5912: /* XXX : not implemented */
! 5913: spr_register(env, SPR_HID0, "HID0",
! 5914: SPR_NOACCESS, SPR_NOACCESS,
! 5915: &spr_read_generic, &spr_write_clear,
! 5916: 0x60000000);
! 5917: /* XXX : not implemented */
! 5918: spr_register(env, SPR_HID1, "HID1",
! 5919: SPR_NOACCESS, SPR_NOACCESS,
! 5920: &spr_read_generic, &spr_write_generic,
! 5921: 0x00000000);
! 5922: /* XXX : not implemented */
! 5923: spr_register(env, SPR_750FX_HID2, "HID2",
! 5924: SPR_NOACCESS, SPR_NOACCESS,
! 5925: &spr_read_generic, &spr_write_generic,
! 5926: 0x00000000);
! 5927: /* XXX : not implemented */
! 5928: spr_register(env, SPR_970_HID5, "HID5",
! 5929: SPR_NOACCESS, SPR_NOACCESS,
! 5930: &spr_read_generic, &spr_write_generic,
! 5931: POWERPC970_HID5_INIT);
! 5932: /* XXX : not implemented */
! 5933: spr_register(env, SPR_L2CR, "L2CR",
! 5934: SPR_NOACCESS, SPR_NOACCESS,
! 5935: &spr_read_generic, &spr_write_generic,
! 5936: 0x00000000);
! 5937: /* Memory management */
! 5938: /* XXX: not correct */
! 5939: gen_low_BATs(env);
! 5940: /* XXX : not implemented */
! 5941: spr_register(env, SPR_MMUCFG, "MMUCFG",
! 5942: SPR_NOACCESS, SPR_NOACCESS,
! 5943: &spr_read_generic, SPR_NOACCESS,
! 5944: 0x00000000); /* TOFIX */
! 5945: /* XXX : not implemented */
! 5946: spr_register(env, SPR_MMUCSR0, "MMUCSR0",
! 5947: SPR_NOACCESS, SPR_NOACCESS,
! 5948: &spr_read_generic, &spr_write_generic,
! 5949: 0x00000000); /* TOFIX */
! 5950: spr_register(env, SPR_HIOR, "SPR_HIOR",
! 5951: SPR_NOACCESS, SPR_NOACCESS,
! 5952: &spr_read_generic, &spr_write_generic,
! 5953: 0xFFF00000); /* XXX: This is a hack */
! 5954: #if !defined(CONFIG_USER_ONLY)
! 5955: env->slb_nr = 32;
! 5956: #endif
! 5957: init_excp_970(env);
! 5958: env->dcache_line_size = 128;
! 5959: env->icache_line_size = 128;
! 5960: /* Allocate hardware IRQ controller */
! 5961: ppc970_irq_init(env);
! 5962: }
! 5963:
! 5964: /* PowerPC 970 GX */
! 5965: #define POWERPC_INSNS_970GX (PPC_INSNS_BASE | PPC_STRING | PPC_MFTB | \
! 5966: PPC_FLOAT | PPC_FLOAT_FSEL | PPC_FLOAT_FRES | \
! 5967: PPC_FLOAT_FSQRT | PPC_FLOAT_FRSQRTE | \
! 5968: PPC_FLOAT_STFIWX | \
! 5969: PPC_CACHE | PPC_CACHE_ICBI | PPC_CACHE_DCBZT | \
! 5970: PPC_MEM_SYNC | PPC_MEM_EIEIO | \
! 5971: PPC_MEM_TLBIE | PPC_MEM_TLBSYNC | \
! 5972: PPC_64B | PPC_ALTIVEC | \
! 5973: PPC_SEGMENT_64B | PPC_SLBI)
! 5974: #define POWERPC_MSRM_970GX (0x800000000204FF36ULL)
! 5975: #define POWERPC_MMU_970GX (POWERPC_MMU_64B)
! 5976: #define POWERPC_EXCP_970GX (POWERPC_EXCP_970)
! 5977: #define POWERPC_INPUT_970GX (PPC_FLAGS_INPUT_970)
! 5978: #define POWERPC_BFDM_970GX (bfd_mach_ppc64)
! 5979: #define POWERPC_FLAG_970GX (POWERPC_FLAG_VRE | POWERPC_FLAG_SE | \
! 5980: POWERPC_FLAG_BE | POWERPC_FLAG_PMM | \
! 5981: POWERPC_FLAG_BUS_CLK)
1.1 root 5982:
1.1.1.4 ! root 5983: static int check_pow_970GX (CPUPPCState *env)
1.1 root 5984: {
1.1.1.4 ! root 5985: if (env->spr[SPR_HID0] & 0x00600000)
! 5986: return 1;
1.1 root 5987:
1.1.1.4 ! root 5988: return 0;
1.1 root 5989: }
5990:
1.1.1.4 ! root 5991: static void init_proc_970GX (CPUPPCState *env)
1.1 root 5992: {
1.1.1.4 ! root 5993: gen_spr_ne_601(env);
! 5994: gen_spr_7xx(env);
! 5995: /* Time base */
! 5996: gen_tbl(env);
! 5997: /* Hardware implementation registers */
! 5998: /* XXX : not implemented */
! 5999: spr_register(env, SPR_HID0, "HID0",
! 6000: SPR_NOACCESS, SPR_NOACCESS,
! 6001: &spr_read_generic, &spr_write_clear,
! 6002: 0x60000000);
! 6003: /* XXX : not implemented */
! 6004: spr_register(env, SPR_HID1, "HID1",
! 6005: SPR_NOACCESS, SPR_NOACCESS,
! 6006: &spr_read_generic, &spr_write_generic,
! 6007: 0x00000000);
! 6008: /* XXX : not implemented */
! 6009: spr_register(env, SPR_750FX_HID2, "HID2",
! 6010: SPR_NOACCESS, SPR_NOACCESS,
! 6011: &spr_read_generic, &spr_write_generic,
! 6012: 0x00000000);
! 6013: /* XXX : not implemented */
! 6014: spr_register(env, SPR_970_HID5, "HID5",
! 6015: SPR_NOACCESS, SPR_NOACCESS,
! 6016: &spr_read_generic, &spr_write_generic,
! 6017: POWERPC970_HID5_INIT);
! 6018: /* XXX : not implemented */
! 6019: spr_register(env, SPR_L2CR, "L2CR",
! 6020: SPR_NOACCESS, SPR_NOACCESS,
! 6021: &spr_read_generic, &spr_write_generic,
! 6022: 0x00000000);
! 6023: /* Memory management */
! 6024: /* XXX: not correct */
! 6025: gen_low_BATs(env);
! 6026: /* XXX : not implemented */
! 6027: spr_register(env, SPR_MMUCFG, "MMUCFG",
! 6028: SPR_NOACCESS, SPR_NOACCESS,
! 6029: &spr_read_generic, SPR_NOACCESS,
! 6030: 0x00000000); /* TOFIX */
! 6031: /* XXX : not implemented */
! 6032: spr_register(env, SPR_MMUCSR0, "MMUCSR0",
! 6033: SPR_NOACCESS, SPR_NOACCESS,
! 6034: &spr_read_generic, &spr_write_generic,
! 6035: 0x00000000); /* TOFIX */
! 6036: spr_register(env, SPR_HIOR, "SPR_HIOR",
! 6037: SPR_NOACCESS, SPR_NOACCESS,
! 6038: &spr_read_generic, &spr_write_generic,
! 6039: 0xFFF00000); /* XXX: This is a hack */
! 6040: #if !defined(CONFIG_USER_ONLY)
! 6041: env->slb_nr = 32;
! 6042: #endif
! 6043: init_excp_970(env);
! 6044: env->dcache_line_size = 128;
! 6045: env->icache_line_size = 128;
! 6046: /* Allocate hardware IRQ controller */
! 6047: ppc970_irq_init(env);
! 6048: }
! 6049:
! 6050: /* PowerPC 970 MP */
! 6051: #define POWERPC_INSNS_970MP (PPC_INSNS_BASE | PPC_STRING | PPC_MFTB | \
! 6052: PPC_FLOAT | PPC_FLOAT_FSEL | PPC_FLOAT_FRES | \
! 6053: PPC_FLOAT_FSQRT | PPC_FLOAT_FRSQRTE | \
! 6054: PPC_FLOAT_STFIWX | \
! 6055: PPC_CACHE | PPC_CACHE_ICBI | PPC_CACHE_DCBZT | \
! 6056: PPC_MEM_SYNC | PPC_MEM_EIEIO | \
! 6057: PPC_MEM_TLBIE | PPC_MEM_TLBSYNC | \
! 6058: PPC_64B | PPC_ALTIVEC | \
! 6059: PPC_SEGMENT_64B | PPC_SLBI)
! 6060: #define POWERPC_MSRM_970MP (0x900000000204FF36ULL)
! 6061: #define POWERPC_MMU_970MP (POWERPC_MMU_64B)
! 6062: #define POWERPC_EXCP_970MP (POWERPC_EXCP_970)
! 6063: #define POWERPC_INPUT_970MP (PPC_FLAGS_INPUT_970)
! 6064: #define POWERPC_BFDM_970MP (bfd_mach_ppc64)
! 6065: #define POWERPC_FLAG_970MP (POWERPC_FLAG_VRE | POWERPC_FLAG_SE | \
! 6066: POWERPC_FLAG_BE | POWERPC_FLAG_PMM | \
! 6067: POWERPC_FLAG_BUS_CLK)
1.1 root 6068:
1.1.1.4 ! root 6069: static int check_pow_970MP (CPUPPCState *env)
! 6070: {
! 6071: if (env->spr[SPR_HID0] & 0x01C00000)
! 6072: return 1;
! 6073:
! 6074: return 0;
! 6075: }
! 6076:
! 6077: static void init_proc_970MP (CPUPPCState *env)
! 6078: {
! 6079: gen_spr_ne_601(env);
! 6080: gen_spr_7xx(env);
! 6081: /* Time base */
! 6082: gen_tbl(env);
! 6083: /* Hardware implementation registers */
! 6084: /* XXX : not implemented */
! 6085: spr_register(env, SPR_HID0, "HID0",
! 6086: SPR_NOACCESS, SPR_NOACCESS,
! 6087: &spr_read_generic, &spr_write_clear,
! 6088: 0x60000000);
! 6089: /* XXX : not implemented */
! 6090: spr_register(env, SPR_HID1, "HID1",
! 6091: SPR_NOACCESS, SPR_NOACCESS,
! 6092: &spr_read_generic, &spr_write_generic,
! 6093: 0x00000000);
! 6094: /* XXX : not implemented */
! 6095: spr_register(env, SPR_750FX_HID2, "HID2",
! 6096: SPR_NOACCESS, SPR_NOACCESS,
! 6097: &spr_read_generic, &spr_write_generic,
! 6098: 0x00000000);
! 6099: /* XXX : not implemented */
! 6100: spr_register(env, SPR_970_HID5, "HID5",
! 6101: SPR_NOACCESS, SPR_NOACCESS,
! 6102: &spr_read_generic, &spr_write_generic,
! 6103: POWERPC970_HID5_INIT);
! 6104: /* XXX : not implemented */
! 6105: spr_register(env, SPR_L2CR, "L2CR",
! 6106: SPR_NOACCESS, SPR_NOACCESS,
! 6107: &spr_read_generic, &spr_write_generic,
! 6108: 0x00000000);
! 6109: /* Memory management */
! 6110: /* XXX: not correct */
! 6111: gen_low_BATs(env);
! 6112: /* XXX : not implemented */
! 6113: spr_register(env, SPR_MMUCFG, "MMUCFG",
! 6114: SPR_NOACCESS, SPR_NOACCESS,
! 6115: &spr_read_generic, SPR_NOACCESS,
! 6116: 0x00000000); /* TOFIX */
! 6117: /* XXX : not implemented */
! 6118: spr_register(env, SPR_MMUCSR0, "MMUCSR0",
! 6119: SPR_NOACCESS, SPR_NOACCESS,
! 6120: &spr_read_generic, &spr_write_generic,
! 6121: 0x00000000); /* TOFIX */
! 6122: spr_register(env, SPR_HIOR, "SPR_HIOR",
! 6123: SPR_NOACCESS, SPR_NOACCESS,
! 6124: &spr_read_generic, &spr_write_generic,
! 6125: 0xFFF00000); /* XXX: This is a hack */
! 6126: #if !defined(CONFIG_USER_ONLY)
! 6127: env->slb_nr = 32;
! 6128: #endif
! 6129: init_excp_970(env);
! 6130: env->dcache_line_size = 128;
! 6131: env->icache_line_size = 128;
! 6132: /* Allocate hardware IRQ controller */
! 6133: ppc970_irq_init(env);
! 6134: }
! 6135:
! 6136: /* PowerPC 620 */
! 6137: #define POWERPC_INSNS_620 (PPC_INSNS_BASE | PPC_STRING | PPC_MFTB | \
! 6138: PPC_FLOAT | PPC_FLOAT_FSEL | PPC_FLOAT_FRES | \
! 6139: PPC_FLOAT_FSQRT | PPC_FLOAT_FRSQRTE | \
! 6140: PPC_FLOAT_STFIWX | \
! 6141: PPC_CACHE | PPC_CACHE_ICBI | PPC_CACHE_DCBZ | \
! 6142: PPC_MEM_SYNC | PPC_MEM_EIEIO | \
! 6143: PPC_MEM_TLBIE | PPC_MEM_TLBSYNC | \
! 6144: PPC_SEGMENT | PPC_EXTERN | \
! 6145: PPC_64B | PPC_SLBI)
! 6146: #define POWERPC_MSRM_620 (0x800000000005FF77ULL)
! 6147: //#define POWERPC_MMU_620 (POWERPC_MMU_620)
! 6148: #define POWERPC_EXCP_620 (POWERPC_EXCP_970)
! 6149: #define POWERPC_INPUT_620 (PPC_FLAGS_INPUT_6xx)
! 6150: #define POWERPC_BFDM_620 (bfd_mach_ppc64)
! 6151: #define POWERPC_FLAG_620 (POWERPC_FLAG_SE | POWERPC_FLAG_BE | \
! 6152: POWERPC_FLAG_PMM | POWERPC_FLAG_BUS_CLK)
! 6153: #define check_pow_620 check_pow_nocheck /* Check this */
! 6154:
! 6155: __attribute__ (( unused ))
! 6156: static void init_proc_620 (CPUPPCState *env)
! 6157: {
! 6158: gen_spr_ne_601(env);
! 6159: gen_spr_620(env);
! 6160: /* Time base */
! 6161: gen_tbl(env);
! 6162: /* Hardware implementation registers */
! 6163: /* XXX : not implemented */
! 6164: spr_register(env, SPR_HID0, "HID0",
! 6165: SPR_NOACCESS, SPR_NOACCESS,
! 6166: &spr_read_generic, &spr_write_generic,
! 6167: 0x00000000);
! 6168: /* Memory management */
! 6169: gen_low_BATs(env);
! 6170: init_excp_620(env);
! 6171: env->dcache_line_size = 64;
! 6172: env->icache_line_size = 64;
! 6173: /* Allocate hardware IRQ controller */
! 6174: ppc6xx_irq_init(env);
! 6175: }
! 6176: #endif /* defined (TARGET_PPC64) */
! 6177:
! 6178: /* Default 32 bits PowerPC target will be 604 */
! 6179: #define CPU_POWERPC_PPC32 CPU_POWERPC_604
! 6180: #define POWERPC_INSNS_PPC32 POWERPC_INSNS_604
! 6181: #define POWERPC_MSRM_PPC32 POWERPC_MSRM_604
! 6182: #define POWERPC_MMU_PPC32 POWERPC_MMU_604
! 6183: #define POWERPC_EXCP_PPC32 POWERPC_EXCP_604
! 6184: #define POWERPC_INPUT_PPC32 POWERPC_INPUT_604
! 6185: #define POWERPC_BFDM_PPC32 POWERPC_BFDM_604
! 6186: #define POWERPC_FLAG_PPC32 POWERPC_FLAG_604
! 6187: #define check_pow_PPC32 check_pow_604
! 6188: #define init_proc_PPC32 init_proc_604
! 6189:
! 6190: /* Default 64 bits PowerPC target will be 970 FX */
! 6191: #define CPU_POWERPC_PPC64 CPU_POWERPC_970FX
! 6192: #define POWERPC_INSNS_PPC64 POWERPC_INSNS_970FX
! 6193: #define POWERPC_MSRM_PPC64 POWERPC_MSRM_970FX
! 6194: #define POWERPC_MMU_PPC64 POWERPC_MMU_970FX
! 6195: #define POWERPC_EXCP_PPC64 POWERPC_EXCP_970FX
! 6196: #define POWERPC_INPUT_PPC64 POWERPC_INPUT_970FX
! 6197: #define POWERPC_BFDM_PPC64 POWERPC_BFDM_970FX
! 6198: #define POWERPC_FLAG_PPC64 POWERPC_FLAG_970FX
! 6199: #define check_pow_PPC64 check_pow_970FX
! 6200: #define init_proc_PPC64 init_proc_970FX
! 6201:
! 6202: /* Default PowerPC target will be PowerPC 32 */
! 6203: #if defined (TARGET_PPC64) && 0 // XXX: TODO
! 6204: #define CPU_POWERPC_DEFAULT CPU_POWERPC_PPC64
! 6205: #define POWERPC_INSNS_DEFAULT POWERPC_INSNS_PPC64
! 6206: #define POWERPC_MSRM_DEFAULT POWERPC_MSRM_PPC64
! 6207: #define POWERPC_MMU_DEFAULT POWERPC_MMU_PPC64
! 6208: #define POWERPC_EXCP_DEFAULT POWERPC_EXCP_PPC64
! 6209: #define POWERPC_INPUT_DEFAULT POWERPC_INPUT_PPC64
! 6210: #define POWERPC_BFDM_DEFAULT POWERPC_BFDM_PPC64
! 6211: #define POWERPC_FLAG_DEFAULT POWERPC_FLAG_PPC64
! 6212: #define check_pow_DEFAULT check_pow_PPC64
! 6213: #define init_proc_DEFAULT init_proc_PPC64
! 6214: #else
! 6215: #define CPU_POWERPC_DEFAULT CPU_POWERPC_PPC32
! 6216: #define POWERPC_INSNS_DEFAULT POWERPC_INSNS_PPC32
! 6217: #define POWERPC_MSRM_DEFAULT POWERPC_MSRM_PPC32
! 6218: #define POWERPC_MMU_DEFAULT POWERPC_MMU_PPC32
! 6219: #define POWERPC_EXCP_DEFAULT POWERPC_EXCP_PPC32
! 6220: #define POWERPC_INPUT_DEFAULT POWERPC_INPUT_PPC32
! 6221: #define POWERPC_BFDM_DEFAULT POWERPC_BFDM_PPC32
! 6222: #define POWERPC_FLAG_DEFAULT POWERPC_FLAG_PPC32
! 6223: #define check_pow_DEFAULT check_pow_PPC32
! 6224: #define init_proc_DEFAULT init_proc_PPC32
1.1 root 6225: #endif
1.1.1.4 ! root 6226:
! 6227: /*****************************************************************************/
! 6228: /* PVR definitions for most known PowerPC */
! 6229: enum {
! 6230: /* PowerPC 401 family */
! 6231: /* Generic PowerPC 401 */
! 6232: #define CPU_POWERPC_401 CPU_POWERPC_401G2
! 6233: /* PowerPC 401 cores */
! 6234: CPU_POWERPC_401A1 = 0x00210000,
! 6235: CPU_POWERPC_401B2 = 0x00220000,
! 6236: #if 0
! 6237: CPU_POWERPC_401B3 = xxx,
! 6238: #endif
! 6239: CPU_POWERPC_401C2 = 0x00230000,
! 6240: CPU_POWERPC_401D2 = 0x00240000,
! 6241: CPU_POWERPC_401E2 = 0x00250000,
! 6242: CPU_POWERPC_401F2 = 0x00260000,
! 6243: CPU_POWERPC_401G2 = 0x00270000,
! 6244: /* PowerPC 401 microcontrolers */
! 6245: #if 0
! 6246: CPU_POWERPC_401GF = xxx,
! 6247: #endif
! 6248: #define CPU_POWERPC_IOP480 CPU_POWERPC_401B2
! 6249: /* IBM Processor for Network Resources */
! 6250: CPU_POWERPC_COBRA = 0x10100000, /* XXX: 405 ? */
! 6251: #if 0
! 6252: CPU_POWERPC_XIPCHIP = xxx,
! 6253: #endif
! 6254: /* PowerPC 403 family */
! 6255: /* Generic PowerPC 403 */
! 6256: #define CPU_POWERPC_403 CPU_POWERPC_403GC
! 6257: /* PowerPC 403 microcontrollers */
! 6258: CPU_POWERPC_403GA = 0x00200011,
! 6259: CPU_POWERPC_403GB = 0x00200100,
! 6260: CPU_POWERPC_403GC = 0x00200200,
! 6261: CPU_POWERPC_403GCX = 0x00201400,
! 6262: #if 0
! 6263: CPU_POWERPC_403GP = xxx,
! 6264: #endif
! 6265: /* PowerPC 405 family */
! 6266: /* Generic PowerPC 405 */
! 6267: #define CPU_POWERPC_405 CPU_POWERPC_405D4
! 6268: /* PowerPC 405 cores */
! 6269: #if 0
! 6270: CPU_POWERPC_405A3 = xxx,
! 6271: #endif
! 6272: #if 0
! 6273: CPU_POWERPC_405A4 = xxx,
! 6274: #endif
! 6275: #if 0
! 6276: CPU_POWERPC_405B3 = xxx,
! 6277: #endif
! 6278: #if 0
! 6279: CPU_POWERPC_405B4 = xxx,
! 6280: #endif
! 6281: #if 0
! 6282: CPU_POWERPC_405C3 = xxx,
! 6283: #endif
! 6284: #if 0
! 6285: CPU_POWERPC_405C4 = xxx,
! 6286: #endif
! 6287: CPU_POWERPC_405D2 = 0x20010000,
! 6288: #if 0
! 6289: CPU_POWERPC_405D3 = xxx,
! 6290: #endif
! 6291: CPU_POWERPC_405D4 = 0x41810000,
! 6292: #if 0
! 6293: CPU_POWERPC_405D5 = xxx,
! 6294: #endif
! 6295: #if 0
! 6296: CPU_POWERPC_405E4 = xxx,
! 6297: #endif
! 6298: #if 0
! 6299: CPU_POWERPC_405F4 = xxx,
! 6300: #endif
! 6301: #if 0
! 6302: CPU_POWERPC_405F5 = xxx,
! 6303: #endif
! 6304: #if 0
! 6305: CPU_POWERPC_405F6 = xxx,
! 6306: #endif
! 6307: /* PowerPC 405 microcontrolers */
! 6308: /* XXX: missing 0x200108a0 */
! 6309: #define CPU_POWERPC_405CR CPU_POWERPC_405CRc
! 6310: CPU_POWERPC_405CRa = 0x40110041,
! 6311: CPU_POWERPC_405CRb = 0x401100C5,
! 6312: CPU_POWERPC_405CRc = 0x40110145,
! 6313: CPU_POWERPC_405EP = 0x51210950,
! 6314: #if 0
! 6315: CPU_POWERPC_405EXr = xxx,
! 6316: #endif
! 6317: CPU_POWERPC_405EZ = 0x41511460, /* 0x51210950 ? */
! 6318: #if 0
! 6319: CPU_POWERPC_405FX = xxx,
! 6320: #endif
! 6321: #define CPU_POWERPC_405GP CPU_POWERPC_405GPd
! 6322: CPU_POWERPC_405GPa = 0x40110000,
! 6323: CPU_POWERPC_405GPb = 0x40110040,
! 6324: CPU_POWERPC_405GPc = 0x40110082,
! 6325: CPU_POWERPC_405GPd = 0x401100C4,
! 6326: #define CPU_POWERPC_405GPe CPU_POWERPC_405CRc
! 6327: CPU_POWERPC_405GPR = 0x50910951,
! 6328: #if 0
! 6329: CPU_POWERPC_405H = xxx,
! 6330: #endif
! 6331: #if 0
! 6332: CPU_POWERPC_405L = xxx,
! 6333: #endif
! 6334: CPU_POWERPC_405LP = 0x41F10000,
! 6335: #if 0
! 6336: CPU_POWERPC_405PM = xxx,
! 6337: #endif
! 6338: #if 0
! 6339: CPU_POWERPC_405PS = xxx,
! 6340: #endif
! 6341: #if 0
! 6342: CPU_POWERPC_405S = xxx,
! 6343: #endif
! 6344: /* IBM network processors */
! 6345: CPU_POWERPC_NPE405H = 0x414100C0,
! 6346: CPU_POWERPC_NPE405H2 = 0x41410140,
! 6347: CPU_POWERPC_NPE405L = 0x416100C0,
! 6348: CPU_POWERPC_NPE4GS3 = 0x40B10000,
! 6349: #if 0
! 6350: CPU_POWERPC_NPCxx1 = xxx,
! 6351: #endif
! 6352: #if 0
! 6353: CPU_POWERPC_NPR161 = xxx,
! 6354: #endif
! 6355: #if 0
! 6356: CPU_POWERPC_LC77700 = xxx,
! 6357: #endif
! 6358: /* IBM STBxxx (PowerPC 401/403/405 core based microcontrollers) */
! 6359: #if 0
! 6360: CPU_POWERPC_STB01000 = xxx,
! 6361: #endif
! 6362: #if 0
! 6363: CPU_POWERPC_STB01010 = xxx,
! 6364: #endif
! 6365: #if 0
! 6366: CPU_POWERPC_STB0210 = xxx, /* 401B3 */
! 6367: #endif
! 6368: CPU_POWERPC_STB03 = 0x40310000, /* 0x40130000 ? */
! 6369: #if 0
! 6370: CPU_POWERPC_STB043 = xxx,
! 6371: #endif
! 6372: #if 0
! 6373: CPU_POWERPC_STB045 = xxx,
! 6374: #endif
! 6375: CPU_POWERPC_STB04 = 0x41810000,
! 6376: CPU_POWERPC_STB25 = 0x51510950,
! 6377: #if 0
! 6378: CPU_POWERPC_STB130 = xxx,
! 6379: #endif
! 6380: /* Xilinx cores */
! 6381: CPU_POWERPC_X2VP4 = 0x20010820,
! 6382: #define CPU_POWERPC_X2VP7 CPU_POWERPC_X2VP4
! 6383: CPU_POWERPC_X2VP20 = 0x20010860,
! 6384: #define CPU_POWERPC_X2VP50 CPU_POWERPC_X2VP20
! 6385: #if 0
! 6386: CPU_POWERPC_ZL10310 = xxx,
! 6387: #endif
! 6388: #if 0
! 6389: CPU_POWERPC_ZL10311 = xxx,
! 6390: #endif
! 6391: #if 0
! 6392: CPU_POWERPC_ZL10320 = xxx,
! 6393: #endif
! 6394: #if 0
! 6395: CPU_POWERPC_ZL10321 = xxx,
! 6396: #endif
! 6397: /* PowerPC 440 family */
! 6398: /* Generic PowerPC 440 */
! 6399: #define CPU_POWERPC_440 CPU_POWERPC_440GXf
! 6400: /* PowerPC 440 cores */
! 6401: #if 0
! 6402: CPU_POWERPC_440A4 = xxx,
! 6403: #endif
! 6404: #if 0
! 6405: CPU_POWERPC_440A5 = xxx,
! 6406: #endif
! 6407: #if 0
! 6408: CPU_POWERPC_440B4 = xxx,
! 6409: #endif
! 6410: #if 0
! 6411: CPU_POWERPC_440F5 = xxx,
! 6412: #endif
! 6413: #if 0
! 6414: CPU_POWERPC_440G5 = xxx,
! 6415: #endif
! 6416: #if 0
! 6417: CPU_POWERPC_440H4 = xxx,
! 6418: #endif
! 6419: #if 0
! 6420: CPU_POWERPC_440H6 = xxx,
! 6421: #endif
! 6422: /* PowerPC 440 microcontrolers */
! 6423: #define CPU_POWERPC_440EP CPU_POWERPC_440EPb
! 6424: CPU_POWERPC_440EPa = 0x42221850,
! 6425: CPU_POWERPC_440EPb = 0x422218D3,
! 6426: #define CPU_POWERPC_440GP CPU_POWERPC_440GPc
! 6427: CPU_POWERPC_440GPb = 0x40120440,
! 6428: CPU_POWERPC_440GPc = 0x40120481,
! 6429: #define CPU_POWERPC_440GR CPU_POWERPC_440GRa
! 6430: #define CPU_POWERPC_440GRa CPU_POWERPC_440EPb
! 6431: CPU_POWERPC_440GRX = 0x200008D0,
! 6432: #define CPU_POWERPC_440EPX CPU_POWERPC_440GRX
! 6433: #define CPU_POWERPC_440GX CPU_POWERPC_440GXf
! 6434: CPU_POWERPC_440GXa = 0x51B21850,
! 6435: CPU_POWERPC_440GXb = 0x51B21851,
! 6436: CPU_POWERPC_440GXc = 0x51B21892,
! 6437: CPU_POWERPC_440GXf = 0x51B21894,
! 6438: #if 0
! 6439: CPU_POWERPC_440S = xxx,
! 6440: #endif
! 6441: CPU_POWERPC_440SP = 0x53221850,
! 6442: CPU_POWERPC_440SP2 = 0x53221891,
! 6443: CPU_POWERPC_440SPE = 0x53421890,
! 6444: /* PowerPC 460 family */
! 6445: #if 0
! 6446: /* Generic PowerPC 464 */
! 6447: #define CPU_POWERPC_464 CPU_POWERPC_464H90
! 6448: #endif
! 6449: /* PowerPC 464 microcontrolers */
! 6450: #if 0
! 6451: CPU_POWERPC_464H90 = xxx,
! 6452: #endif
! 6453: #if 0
! 6454: CPU_POWERPC_464H90FP = xxx,
! 6455: #endif
! 6456: /* Freescale embedded PowerPC cores */
! 6457: /* PowerPC MPC 5xx cores (aka RCPU) */
! 6458: CPU_POWERPC_MPC5xx = 0x00020020,
! 6459: #define CPU_POWERPC_MGT560 CPU_POWERPC_MPC5xx
! 6460: #define CPU_POWERPC_MPC509 CPU_POWERPC_MPC5xx
! 6461: #define CPU_POWERPC_MPC533 CPU_POWERPC_MPC5xx
! 6462: #define CPU_POWERPC_MPC534 CPU_POWERPC_MPC5xx
! 6463: #define CPU_POWERPC_MPC555 CPU_POWERPC_MPC5xx
! 6464: #define CPU_POWERPC_MPC556 CPU_POWERPC_MPC5xx
! 6465: #define CPU_POWERPC_MPC560 CPU_POWERPC_MPC5xx
! 6466: #define CPU_POWERPC_MPC561 CPU_POWERPC_MPC5xx
! 6467: #define CPU_POWERPC_MPC562 CPU_POWERPC_MPC5xx
! 6468: #define CPU_POWERPC_MPC563 CPU_POWERPC_MPC5xx
! 6469: #define CPU_POWERPC_MPC564 CPU_POWERPC_MPC5xx
! 6470: #define CPU_POWERPC_MPC565 CPU_POWERPC_MPC5xx
! 6471: #define CPU_POWERPC_MPC566 CPU_POWERPC_MPC5xx
! 6472: /* PowerPC MPC 8xx cores (aka PowerQUICC) */
! 6473: CPU_POWERPC_MPC8xx = 0x00500000,
! 6474: #define CPU_POWERPC_MGT823 CPU_POWERPC_MPC8xx
! 6475: #define CPU_POWERPC_MPC821 CPU_POWERPC_MPC8xx
! 6476: #define CPU_POWERPC_MPC823 CPU_POWERPC_MPC8xx
! 6477: #define CPU_POWERPC_MPC850 CPU_POWERPC_MPC8xx
! 6478: #define CPU_POWERPC_MPC852T CPU_POWERPC_MPC8xx
! 6479: #define CPU_POWERPC_MPC855T CPU_POWERPC_MPC8xx
! 6480: #define CPU_POWERPC_MPC857 CPU_POWERPC_MPC8xx
! 6481: #define CPU_POWERPC_MPC859 CPU_POWERPC_MPC8xx
! 6482: #define CPU_POWERPC_MPC860 CPU_POWERPC_MPC8xx
! 6483: #define CPU_POWERPC_MPC862 CPU_POWERPC_MPC8xx
! 6484: #define CPU_POWERPC_MPC866 CPU_POWERPC_MPC8xx
! 6485: #define CPU_POWERPC_MPC870 CPU_POWERPC_MPC8xx
! 6486: #define CPU_POWERPC_MPC875 CPU_POWERPC_MPC8xx
! 6487: #define CPU_POWERPC_MPC880 CPU_POWERPC_MPC8xx
! 6488: #define CPU_POWERPC_MPC885 CPU_POWERPC_MPC8xx
! 6489: /* G2 cores (aka PowerQUICC-II) */
! 6490: CPU_POWERPC_G2 = 0x00810011,
! 6491: CPU_POWERPC_G2H4 = 0x80811010,
! 6492: CPU_POWERPC_G2gp = 0x80821010,
! 6493: CPU_POWERPC_G2ls = 0x90810010,
! 6494: CPU_POWERPC_MPC603 = 0x00810100,
! 6495: CPU_POWERPC_G2_HIP3 = 0x00810101,
! 6496: CPU_POWERPC_G2_HIP4 = 0x80811014,
! 6497: /* G2_LE core (aka PowerQUICC-II) */
! 6498: CPU_POWERPC_G2LE = 0x80820010,
! 6499: CPU_POWERPC_G2LEgp = 0x80822010,
! 6500: CPU_POWERPC_G2LEls = 0xA0822010,
! 6501: CPU_POWERPC_G2LEgp1 = 0x80822011,
! 6502: CPU_POWERPC_G2LEgp3 = 0x80822013,
! 6503: /* MPC52xx microcontrollers */
! 6504: /* XXX: MPC 5121 ? */
! 6505: #define CPU_POWERPC_MPC52xx CPU_POWERPC_MPC5200
! 6506: #define CPU_POWERPC_MPC5200 CPU_POWERPC_MPC5200_v12
! 6507: #define CPU_POWERPC_MPC5200_v10 CPU_POWERPC_G2LEgp1
! 6508: #define CPU_POWERPC_MPC5200_v11 CPU_POWERPC_G2LEgp1
! 6509: #define CPU_POWERPC_MPC5200_v12 CPU_POWERPC_G2LEgp1
! 6510: #define CPU_POWERPC_MPC5200B CPU_POWERPC_MPC5200B_v21
! 6511: #define CPU_POWERPC_MPC5200B_v20 CPU_POWERPC_G2LEgp1
! 6512: #define CPU_POWERPC_MPC5200B_v21 CPU_POWERPC_G2LEgp1
! 6513: /* MPC82xx microcontrollers */
! 6514: #define CPU_POWERPC_MPC82xx CPU_POWERPC_MPC8280
! 6515: #define CPU_POWERPC_MPC8240 CPU_POWERPC_MPC603
! 6516: #define CPU_POWERPC_MPC8241 CPU_POWERPC_G2_HIP4
! 6517: #define CPU_POWERPC_MPC8245 CPU_POWERPC_G2_HIP4
! 6518: #define CPU_POWERPC_MPC8247 CPU_POWERPC_G2LEgp3
! 6519: #define CPU_POWERPC_MPC8248 CPU_POWERPC_G2LEgp3
! 6520: #define CPU_POWERPC_MPC8250 CPU_POWERPC_MPC8250_HiP4
! 6521: #define CPU_POWERPC_MPC8250_HiP3 CPU_POWERPC_G2_HIP3
! 6522: #define CPU_POWERPC_MPC8250_HiP4 CPU_POWERPC_G2_HIP4
! 6523: #define CPU_POWERPC_MPC8255 CPU_POWERPC_MPC8255_HiP4
! 6524: #define CPU_POWERPC_MPC8255_HiP3 CPU_POWERPC_G2_HIP3
! 6525: #define CPU_POWERPC_MPC8255_HiP4 CPU_POWERPC_G2_HIP4
! 6526: #define CPU_POWERPC_MPC8260 CPU_POWERPC_MPC8260_HiP4
! 6527: #define CPU_POWERPC_MPC8260_HiP3 CPU_POWERPC_G2_HIP3
! 6528: #define CPU_POWERPC_MPC8260_HiP4 CPU_POWERPC_G2_HIP4
! 6529: #define CPU_POWERPC_MPC8264 CPU_POWERPC_MPC8264_HiP4
! 6530: #define CPU_POWERPC_MPC8264_HiP3 CPU_POWERPC_G2_HIP3
! 6531: #define CPU_POWERPC_MPC8264_HiP4 CPU_POWERPC_G2_HIP4
! 6532: #define CPU_POWERPC_MPC8265 CPU_POWERPC_MPC8265_HiP4
! 6533: #define CPU_POWERPC_MPC8265_HiP3 CPU_POWERPC_G2_HIP3
! 6534: #define CPU_POWERPC_MPC8265_HiP4 CPU_POWERPC_G2_HIP4
! 6535: #define CPU_POWERPC_MPC8266 CPU_POWERPC_MPC8266_HiP4
! 6536: #define CPU_POWERPC_MPC8266_HiP3 CPU_POWERPC_G2_HIP3
! 6537: #define CPU_POWERPC_MPC8266_HiP4 CPU_POWERPC_G2_HIP4
! 6538: #define CPU_POWERPC_MPC8270 CPU_POWERPC_G2LEgp3
! 6539: #define CPU_POWERPC_MPC8271 CPU_POWERPC_G2LEgp3
! 6540: #define CPU_POWERPC_MPC8272 CPU_POWERPC_G2LEgp3
! 6541: #define CPU_POWERPC_MPC8275 CPU_POWERPC_G2LEgp3
! 6542: #define CPU_POWERPC_MPC8280 CPU_POWERPC_G2LEgp3
! 6543: /* e200 family */
! 6544: /* e200 cores */
! 6545: #define CPU_POWERPC_e200 CPU_POWERPC_e200z6
! 6546: #if 0
! 6547: CPU_POWERPC_e200z0 = xxx,
! 6548: #endif
! 6549: #if 0
! 6550: CPU_POWERPC_e200z1 = xxx,
! 6551: #endif
! 6552: #if 0 /* ? */
! 6553: CPU_POWERPC_e200z3 = 0x81120000,
! 6554: #endif
! 6555: CPU_POWERPC_e200z5 = 0x81000000,
! 6556: CPU_POWERPC_e200z6 = 0x81120000,
! 6557: /* MPC55xx microcontrollers */
! 6558: #define CPU_POWERPC_MPC55xx CPU_POWERPC_MPC5567
! 6559: #if 0
! 6560: #define CPU_POWERPC_MPC5514E CPU_POWERPC_MPC5514E_v1
! 6561: #define CPU_POWERPC_MPC5514E_v0 CPU_POWERPC_e200z0
! 6562: #define CPU_POWERPC_MPC5514E_v1 CPU_POWERPC_e200z1
! 6563: #define CPU_POWERPC_MPC5514G CPU_POWERPC_MPC5514G_v1
! 6564: #define CPU_POWERPC_MPC5514G_v0 CPU_POWERPC_e200z0
! 6565: #define CPU_POWERPC_MPC5514G_v1 CPU_POWERPC_e200z1
! 6566: #define CPU_POWERPC_MPC5515S CPU_POWERPC_e200z1
! 6567: #define CPU_POWERPC_MPC5516E CPU_POWERPC_MPC5516E_v1
! 6568: #define CPU_POWERPC_MPC5516E_v0 CPU_POWERPC_e200z0
! 6569: #define CPU_POWERPC_MPC5516E_v1 CPU_POWERPC_e200z1
! 6570: #define CPU_POWERPC_MPC5516G CPU_POWERPC_MPC5516G_v1
! 6571: #define CPU_POWERPC_MPC5516G_v0 CPU_POWERPC_e200z0
! 6572: #define CPU_POWERPC_MPC5516G_v1 CPU_POWERPC_e200z1
! 6573: #define CPU_POWERPC_MPC5516S CPU_POWERPC_e200z1
! 6574: #endif
! 6575: #if 0
! 6576: #define CPU_POWERPC_MPC5533 CPU_POWERPC_e200z3
! 6577: #define CPU_POWERPC_MPC5534 CPU_POWERPC_e200z3
! 6578: #endif
! 6579: #define CPU_POWERPC_MPC5553 CPU_POWERPC_e200z6
! 6580: #define CPU_POWERPC_MPC5554 CPU_POWERPC_e200z6
! 6581: #define CPU_POWERPC_MPC5561 CPU_POWERPC_e200z6
! 6582: #define CPU_POWERPC_MPC5565 CPU_POWERPC_e200z6
! 6583: #define CPU_POWERPC_MPC5566 CPU_POWERPC_e200z6
! 6584: #define CPU_POWERPC_MPC5567 CPU_POWERPC_e200z6
! 6585: /* e300 family */
! 6586: /* e300 cores */
! 6587: #define CPU_POWERPC_e300 CPU_POWERPC_e300c3
! 6588: CPU_POWERPC_e300c1 = 0x00830010,
! 6589: CPU_POWERPC_e300c2 = 0x00840010,
! 6590: CPU_POWERPC_e300c3 = 0x00850010,
! 6591: CPU_POWERPC_e300c4 = 0x00860010,
! 6592: /* MPC83xx microcontrollers */
! 6593: #define CPU_POWERPC_MPC8313 CPU_POWERPC_e300c3
! 6594: #define CPU_POWERPC_MPC8313E CPU_POWERPC_e300c3
! 6595: #define CPU_POWERPC_MPC8314 CPU_POWERPC_e300c3
! 6596: #define CPU_POWERPC_MPC8314E CPU_POWERPC_e300c3
! 6597: #define CPU_POWERPC_MPC8315 CPU_POWERPC_e300c3
! 6598: #define CPU_POWERPC_MPC8315E CPU_POWERPC_e300c3
! 6599: #define CPU_POWERPC_MPC8321 CPU_POWERPC_e300c2
! 6600: #define CPU_POWERPC_MPC8321E CPU_POWERPC_e300c2
! 6601: #define CPU_POWERPC_MPC8323 CPU_POWERPC_e300c2
! 6602: #define CPU_POWERPC_MPC8323E CPU_POWERPC_e300c2
! 6603: #define CPU_POWERPC_MPC8343A CPU_POWERPC_e300c1
! 6604: #define CPU_POWERPC_MPC8343EA CPU_POWERPC_e300c1
! 6605: #define CPU_POWERPC_MPC8347A CPU_POWERPC_e300c1
! 6606: #define CPU_POWERPC_MPC8347AT CPU_POWERPC_e300c1
! 6607: #define CPU_POWERPC_MPC8347AP CPU_POWERPC_e300c1
! 6608: #define CPU_POWERPC_MPC8347EA CPU_POWERPC_e300c1
! 6609: #define CPU_POWERPC_MPC8347EAT CPU_POWERPC_e300c1
! 6610: #define CPU_POWERPC_MPC8347EAP CPU_POWERPC_e300c1
! 6611: #define CPU_POWERPC_MPC8349 CPU_POWERPC_e300c1
! 6612: #define CPU_POWERPC_MPC8349A CPU_POWERPC_e300c1
! 6613: #define CPU_POWERPC_MPC8349E CPU_POWERPC_e300c1
! 6614: #define CPU_POWERPC_MPC8349EA CPU_POWERPC_e300c1
! 6615: #define CPU_POWERPC_MPC8358E CPU_POWERPC_e300c1
! 6616: #define CPU_POWERPC_MPC8360E CPU_POWERPC_e300c1
! 6617: #define CPU_POWERPC_MPC8377 CPU_POWERPC_e300c4
! 6618: #define CPU_POWERPC_MPC8377E CPU_POWERPC_e300c4
! 6619: #define CPU_POWERPC_MPC8378 CPU_POWERPC_e300c4
! 6620: #define CPU_POWERPC_MPC8378E CPU_POWERPC_e300c4
! 6621: #define CPU_POWERPC_MPC8379 CPU_POWERPC_e300c4
! 6622: #define CPU_POWERPC_MPC8379E CPU_POWERPC_e300c4
! 6623: /* e500 family */
! 6624: /* e500 cores */
! 6625: #define CPU_POWERPC_e500 CPU_POWERPC_e500v2_v22
! 6626: #define CPU_POWERPC_e500v2 CPU_POWERPC_e500v2_v22
! 6627: CPU_POWERPC_e500_v10 = 0x80200010,
! 6628: CPU_POWERPC_e500_v20 = 0x80200020,
! 6629: CPU_POWERPC_e500v2_v10 = 0x80210010,
! 6630: CPU_POWERPC_e500v2_v11 = 0x80210011,
! 6631: CPU_POWERPC_e500v2_v20 = 0x80210020,
! 6632: CPU_POWERPC_e500v2_v21 = 0x80210021,
! 6633: CPU_POWERPC_e500v2_v22 = 0x80210022,
! 6634: CPU_POWERPC_e500v2_v30 = 0x80210030,
! 6635: /* MPC85xx microcontrollers */
! 6636: #define CPU_POWERPC_MPC8533 CPU_POWERPC_MPC8533_v11
! 6637: #define CPU_POWERPC_MPC8533_v10 CPU_POWERPC_e500v2_v21
! 6638: #define CPU_POWERPC_MPC8533_v11 CPU_POWERPC_e500v2_v22
! 6639: #define CPU_POWERPC_MPC8533E CPU_POWERPC_MPC8533E_v11
! 6640: #define CPU_POWERPC_MPC8533E_v10 CPU_POWERPC_e500v2_v21
! 6641: #define CPU_POWERPC_MPC8533E_v11 CPU_POWERPC_e500v2_v22
! 6642: #define CPU_POWERPC_MPC8540 CPU_POWERPC_MPC8540_v21
! 6643: #define CPU_POWERPC_MPC8540_v10 CPU_POWERPC_e500_v10
! 6644: #define CPU_POWERPC_MPC8540_v20 CPU_POWERPC_e500_v20
! 6645: #define CPU_POWERPC_MPC8540_v21 CPU_POWERPC_e500_v20
! 6646: #define CPU_POWERPC_MPC8541 CPU_POWERPC_MPC8541_v11
! 6647: #define CPU_POWERPC_MPC8541_v10 CPU_POWERPC_e500_v20
! 6648: #define CPU_POWERPC_MPC8541_v11 CPU_POWERPC_e500_v20
! 6649: #define CPU_POWERPC_MPC8541E CPU_POWERPC_MPC8541E_v11
! 6650: #define CPU_POWERPC_MPC8541E_v10 CPU_POWERPC_e500_v20
! 6651: #define CPU_POWERPC_MPC8541E_v11 CPU_POWERPC_e500_v20
! 6652: #define CPU_POWERPC_MPC8543 CPU_POWERPC_MPC8543_v21
! 6653: #define CPU_POWERPC_MPC8543_v10 CPU_POWERPC_e500v2_v10
! 6654: #define CPU_POWERPC_MPC8543_v11 CPU_POWERPC_e500v2_v11
! 6655: #define CPU_POWERPC_MPC8543_v20 CPU_POWERPC_e500v2_v20
! 6656: #define CPU_POWERPC_MPC8543_v21 CPU_POWERPC_e500v2_v21
! 6657: #define CPU_POWERPC_MPC8543E CPU_POWERPC_MPC8543E_v21
! 6658: #define CPU_POWERPC_MPC8543E_v10 CPU_POWERPC_e500v2_v10
! 6659: #define CPU_POWERPC_MPC8543E_v11 CPU_POWERPC_e500v2_v11
! 6660: #define CPU_POWERPC_MPC8543E_v20 CPU_POWERPC_e500v2_v20
! 6661: #define CPU_POWERPC_MPC8543E_v21 CPU_POWERPC_e500v2_v21
! 6662: #define CPU_POWERPC_MPC8544 CPU_POWERPC_MPC8544_v11
! 6663: #define CPU_POWERPC_MPC8544_v10 CPU_POWERPC_e500v2_v21
! 6664: #define CPU_POWERPC_MPC8544_v11 CPU_POWERPC_e500v2_v22
! 6665: #define CPU_POWERPC_MPC8544E_v11 CPU_POWERPC_e500v2_v22
! 6666: #define CPU_POWERPC_MPC8544E CPU_POWERPC_MPC8544E_v11
! 6667: #define CPU_POWERPC_MPC8544E_v10 CPU_POWERPC_e500v2_v21
! 6668: #define CPU_POWERPC_MPC8545 CPU_POWERPC_MPC8545_v21
! 6669: #define CPU_POWERPC_MPC8545_v10 CPU_POWERPC_e500v2_v10
! 6670: #define CPU_POWERPC_MPC8545_v20 CPU_POWERPC_e500v2_v20
! 6671: #define CPU_POWERPC_MPC8545_v21 CPU_POWERPC_e500v2_v21
! 6672: #define CPU_POWERPC_MPC8545E CPU_POWERPC_MPC8545E_v21
! 6673: #define CPU_POWERPC_MPC8545E_v10 CPU_POWERPC_e500v2_v10
! 6674: #define CPU_POWERPC_MPC8545E_v20 CPU_POWERPC_e500v2_v20
! 6675: #define CPU_POWERPC_MPC8545E_v21 CPU_POWERPC_e500v2_v21
! 6676: #define CPU_POWERPC_MPC8547E CPU_POWERPC_MPC8545E_v21
! 6677: #define CPU_POWERPC_MPC8547E_v10 CPU_POWERPC_e500v2_v10
! 6678: #define CPU_POWERPC_MPC8547E_v20 CPU_POWERPC_e500v2_v20
! 6679: #define CPU_POWERPC_MPC8547E_v21 CPU_POWERPC_e500v2_v21
! 6680: #define CPU_POWERPC_MPC8548 CPU_POWERPC_MPC8548_v21
! 6681: #define CPU_POWERPC_MPC8548_v10 CPU_POWERPC_e500v2_v10
! 6682: #define CPU_POWERPC_MPC8548_v11 CPU_POWERPC_e500v2_v11
! 6683: #define CPU_POWERPC_MPC8548_v20 CPU_POWERPC_e500v2_v20
! 6684: #define CPU_POWERPC_MPC8548_v21 CPU_POWERPC_e500v2_v21
! 6685: #define CPU_POWERPC_MPC8548E CPU_POWERPC_MPC8548E_v21
! 6686: #define CPU_POWERPC_MPC8548E_v10 CPU_POWERPC_e500v2_v10
! 6687: #define CPU_POWERPC_MPC8548E_v11 CPU_POWERPC_e500v2_v11
! 6688: #define CPU_POWERPC_MPC8548E_v20 CPU_POWERPC_e500v2_v20
! 6689: #define CPU_POWERPC_MPC8548E_v21 CPU_POWERPC_e500v2_v21
! 6690: #define CPU_POWERPC_MPC8555 CPU_POWERPC_MPC8555_v11
! 6691: #define CPU_POWERPC_MPC8555_v10 CPU_POWERPC_e500v2_v10
! 6692: #define CPU_POWERPC_MPC8555_v11 CPU_POWERPC_e500v2_v11
! 6693: #define CPU_POWERPC_MPC8555E CPU_POWERPC_MPC8555E_v11
! 6694: #define CPU_POWERPC_MPC8555E_v10 CPU_POWERPC_e500v2_v10
! 6695: #define CPU_POWERPC_MPC8555E_v11 CPU_POWERPC_e500v2_v11
! 6696: #define CPU_POWERPC_MPC8560 CPU_POWERPC_MPC8560_v21
! 6697: #define CPU_POWERPC_MPC8560_v10 CPU_POWERPC_e500v2_v10
! 6698: #define CPU_POWERPC_MPC8560_v20 CPU_POWERPC_e500v2_v20
! 6699: #define CPU_POWERPC_MPC8560_v21 CPU_POWERPC_e500v2_v21
! 6700: #define CPU_POWERPC_MPC8567 CPU_POWERPC_e500v2_v22
! 6701: #define CPU_POWERPC_MPC8567E CPU_POWERPC_e500v2_v22
! 6702: #define CPU_POWERPC_MPC8568 CPU_POWERPC_e500v2_v22
! 6703: #define CPU_POWERPC_MPC8568E CPU_POWERPC_e500v2_v22
! 6704: #define CPU_POWERPC_MPC8572 CPU_POWERPC_e500v2_v30
! 6705: #define CPU_POWERPC_MPC8572E CPU_POWERPC_e500v2_v30
! 6706: /* e600 family */
! 6707: /* e600 cores */
! 6708: CPU_POWERPC_e600 = 0x80040010,
! 6709: /* MPC86xx microcontrollers */
! 6710: #define CPU_POWERPC_MPC8610 CPU_POWERPC_e600
! 6711: #define CPU_POWERPC_MPC8641 CPU_POWERPC_e600
! 6712: #define CPU_POWERPC_MPC8641D CPU_POWERPC_e600
! 6713: /* PowerPC 6xx cores */
! 6714: #define CPU_POWERPC_601 CPU_POWERPC_601_v2
! 6715: CPU_POWERPC_601_v0 = 0x00010001,
! 6716: CPU_POWERPC_601_v1 = 0x00010001,
! 6717: #define CPU_POWERPC_601v CPU_POWERPC_601_v2
! 6718: CPU_POWERPC_601_v2 = 0x00010002,
! 6719: CPU_POWERPC_602 = 0x00050100,
! 6720: CPU_POWERPC_603 = 0x00030100,
! 6721: #define CPU_POWERPC_603E CPU_POWERPC_603E_v41
! 6722: CPU_POWERPC_603E_v11 = 0x00060101,
! 6723: CPU_POWERPC_603E_v12 = 0x00060102,
! 6724: CPU_POWERPC_603E_v13 = 0x00060103,
! 6725: CPU_POWERPC_603E_v14 = 0x00060104,
! 6726: CPU_POWERPC_603E_v22 = 0x00060202,
! 6727: CPU_POWERPC_603E_v3 = 0x00060300,
! 6728: CPU_POWERPC_603E_v4 = 0x00060400,
! 6729: CPU_POWERPC_603E_v41 = 0x00060401,
! 6730: CPU_POWERPC_603E7t = 0x00071201,
! 6731: CPU_POWERPC_603E7v = 0x00070100,
! 6732: CPU_POWERPC_603E7v1 = 0x00070101,
! 6733: CPU_POWERPC_603E7v2 = 0x00070201,
! 6734: CPU_POWERPC_603E7 = 0x00070200,
! 6735: CPU_POWERPC_603P = 0x00070000,
! 6736: #define CPU_POWERPC_603R CPU_POWERPC_603E7t
! 6737: /* XXX: missing 0x00040303 (604) */
! 6738: CPU_POWERPC_604 = 0x00040103,
! 6739: #define CPU_POWERPC_604E CPU_POWERPC_604E_v24
! 6740: /* XXX: missing 0x00091203 */
! 6741: /* XXX: missing 0x00092110 */
! 6742: /* XXX: missing 0x00092120 */
! 6743: CPU_POWERPC_604E_v10 = 0x00090100,
! 6744: CPU_POWERPC_604E_v22 = 0x00090202,
! 6745: CPU_POWERPC_604E_v24 = 0x00090204,
! 6746: /* XXX: missing 0x000a0100 */
! 6747: /* XXX: missing 0x00093102 */
! 6748: CPU_POWERPC_604R = 0x000a0101,
! 6749: #if 0
! 6750: CPU_POWERPC_604EV = xxx, /* XXX: same as 604R ? */
! 6751: #endif
! 6752: /* PowerPC 740/750 cores (aka G3) */
! 6753: /* XXX: missing 0x00084202 */
! 6754: #define CPU_POWERPC_7x0 CPU_POWERPC_7x0_v31
! 6755: CPU_POWERPC_7x0_v10 = 0x00080100,
! 6756: CPU_POWERPC_7x0_v20 = 0x00080200,
! 6757: CPU_POWERPC_7x0_v21 = 0x00080201,
! 6758: CPU_POWERPC_7x0_v22 = 0x00080202,
! 6759: CPU_POWERPC_7x0_v30 = 0x00080300,
! 6760: CPU_POWERPC_7x0_v31 = 0x00080301,
! 6761: CPU_POWERPC_740E = 0x00080100,
! 6762: CPU_POWERPC_750E = 0x00080200,
! 6763: CPU_POWERPC_7x0P = 0x10080000,
! 6764: /* XXX: missing 0x00087010 (CL ?) */
! 6765: #define CPU_POWERPC_750CL CPU_POWERPC_750CL_v20
! 6766: CPU_POWERPC_750CL_v10 = 0x00087200,
! 6767: CPU_POWERPC_750CL_v20 = 0x00087210, /* aka rev E */
! 6768: #define CPU_POWERPC_750CX CPU_POWERPC_750CX_v22
! 6769: CPU_POWERPC_750CX_v10 = 0x00082100,
! 6770: CPU_POWERPC_750CX_v20 = 0x00082200,
! 6771: CPU_POWERPC_750CX_v21 = 0x00082201,
! 6772: CPU_POWERPC_750CX_v22 = 0x00082202,
! 6773: #define CPU_POWERPC_750CXE CPU_POWERPC_750CXE_v31b
! 6774: CPU_POWERPC_750CXE_v21 = 0x00082211,
! 6775: CPU_POWERPC_750CXE_v22 = 0x00082212,
! 6776: CPU_POWERPC_750CXE_v23 = 0x00082213,
! 6777: CPU_POWERPC_750CXE_v24 = 0x00082214,
! 6778: CPU_POWERPC_750CXE_v24b = 0x00083214,
! 6779: CPU_POWERPC_750CXE_v30 = 0x00082310,
! 6780: CPU_POWERPC_750CXE_v31 = 0x00082311,
! 6781: CPU_POWERPC_750CXE_v31b = 0x00083311,
! 6782: CPU_POWERPC_750CXR = 0x00083410,
! 6783: CPU_POWERPC_750FL = 0x70000203,
! 6784: #define CPU_POWERPC_750FX CPU_POWERPC_750FX_v23
! 6785: CPU_POWERPC_750FX_v10 = 0x70000100,
! 6786: CPU_POWERPC_750FX_v20 = 0x70000200,
! 6787: CPU_POWERPC_750FX_v21 = 0x70000201,
! 6788: CPU_POWERPC_750FX_v22 = 0x70000202,
! 6789: CPU_POWERPC_750FX_v23 = 0x70000203,
! 6790: CPU_POWERPC_750GL = 0x70020102,
! 6791: #define CPU_POWERPC_750GX CPU_POWERPC_750GX_v12
! 6792: CPU_POWERPC_750GX_v10 = 0x70020100,
! 6793: CPU_POWERPC_750GX_v11 = 0x70020101,
! 6794: CPU_POWERPC_750GX_v12 = 0x70020102,
! 6795: #define CPU_POWERPC_750L CPU_POWERPC_750L_v32 /* Aka LoneStar */
! 6796: CPU_POWERPC_750L_v20 = 0x00088200,
! 6797: CPU_POWERPC_750L_v21 = 0x00088201,
! 6798: CPU_POWERPC_750L_v22 = 0x00088202,
! 6799: CPU_POWERPC_750L_v30 = 0x00088300,
! 6800: CPU_POWERPC_750L_v32 = 0x00088302,
! 6801: /* PowerPC 745/755 cores */
! 6802: #define CPU_POWERPC_7x5 CPU_POWERPC_7x5_v28
! 6803: CPU_POWERPC_7x5_v10 = 0x00083100,
! 6804: CPU_POWERPC_7x5_v11 = 0x00083101,
! 6805: CPU_POWERPC_7x5_v20 = 0x00083200,
! 6806: CPU_POWERPC_7x5_v21 = 0x00083201,
! 6807: CPU_POWERPC_7x5_v22 = 0x00083202, /* aka D */
! 6808: CPU_POWERPC_7x5_v23 = 0x00083203, /* aka E */
! 6809: CPU_POWERPC_7x5_v24 = 0x00083204,
! 6810: CPU_POWERPC_7x5_v25 = 0x00083205,
! 6811: CPU_POWERPC_7x5_v26 = 0x00083206,
! 6812: CPU_POWERPC_7x5_v27 = 0x00083207,
! 6813: CPU_POWERPC_7x5_v28 = 0x00083208,
! 6814: #if 0
! 6815: CPU_POWERPC_7x5P = xxx,
! 6816: #endif
! 6817: /* PowerPC 74xx cores (aka G4) */
! 6818: /* XXX: missing 0x000C1101 */
! 6819: #define CPU_POWERPC_7400 CPU_POWERPC_7400_v29
! 6820: CPU_POWERPC_7400_v10 = 0x000C0100,
! 6821: CPU_POWERPC_7400_v11 = 0x000C0101,
! 6822: CPU_POWERPC_7400_v20 = 0x000C0200,
! 6823: CPU_POWERPC_7400_v21 = 0x000C0201,
! 6824: CPU_POWERPC_7400_v22 = 0x000C0202,
! 6825: CPU_POWERPC_7400_v26 = 0x000C0206,
! 6826: CPU_POWERPC_7400_v27 = 0x000C0207,
! 6827: CPU_POWERPC_7400_v28 = 0x000C0208,
! 6828: CPU_POWERPC_7400_v29 = 0x000C0209,
! 6829: #define CPU_POWERPC_7410 CPU_POWERPC_7410_v14
! 6830: CPU_POWERPC_7410_v10 = 0x800C1100,
! 6831: CPU_POWERPC_7410_v11 = 0x800C1101,
! 6832: CPU_POWERPC_7410_v12 = 0x800C1102, /* aka C */
! 6833: CPU_POWERPC_7410_v13 = 0x800C1103, /* aka D */
! 6834: CPU_POWERPC_7410_v14 = 0x800C1104, /* aka E */
! 6835: #define CPU_POWERPC_7448 CPU_POWERPC_7448_v21
! 6836: CPU_POWERPC_7448_v10 = 0x80040100,
! 6837: CPU_POWERPC_7448_v11 = 0x80040101,
! 6838: CPU_POWERPC_7448_v20 = 0x80040200,
! 6839: CPU_POWERPC_7448_v21 = 0x80040201,
! 6840: #define CPU_POWERPC_7450 CPU_POWERPC_7450_v21
! 6841: CPU_POWERPC_7450_v10 = 0x80000100,
! 6842: CPU_POWERPC_7450_v11 = 0x80000101,
! 6843: CPU_POWERPC_7450_v12 = 0x80000102,
! 6844: CPU_POWERPC_7450_v20 = 0x80000200, /* aka A, B, C, D: 2.04 */
! 6845: CPU_POWERPC_7450_v21 = 0x80000201, /* aka E */
! 6846: #define CPU_POWERPC_74x1 CPU_POWERPC_74x1_v23
! 6847: CPU_POWERPC_74x1_v23 = 0x80000203, /* aka G: 2.3 */
! 6848: /* XXX: this entry might be a bug in some documentation */
! 6849: CPU_POWERPC_74x1_v210 = 0x80000210, /* aka G: 2.3 ? */
! 6850: #define CPU_POWERPC_74x5 CPU_POWERPC_74x5_v32
! 6851: CPU_POWERPC_74x5_v10 = 0x80010100,
! 6852: /* XXX: missing 0x80010200 */
! 6853: CPU_POWERPC_74x5_v21 = 0x80010201, /* aka C: 2.1 */
! 6854: CPU_POWERPC_74x5_v32 = 0x80010302,
! 6855: CPU_POWERPC_74x5_v33 = 0x80010303, /* aka F: 3.3 */
! 6856: CPU_POWERPC_74x5_v34 = 0x80010304, /* aka G: 3.4 */
! 6857: #define CPU_POWERPC_74x7 CPU_POWERPC_74x7_v12
! 6858: CPU_POWERPC_74x7_v10 = 0x80020100, /* aka A: 1.0 */
! 6859: CPU_POWERPC_74x7_v11 = 0x80020101, /* aka B: 1.1 */
! 6860: CPU_POWERPC_74x7_v12 = 0x80020102, /* aka C: 1.2 */
! 6861: #define CPU_POWERPC_74x7A CPU_POWERPC_74x7A_v12
! 6862: CPU_POWERPC_74x7A_v10 = 0x80030100, /* aka A: 1.0 */
! 6863: CPU_POWERPC_74x7A_v11 = 0x80030101, /* aka B: 1.1 */
! 6864: CPU_POWERPC_74x7A_v12 = 0x80030102, /* aka C: 1.2 */
! 6865: /* 64 bits PowerPC */
! 6866: #if defined(TARGET_PPC64)
! 6867: CPU_POWERPC_620 = 0x00140000,
! 6868: CPU_POWERPC_630 = 0x00400000,
! 6869: CPU_POWERPC_631 = 0x00410104,
! 6870: CPU_POWERPC_POWER4 = 0x00350000,
! 6871: CPU_POWERPC_POWER4P = 0x00380000,
! 6872: /* XXX: missing 0x003A0201 */
! 6873: CPU_POWERPC_POWER5 = 0x003A0203,
! 6874: #define CPU_POWERPC_POWER5GR CPU_POWERPC_POWER5
! 6875: CPU_POWERPC_POWER5P = 0x003B0000,
! 6876: #define CPU_POWERPC_POWER5GS CPU_POWERPC_POWER5P
! 6877: CPU_POWERPC_POWER6 = 0x003E0000,
! 6878: CPU_POWERPC_POWER6_5 = 0x0F000001, /* POWER6 in POWER5 mode */
! 6879: CPU_POWERPC_POWER6A = 0x0F000002,
! 6880: CPU_POWERPC_970 = 0x00390202,
! 6881: #define CPU_POWERPC_970FX CPU_POWERPC_970FX_v31
! 6882: CPU_POWERPC_970FX_v10 = 0x00391100,
! 6883: CPU_POWERPC_970FX_v20 = 0x003C0200,
! 6884: CPU_POWERPC_970FX_v21 = 0x003C0201,
! 6885: CPU_POWERPC_970FX_v30 = 0x003C0300,
! 6886: CPU_POWERPC_970FX_v31 = 0x003C0301,
! 6887: CPU_POWERPC_970GX = 0x00450000,
! 6888: #define CPU_POWERPC_970MP CPU_POWERPC_970MP_v11
! 6889: CPU_POWERPC_970MP_v10 = 0x00440100,
! 6890: CPU_POWERPC_970MP_v11 = 0x00440101,
! 6891: #define CPU_POWERPC_CELL CPU_POWERPC_CELL_v32
! 6892: CPU_POWERPC_CELL_v10 = 0x00700100,
! 6893: CPU_POWERPC_CELL_v20 = 0x00700400,
! 6894: CPU_POWERPC_CELL_v30 = 0x00700500,
! 6895: CPU_POWERPC_CELL_v31 = 0x00700501,
! 6896: #define CPU_POWERPC_CELL_v32 CPU_POWERPC_CELL_v31
! 6897: CPU_POWERPC_RS64 = 0x00330000,
! 6898: CPU_POWERPC_RS64II = 0x00340000,
! 6899: CPU_POWERPC_RS64III = 0x00360000,
! 6900: CPU_POWERPC_RS64IV = 0x00370000,
! 6901: #endif /* defined(TARGET_PPC64) */
! 6902: /* Original POWER */
! 6903: /* XXX: should be POWER (RIOS), RSC3308, RSC4608,
! 6904: * POWER2 (RIOS2) & RSC2 (P2SC) here
! 6905: */
! 6906: #if 0
! 6907: CPU_POWER = xxx, /* 0x20000 ? 0x30000 for RSC ? */
1.1 root 6908: #endif
1.1.1.4 ! root 6909: #if 0
! 6910: CPU_POWER2 = xxx, /* 0x40000 ? */
1.1 root 6911: #endif
1.1.1.4 ! root 6912: /* PA Semi core */
! 6913: CPU_POWERPC_PA6T = 0x00900000,
! 6914: };
! 6915:
! 6916: /* System version register (used on MPC 8xxx) */
! 6917: enum {
! 6918: POWERPC_SVR_NONE = 0x00000000,
! 6919: #define POWERPC_SVR_52xx POWERPC_SVR_5200
! 6920: #define POWERPC_SVR_5200 POWERPC_SVR_5200_v12
! 6921: POWERPC_SVR_5200_v10 = 0x80110010,
! 6922: POWERPC_SVR_5200_v11 = 0x80110011,
! 6923: POWERPC_SVR_5200_v12 = 0x80110012,
! 6924: #define POWERPC_SVR_5200B POWERPC_SVR_5200B_v21
! 6925: POWERPC_SVR_5200B_v20 = 0x80110020,
! 6926: POWERPC_SVR_5200B_v21 = 0x80110021,
! 6927: #define POWERPC_SVR_55xx POWERPC_SVR_5567
! 6928: #if 0
! 6929: POWERPC_SVR_5533 = xxx,
! 6930: #endif
! 6931: #if 0
! 6932: POWERPC_SVR_5534 = xxx,
! 6933: #endif
! 6934: #if 0
! 6935: POWERPC_SVR_5553 = xxx,
! 6936: #endif
! 6937: #if 0
! 6938: POWERPC_SVR_5554 = xxx,
! 6939: #endif
! 6940: #if 0
! 6941: POWERPC_SVR_5561 = xxx,
! 6942: #endif
! 6943: #if 0
! 6944: POWERPC_SVR_5565 = xxx,
! 6945: #endif
! 6946: #if 0
! 6947: POWERPC_SVR_5566 = xxx,
! 6948: #endif
! 6949: #if 0
! 6950: POWERPC_SVR_5567 = xxx,
! 6951: #endif
! 6952: #if 0
! 6953: POWERPC_SVR_8313 = xxx,
! 6954: #endif
! 6955: #if 0
! 6956: POWERPC_SVR_8313E = xxx,
! 6957: #endif
! 6958: #if 0
! 6959: POWERPC_SVR_8314 = xxx,
! 6960: #endif
! 6961: #if 0
! 6962: POWERPC_SVR_8314E = xxx,
! 6963: #endif
! 6964: #if 0
! 6965: POWERPC_SVR_8315 = xxx,
! 6966: #endif
! 6967: #if 0
! 6968: POWERPC_SVR_8315E = xxx,
! 6969: #endif
! 6970: #if 0
! 6971: POWERPC_SVR_8321 = xxx,
! 6972: #endif
! 6973: #if 0
! 6974: POWERPC_SVR_8321E = xxx,
! 6975: #endif
! 6976: #if 0
! 6977: POWERPC_SVR_8323 = xxx,
! 6978: #endif
! 6979: #if 0
! 6980: POWERPC_SVR_8323E = xxx,
! 6981: #endif
! 6982: POWERPC_SVR_8343A = 0x80570030,
! 6983: POWERPC_SVR_8343EA = 0x80560030,
! 6984: #define POWERPC_SVR_8347A POWERPC_SVR_8347AT
! 6985: POWERPC_SVR_8347AP = 0x80550030, /* PBGA package */
! 6986: POWERPC_SVR_8347AT = 0x80530030, /* TBGA package */
! 6987: #define POWERPC_SVR_8347EA POWERPC_SVR_8347EAT
! 6988: POWERPC_SVR_8347EAP = 0x80540030, /* PBGA package */
! 6989: POWERPC_SVR_8347EAT = 0x80520030, /* TBGA package */
! 6990: POWERPC_SVR_8349 = 0x80510010,
! 6991: POWERPC_SVR_8349A = 0x80510030,
! 6992: POWERPC_SVR_8349E = 0x80500010,
! 6993: POWERPC_SVR_8349EA = 0x80500030,
! 6994: #if 0
! 6995: POWERPC_SVR_8358E = xxx,
! 6996: #endif
! 6997: #if 0
! 6998: POWERPC_SVR_8360E = xxx,
! 6999: #endif
! 7000: #define POWERPC_SVR_E500 0x40000000
! 7001: POWERPC_SVR_8377 = 0x80C70010 | POWERPC_SVR_E500,
! 7002: POWERPC_SVR_8377E = 0x80C60010 | POWERPC_SVR_E500,
! 7003: POWERPC_SVR_8378 = 0x80C50010 | POWERPC_SVR_E500,
! 7004: POWERPC_SVR_8378E = 0x80C40010 | POWERPC_SVR_E500,
! 7005: POWERPC_SVR_8379 = 0x80C30010 | POWERPC_SVR_E500,
! 7006: POWERPC_SVR_8379E = 0x80C00010 | POWERPC_SVR_E500,
! 7007: #define POWERPC_SVR_8533 POWERPC_SVR_8533_v11
! 7008: POWERPC_SVR_8533_v10 = 0x80340010 | POWERPC_SVR_E500,
! 7009: POWERPC_SVR_8533_v11 = 0x80340011 | POWERPC_SVR_E500,
! 7010: #define POWERPC_SVR_8533E POWERPC_SVR_8533E_v11
! 7011: POWERPC_SVR_8533E_v10 = 0x803C0010 | POWERPC_SVR_E500,
! 7012: POWERPC_SVR_8533E_v11 = 0x803C0011 | POWERPC_SVR_E500,
! 7013: #define POWERPC_SVR_8540 POWERPC_SVR_8540_v21
! 7014: POWERPC_SVR_8540_v10 = 0x80300010 | POWERPC_SVR_E500,
! 7015: POWERPC_SVR_8540_v20 = 0x80300020 | POWERPC_SVR_E500,
! 7016: POWERPC_SVR_8540_v21 = 0x80300021 | POWERPC_SVR_E500,
! 7017: #define POWERPC_SVR_8541 POWERPC_SVR_8541_v11
! 7018: POWERPC_SVR_8541_v10 = 0x80720010 | POWERPC_SVR_E500,
! 7019: POWERPC_SVR_8541_v11 = 0x80720011 | POWERPC_SVR_E500,
! 7020: #define POWERPC_SVR_8541E POWERPC_SVR_8541E_v11
! 7021: POWERPC_SVR_8541E_v10 = 0x807A0010 | POWERPC_SVR_E500,
! 7022: POWERPC_SVR_8541E_v11 = 0x807A0011 | POWERPC_SVR_E500,
! 7023: #define POWERPC_SVR_8543 POWERPC_SVR_8543_v21
! 7024: POWERPC_SVR_8543_v10 = 0x80320010 | POWERPC_SVR_E500,
! 7025: POWERPC_SVR_8543_v11 = 0x80320011 | POWERPC_SVR_E500,
! 7026: POWERPC_SVR_8543_v20 = 0x80320020 | POWERPC_SVR_E500,
! 7027: POWERPC_SVR_8543_v21 = 0x80320021 | POWERPC_SVR_E500,
! 7028: #define POWERPC_SVR_8543E POWERPC_SVR_8543E_v21
! 7029: POWERPC_SVR_8543E_v10 = 0x803A0010 | POWERPC_SVR_E500,
! 7030: POWERPC_SVR_8543E_v11 = 0x803A0011 | POWERPC_SVR_E500,
! 7031: POWERPC_SVR_8543E_v20 = 0x803A0020 | POWERPC_SVR_E500,
! 7032: POWERPC_SVR_8543E_v21 = 0x803A0021 | POWERPC_SVR_E500,
! 7033: #define POWERPC_SVR_8544 POWERPC_SVR_8544_v11
! 7034: POWERPC_SVR_8544_v10 = 0x80340110 | POWERPC_SVR_E500,
! 7035: POWERPC_SVR_8544_v11 = 0x80340111 | POWERPC_SVR_E500,
! 7036: #define POWERPC_SVR_8544E POWERPC_SVR_8544E_v11
! 7037: POWERPC_SVR_8544E_v10 = 0x803C0110 | POWERPC_SVR_E500,
! 7038: POWERPC_SVR_8544E_v11 = 0x803C0111 | POWERPC_SVR_E500,
! 7039: #define POWERPC_SVR_8545 POWERPC_SVR_8545_v21
! 7040: POWERPC_SVR_8545_v20 = 0x80310220 | POWERPC_SVR_E500,
! 7041: POWERPC_SVR_8545_v21 = 0x80310221 | POWERPC_SVR_E500,
! 7042: #define POWERPC_SVR_8545E POWERPC_SVR_8545E_v21
! 7043: POWERPC_SVR_8545E_v20 = 0x80390220 | POWERPC_SVR_E500,
! 7044: POWERPC_SVR_8545E_v21 = 0x80390221 | POWERPC_SVR_E500,
! 7045: #define POWERPC_SVR_8547E POWERPC_SVR_8547E_v21
! 7046: POWERPC_SVR_8547E_v20 = 0x80390120 | POWERPC_SVR_E500,
! 7047: POWERPC_SVR_8547E_v21 = 0x80390121 | POWERPC_SVR_E500,
! 7048: #define POWERPC_SVR_8548 POWERPC_SVR_8548_v21
! 7049: POWERPC_SVR_8548_v10 = 0x80310010 | POWERPC_SVR_E500,
! 7050: POWERPC_SVR_8548_v11 = 0x80310011 | POWERPC_SVR_E500,
! 7051: POWERPC_SVR_8548_v20 = 0x80310020 | POWERPC_SVR_E500,
! 7052: POWERPC_SVR_8548_v21 = 0x80310021 | POWERPC_SVR_E500,
! 7053: #define POWERPC_SVR_8548E POWERPC_SVR_8548E_v21
! 7054: POWERPC_SVR_8548E_v10 = 0x80390010 | POWERPC_SVR_E500,
! 7055: POWERPC_SVR_8548E_v11 = 0x80390011 | POWERPC_SVR_E500,
! 7056: POWERPC_SVR_8548E_v20 = 0x80390020 | POWERPC_SVR_E500,
! 7057: POWERPC_SVR_8548E_v21 = 0x80390021 | POWERPC_SVR_E500,
! 7058: #define POWERPC_SVR_8555 POWERPC_SVR_8555_v11
! 7059: POWERPC_SVR_8555_v10 = 0x80710010 | POWERPC_SVR_E500,
! 7060: POWERPC_SVR_8555_v11 = 0x80710011 | POWERPC_SVR_E500,
! 7061: #define POWERPC_SVR_8555E POWERPC_SVR_8555_v11
! 7062: POWERPC_SVR_8555E_v10 = 0x80790010 | POWERPC_SVR_E500,
! 7063: POWERPC_SVR_8555E_v11 = 0x80790011 | POWERPC_SVR_E500,
! 7064: #define POWERPC_SVR_8560 POWERPC_SVR_8560_v21
! 7065: POWERPC_SVR_8560_v10 = 0x80700010 | POWERPC_SVR_E500,
! 7066: POWERPC_SVR_8560_v20 = 0x80700020 | POWERPC_SVR_E500,
! 7067: POWERPC_SVR_8560_v21 = 0x80700021 | POWERPC_SVR_E500,
! 7068: POWERPC_SVR_8567 = 0x80750111 | POWERPC_SVR_E500,
! 7069: POWERPC_SVR_8567E = 0x807D0111 | POWERPC_SVR_E500,
! 7070: POWERPC_SVR_8568 = 0x80750011 | POWERPC_SVR_E500,
! 7071: POWERPC_SVR_8568E = 0x807D0011 | POWERPC_SVR_E500,
! 7072: POWERPC_SVR_8572 = 0x80E00010 | POWERPC_SVR_E500,
! 7073: POWERPC_SVR_8572E = 0x80E80010 | POWERPC_SVR_E500,
! 7074: #if 0
! 7075: POWERPC_SVR_8610 = xxx,
1.1 root 7076: #endif
1.1.1.4 ! root 7077: POWERPC_SVR_8641 = 0x80900021,
! 7078: POWERPC_SVR_8641D = 0x80900121,
! 7079: };
! 7080:
! 7081: /*****************************************************************************/
! 7082: /* PowerPC CPU definitions */
! 7083: #define POWERPC_DEF_SVR(_name, _pvr, _svr, _type) \
! 7084: { \
! 7085: .name = _name, \
! 7086: .pvr = _pvr, \
! 7087: .svr = _svr, \
! 7088: .insns_flags = glue(POWERPC_INSNS_,_type), \
! 7089: .msr_mask = glue(POWERPC_MSRM_,_type), \
! 7090: .mmu_model = glue(POWERPC_MMU_,_type), \
! 7091: .excp_model = glue(POWERPC_EXCP_,_type), \
! 7092: .bus_model = glue(POWERPC_INPUT_,_type), \
! 7093: .bfd_mach = glue(POWERPC_BFDM_,_type), \
! 7094: .flags = glue(POWERPC_FLAG_,_type), \
! 7095: .init_proc = &glue(init_proc_,_type), \
! 7096: .check_pow = &glue(check_pow_,_type), \
! 7097: }
! 7098: #define POWERPC_DEF(_name, _pvr, _type) \
! 7099: POWERPC_DEF_SVR(_name, _pvr, POWERPC_SVR_NONE, _type)
! 7100:
! 7101: static const ppc_def_t ppc_defs[] = {
! 7102: /* Embedded PowerPC */
! 7103: /* PowerPC 401 family */
! 7104: /* Generic PowerPC 401 */
! 7105: POWERPC_DEF("401", CPU_POWERPC_401, 401),
! 7106: /* PowerPC 401 cores */
! 7107: /* PowerPC 401A1 */
! 7108: POWERPC_DEF("401A1", CPU_POWERPC_401A1, 401),
! 7109: /* PowerPC 401B2 */
! 7110: POWERPC_DEF("401B2", CPU_POWERPC_401B2, 401x2),
! 7111: #if defined (TODO)
! 7112: /* PowerPC 401B3 */
! 7113: POWERPC_DEF("401B3", CPU_POWERPC_401B3, 401x3),
! 7114: #endif
! 7115: /* PowerPC 401C2 */
! 7116: POWERPC_DEF("401C2", CPU_POWERPC_401C2, 401x2),
! 7117: /* PowerPC 401D2 */
! 7118: POWERPC_DEF("401D2", CPU_POWERPC_401D2, 401x2),
! 7119: /* PowerPC 401E2 */
! 7120: POWERPC_DEF("401E2", CPU_POWERPC_401E2, 401x2),
! 7121: /* PowerPC 401F2 */
! 7122: POWERPC_DEF("401F2", CPU_POWERPC_401F2, 401x2),
! 7123: /* PowerPC 401G2 */
! 7124: /* XXX: to be checked */
! 7125: POWERPC_DEF("401G2", CPU_POWERPC_401G2, 401x2),
! 7126: /* PowerPC 401 microcontrolers */
! 7127: #if defined (TODO)
! 7128: /* PowerPC 401GF */
! 7129: POWERPC_DEF("401GF", CPU_POWERPC_401GF, 401),
! 7130: #endif
! 7131: /* IOP480 (401 microcontroler) */
! 7132: POWERPC_DEF("IOP480", CPU_POWERPC_IOP480, IOP480),
! 7133: /* IBM Processor for Network Resources */
! 7134: POWERPC_DEF("Cobra", CPU_POWERPC_COBRA, 401),
! 7135: #if defined (TODO)
! 7136: POWERPC_DEF("Xipchip", CPU_POWERPC_XIPCHIP, 401),
! 7137: #endif
! 7138: /* PowerPC 403 family */
! 7139: /* Generic PowerPC 403 */
! 7140: POWERPC_DEF("403", CPU_POWERPC_403, 403),
! 7141: /* PowerPC 403 microcontrolers */
! 7142: /* PowerPC 403 GA */
! 7143: POWERPC_DEF("403GA", CPU_POWERPC_403GA, 403),
! 7144: /* PowerPC 403 GB */
! 7145: POWERPC_DEF("403GB", CPU_POWERPC_403GB, 403),
! 7146: /* PowerPC 403 GC */
! 7147: POWERPC_DEF("403GC", CPU_POWERPC_403GC, 403),
! 7148: /* PowerPC 403 GCX */
! 7149: POWERPC_DEF("403GCX", CPU_POWERPC_403GCX, 403GCX),
! 7150: #if defined (TODO)
! 7151: /* PowerPC 403 GP */
! 7152: POWERPC_DEF("403GP", CPU_POWERPC_403GP, 403),
! 7153: #endif
! 7154: /* PowerPC 405 family */
! 7155: /* Generic PowerPC 405 */
! 7156: POWERPC_DEF("405", CPU_POWERPC_405, 405),
! 7157: /* PowerPC 405 cores */
! 7158: #if defined (TODO)
! 7159: /* PowerPC 405 A3 */
! 7160: POWERPC_DEF("405A3", CPU_POWERPC_405A3, 405),
! 7161: #endif
! 7162: #if defined (TODO)
! 7163: /* PowerPC 405 A4 */
! 7164: POWERPC_DEF("405A4", CPU_POWERPC_405A4, 405),
! 7165: #endif
! 7166: #if defined (TODO)
! 7167: /* PowerPC 405 B3 */
! 7168: POWERPC_DEF("405B3", CPU_POWERPC_405B3, 405),
! 7169: #endif
! 7170: #if defined (TODO)
! 7171: /* PowerPC 405 B4 */
! 7172: POWERPC_DEF("405B4", CPU_POWERPC_405B4, 405),
! 7173: #endif
! 7174: #if defined (TODO)
! 7175: /* PowerPC 405 C3 */
! 7176: POWERPC_DEF("405C3", CPU_POWERPC_405C3, 405),
! 7177: #endif
! 7178: #if defined (TODO)
! 7179: /* PowerPC 405 C4 */
! 7180: POWERPC_DEF("405C4", CPU_POWERPC_405C4, 405),
! 7181: #endif
! 7182: /* PowerPC 405 D2 */
! 7183: POWERPC_DEF("405D2", CPU_POWERPC_405D2, 405),
! 7184: #if defined (TODO)
! 7185: /* PowerPC 405 D3 */
! 7186: POWERPC_DEF("405D3", CPU_POWERPC_405D3, 405),
! 7187: #endif
! 7188: /* PowerPC 405 D4 */
! 7189: POWERPC_DEF("405D4", CPU_POWERPC_405D4, 405),
! 7190: #if defined (TODO)
! 7191: /* PowerPC 405 D5 */
! 7192: POWERPC_DEF("405D5", CPU_POWERPC_405D5, 405),
! 7193: #endif
! 7194: #if defined (TODO)
! 7195: /* PowerPC 405 E4 */
! 7196: POWERPC_DEF("405E4", CPU_POWERPC_405E4, 405),
! 7197: #endif
! 7198: #if defined (TODO)
! 7199: /* PowerPC 405 F4 */
! 7200: POWERPC_DEF("405F4", CPU_POWERPC_405F4, 405),
! 7201: #endif
! 7202: #if defined (TODO)
! 7203: /* PowerPC 405 F5 */
! 7204: POWERPC_DEF("405F5", CPU_POWERPC_405F5, 405),
! 7205: #endif
! 7206: #if defined (TODO)
! 7207: /* PowerPC 405 F6 */
! 7208: POWERPC_DEF("405F6", CPU_POWERPC_405F6, 405),
! 7209: #endif
! 7210: /* PowerPC 405 microcontrolers */
! 7211: /* PowerPC 405 CR */
! 7212: POWERPC_DEF("405CR", CPU_POWERPC_405CR, 405),
! 7213: /* PowerPC 405 CRa */
! 7214: POWERPC_DEF("405CRa", CPU_POWERPC_405CRa, 405),
! 7215: /* PowerPC 405 CRb */
! 7216: POWERPC_DEF("405CRb", CPU_POWERPC_405CRb, 405),
! 7217: /* PowerPC 405 CRc */
! 7218: POWERPC_DEF("405CRc", CPU_POWERPC_405CRc, 405),
! 7219: /* PowerPC 405 EP */
! 7220: POWERPC_DEF("405EP", CPU_POWERPC_405EP, 405),
! 7221: #if defined(TODO)
! 7222: /* PowerPC 405 EXr */
! 7223: POWERPC_DEF("405EXr", CPU_POWERPC_405EXr, 405),
! 7224: #endif
! 7225: /* PowerPC 405 EZ */
! 7226: POWERPC_DEF("405EZ", CPU_POWERPC_405EZ, 405),
! 7227: #if defined(TODO)
! 7228: /* PowerPC 405 FX */
! 7229: POWERPC_DEF("405FX", CPU_POWERPC_405FX, 405),
! 7230: #endif
! 7231: /* PowerPC 405 GP */
! 7232: POWERPC_DEF("405GP", CPU_POWERPC_405GP, 405),
! 7233: /* PowerPC 405 GPa */
! 7234: POWERPC_DEF("405GPa", CPU_POWERPC_405GPa, 405),
! 7235: /* PowerPC 405 GPb */
! 7236: POWERPC_DEF("405GPb", CPU_POWERPC_405GPb, 405),
! 7237: /* PowerPC 405 GPc */
! 7238: POWERPC_DEF("405GPc", CPU_POWERPC_405GPc, 405),
! 7239: /* PowerPC 405 GPd */
! 7240: POWERPC_DEF("405GPd", CPU_POWERPC_405GPd, 405),
! 7241: /* PowerPC 405 GPe */
! 7242: POWERPC_DEF("405GPe", CPU_POWERPC_405GPe, 405),
! 7243: /* PowerPC 405 GPR */
! 7244: POWERPC_DEF("405GPR", CPU_POWERPC_405GPR, 405),
! 7245: #if defined(TODO)
! 7246: /* PowerPC 405 H */
! 7247: POWERPC_DEF("405H", CPU_POWERPC_405H, 405),
! 7248: #endif
! 7249: #if defined(TODO)
! 7250: /* PowerPC 405 L */
! 7251: POWERPC_DEF("405L", CPU_POWERPC_405L, 405),
! 7252: #endif
! 7253: /* PowerPC 405 LP */
! 7254: POWERPC_DEF("405LP", CPU_POWERPC_405LP, 405),
! 7255: #if defined(TODO)
! 7256: /* PowerPC 405 PM */
! 7257: POWERPC_DEF("405PM", CPU_POWERPC_405PM, 405),
! 7258: #endif
! 7259: #if defined(TODO)
! 7260: /* PowerPC 405 PS */
! 7261: POWERPC_DEF("405PS", CPU_POWERPC_405PS, 405),
! 7262: #endif
! 7263: #if defined(TODO)
! 7264: /* PowerPC 405 S */
! 7265: POWERPC_DEF("405S", CPU_POWERPC_405S, 405),
! 7266: #endif
! 7267: /* Npe405 H */
! 7268: POWERPC_DEF("Npe405H", CPU_POWERPC_NPE405H, 405),
! 7269: /* Npe405 H2 */
! 7270: POWERPC_DEF("Npe405H2", CPU_POWERPC_NPE405H2, 405),
! 7271: /* Npe405 L */
! 7272: POWERPC_DEF("Npe405L", CPU_POWERPC_NPE405L, 405),
! 7273: /* Npe4GS3 */
! 7274: POWERPC_DEF("Npe4GS3", CPU_POWERPC_NPE4GS3, 405),
! 7275: #if defined (TODO)
! 7276: POWERPC_DEF("Npcxx1", CPU_POWERPC_NPCxx1, 405),
! 7277: #endif
! 7278: #if defined (TODO)
! 7279: POWERPC_DEF("Npr161", CPU_POWERPC_NPR161, 405),
! 7280: #endif
! 7281: #if defined (TODO)
! 7282: /* PowerPC LC77700 (Sanyo) */
! 7283: POWERPC_DEF("LC77700", CPU_POWERPC_LC77700, 405),
! 7284: #endif
! 7285: /* PowerPC 401/403/405 based set-top-box microcontrolers */
! 7286: #if defined (TODO)
! 7287: /* STB010000 */
! 7288: POWERPC_DEF("STB01000", CPU_POWERPC_STB01000, 401x2),
! 7289: #endif
! 7290: #if defined (TODO)
! 7291: /* STB01010 */
! 7292: POWERPC_DEF("STB01010", CPU_POWERPC_STB01010, 401x2),
! 7293: #endif
! 7294: #if defined (TODO)
! 7295: /* STB0210 */
! 7296: POWERPC_DEF("STB0210", CPU_POWERPC_STB0210, 401x3),
! 7297: #endif
! 7298: /* STB03xx */
! 7299: POWERPC_DEF("STB03", CPU_POWERPC_STB03, 405),
! 7300: #if defined (TODO)
! 7301: /* STB043x */
! 7302: POWERPC_DEF("STB043", CPU_POWERPC_STB043, 405),
! 7303: #endif
! 7304: #if defined (TODO)
! 7305: /* STB045x */
! 7306: POWERPC_DEF("STB045", CPU_POWERPC_STB045, 405),
! 7307: #endif
! 7308: /* STB04xx */
! 7309: POWERPC_DEF("STB04", CPU_POWERPC_STB04, 405),
! 7310: /* STB25xx */
! 7311: POWERPC_DEF("STB25", CPU_POWERPC_STB25, 405),
! 7312: #if defined (TODO)
! 7313: /* STB130 */
! 7314: POWERPC_DEF("STB130", CPU_POWERPC_STB130, 405),
! 7315: #endif
! 7316: /* Xilinx PowerPC 405 cores */
! 7317: POWERPC_DEF("x2vp4", CPU_POWERPC_X2VP4, 405),
! 7318: POWERPC_DEF("x2vp7", CPU_POWERPC_X2VP7, 405),
! 7319: POWERPC_DEF("x2vp20", CPU_POWERPC_X2VP20, 405),
! 7320: POWERPC_DEF("x2vp50", CPU_POWERPC_X2VP50, 405),
! 7321: #if defined (TODO)
! 7322: /* Zarlink ZL10310 */
! 7323: POWERPC_DEF("zl10310", CPU_POWERPC_ZL10310, 405),
! 7324: #endif
! 7325: #if defined (TODO)
! 7326: /* Zarlink ZL10311 */
! 7327: POWERPC_DEF("zl10311", CPU_POWERPC_ZL10311, 405),
! 7328: #endif
! 7329: #if defined (TODO)
! 7330: /* Zarlink ZL10320 */
! 7331: POWERPC_DEF("zl10320", CPU_POWERPC_ZL10320, 405),
! 7332: #endif
! 7333: #if defined (TODO)
! 7334: /* Zarlink ZL10321 */
! 7335: POWERPC_DEF("zl10321", CPU_POWERPC_ZL10321, 405),
! 7336: #endif
! 7337: /* PowerPC 440 family */
! 7338: #if defined(TODO_USER_ONLY)
! 7339: /* Generic PowerPC 440 */
! 7340: POWERPC_DEF("440", CPU_POWERPC_440, 440GP),
! 7341: #endif
! 7342: /* PowerPC 440 cores */
! 7343: #if defined (TODO)
! 7344: /* PowerPC 440 A4 */
! 7345: POWERPC_DEF("440A4", CPU_POWERPC_440A4, 440x4),
! 7346: #endif
! 7347: #if defined (TODO)
! 7348: /* PowerPC 440 A5 */
! 7349: POWERPC_DEF("440A5", CPU_POWERPC_440A5, 440x5),
! 7350: #endif
! 7351: #if defined (TODO)
! 7352: /* PowerPC 440 B4 */
! 7353: POWERPC_DEF("440B4", CPU_POWERPC_440B4, 440x4),
! 7354: #endif
! 7355: #if defined (TODO)
! 7356: /* PowerPC 440 G4 */
! 7357: POWERPC_DEF("440G4", CPU_POWERPC_440G4, 440x4),
! 7358: #endif
! 7359: #if defined (TODO)
! 7360: /* PowerPC 440 F5 */
! 7361: POWERPC_DEF("440F5", CPU_POWERPC_440F5, 440x5),
! 7362: #endif
! 7363: #if defined (TODO)
! 7364: /* PowerPC 440 G5 */
! 7365: POWERPC_DEF("440G5", CPU_POWERPC_440G5, 440x5),
! 7366: #endif
! 7367: #if defined (TODO)
! 7368: /* PowerPC 440H4 */
! 7369: POWERPC_DEF("440H4", CPU_POWERPC_440H4, 440x4),
! 7370: #endif
! 7371: #if defined (TODO)
! 7372: /* PowerPC 440H6 */
! 7373: POWERPC_DEF("440H6", CPU_POWERPC_440H6, 440Gx5),
! 7374: #endif
! 7375: /* PowerPC 440 microcontrolers */
! 7376: #if defined(TODO_USER_ONLY)
! 7377: /* PowerPC 440 EP */
! 7378: POWERPC_DEF("440EP", CPU_POWERPC_440EP, 440EP),
! 7379: #endif
! 7380: #if defined(TODO_USER_ONLY)
! 7381: /* PowerPC 440 EPa */
! 7382: POWERPC_DEF("440EPa", CPU_POWERPC_440EPa, 440EP),
! 7383: #endif
! 7384: #if defined(TODO_USER_ONLY)
! 7385: /* PowerPC 440 EPb */
! 7386: POWERPC_DEF("440EPb", CPU_POWERPC_440EPb, 440EP),
! 7387: #endif
! 7388: #if defined(TODO_USER_ONLY)
! 7389: /* PowerPC 440 EPX */
! 7390: POWERPC_DEF("440EPX", CPU_POWERPC_440EPX, 440EP),
! 7391: #endif
! 7392: #if defined(TODO_USER_ONLY)
! 7393: /* PowerPC 440 GP */
! 7394: POWERPC_DEF("440GP", CPU_POWERPC_440GP, 440GP),
! 7395: #endif
! 7396: #if defined(TODO_USER_ONLY)
! 7397: /* PowerPC 440 GPb */
! 7398: POWERPC_DEF("440GPb", CPU_POWERPC_440GPb, 440GP),
! 7399: #endif
! 7400: #if defined(TODO_USER_ONLY)
! 7401: /* PowerPC 440 GPc */
! 7402: POWERPC_DEF("440GPc", CPU_POWERPC_440GPc, 440GP),
! 7403: #endif
! 7404: #if defined(TODO_USER_ONLY)
! 7405: /* PowerPC 440 GR */
! 7406: POWERPC_DEF("440GR", CPU_POWERPC_440GR, 440x5),
! 7407: #endif
! 7408: #if defined(TODO_USER_ONLY)
! 7409: /* PowerPC 440 GRa */
! 7410: POWERPC_DEF("440GRa", CPU_POWERPC_440GRa, 440x5),
! 7411: #endif
! 7412: #if defined(TODO_USER_ONLY)
! 7413: /* PowerPC 440 GRX */
! 7414: POWERPC_DEF("440GRX", CPU_POWERPC_440GRX, 440x5),
! 7415: #endif
! 7416: #if defined(TODO_USER_ONLY)
! 7417: /* PowerPC 440 GX */
! 7418: POWERPC_DEF("440GX", CPU_POWERPC_440GX, 440EP),
! 7419: #endif
! 7420: #if defined(TODO_USER_ONLY)
! 7421: /* PowerPC 440 GXa */
! 7422: POWERPC_DEF("440GXa", CPU_POWERPC_440GXa, 440EP),
! 7423: #endif
! 7424: #if defined(TODO_USER_ONLY)
! 7425: /* PowerPC 440 GXb */
! 7426: POWERPC_DEF("440GXb", CPU_POWERPC_440GXb, 440EP),
! 7427: #endif
! 7428: #if defined(TODO_USER_ONLY)
! 7429: /* PowerPC 440 GXc */
! 7430: POWERPC_DEF("440GXc", CPU_POWERPC_440GXc, 440EP),
! 7431: #endif
! 7432: #if defined(TODO_USER_ONLY)
! 7433: /* PowerPC 440 GXf */
! 7434: POWERPC_DEF("440GXf", CPU_POWERPC_440GXf, 440EP),
! 7435: #endif
! 7436: #if defined(TODO)
! 7437: /* PowerPC 440 S */
! 7438: POWERPC_DEF("440S", CPU_POWERPC_440S, 440),
! 7439: #endif
! 7440: #if defined(TODO_USER_ONLY)
! 7441: /* PowerPC 440 SP */
! 7442: POWERPC_DEF("440SP", CPU_POWERPC_440SP, 440EP),
! 7443: #endif
! 7444: #if defined(TODO_USER_ONLY)
! 7445: /* PowerPC 440 SP2 */
! 7446: POWERPC_DEF("440SP2", CPU_POWERPC_440SP2, 440EP),
! 7447: #endif
! 7448: #if defined(TODO_USER_ONLY)
! 7449: /* PowerPC 440 SPE */
! 7450: POWERPC_DEF("440SPE", CPU_POWERPC_440SPE, 440EP),
! 7451: #endif
! 7452: /* PowerPC 460 family */
! 7453: #if defined (TODO)
! 7454: /* Generic PowerPC 464 */
! 7455: POWERPC_DEF("464", CPU_POWERPC_464, 460),
! 7456: #endif
! 7457: /* PowerPC 464 microcontrolers */
! 7458: #if defined (TODO)
! 7459: /* PowerPC 464H90 */
! 7460: POWERPC_DEF("464H90", CPU_POWERPC_464H90, 460),
! 7461: #endif
! 7462: #if defined (TODO)
! 7463: /* PowerPC 464H90F */
! 7464: POWERPC_DEF("464H90F", CPU_POWERPC_464H90F, 460F),
! 7465: #endif
! 7466: /* Freescale embedded PowerPC cores */
! 7467: /* MPC5xx family (aka RCPU) */
! 7468: #if defined(TODO_USER_ONLY)
! 7469: /* Generic MPC5xx core */
! 7470: POWERPC_DEF("MPC5xx", CPU_POWERPC_MPC5xx, MPC5xx),
! 7471: #endif
! 7472: #if defined(TODO_USER_ONLY)
! 7473: /* Codename for MPC5xx core */
! 7474: POWERPC_DEF("RCPU", CPU_POWERPC_MPC5xx, MPC5xx),
! 7475: #endif
! 7476: /* MPC5xx microcontrollers */
! 7477: #if defined(TODO_USER_ONLY)
! 7478: /* MGT560 */
! 7479: POWERPC_DEF("MGT560", CPU_POWERPC_MGT560, MPC5xx),
! 7480: #endif
! 7481: #if defined(TODO_USER_ONLY)
! 7482: /* MPC509 */
! 7483: POWERPC_DEF("MPC509", CPU_POWERPC_MPC509, MPC5xx),
! 7484: #endif
! 7485: #if defined(TODO_USER_ONLY)
! 7486: /* MPC533 */
! 7487: POWERPC_DEF("MPC533", CPU_POWERPC_MPC533, MPC5xx),
! 7488: #endif
! 7489: #if defined(TODO_USER_ONLY)
! 7490: /* MPC534 */
! 7491: POWERPC_DEF("MPC534", CPU_POWERPC_MPC534, MPC5xx),
! 7492: #endif
! 7493: #if defined(TODO_USER_ONLY)
! 7494: /* MPC555 */
! 7495: POWERPC_DEF("MPC555", CPU_POWERPC_MPC555, MPC5xx),
! 7496: #endif
! 7497: #if defined(TODO_USER_ONLY)
! 7498: /* MPC556 */
! 7499: POWERPC_DEF("MPC556", CPU_POWERPC_MPC556, MPC5xx),
! 7500: #endif
! 7501: #if defined(TODO_USER_ONLY)
! 7502: /* MPC560 */
! 7503: POWERPC_DEF("MPC560", CPU_POWERPC_MPC560, MPC5xx),
! 7504: #endif
! 7505: #if defined(TODO_USER_ONLY)
! 7506: /* MPC561 */
! 7507: POWERPC_DEF("MPC561", CPU_POWERPC_MPC561, MPC5xx),
! 7508: #endif
! 7509: #if defined(TODO_USER_ONLY)
! 7510: /* MPC562 */
! 7511: POWERPC_DEF("MPC562", CPU_POWERPC_MPC562, MPC5xx),
! 7512: #endif
! 7513: #if defined(TODO_USER_ONLY)
! 7514: /* MPC563 */
! 7515: POWERPC_DEF("MPC563", CPU_POWERPC_MPC563, MPC5xx),
! 7516: #endif
! 7517: #if defined(TODO_USER_ONLY)
! 7518: /* MPC564 */
! 7519: POWERPC_DEF("MPC564", CPU_POWERPC_MPC564, MPC5xx),
! 7520: #endif
! 7521: #if defined(TODO_USER_ONLY)
! 7522: /* MPC565 */
! 7523: POWERPC_DEF("MPC565", CPU_POWERPC_MPC565, MPC5xx),
! 7524: #endif
! 7525: #if defined(TODO_USER_ONLY)
! 7526: /* MPC566 */
! 7527: POWERPC_DEF("MPC566", CPU_POWERPC_MPC566, MPC5xx),
! 7528: #endif
! 7529: /* MPC8xx family (aka PowerQUICC) */
! 7530: #if defined(TODO_USER_ONLY)
! 7531: /* Generic MPC8xx core */
! 7532: POWERPC_DEF("MPC8xx", CPU_POWERPC_MPC8xx, MPC8xx),
! 7533: #endif
! 7534: #if defined(TODO_USER_ONLY)
! 7535: /* Codename for MPC8xx core */
! 7536: POWERPC_DEF("PowerQUICC", CPU_POWERPC_MPC8xx, MPC8xx),
! 7537: #endif
! 7538: /* MPC8xx microcontrollers */
! 7539: #if defined(TODO_USER_ONLY)
! 7540: /* MGT823 */
! 7541: POWERPC_DEF("MGT823", CPU_POWERPC_MGT823, MPC8xx),
! 7542: #endif
! 7543: #if defined(TODO_USER_ONLY)
! 7544: /* MPC821 */
! 7545: POWERPC_DEF("MPC821", CPU_POWERPC_MPC821, MPC8xx),
! 7546: #endif
! 7547: #if defined(TODO_USER_ONLY)
! 7548: /* MPC823 */
! 7549: POWERPC_DEF("MPC823", CPU_POWERPC_MPC823, MPC8xx),
! 7550: #endif
! 7551: #if defined(TODO_USER_ONLY)
! 7552: /* MPC850 */
! 7553: POWERPC_DEF("MPC850", CPU_POWERPC_MPC850, MPC8xx),
! 7554: #endif
! 7555: #if defined(TODO_USER_ONLY)
! 7556: /* MPC852T */
! 7557: POWERPC_DEF("MPC852T", CPU_POWERPC_MPC852T, MPC8xx),
! 7558: #endif
! 7559: #if defined(TODO_USER_ONLY)
! 7560: /* MPC855T */
! 7561: POWERPC_DEF("MPC855T", CPU_POWERPC_MPC855T, MPC8xx),
! 7562: #endif
! 7563: #if defined(TODO_USER_ONLY)
! 7564: /* MPC857 */
! 7565: POWERPC_DEF("MPC857", CPU_POWERPC_MPC857, MPC8xx),
! 7566: #endif
! 7567: #if defined(TODO_USER_ONLY)
! 7568: /* MPC859 */
! 7569: POWERPC_DEF("MPC859", CPU_POWERPC_MPC859, MPC8xx),
! 7570: #endif
! 7571: #if defined(TODO_USER_ONLY)
! 7572: /* MPC860 */
! 7573: POWERPC_DEF("MPC860", CPU_POWERPC_MPC860, MPC8xx),
! 7574: #endif
! 7575: #if defined(TODO_USER_ONLY)
! 7576: /* MPC862 */
! 7577: POWERPC_DEF("MPC862", CPU_POWERPC_MPC862, MPC8xx),
! 7578: #endif
! 7579: #if defined(TODO_USER_ONLY)
! 7580: /* MPC866 */
! 7581: POWERPC_DEF("MPC866", CPU_POWERPC_MPC866, MPC8xx),
! 7582: #endif
! 7583: #if defined(TODO_USER_ONLY)
! 7584: /* MPC870 */
! 7585: POWERPC_DEF("MPC870", CPU_POWERPC_MPC870, MPC8xx),
! 7586: #endif
! 7587: #if defined(TODO_USER_ONLY)
! 7588: /* MPC875 */
! 7589: POWERPC_DEF("MPC875", CPU_POWERPC_MPC875, MPC8xx),
! 7590: #endif
! 7591: #if defined(TODO_USER_ONLY)
! 7592: /* MPC880 */
! 7593: POWERPC_DEF("MPC880", CPU_POWERPC_MPC880, MPC8xx),
! 7594: #endif
! 7595: #if defined(TODO_USER_ONLY)
! 7596: /* MPC885 */
! 7597: POWERPC_DEF("MPC885", CPU_POWERPC_MPC885, MPC8xx),
! 7598: #endif
! 7599: /* MPC82xx family (aka PowerQUICC-II) */
! 7600: /* Generic MPC52xx core */
! 7601: POWERPC_DEF_SVR("MPC52xx",
! 7602: CPU_POWERPC_MPC52xx, POWERPC_SVR_52xx, G2LE),
! 7603: /* Generic MPC82xx core */
! 7604: POWERPC_DEF("MPC82xx", CPU_POWERPC_MPC82xx, G2),
! 7605: /* Codename for MPC82xx */
! 7606: POWERPC_DEF("PowerQUICC-II", CPU_POWERPC_MPC82xx, G2),
! 7607: /* PowerPC G2 core */
! 7608: POWERPC_DEF("G2", CPU_POWERPC_G2, G2),
! 7609: /* PowerPC G2 H4 core */
! 7610: POWERPC_DEF("G2H4", CPU_POWERPC_G2H4, G2),
! 7611: /* PowerPC G2 GP core */
! 7612: POWERPC_DEF("G2GP", CPU_POWERPC_G2gp, G2),
! 7613: /* PowerPC G2 LS core */
! 7614: POWERPC_DEF("G2LS", CPU_POWERPC_G2ls, G2),
! 7615: /* PowerPC G2 HiP3 core */
! 7616: POWERPC_DEF("G2HiP3", CPU_POWERPC_G2_HIP3, G2),
! 7617: /* PowerPC G2 HiP4 core */
! 7618: POWERPC_DEF("G2HiP4", CPU_POWERPC_G2_HIP4, G2),
! 7619: /* PowerPC MPC603 core */
! 7620: POWERPC_DEF("MPC603", CPU_POWERPC_MPC603, 603E),
! 7621: /* PowerPC G2le core (same as G2 plus little-endian mode support) */
! 7622: POWERPC_DEF("G2le", CPU_POWERPC_G2LE, G2LE),
! 7623: /* PowerPC G2LE GP core */
! 7624: POWERPC_DEF("G2leGP", CPU_POWERPC_G2LEgp, G2LE),
! 7625: /* PowerPC G2LE LS core */
! 7626: POWERPC_DEF("G2leLS", CPU_POWERPC_G2LEls, G2LE),
! 7627: /* PowerPC G2LE GP1 core */
! 7628: POWERPC_DEF("G2leGP1", CPU_POWERPC_G2LEgp1, G2LE),
! 7629: /* PowerPC G2LE GP3 core */
! 7630: POWERPC_DEF("G2leGP3", CPU_POWERPC_G2LEgp1, G2LE),
! 7631: /* PowerPC MPC603 microcontrollers */
! 7632: /* MPC8240 */
! 7633: POWERPC_DEF("MPC8240", CPU_POWERPC_MPC8240, 603E),
! 7634: /* PowerPC G2 microcontrollers */
! 7635: #if defined(TODO)
! 7636: /* MPC5121 */
! 7637: POWERPC_DEF_SVR("MPC5121",
! 7638: CPU_POWERPC_MPC5121, POWERPC_SVR_5121, G2LE),
! 7639: #endif
! 7640: /* MPC5200 */
! 7641: POWERPC_DEF_SVR("MPC5200",
! 7642: CPU_POWERPC_MPC5200, POWERPC_SVR_5200, G2LE),
! 7643: /* MPC5200 v1.0 */
! 7644: POWERPC_DEF_SVR("MPC5200_v10",
! 7645: CPU_POWERPC_MPC5200_v10, POWERPC_SVR_5200_v10, G2LE),
! 7646: /* MPC5200 v1.1 */
! 7647: POWERPC_DEF_SVR("MPC5200_v11",
! 7648: CPU_POWERPC_MPC5200_v11, POWERPC_SVR_5200_v11, G2LE),
! 7649: /* MPC5200 v1.2 */
! 7650: POWERPC_DEF_SVR("MPC5200_v12",
! 7651: CPU_POWERPC_MPC5200_v12, POWERPC_SVR_5200_v12, G2LE),
! 7652: /* MPC5200B */
! 7653: POWERPC_DEF_SVR("MPC5200B",
! 7654: CPU_POWERPC_MPC5200B, POWERPC_SVR_5200B, G2LE),
! 7655: /* MPC5200B v2.0 */
! 7656: POWERPC_DEF_SVR("MPC5200B_v20",
! 7657: CPU_POWERPC_MPC5200B_v20, POWERPC_SVR_5200B_v20, G2LE),
! 7658: /* MPC5200B v2.1 */
! 7659: POWERPC_DEF_SVR("MPC5200B_v21",
! 7660: CPU_POWERPC_MPC5200B_v21, POWERPC_SVR_5200B_v21, G2LE),
! 7661: /* MPC8241 */
! 7662: POWERPC_DEF("MPC8241", CPU_POWERPC_MPC8241, G2),
! 7663: /* MPC8245 */
! 7664: POWERPC_DEF("MPC8245", CPU_POWERPC_MPC8245, G2),
! 7665: /* MPC8247 */
! 7666: POWERPC_DEF("MPC8247", CPU_POWERPC_MPC8247, G2LE),
! 7667: /* MPC8248 */
! 7668: POWERPC_DEF("MPC8248", CPU_POWERPC_MPC8248, G2LE),
! 7669: /* MPC8250 */
! 7670: POWERPC_DEF("MPC8250", CPU_POWERPC_MPC8250, G2),
! 7671: /* MPC8250 HiP3 */
! 7672: POWERPC_DEF("MPC8250_HiP3", CPU_POWERPC_MPC8250_HiP3, G2),
! 7673: /* MPC8250 HiP4 */
! 7674: POWERPC_DEF("MPC8250_HiP4", CPU_POWERPC_MPC8250_HiP4, G2),
! 7675: /* MPC8255 */
! 7676: POWERPC_DEF("MPC8255", CPU_POWERPC_MPC8255, G2),
! 7677: /* MPC8255 HiP3 */
! 7678: POWERPC_DEF("MPC8255_HiP3", CPU_POWERPC_MPC8255_HiP3, G2),
! 7679: /* MPC8255 HiP4 */
! 7680: POWERPC_DEF("MPC8255_HiP4", CPU_POWERPC_MPC8255_HiP4, G2),
! 7681: /* MPC8260 */
! 7682: POWERPC_DEF("MPC8260", CPU_POWERPC_MPC8260, G2),
! 7683: /* MPC8260 HiP3 */
! 7684: POWERPC_DEF("MPC8260_HiP3", CPU_POWERPC_MPC8260_HiP3, G2),
! 7685: /* MPC8260 HiP4 */
! 7686: POWERPC_DEF("MPC8260_HiP4", CPU_POWERPC_MPC8260_HiP4, G2),
! 7687: /* MPC8264 */
! 7688: POWERPC_DEF("MPC8264", CPU_POWERPC_MPC8264, G2),
! 7689: /* MPC8264 HiP3 */
! 7690: POWERPC_DEF("MPC8264_HiP3", CPU_POWERPC_MPC8264_HiP3, G2),
! 7691: /* MPC8264 HiP4 */
! 7692: POWERPC_DEF("MPC8264_HiP4", CPU_POWERPC_MPC8264_HiP4, G2),
! 7693: /* MPC8265 */
! 7694: POWERPC_DEF("MPC8265", CPU_POWERPC_MPC8265, G2),
! 7695: /* MPC8265 HiP3 */
! 7696: POWERPC_DEF("MPC8265_HiP3", CPU_POWERPC_MPC8265_HiP3, G2),
! 7697: /* MPC8265 HiP4 */
! 7698: POWERPC_DEF("MPC8265_HiP4", CPU_POWERPC_MPC8265_HiP4, G2),
! 7699: /* MPC8266 */
! 7700: POWERPC_DEF("MPC8266", CPU_POWERPC_MPC8266, G2),
! 7701: /* MPC8266 HiP3 */
! 7702: POWERPC_DEF("MPC8266_HiP3", CPU_POWERPC_MPC8266_HiP3, G2),
! 7703: /* MPC8266 HiP4 */
! 7704: POWERPC_DEF("MPC8266_HiP4", CPU_POWERPC_MPC8266_HiP4, G2),
! 7705: /* MPC8270 */
! 7706: POWERPC_DEF("MPC8270", CPU_POWERPC_MPC8270, G2LE),
! 7707: /* MPC8271 */
! 7708: POWERPC_DEF("MPC8271", CPU_POWERPC_MPC8271, G2LE),
! 7709: /* MPC8272 */
! 7710: POWERPC_DEF("MPC8272", CPU_POWERPC_MPC8272, G2LE),
! 7711: /* MPC8275 */
! 7712: POWERPC_DEF("MPC8275", CPU_POWERPC_MPC8275, G2LE),
! 7713: /* MPC8280 */
! 7714: POWERPC_DEF("MPC8280", CPU_POWERPC_MPC8280, G2LE),
! 7715: /* e200 family */
! 7716: /* Generic PowerPC e200 core */
! 7717: POWERPC_DEF("e200", CPU_POWERPC_e200, e200),
! 7718: /* Generic MPC55xx core */
! 7719: #if defined (TODO)
! 7720: POWERPC_DEF_SVR("MPC55xx",
! 7721: CPU_POWERPC_MPC55xx, POWERPC_SVR_55xx, e200),
! 7722: #endif
! 7723: #if defined (TODO)
! 7724: /* PowerPC e200z0 core */
! 7725: POWERPC_DEF("e200z0", CPU_POWERPC_e200z0, e200),
! 7726: #endif
! 7727: #if defined (TODO)
! 7728: /* PowerPC e200z1 core */
! 7729: POWERPC_DEF("e200z1", CPU_POWERPC_e200z1, e200),
! 7730: #endif
! 7731: #if defined (TODO)
! 7732: /* PowerPC e200z3 core */
! 7733: POWERPC_DEF("e200z3", CPU_POWERPC_e200z3, e200),
! 7734: #endif
! 7735: /* PowerPC e200z5 core */
! 7736: POWERPC_DEF("e200z5", CPU_POWERPC_e200z5, e200),
! 7737: /* PowerPC e200z6 core */
! 7738: POWERPC_DEF("e200z6", CPU_POWERPC_e200z6, e200),
! 7739: /* PowerPC e200 microcontrollers */
! 7740: #if defined (TODO)
! 7741: /* MPC5514E */
! 7742: POWERPC_DEF_SVR("MPC5514E",
! 7743: CPU_POWERPC_MPC5514E, POWERPC_SVR_5514E, e200),
! 7744: #endif
! 7745: #if defined (TODO)
! 7746: /* MPC5514E v0 */
! 7747: POWERPC_DEF_SVR("MPC5514E_v0",
! 7748: CPU_POWERPC_MPC5514E_v0, POWERPC_SVR_5514E_v0, e200),
! 7749: #endif
! 7750: #if defined (TODO)
! 7751: /* MPC5514E v1 */
! 7752: POWERPC_DEF_SVR("MPC5514E_v1",
! 7753: CPU_POWERPC_MPC5514E_v1, POWERPC_SVR_5514E_v1, e200),
! 7754: #endif
! 7755: #if defined (TODO)
! 7756: /* MPC5514G */
! 7757: POWERPC_DEF_SVR("MPC5514G",
! 7758: CPU_POWERPC_MPC5514G, POWERPC_SVR_5514G, e200),
! 7759: #endif
! 7760: #if defined (TODO)
! 7761: /* MPC5514G v0 */
! 7762: POWERPC_DEF_SVR("MPC5514G_v0",
! 7763: CPU_POWERPC_MPC5514G_v0, POWERPC_SVR_5514G_v0, e200),
! 7764: #endif
! 7765: #if defined (TODO)
! 7766: /* MPC5514G v1 */
! 7767: POWERPC_DEF_SVR("MPC5514G_v1",
! 7768: CPU_POWERPC_MPC5514G_v1, POWERPC_SVR_5514G_v1, e200),
! 7769: #endif
! 7770: #if defined (TODO)
! 7771: /* MPC5515S */
! 7772: POWERPC_DEF_SVR("MPC5515S",
! 7773: CPU_POWERPC_MPC5515S, POWERPC_SVR_5515S, e200),
! 7774: #endif
! 7775: #if defined (TODO)
! 7776: /* MPC5516E */
! 7777: POWERPC_DEF_SVR("MPC5516E",
! 7778: CPU_POWERPC_MPC5516E, POWERPC_SVR_5516E, e200),
! 7779: #endif
! 7780: #if defined (TODO)
! 7781: /* MPC5516E v0 */
! 7782: POWERPC_DEF_SVR("MPC5516E_v0",
! 7783: CPU_POWERPC_MPC5516E_v0, POWERPC_SVR_5516E_v0, e200),
! 7784: #endif
! 7785: #if defined (TODO)
! 7786: /* MPC5516E v1 */
! 7787: POWERPC_DEF_SVR("MPC5516E_v1",
! 7788: CPU_POWERPC_MPC5516E_v1, POWERPC_SVR_5516E_v1, e200),
! 7789: #endif
! 7790: #if defined (TODO)
! 7791: /* MPC5516G */
! 7792: POWERPC_DEF_SVR("MPC5516G",
! 7793: CPU_POWERPC_MPC5516G, POWERPC_SVR_5516G, e200),
! 7794: #endif
! 7795: #if defined (TODO)
! 7796: /* MPC5516G v0 */
! 7797: POWERPC_DEF_SVR("MPC5516G_v0",
! 7798: CPU_POWERPC_MPC5516G_v0, POWERPC_SVR_5516G_v0, e200),
! 7799: #endif
! 7800: #if defined (TODO)
! 7801: /* MPC5516G v1 */
! 7802: POWERPC_DEF_SVR("MPC5516G_v1",
! 7803: CPU_POWERPC_MPC5516G_v1, POWERPC_SVR_5516G_v1, e200),
! 7804: #endif
! 7805: #if defined (TODO)
! 7806: /* MPC5516S */
! 7807: POWERPC_DEF_SVR("MPC5516S",
! 7808: CPU_POWERPC_MPC5516S, POWERPC_SVR_5516S, e200),
! 7809: #endif
! 7810: #if defined (TODO)
! 7811: /* MPC5533 */
! 7812: POWERPC_DEF_SVR("MPC5533",
! 7813: CPU_POWERPC_MPC5533, POWERPC_SVR_5533, e200),
! 7814: #endif
! 7815: #if defined (TODO)
! 7816: /* MPC5534 */
! 7817: POWERPC_DEF_SVR("MPC5534",
! 7818: CPU_POWERPC_MPC5534, POWERPC_SVR_5534, e200),
! 7819: #endif
! 7820: #if defined (TODO)
! 7821: /* MPC5553 */
! 7822: POWERPC_DEF_SVR("MPC5553",
! 7823: CPU_POWERPC_MPC5553, POWERPC_SVR_5553, e200),
! 7824: #endif
! 7825: #if defined (TODO)
! 7826: /* MPC5554 */
! 7827: POWERPC_DEF_SVR("MPC5554",
! 7828: CPU_POWERPC_MPC5554, POWERPC_SVR_5554, e200),
! 7829: #endif
! 7830: #if defined (TODO)
! 7831: /* MPC5561 */
! 7832: POWERPC_DEF_SVR("MPC5561",
! 7833: CPU_POWERPC_MPC5561, POWERPC_SVR_5561, e200),
! 7834: #endif
! 7835: #if defined (TODO)
! 7836: /* MPC5565 */
! 7837: POWERPC_DEF_SVR("MPC5565",
! 7838: CPU_POWERPC_MPC5565, POWERPC_SVR_5565, e200),
! 7839: #endif
! 7840: #if defined (TODO)
! 7841: /* MPC5566 */
! 7842: POWERPC_DEF_SVR("MPC5566",
! 7843: CPU_POWERPC_MPC5566, POWERPC_SVR_5566, e200),
! 7844: #endif
! 7845: #if defined (TODO)
! 7846: /* MPC5567 */
! 7847: POWERPC_DEF_SVR("MPC5567",
! 7848: CPU_POWERPC_MPC5567, POWERPC_SVR_5567, e200),
! 7849: #endif
! 7850: /* e300 family */
! 7851: /* Generic PowerPC e300 core */
! 7852: POWERPC_DEF("e300", CPU_POWERPC_e300, e300),
! 7853: /* PowerPC e300c1 core */
! 7854: POWERPC_DEF("e300c1", CPU_POWERPC_e300c1, e300),
! 7855: /* PowerPC e300c2 core */
! 7856: POWERPC_DEF("e300c2", CPU_POWERPC_e300c2, e300),
! 7857: /* PowerPC e300c3 core */
! 7858: POWERPC_DEF("e300c3", CPU_POWERPC_e300c3, e300),
! 7859: /* PowerPC e300c4 core */
! 7860: POWERPC_DEF("e300c4", CPU_POWERPC_e300c4, e300),
! 7861: /* PowerPC e300 microcontrollers */
! 7862: #if defined (TODO)
! 7863: /* MPC8313 */
! 7864: POWERPC_DEF_SVR("MPC8313",
! 7865: CPU_POWERPC_MPC8313, POWERPC_SVR_8313, e300),
! 7866: #endif
! 7867: #if defined (TODO)
! 7868: /* MPC8313E */
! 7869: POWERPC_DEF_SVR("MPC8313E",
! 7870: CPU_POWERPC_MPC8313E, POWERPC_SVR_8313E, e300),
! 7871: #endif
! 7872: #if defined (TODO)
! 7873: /* MPC8314 */
! 7874: POWERPC_DEF_SVR("MPC8314",
! 7875: CPU_POWERPC_MPC8314, POWERPC_SVR_8314, e300),
! 7876: #endif
! 7877: #if defined (TODO)
! 7878: /* MPC8314E */
! 7879: POWERPC_DEF_SVR("MPC8314E",
! 7880: CPU_POWERPC_MPC8314E, POWERPC_SVR_8314E, e300),
! 7881: #endif
! 7882: #if defined (TODO)
! 7883: /* MPC8315 */
! 7884: POWERPC_DEF_SVR("MPC8315",
! 7885: CPU_POWERPC_MPC8315, POWERPC_SVR_8315, e300),
! 7886: #endif
! 7887: #if defined (TODO)
! 7888: /* MPC8315E */
! 7889: POWERPC_DEF_SVR("MPC8315E",
! 7890: CPU_POWERPC_MPC8315E, POWERPC_SVR_8315E, e300),
! 7891: #endif
! 7892: #if defined (TODO)
! 7893: /* MPC8321 */
! 7894: POWERPC_DEF_SVR("MPC8321",
! 7895: CPU_POWERPC_MPC8321, POWERPC_SVR_8321, e300),
! 7896: #endif
! 7897: #if defined (TODO)
! 7898: /* MPC8321E */
! 7899: POWERPC_DEF_SVR("MPC8321E",
! 7900: CPU_POWERPC_MPC8321E, POWERPC_SVR_8321E, e300),
! 7901: #endif
! 7902: #if defined (TODO)
! 7903: /* MPC8323 */
! 7904: POWERPC_DEF_SVR("MPC8323",
! 7905: CPU_POWERPC_MPC8323, POWERPC_SVR_8323, e300),
! 7906: #endif
! 7907: #if defined (TODO)
! 7908: /* MPC8323E */
! 7909: POWERPC_DEF_SVR("MPC8323E",
! 7910: CPU_POWERPC_MPC8323E, POWERPC_SVR_8323E, e300),
! 7911: #endif
! 7912: /* MPC8343A */
! 7913: POWERPC_DEF_SVR("MPC8343A",
! 7914: CPU_POWERPC_MPC8343A, POWERPC_SVR_8343A, e300),
! 7915: /* MPC8343EA */
! 7916: POWERPC_DEF_SVR("MPC8343EA",
! 7917: CPU_POWERPC_MPC8343EA, POWERPC_SVR_8343EA, e300),
! 7918: /* MPC8347A */
! 7919: POWERPC_DEF_SVR("MPC8347A",
! 7920: CPU_POWERPC_MPC8347A, POWERPC_SVR_8347A, e300),
! 7921: /* MPC8347AT */
! 7922: POWERPC_DEF_SVR("MPC8347AT",
! 7923: CPU_POWERPC_MPC8347AT, POWERPC_SVR_8347AT, e300),
! 7924: /* MPC8347AP */
! 7925: POWERPC_DEF_SVR("MPC8347AP",
! 7926: CPU_POWERPC_MPC8347AP, POWERPC_SVR_8347AP, e300),
! 7927: /* MPC8347EA */
! 7928: POWERPC_DEF_SVR("MPC8347EA",
! 7929: CPU_POWERPC_MPC8347EA, POWERPC_SVR_8347EA, e300),
! 7930: /* MPC8347EAT */
! 7931: POWERPC_DEF_SVR("MPC8347EAT",
! 7932: CPU_POWERPC_MPC8347EAT, POWERPC_SVR_8347EAT, e300),
! 7933: /* MPC8343EAP */
! 7934: POWERPC_DEF_SVR("MPC8347EAP",
! 7935: CPU_POWERPC_MPC8347EAP, POWERPC_SVR_8347EAP, e300),
! 7936: /* MPC8349 */
! 7937: POWERPC_DEF_SVR("MPC8349",
! 7938: CPU_POWERPC_MPC8349, POWERPC_SVR_8349, e300),
! 7939: /* MPC8349A */
! 7940: POWERPC_DEF_SVR("MPC8349A",
! 7941: CPU_POWERPC_MPC8349A, POWERPC_SVR_8349A, e300),
! 7942: /* MPC8349E */
! 7943: POWERPC_DEF_SVR("MPC8349E",
! 7944: CPU_POWERPC_MPC8349E, POWERPC_SVR_8349E, e300),
! 7945: /* MPC8349EA */
! 7946: POWERPC_DEF_SVR("MPC8349EA",
! 7947: CPU_POWERPC_MPC8349EA, POWERPC_SVR_8349EA, e300),
! 7948: #if defined (TODO)
! 7949: /* MPC8358E */
! 7950: POWERPC_DEF_SVR("MPC8358E",
! 7951: CPU_POWERPC_MPC8358E, POWERPC_SVR_8358E, e300),
! 7952: #endif
! 7953: #if defined (TODO)
! 7954: /* MPC8360E */
! 7955: POWERPC_DEF_SVR("MPC8360E",
! 7956: CPU_POWERPC_MPC8360E, POWERPC_SVR_8360E, e300),
! 7957: #endif
! 7958: /* MPC8377 */
! 7959: POWERPC_DEF_SVR("MPC8377",
! 7960: CPU_POWERPC_MPC8377, POWERPC_SVR_8377, e300),
! 7961: /* MPC8377E */
! 7962: POWERPC_DEF_SVR("MPC8377E",
! 7963: CPU_POWERPC_MPC8377E, POWERPC_SVR_8377E, e300),
! 7964: /* MPC8378 */
! 7965: POWERPC_DEF_SVR("MPC8378",
! 7966: CPU_POWERPC_MPC8378, POWERPC_SVR_8378, e300),
! 7967: /* MPC8378E */
! 7968: POWERPC_DEF_SVR("MPC8378E",
! 7969: CPU_POWERPC_MPC8378E, POWERPC_SVR_8378E, e300),
! 7970: /* MPC8379 */
! 7971: POWERPC_DEF_SVR("MPC8379",
! 7972: CPU_POWERPC_MPC8379, POWERPC_SVR_8379, e300),
! 7973: /* MPC8379E */
! 7974: POWERPC_DEF_SVR("MPC8379E",
! 7975: CPU_POWERPC_MPC8379E, POWERPC_SVR_8379E, e300),
! 7976: /* e500 family */
! 7977: /* PowerPC e500 core */
! 7978: POWERPC_DEF("e500", CPU_POWERPC_e500, e500),
! 7979: /* PowerPC e500 v1.0 core */
! 7980: POWERPC_DEF("e500_v10", CPU_POWERPC_e500_v10, e500),
! 7981: /* PowerPC e500 v2.0 core */
! 7982: POWERPC_DEF("e500_v20", CPU_POWERPC_e500_v20, e500),
! 7983: /* PowerPC e500v2 core */
! 7984: POWERPC_DEF("e500v2", CPU_POWERPC_e500v2, e500),
! 7985: /* PowerPC e500v2 v1.0 core */
! 7986: POWERPC_DEF("e500v2_v10", CPU_POWERPC_e500v2_v10, e500),
! 7987: /* PowerPC e500v2 v2.0 core */
! 7988: POWERPC_DEF("e500v2_v20", CPU_POWERPC_e500v2_v20, e500),
! 7989: /* PowerPC e500v2 v2.1 core */
! 7990: POWERPC_DEF("e500v2_v21", CPU_POWERPC_e500v2_v21, e500),
! 7991: /* PowerPC e500v2 v2.2 core */
! 7992: POWERPC_DEF("e500v2_v22", CPU_POWERPC_e500v2_v22, e500),
! 7993: /* PowerPC e500v2 v3.0 core */
! 7994: POWERPC_DEF("e500v2_v30", CPU_POWERPC_e500v2_v30, e500),
! 7995: /* PowerPC e500 microcontrollers */
! 7996: /* MPC8533 */
! 7997: POWERPC_DEF_SVR("MPC8533",
! 7998: CPU_POWERPC_MPC8533, POWERPC_SVR_8533, e500),
! 7999: /* MPC8533 v1.0 */
! 8000: POWERPC_DEF_SVR("MPC8533_v10",
! 8001: CPU_POWERPC_MPC8533_v10, POWERPC_SVR_8533_v10, e500),
! 8002: /* MPC8533 v1.1 */
! 8003: POWERPC_DEF_SVR("MPC8533_v11",
! 8004: CPU_POWERPC_MPC8533_v11, POWERPC_SVR_8533_v11, e500),
! 8005: /* MPC8533E */
! 8006: POWERPC_DEF_SVR("MPC8533E",
! 8007: CPU_POWERPC_MPC8533E, POWERPC_SVR_8533E, e500),
! 8008: /* MPC8533E v1.0 */
! 8009: POWERPC_DEF_SVR("MPC8533E_v10",
! 8010: CPU_POWERPC_MPC8533E_v10, POWERPC_SVR_8533E_v10, e500),
! 8011: POWERPC_DEF_SVR("MPC8533E_v11",
! 8012: CPU_POWERPC_MPC8533E_v11, POWERPC_SVR_8533E_v11, e500),
! 8013: /* MPC8540 */
! 8014: POWERPC_DEF_SVR("MPC8540",
! 8015: CPU_POWERPC_MPC8540, POWERPC_SVR_8540, e500),
! 8016: /* MPC8540 v1.0 */
! 8017: POWERPC_DEF_SVR("MPC8540_v10",
! 8018: CPU_POWERPC_MPC8540_v10, POWERPC_SVR_8540_v10, e500),
! 8019: /* MPC8540 v2.0 */
! 8020: POWERPC_DEF_SVR("MPC8540_v20",
! 8021: CPU_POWERPC_MPC8540_v20, POWERPC_SVR_8540_v20, e500),
! 8022: /* MPC8540 v2.1 */
! 8023: POWERPC_DEF_SVR("MPC8540_v21",
! 8024: CPU_POWERPC_MPC8540_v21, POWERPC_SVR_8540_v21, e500),
! 8025: /* MPC8541 */
! 8026: POWERPC_DEF_SVR("MPC8541",
! 8027: CPU_POWERPC_MPC8541, POWERPC_SVR_8541, e500),
! 8028: /* MPC8541 v1.0 */
! 8029: POWERPC_DEF_SVR("MPC8541_v10",
! 8030: CPU_POWERPC_MPC8541_v10, POWERPC_SVR_8541_v10, e500),
! 8031: /* MPC8541 v1.1 */
! 8032: POWERPC_DEF_SVR("MPC8541_v11",
! 8033: CPU_POWERPC_MPC8541_v11, POWERPC_SVR_8541_v11, e500),
! 8034: /* MPC8541E */
! 8035: POWERPC_DEF_SVR("MPC8541E",
! 8036: CPU_POWERPC_MPC8541E, POWERPC_SVR_8541E, e500),
! 8037: /* MPC8541E v1.0 */
! 8038: POWERPC_DEF_SVR("MPC8541E_v10",
! 8039: CPU_POWERPC_MPC8541E_v10, POWERPC_SVR_8541E_v10, e500),
! 8040: /* MPC8541E v1.1 */
! 8041: POWERPC_DEF_SVR("MPC8541E_v11",
! 8042: CPU_POWERPC_MPC8541E_v11, POWERPC_SVR_8541E_v11, e500),
! 8043: /* MPC8543 */
! 8044: POWERPC_DEF_SVR("MPC8543",
! 8045: CPU_POWERPC_MPC8543, POWERPC_SVR_8543, e500),
! 8046: /* MPC8543 v1.0 */
! 8047: POWERPC_DEF_SVR("MPC8543_v10",
! 8048: CPU_POWERPC_MPC8543_v10, POWERPC_SVR_8543_v10, e500),
! 8049: /* MPC8543 v1.1 */
! 8050: POWERPC_DEF_SVR("MPC8543_v11",
! 8051: CPU_POWERPC_MPC8543_v11, POWERPC_SVR_8543_v11, e500),
! 8052: /* MPC8543 v2.0 */
! 8053: POWERPC_DEF_SVR("MPC8543_v20",
! 8054: CPU_POWERPC_MPC8543_v20, POWERPC_SVR_8543_v20, e500),
! 8055: /* MPC8543 v2.1 */
! 8056: POWERPC_DEF_SVR("MPC8543_v21",
! 8057: CPU_POWERPC_MPC8543_v21, POWERPC_SVR_8543_v21, e500),
! 8058: /* MPC8543E */
! 8059: POWERPC_DEF_SVR("MPC8543E",
! 8060: CPU_POWERPC_MPC8543E, POWERPC_SVR_8543E, e500),
! 8061: /* MPC8543E v1.0 */
! 8062: POWERPC_DEF_SVR("MPC8543E_v10",
! 8063: CPU_POWERPC_MPC8543E_v10, POWERPC_SVR_8543E_v10, e500),
! 8064: /* MPC8543E v1.1 */
! 8065: POWERPC_DEF_SVR("MPC8543E_v11",
! 8066: CPU_POWERPC_MPC8543E_v11, POWERPC_SVR_8543E_v11, e500),
! 8067: /* MPC8543E v2.0 */
! 8068: POWERPC_DEF_SVR("MPC8543E_v20",
! 8069: CPU_POWERPC_MPC8543E_v20, POWERPC_SVR_8543E_v20, e500),
! 8070: /* MPC8543E v2.1 */
! 8071: POWERPC_DEF_SVR("MPC8543E_v21",
! 8072: CPU_POWERPC_MPC8543E_v21, POWERPC_SVR_8543E_v21, e500),
! 8073: /* MPC8544 */
! 8074: POWERPC_DEF_SVR("MPC8544",
! 8075: CPU_POWERPC_MPC8544, POWERPC_SVR_8544, e500),
! 8076: /* MPC8544 v1.0 */
! 8077: POWERPC_DEF_SVR("MPC8544_v10",
! 8078: CPU_POWERPC_MPC8544_v10, POWERPC_SVR_8544_v10, e500),
! 8079: /* MPC8544 v1.1 */
! 8080: POWERPC_DEF_SVR("MPC8544_v11",
! 8081: CPU_POWERPC_MPC8544_v11, POWERPC_SVR_8544_v11, e500),
! 8082: /* MPC8544E */
! 8083: POWERPC_DEF_SVR("MPC8544E",
! 8084: CPU_POWERPC_MPC8544E, POWERPC_SVR_8544E, e500),
! 8085: /* MPC8544E v1.0 */
! 8086: POWERPC_DEF_SVR("MPC8544E_v10",
! 8087: CPU_POWERPC_MPC8544E_v10, POWERPC_SVR_8544E_v10, e500),
! 8088: /* MPC8544E v1.1 */
! 8089: POWERPC_DEF_SVR("MPC8544E_v11",
! 8090: CPU_POWERPC_MPC8544E_v11, POWERPC_SVR_8544E_v11, e500),
! 8091: /* MPC8545 */
! 8092: POWERPC_DEF_SVR("MPC8545",
! 8093: CPU_POWERPC_MPC8545, POWERPC_SVR_8545, e500),
! 8094: /* MPC8545 v2.0 */
! 8095: POWERPC_DEF_SVR("MPC8545_v20",
! 8096: CPU_POWERPC_MPC8545_v20, POWERPC_SVR_8545_v20, e500),
! 8097: /* MPC8545 v2.1 */
! 8098: POWERPC_DEF_SVR("MPC8545_v21",
! 8099: CPU_POWERPC_MPC8545_v21, POWERPC_SVR_8545_v21, e500),
! 8100: /* MPC8545E */
! 8101: POWERPC_DEF_SVR("MPC8545E",
! 8102: CPU_POWERPC_MPC8545E, POWERPC_SVR_8545E, e500),
! 8103: /* MPC8545E v2.0 */
! 8104: POWERPC_DEF_SVR("MPC8545E_v20",
! 8105: CPU_POWERPC_MPC8545E_v20, POWERPC_SVR_8545E_v20, e500),
! 8106: /* MPC8545E v2.1 */
! 8107: POWERPC_DEF_SVR("MPC8545E_v21",
! 8108: CPU_POWERPC_MPC8545E_v21, POWERPC_SVR_8545E_v21, e500),
! 8109: /* MPC8547E */
! 8110: POWERPC_DEF_SVR("MPC8547E",
! 8111: CPU_POWERPC_MPC8547E, POWERPC_SVR_8547E, e500),
! 8112: /* MPC8547E v2.0 */
! 8113: POWERPC_DEF_SVR("MPC8547E_v20",
! 8114: CPU_POWERPC_MPC8547E_v20, POWERPC_SVR_8547E_v20, e500),
! 8115: /* MPC8547E v2.1 */
! 8116: POWERPC_DEF_SVR("MPC8547E_v21",
! 8117: CPU_POWERPC_MPC8547E_v21, POWERPC_SVR_8547E_v21, e500),
! 8118: /* MPC8548 */
! 8119: POWERPC_DEF_SVR("MPC8548",
! 8120: CPU_POWERPC_MPC8548, POWERPC_SVR_8548, e500),
! 8121: /* MPC8548 v1.0 */
! 8122: POWERPC_DEF_SVR("MPC8548_v10",
! 8123: CPU_POWERPC_MPC8548_v10, POWERPC_SVR_8548_v10, e500),
! 8124: /* MPC8548 v1.1 */
! 8125: POWERPC_DEF_SVR("MPC8548_v11",
! 8126: CPU_POWERPC_MPC8548_v11, POWERPC_SVR_8548_v11, e500),
! 8127: /* MPC8548 v2.0 */
! 8128: POWERPC_DEF_SVR("MPC8548_v20",
! 8129: CPU_POWERPC_MPC8548_v20, POWERPC_SVR_8548_v20, e500),
! 8130: /* MPC8548 v2.1 */
! 8131: POWERPC_DEF_SVR("MPC8548_v21",
! 8132: CPU_POWERPC_MPC8548_v21, POWERPC_SVR_8548_v21, e500),
! 8133: /* MPC8548E */
! 8134: POWERPC_DEF_SVR("MPC8548E",
! 8135: CPU_POWERPC_MPC8548E, POWERPC_SVR_8548E, e500),
! 8136: /* MPC8548E v1.0 */
! 8137: POWERPC_DEF_SVR("MPC8548E_v10",
! 8138: CPU_POWERPC_MPC8548E_v10, POWERPC_SVR_8548E_v10, e500),
! 8139: /* MPC8548E v1.1 */
! 8140: POWERPC_DEF_SVR("MPC8548E_v11",
! 8141: CPU_POWERPC_MPC8548E_v11, POWERPC_SVR_8548E_v11, e500),
! 8142: /* MPC8548E v2.0 */
! 8143: POWERPC_DEF_SVR("MPC8548E_v20",
! 8144: CPU_POWERPC_MPC8548E_v20, POWERPC_SVR_8548E_v20, e500),
! 8145: /* MPC8548E v2.1 */
! 8146: POWERPC_DEF_SVR("MPC8548E_v21",
! 8147: CPU_POWERPC_MPC8548E_v21, POWERPC_SVR_8548E_v21, e500),
! 8148: /* MPC8555 */
! 8149: POWERPC_DEF_SVR("MPC8555",
! 8150: CPU_POWERPC_MPC8555, POWERPC_SVR_8555, e500),
! 8151: /* MPC8555 v1.0 */
! 8152: POWERPC_DEF_SVR("MPC8555_v10",
! 8153: CPU_POWERPC_MPC8555_v10, POWERPC_SVR_8555_v10, e500),
! 8154: /* MPC8555 v1.1 */
! 8155: POWERPC_DEF_SVR("MPC8555_v11",
! 8156: CPU_POWERPC_MPC8555_v11, POWERPC_SVR_8555_v11, e500),
! 8157: /* MPC8555E */
! 8158: POWERPC_DEF_SVR("MPC8555E",
! 8159: CPU_POWERPC_MPC8555E, POWERPC_SVR_8555E, e500),
! 8160: /* MPC8555E v1.0 */
! 8161: POWERPC_DEF_SVR("MPC8555E_v10",
! 8162: CPU_POWERPC_MPC8555E_v10, POWERPC_SVR_8555E_v10, e500),
! 8163: /* MPC8555E v1.1 */
! 8164: POWERPC_DEF_SVR("MPC8555E_v11",
! 8165: CPU_POWERPC_MPC8555E_v11, POWERPC_SVR_8555E_v11, e500),
! 8166: /* MPC8560 */
! 8167: POWERPC_DEF_SVR("MPC8560",
! 8168: CPU_POWERPC_MPC8560, POWERPC_SVR_8560, e500),
! 8169: /* MPC8560 v1.0 */
! 8170: POWERPC_DEF_SVR("MPC8560_v10",
! 8171: CPU_POWERPC_MPC8560_v10, POWERPC_SVR_8560_v10, e500),
! 8172: /* MPC8560 v2.0 */
! 8173: POWERPC_DEF_SVR("MPC8560_v20",
! 8174: CPU_POWERPC_MPC8560_v20, POWERPC_SVR_8560_v20, e500),
! 8175: /* MPC8560 v2.1 */
! 8176: POWERPC_DEF_SVR("MPC8560_v21",
! 8177: CPU_POWERPC_MPC8560_v21, POWERPC_SVR_8560_v21, e500),
! 8178: /* MPC8567 */
! 8179: POWERPC_DEF_SVR("MPC8567",
! 8180: CPU_POWERPC_MPC8567, POWERPC_SVR_8567, e500),
! 8181: /* MPC8567E */
! 8182: POWERPC_DEF_SVR("MPC8567E",
! 8183: CPU_POWERPC_MPC8567E, POWERPC_SVR_8567E, e500),
! 8184: /* MPC8568 */
! 8185: POWERPC_DEF_SVR("MPC8568",
! 8186: CPU_POWERPC_MPC8568, POWERPC_SVR_8568, e500),
! 8187: /* MPC8568E */
! 8188: POWERPC_DEF_SVR("MPC8568E",
! 8189: CPU_POWERPC_MPC8568E, POWERPC_SVR_8568E, e500),
! 8190: /* MPC8572 */
! 8191: POWERPC_DEF_SVR("MPC8572",
! 8192: CPU_POWERPC_MPC8572, POWERPC_SVR_8572, e500),
! 8193: /* MPC8572E */
! 8194: POWERPC_DEF_SVR("MPC8572E",
! 8195: CPU_POWERPC_MPC8572E, POWERPC_SVR_8572E, e500),
! 8196: /* e600 family */
! 8197: /* PowerPC e600 core */
! 8198: POWERPC_DEF("e600", CPU_POWERPC_e600, 7400),
! 8199: /* PowerPC e600 microcontrollers */
! 8200: #if defined (TODO)
! 8201: /* MPC8610 */
! 8202: POWERPC_DEF_SVR("MPC8610",
! 8203: CPU_POWERPC_MPC8610, POWERPC_SVR_8610, 7400),
! 8204: #endif
! 8205: /* MPC8641 */
! 8206: POWERPC_DEF_SVR("MPC8641",
! 8207: CPU_POWERPC_MPC8641, POWERPC_SVR_8641, 7400),
! 8208: /* MPC8641D */
! 8209: POWERPC_DEF_SVR("MPC8641D",
! 8210: CPU_POWERPC_MPC8641D, POWERPC_SVR_8641D, 7400),
! 8211: /* 32 bits "classic" PowerPC */
! 8212: /* PowerPC 6xx family */
! 8213: /* PowerPC 601 */
! 8214: POWERPC_DEF("601", CPU_POWERPC_601, 601v),
! 8215: /* PowerPC 601v0 */
! 8216: POWERPC_DEF("601_v0", CPU_POWERPC_601_v0, 601),
! 8217: /* PowerPC 601v1 */
! 8218: POWERPC_DEF("601_v1", CPU_POWERPC_601_v1, 601),
! 8219: /* PowerPC 601v */
! 8220: POWERPC_DEF("601v", CPU_POWERPC_601v, 601v),
! 8221: /* PowerPC 601v2 */
! 8222: POWERPC_DEF("601_v2", CPU_POWERPC_601_v2, 601v),
! 8223: /* PowerPC 602 */
! 8224: POWERPC_DEF("602", CPU_POWERPC_602, 602),
! 8225: /* PowerPC 603 */
! 8226: POWERPC_DEF("603", CPU_POWERPC_603, 603),
! 8227: /* Code name for PowerPC 603 */
! 8228: POWERPC_DEF("Vanilla", CPU_POWERPC_603, 603),
! 8229: /* PowerPC 603e (aka PID6) */
! 8230: POWERPC_DEF("603e", CPU_POWERPC_603E, 603E),
! 8231: /* Code name for PowerPC 603e */
! 8232: POWERPC_DEF("Stretch", CPU_POWERPC_603E, 603E),
! 8233: /* PowerPC 603e v1.1 */
! 8234: POWERPC_DEF("603e_v1.1", CPU_POWERPC_603E_v11, 603E),
! 8235: /* PowerPC 603e v1.2 */
! 8236: POWERPC_DEF("603e_v1.2", CPU_POWERPC_603E_v12, 603E),
! 8237: /* PowerPC 603e v1.3 */
! 8238: POWERPC_DEF("603e_v1.3", CPU_POWERPC_603E_v13, 603E),
! 8239: /* PowerPC 603e v1.4 */
! 8240: POWERPC_DEF("603e_v1.4", CPU_POWERPC_603E_v14, 603E),
! 8241: /* PowerPC 603e v2.2 */
! 8242: POWERPC_DEF("603e_v2.2", CPU_POWERPC_603E_v22, 603E),
! 8243: /* PowerPC 603e v3 */
! 8244: POWERPC_DEF("603e_v3", CPU_POWERPC_603E_v3, 603E),
! 8245: /* PowerPC 603e v4 */
! 8246: POWERPC_DEF("603e_v4", CPU_POWERPC_603E_v4, 603E),
! 8247: /* PowerPC 603e v4.1 */
! 8248: POWERPC_DEF("603e_v4.1", CPU_POWERPC_603E_v41, 603E),
! 8249: /* PowerPC 603e (aka PID7) */
! 8250: POWERPC_DEF("603e7", CPU_POWERPC_603E7, 603E),
! 8251: /* PowerPC 603e7t */
! 8252: POWERPC_DEF("603e7t", CPU_POWERPC_603E7t, 603E),
! 8253: /* PowerPC 603e7v */
! 8254: POWERPC_DEF("603e7v", CPU_POWERPC_603E7v, 603E),
! 8255: /* Code name for PowerPC 603ev */
! 8256: POWERPC_DEF("Vaillant", CPU_POWERPC_603E7v, 603E),
! 8257: /* PowerPC 603e7v1 */
! 8258: POWERPC_DEF("603e7v1", CPU_POWERPC_603E7v1, 603E),
! 8259: /* PowerPC 603e7v2 */
! 8260: POWERPC_DEF("603e7v2", CPU_POWERPC_603E7v2, 603E),
! 8261: /* PowerPC 603p (aka PID7v) */
! 8262: POWERPC_DEF("603p", CPU_POWERPC_603P, 603E),
! 8263: /* PowerPC 603r (aka PID7t) */
! 8264: POWERPC_DEF("603r", CPU_POWERPC_603R, 603E),
! 8265: /* Code name for PowerPC 603r */
! 8266: POWERPC_DEF("Goldeneye", CPU_POWERPC_603R, 603E),
! 8267: /* PowerPC 604 */
! 8268: POWERPC_DEF("604", CPU_POWERPC_604, 604),
! 8269: /* PowerPC 604e (aka PID9) */
! 8270: POWERPC_DEF("604e", CPU_POWERPC_604E, 604E),
! 8271: /* Code name for PowerPC 604e */
! 8272: POWERPC_DEF("Sirocco", CPU_POWERPC_604E, 604E),
! 8273: /* PowerPC 604e v1.0 */
! 8274: POWERPC_DEF("604e_v1.0", CPU_POWERPC_604E_v10, 604E),
! 8275: /* PowerPC 604e v2.2 */
! 8276: POWERPC_DEF("604e_v2.2", CPU_POWERPC_604E_v22, 604E),
! 8277: /* PowerPC 604e v2.4 */
! 8278: POWERPC_DEF("604e_v2.4", CPU_POWERPC_604E_v24, 604E),
! 8279: /* PowerPC 604r (aka PIDA) */
! 8280: POWERPC_DEF("604r", CPU_POWERPC_604R, 604E),
! 8281: /* Code name for PowerPC 604r */
! 8282: POWERPC_DEF("Mach5", CPU_POWERPC_604R, 604E),
! 8283: #if defined(TODO)
! 8284: /* PowerPC 604ev */
! 8285: POWERPC_DEF("604ev", CPU_POWERPC_604EV, 604E),
! 8286: #endif
! 8287: /* PowerPC 7xx family */
! 8288: /* Generic PowerPC 740 (G3) */
! 8289: POWERPC_DEF("740", CPU_POWERPC_7x0, 740),
! 8290: /* Code name for PowerPC 740 */
! 8291: POWERPC_DEF("Arthur", CPU_POWERPC_7x0, 740),
! 8292: /* Generic PowerPC 750 (G3) */
! 8293: POWERPC_DEF("750", CPU_POWERPC_7x0, 750),
! 8294: /* Code name for PowerPC 750 */
! 8295: POWERPC_DEF("Typhoon", CPU_POWERPC_7x0, 750),
! 8296: /* PowerPC 740/750 is also known as G3 */
! 8297: POWERPC_DEF("G3", CPU_POWERPC_7x0, 750),
! 8298: /* PowerPC 740 v1.0 (G3) */
! 8299: POWERPC_DEF("740_v1.0", CPU_POWERPC_7x0_v10, 740),
! 8300: /* PowerPC 750 v1.0 (G3) */
! 8301: POWERPC_DEF("750_v1.0", CPU_POWERPC_7x0_v10, 750),
! 8302: /* PowerPC 740 v2.0 (G3) */
! 8303: POWERPC_DEF("740_v2.0", CPU_POWERPC_7x0_v20, 740),
! 8304: /* PowerPC 750 v2.0 (G3) */
! 8305: POWERPC_DEF("750_v2.0", CPU_POWERPC_7x0_v20, 750),
! 8306: /* PowerPC 740 v2.1 (G3) */
! 8307: POWERPC_DEF("740_v2.1", CPU_POWERPC_7x0_v21, 740),
! 8308: /* PowerPC 750 v2.1 (G3) */
! 8309: POWERPC_DEF("750_v2.1", CPU_POWERPC_7x0_v21, 750),
! 8310: /* PowerPC 740 v2.2 (G3) */
! 8311: POWERPC_DEF("740_v2.2", CPU_POWERPC_7x0_v22, 740),
! 8312: /* PowerPC 750 v2.2 (G3) */
! 8313: POWERPC_DEF("750_v2.2", CPU_POWERPC_7x0_v22, 750),
! 8314: /* PowerPC 740 v3.0 (G3) */
! 8315: POWERPC_DEF("740_v3.0", CPU_POWERPC_7x0_v30, 740),
! 8316: /* PowerPC 750 v3.0 (G3) */
! 8317: POWERPC_DEF("750_v3.0", CPU_POWERPC_7x0_v30, 750),
! 8318: /* PowerPC 740 v3.1 (G3) */
! 8319: POWERPC_DEF("740_v3.1", CPU_POWERPC_7x0_v31, 740),
! 8320: /* PowerPC 750 v3.1 (G3) */
! 8321: POWERPC_DEF("750_v3.1", CPU_POWERPC_7x0_v31, 750),
! 8322: /* PowerPC 740E (G3) */
! 8323: POWERPC_DEF("740e", CPU_POWERPC_740E, 740),
! 8324: /* PowerPC 750E (G3) */
! 8325: POWERPC_DEF("750e", CPU_POWERPC_750E, 750),
! 8326: /* PowerPC 740P (G3) */
! 8327: POWERPC_DEF("740p", CPU_POWERPC_7x0P, 740),
! 8328: /* PowerPC 750P (G3) */
! 8329: POWERPC_DEF("750p", CPU_POWERPC_7x0P, 750),
! 8330: /* Code name for PowerPC 740P/750P (G3) */
! 8331: POWERPC_DEF("Conan/Doyle", CPU_POWERPC_7x0P, 750),
! 8332: /* PowerPC 750CL (G3 embedded) */
! 8333: POWERPC_DEF("750cl", CPU_POWERPC_750CL, 750cl),
! 8334: /* PowerPC 750CL v1.0 */
! 8335: POWERPC_DEF("750cl_v1.0", CPU_POWERPC_750CL_v10, 750cl),
! 8336: /* PowerPC 750CL v2.0 */
! 8337: POWERPC_DEF("750cl_v2.0", CPU_POWERPC_750CL_v20, 750cl),
! 8338: /* PowerPC 750CX (G3 embedded) */
! 8339: POWERPC_DEF("750cx", CPU_POWERPC_750CX, 750cx),
! 8340: /* PowerPC 750CX v1.0 (G3 embedded) */
! 8341: POWERPC_DEF("750cx_v1.0", CPU_POWERPC_750CX_v10, 750cx),
! 8342: /* PowerPC 750CX v2.1 (G3 embedded) */
! 8343: POWERPC_DEF("750cx_v2.0", CPU_POWERPC_750CX_v20, 750cx),
! 8344: /* PowerPC 750CX v2.1 (G3 embedded) */
! 8345: POWERPC_DEF("750cx_v2.1", CPU_POWERPC_750CX_v21, 750cx),
! 8346: /* PowerPC 750CX v2.2 (G3 embedded) */
! 8347: POWERPC_DEF("750cx_v2.2", CPU_POWERPC_750CX_v22, 750cx),
! 8348: /* PowerPC 750CXe (G3 embedded) */
! 8349: POWERPC_DEF("750cxe", CPU_POWERPC_750CXE, 750cx),
! 8350: /* PowerPC 750CXe v2.1 (G3 embedded) */
! 8351: POWERPC_DEF("750cxe_v2.1", CPU_POWERPC_750CXE_v21, 750cx),
! 8352: /* PowerPC 750CXe v2.2 (G3 embedded) */
! 8353: POWERPC_DEF("750cxe_v2.2", CPU_POWERPC_750CXE_v22, 750cx),
! 8354: /* PowerPC 750CXe v2.3 (G3 embedded) */
! 8355: POWERPC_DEF("750cxe_v2.3", CPU_POWERPC_750CXE_v23, 750cx),
! 8356: /* PowerPC 750CXe v2.4 (G3 embedded) */
! 8357: POWERPC_DEF("750cxe_v2.4", CPU_POWERPC_750CXE_v24, 750cx),
! 8358: /* PowerPC 750CXe v2.4b (G3 embedded) */
! 8359: POWERPC_DEF("750cxe_v2.4b", CPU_POWERPC_750CXE_v24b, 750cx),
! 8360: /* PowerPC 750CXe v3.0 (G3 embedded) */
! 8361: POWERPC_DEF("750cxe_v3.0", CPU_POWERPC_750CXE_v30, 750cx),
! 8362: /* PowerPC 750CXe v3.1 (G3 embedded) */
! 8363: POWERPC_DEF("750cxe_v3.1", CPU_POWERPC_750CXE_v31, 750cx),
! 8364: /* PowerPC 750CXe v3.1b (G3 embedded) */
! 8365: POWERPC_DEF("750cxe_v3.1b", CPU_POWERPC_750CXE_v31b, 750cx),
! 8366: /* PowerPC 750CXr (G3 embedded) */
! 8367: POWERPC_DEF("750cxr", CPU_POWERPC_750CXR, 750cx),
! 8368: /* PowerPC 750FL (G3 embedded) */
! 8369: POWERPC_DEF("750fl", CPU_POWERPC_750FL, 750fx),
! 8370: /* PowerPC 750FX (G3 embedded) */
! 8371: POWERPC_DEF("750fx", CPU_POWERPC_750FX, 750fx),
! 8372: /* PowerPC 750FX v1.0 (G3 embedded) */
! 8373: POWERPC_DEF("750fx_v1.0", CPU_POWERPC_750FX_v10, 750fx),
! 8374: /* PowerPC 750FX v2.0 (G3 embedded) */
! 8375: POWERPC_DEF("750fx_v2.0", CPU_POWERPC_750FX_v20, 750fx),
! 8376: /* PowerPC 750FX v2.1 (G3 embedded) */
! 8377: POWERPC_DEF("750fx_v2.1", CPU_POWERPC_750FX_v21, 750fx),
! 8378: /* PowerPC 750FX v2.2 (G3 embedded) */
! 8379: POWERPC_DEF("750fx_v2.2", CPU_POWERPC_750FX_v22, 750fx),
! 8380: /* PowerPC 750FX v2.3 (G3 embedded) */
! 8381: POWERPC_DEF("750fx_v2.3", CPU_POWERPC_750FX_v23, 750fx),
! 8382: /* PowerPC 750GL (G3 embedded) */
! 8383: POWERPC_DEF("750gl", CPU_POWERPC_750GL, 750gx),
! 8384: /* PowerPC 750GX (G3 embedded) */
! 8385: POWERPC_DEF("750gx", CPU_POWERPC_750GX, 750gx),
! 8386: /* PowerPC 750GX v1.0 (G3 embedded) */
! 8387: POWERPC_DEF("750gx_v1.0", CPU_POWERPC_750GX_v10, 750gx),
! 8388: /* PowerPC 750GX v1.1 (G3 embedded) */
! 8389: POWERPC_DEF("750gx_v1.1", CPU_POWERPC_750GX_v11, 750gx),
! 8390: /* PowerPC 750GX v1.2 (G3 embedded) */
! 8391: POWERPC_DEF("750gx_v1.2", CPU_POWERPC_750GX_v12, 750gx),
! 8392: /* PowerPC 750L (G3 embedded) */
! 8393: POWERPC_DEF("750l", CPU_POWERPC_750L, 750),
! 8394: /* Code name for PowerPC 750L (G3 embedded) */
! 8395: POWERPC_DEF("LoneStar", CPU_POWERPC_750L, 750),
! 8396: /* PowerPC 750L v2.0 (G3 embedded) */
! 8397: POWERPC_DEF("750l_v2.0", CPU_POWERPC_750L_v20, 750),
! 8398: /* PowerPC 750L v2.1 (G3 embedded) */
! 8399: POWERPC_DEF("750l_v2.1", CPU_POWERPC_750L_v21, 750),
! 8400: /* PowerPC 750L v2.2 (G3 embedded) */
! 8401: POWERPC_DEF("750l_v2.2", CPU_POWERPC_750L_v22, 750),
! 8402: /* PowerPC 750L v3.0 (G3 embedded) */
! 8403: POWERPC_DEF("750l_v3.0", CPU_POWERPC_750L_v30, 750),
! 8404: /* PowerPC 750L v3.2 (G3 embedded) */
! 8405: POWERPC_DEF("750l_v3.2", CPU_POWERPC_750L_v32, 750),
! 8406: /* Generic PowerPC 745 */
! 8407: POWERPC_DEF("745", CPU_POWERPC_7x5, 745),
! 8408: /* Generic PowerPC 755 */
! 8409: POWERPC_DEF("755", CPU_POWERPC_7x5, 755),
! 8410: /* Code name for PowerPC 745/755 */
! 8411: POWERPC_DEF("Goldfinger", CPU_POWERPC_7x5, 755),
! 8412: /* PowerPC 745 v1.0 */
! 8413: POWERPC_DEF("745_v1.0", CPU_POWERPC_7x5_v10, 745),
! 8414: /* PowerPC 755 v1.0 */
! 8415: POWERPC_DEF("755_v1.0", CPU_POWERPC_7x5_v10, 755),
! 8416: /* PowerPC 745 v1.1 */
! 8417: POWERPC_DEF("745_v1.1", CPU_POWERPC_7x5_v11, 745),
! 8418: /* PowerPC 755 v1.1 */
! 8419: POWERPC_DEF("755_v1.1", CPU_POWERPC_7x5_v11, 755),
! 8420: /* PowerPC 745 v2.0 */
! 8421: POWERPC_DEF("745_v2.0", CPU_POWERPC_7x5_v20, 745),
! 8422: /* PowerPC 755 v2.0 */
! 8423: POWERPC_DEF("755_v2.0", CPU_POWERPC_7x5_v20, 755),
! 8424: /* PowerPC 745 v2.1 */
! 8425: POWERPC_DEF("745_v2.1", CPU_POWERPC_7x5_v21, 745),
! 8426: /* PowerPC 755 v2.1 */
! 8427: POWERPC_DEF("755_v2.1", CPU_POWERPC_7x5_v21, 755),
! 8428: /* PowerPC 745 v2.2 */
! 8429: POWERPC_DEF("745_v2.2", CPU_POWERPC_7x5_v22, 745),
! 8430: /* PowerPC 755 v2.2 */
! 8431: POWERPC_DEF("755_v2.2", CPU_POWERPC_7x5_v22, 755),
! 8432: /* PowerPC 745 v2.3 */
! 8433: POWERPC_DEF("745_v2.3", CPU_POWERPC_7x5_v23, 745),
! 8434: /* PowerPC 755 v2.3 */
! 8435: POWERPC_DEF("755_v2.3", CPU_POWERPC_7x5_v23, 755),
! 8436: /* PowerPC 745 v2.4 */
! 8437: POWERPC_DEF("745_v2.4", CPU_POWERPC_7x5_v24, 745),
! 8438: /* PowerPC 755 v2.4 */
! 8439: POWERPC_DEF("755_v2.4", CPU_POWERPC_7x5_v24, 755),
! 8440: /* PowerPC 745 v2.5 */
! 8441: POWERPC_DEF("745_v2.5", CPU_POWERPC_7x5_v25, 745),
! 8442: /* PowerPC 755 v2.5 */
! 8443: POWERPC_DEF("755_v2.5", CPU_POWERPC_7x5_v25, 755),
! 8444: /* PowerPC 745 v2.6 */
! 8445: POWERPC_DEF("745_v2.6", CPU_POWERPC_7x5_v26, 745),
! 8446: /* PowerPC 755 v2.6 */
! 8447: POWERPC_DEF("755_v2.6", CPU_POWERPC_7x5_v26, 755),
! 8448: /* PowerPC 745 v2.7 */
! 8449: POWERPC_DEF("745_v2.7", CPU_POWERPC_7x5_v27, 745),
! 8450: /* PowerPC 755 v2.7 */
! 8451: POWERPC_DEF("755_v2.7", CPU_POWERPC_7x5_v27, 755),
! 8452: /* PowerPC 745 v2.8 */
! 8453: POWERPC_DEF("745_v2.8", CPU_POWERPC_7x5_v28, 745),
! 8454: /* PowerPC 755 v2.8 */
! 8455: POWERPC_DEF("755_v2.8", CPU_POWERPC_7x5_v28, 755),
! 8456: #if defined (TODO)
! 8457: /* PowerPC 745P (G3) */
! 8458: POWERPC_DEF("745p", CPU_POWERPC_7x5P, 745),
! 8459: /* PowerPC 755P (G3) */
! 8460: POWERPC_DEF("755p", CPU_POWERPC_7x5P, 755),
! 8461: #endif
! 8462: /* PowerPC 74xx family */
! 8463: /* PowerPC 7400 (G4) */
! 8464: POWERPC_DEF("7400", CPU_POWERPC_7400, 7400),
! 8465: /* Code name for PowerPC 7400 */
! 8466: POWERPC_DEF("Max", CPU_POWERPC_7400, 7400),
! 8467: /* PowerPC 74xx is also well known as G4 */
! 8468: POWERPC_DEF("G4", CPU_POWERPC_7400, 7400),
! 8469: /* PowerPC 7400 v1.0 (G4) */
! 8470: POWERPC_DEF("7400_v1.0", CPU_POWERPC_7400_v10, 7400),
! 8471: /* PowerPC 7400 v1.1 (G4) */
! 8472: POWERPC_DEF("7400_v1.1", CPU_POWERPC_7400_v11, 7400),
! 8473: /* PowerPC 7400 v2.0 (G4) */
! 8474: POWERPC_DEF("7400_v2.0", CPU_POWERPC_7400_v20, 7400),
! 8475: /* PowerPC 7400 v2.1 (G4) */
! 8476: POWERPC_DEF("7400_v2.1", CPU_POWERPC_7400_v21, 7400),
! 8477: /* PowerPC 7400 v2.2 (G4) */
! 8478: POWERPC_DEF("7400_v2.2", CPU_POWERPC_7400_v22, 7400),
! 8479: /* PowerPC 7400 v2.6 (G4) */
! 8480: POWERPC_DEF("7400_v2.6", CPU_POWERPC_7400_v26, 7400),
! 8481: /* PowerPC 7400 v2.7 (G4) */
! 8482: POWERPC_DEF("7400_v2.7", CPU_POWERPC_7400_v27, 7400),
! 8483: /* PowerPC 7400 v2.8 (G4) */
! 8484: POWERPC_DEF("7400_v2.8", CPU_POWERPC_7400_v28, 7400),
! 8485: /* PowerPC 7400 v2.9 (G4) */
! 8486: POWERPC_DEF("7400_v2.9", CPU_POWERPC_7400_v29, 7400),
! 8487: /* PowerPC 7410 (G4) */
! 8488: POWERPC_DEF("7410", CPU_POWERPC_7410, 7410),
! 8489: /* Code name for PowerPC 7410 */
! 8490: POWERPC_DEF("Nitro", CPU_POWERPC_7410, 7410),
! 8491: /* PowerPC 7410 v1.0 (G4) */
! 8492: POWERPC_DEF("7410_v1.0", CPU_POWERPC_7410_v10, 7410),
! 8493: /* PowerPC 7410 v1.1 (G4) */
! 8494: POWERPC_DEF("7410_v1.1", CPU_POWERPC_7410_v11, 7410),
! 8495: /* PowerPC 7410 v1.2 (G4) */
! 8496: POWERPC_DEF("7410_v1.2", CPU_POWERPC_7410_v12, 7410),
! 8497: /* PowerPC 7410 v1.3 (G4) */
! 8498: POWERPC_DEF("7410_v1.3", CPU_POWERPC_7410_v13, 7410),
! 8499: /* PowerPC 7410 v1.4 (G4) */
! 8500: POWERPC_DEF("7410_v1.4", CPU_POWERPC_7410_v14, 7410),
! 8501: /* PowerPC 7448 (G4) */
! 8502: POWERPC_DEF("7448", CPU_POWERPC_7448, 7400),
! 8503: /* PowerPC 7448 v1.0 (G4) */
! 8504: POWERPC_DEF("7448_v1.0", CPU_POWERPC_7448_v10, 7400),
! 8505: /* PowerPC 7448 v1.1 (G4) */
! 8506: POWERPC_DEF("7448_v1.1", CPU_POWERPC_7448_v11, 7400),
! 8507: /* PowerPC 7448 v2.0 (G4) */
! 8508: POWERPC_DEF("7448_v2.0", CPU_POWERPC_7448_v20, 7400),
! 8509: /* PowerPC 7448 v2.1 (G4) */
! 8510: POWERPC_DEF("7448_v2.1", CPU_POWERPC_7448_v21, 7400),
! 8511: /* PowerPC 7450 (G4) */
! 8512: POWERPC_DEF("7450", CPU_POWERPC_7450, 7450),
! 8513: /* Code name for PowerPC 7450 */
! 8514: POWERPC_DEF("Vger", CPU_POWERPC_7450, 7450),
! 8515: /* PowerPC 7450 v1.0 (G4) */
! 8516: POWERPC_DEF("7450_v1.0", CPU_POWERPC_7450_v10, 7450),
! 8517: /* PowerPC 7450 v1.1 (G4) */
! 8518: POWERPC_DEF("7450_v1.1", CPU_POWERPC_7450_v11, 7450),
! 8519: /* PowerPC 7450 v1.2 (G4) */
! 8520: POWERPC_DEF("7450_v1.2", CPU_POWERPC_7450_v12, 7450),
! 8521: /* PowerPC 7450 v2.0 (G4) */
! 8522: POWERPC_DEF("7450_v2.0", CPU_POWERPC_7450_v20, 7450),
! 8523: /* PowerPC 7450 v2.1 (G4) */
! 8524: POWERPC_DEF("7450_v2.1", CPU_POWERPC_7450_v21, 7450),
! 8525: /* PowerPC 7441 (G4) */
! 8526: POWERPC_DEF("7441", CPU_POWERPC_74x1, 7440),
! 8527: /* PowerPC 7451 (G4) */
! 8528: POWERPC_DEF("7451", CPU_POWERPC_74x1, 7450),
! 8529: /* PowerPC 7441 v2.1 (G4) */
! 8530: POWERPC_DEF("7441_v2.1", CPU_POWERPC_7450_v21, 7440),
! 8531: /* PowerPC 7441 v2.3 (G4) */
! 8532: POWERPC_DEF("7441_v2.3", CPU_POWERPC_74x1_v23, 7440),
! 8533: /* PowerPC 7451 v2.3 (G4) */
! 8534: POWERPC_DEF("7451_v2.3", CPU_POWERPC_74x1_v23, 7450),
! 8535: /* PowerPC 7441 v2.10 (G4) */
! 8536: POWERPC_DEF("7441_v2.10", CPU_POWERPC_74x1_v210, 7440),
! 8537: /* PowerPC 7451 v2.10 (G4) */
! 8538: POWERPC_DEF("7451_v2.10", CPU_POWERPC_74x1_v210, 7450),
! 8539: /* PowerPC 7445 (G4) */
! 8540: POWERPC_DEF("7445", CPU_POWERPC_74x5, 7445),
! 8541: /* PowerPC 7455 (G4) */
! 8542: POWERPC_DEF("7455", CPU_POWERPC_74x5, 7455),
! 8543: /* Code name for PowerPC 7445/7455 */
! 8544: POWERPC_DEF("Apollo6", CPU_POWERPC_74x5, 7455),
! 8545: /* PowerPC 7445 v1.0 (G4) */
! 8546: POWERPC_DEF("7445_v1.0", CPU_POWERPC_74x5_v10, 7445),
! 8547: /* PowerPC 7455 v1.0 (G4) */
! 8548: POWERPC_DEF("7455_v1.0", CPU_POWERPC_74x5_v10, 7455),
! 8549: /* PowerPC 7445 v2.1 (G4) */
! 8550: POWERPC_DEF("7445_v2.1", CPU_POWERPC_74x5_v21, 7445),
! 8551: /* PowerPC 7455 v2.1 (G4) */
! 8552: POWERPC_DEF("7455_v2.1", CPU_POWERPC_74x5_v21, 7455),
! 8553: /* PowerPC 7445 v3.2 (G4) */
! 8554: POWERPC_DEF("7445_v3.2", CPU_POWERPC_74x5_v32, 7445),
! 8555: /* PowerPC 7455 v3.2 (G4) */
! 8556: POWERPC_DEF("7455_v3.2", CPU_POWERPC_74x5_v32, 7455),
! 8557: /* PowerPC 7445 v3.3 (G4) */
! 8558: POWERPC_DEF("7445_v3.3", CPU_POWERPC_74x5_v33, 7445),
! 8559: /* PowerPC 7455 v3.3 (G4) */
! 8560: POWERPC_DEF("7455_v3.3", CPU_POWERPC_74x5_v33, 7455),
! 8561: /* PowerPC 7445 v3.4 (G4) */
! 8562: POWERPC_DEF("7445_v3.4", CPU_POWERPC_74x5_v34, 7445),
! 8563: /* PowerPC 7455 v3.4 (G4) */
! 8564: POWERPC_DEF("7455_v3.4", CPU_POWERPC_74x5_v34, 7455),
! 8565: /* PowerPC 7447 (G4) */
! 8566: POWERPC_DEF("7447", CPU_POWERPC_74x7, 7445),
! 8567: /* PowerPC 7457 (G4) */
! 8568: POWERPC_DEF("7457", CPU_POWERPC_74x7, 7455),
! 8569: /* Code name for PowerPC 7447/7457 */
! 8570: POWERPC_DEF("Apollo7", CPU_POWERPC_74x7, 7455),
! 8571: /* PowerPC 7447 v1.0 (G4) */
! 8572: POWERPC_DEF("7447_v1.0", CPU_POWERPC_74x7_v10, 7445),
! 8573: /* PowerPC 7457 v1.0 (G4) */
! 8574: POWERPC_DEF("7457_v1.0", CPU_POWERPC_74x7_v10, 7455),
! 8575: /* PowerPC 7447 v1.1 (G4) */
! 8576: POWERPC_DEF("7447_v1.1", CPU_POWERPC_74x7_v11, 7445),
! 8577: /* PowerPC 7457 v1.1 (G4) */
! 8578: POWERPC_DEF("7457_v1.1", CPU_POWERPC_74x7_v11, 7455),
! 8579: /* PowerPC 7457 v1.2 (G4) */
! 8580: POWERPC_DEF("7457_v1.2", CPU_POWERPC_74x7_v12, 7455),
! 8581: /* PowerPC 7447A (G4) */
! 8582: POWERPC_DEF("7447A", CPU_POWERPC_74x7A, 7445),
! 8583: /* PowerPC 7457A (G4) */
! 8584: POWERPC_DEF("7457A", CPU_POWERPC_74x7A, 7455),
! 8585: /* PowerPC 7447A v1.0 (G4) */
! 8586: POWERPC_DEF("7447A_v1.0", CPU_POWERPC_74x7A_v10, 7445),
! 8587: /* PowerPC 7457A v1.0 (G4) */
! 8588: POWERPC_DEF("7457A_v1.0", CPU_POWERPC_74x7A_v10, 7455),
! 8589: /* Code name for PowerPC 7447A/7457A */
! 8590: POWERPC_DEF("Apollo7PM", CPU_POWERPC_74x7A_v10, 7455),
! 8591: /* PowerPC 7447A v1.1 (G4) */
! 8592: POWERPC_DEF("7447A_v1.1", CPU_POWERPC_74x7A_v11, 7445),
! 8593: /* PowerPC 7457A v1.1 (G4) */
! 8594: POWERPC_DEF("7457A_v1.1", CPU_POWERPC_74x7A_v11, 7455),
! 8595: /* PowerPC 7447A v1.2 (G4) */
! 8596: POWERPC_DEF("7447A_v1.2", CPU_POWERPC_74x7A_v12, 7445),
! 8597: /* PowerPC 7457A v1.2 (G4) */
! 8598: POWERPC_DEF("7457A_v1.2", CPU_POWERPC_74x7A_v12, 7455),
! 8599: /* 64 bits PowerPC */
! 8600: #if defined (TARGET_PPC64)
! 8601: /* PowerPC 620 */
! 8602: POWERPC_DEF("620", CPU_POWERPC_620, 620),
! 8603: /* Code name for PowerPC 620 */
! 8604: POWERPC_DEF("Trident", CPU_POWERPC_620, 620),
! 8605: #if defined (TODO)
! 8606: /* PowerPC 630 (POWER3) */
! 8607: POWERPC_DEF("630", CPU_POWERPC_630, 630),
! 8608: POWERPC_DEF("POWER3", CPU_POWERPC_630, 630),
! 8609: /* Code names for POWER3 */
! 8610: POWERPC_DEF("Boxer", CPU_POWERPC_630, 630),
! 8611: POWERPC_DEF("Dino", CPU_POWERPC_630, 630),
! 8612: #endif
! 8613: #if defined (TODO)
! 8614: /* PowerPC 631 (Power 3+) */
! 8615: POWERPC_DEF("631", CPU_POWERPC_631, 631),
! 8616: POWERPC_DEF("POWER3+", CPU_POWERPC_631, 631),
! 8617: #endif
! 8618: #if defined (TODO)
! 8619: /* POWER4 */
! 8620: POWERPC_DEF("POWER4", CPU_POWERPC_POWER4, POWER4),
! 8621: #endif
! 8622: #if defined (TODO)
! 8623: /* POWER4p */
! 8624: POWERPC_DEF("POWER4+", CPU_POWERPC_POWER4P, POWER4P),
! 8625: #endif
! 8626: #if defined (TODO)
! 8627: /* POWER5 */
! 8628: POWERPC_DEF("POWER5", CPU_POWERPC_POWER5, POWER5),
! 8629: /* POWER5GR */
! 8630: POWERPC_DEF("POWER5gr", CPU_POWERPC_POWER5GR, POWER5),
! 8631: #endif
! 8632: #if defined (TODO)
! 8633: /* POWER5+ */
! 8634: POWERPC_DEF("POWER5+", CPU_POWERPC_POWER5P, POWER5P),
! 8635: /* POWER5GS */
! 8636: POWERPC_DEF("POWER5gs", CPU_POWERPC_POWER5GS, POWER5P),
! 8637: #endif
! 8638: #if defined (TODO)
! 8639: /* POWER6 */
! 8640: POWERPC_DEF("POWER6", CPU_POWERPC_POWER6, POWER6),
! 8641: /* POWER6 running in POWER5 mode */
! 8642: POWERPC_DEF("POWER6_5", CPU_POWERPC_POWER6_5, POWER5),
! 8643: /* POWER6A */
! 8644: POWERPC_DEF("POWER6A", CPU_POWERPC_POWER6A, POWER6),
! 8645: #endif
! 8646: /* PowerPC 970 */
! 8647: POWERPC_DEF("970", CPU_POWERPC_970, 970),
! 8648: /* PowerPC 970FX (G5) */
! 8649: POWERPC_DEF("970fx", CPU_POWERPC_970FX, 970FX),
! 8650: /* PowerPC 970FX v1.0 (G5) */
! 8651: POWERPC_DEF("970fx_v1.0", CPU_POWERPC_970FX_v10, 970FX),
! 8652: /* PowerPC 970FX v2.0 (G5) */
! 8653: POWERPC_DEF("970fx_v2.0", CPU_POWERPC_970FX_v20, 970FX),
! 8654: /* PowerPC 970FX v2.1 (G5) */
! 8655: POWERPC_DEF("970fx_v2.1", CPU_POWERPC_970FX_v21, 970FX),
! 8656: /* PowerPC 970FX v3.0 (G5) */
! 8657: POWERPC_DEF("970fx_v3.0", CPU_POWERPC_970FX_v30, 970FX),
! 8658: /* PowerPC 970FX v3.1 (G5) */
! 8659: POWERPC_DEF("970fx_v3.1", CPU_POWERPC_970FX_v31, 970FX),
! 8660: /* PowerPC 970GX (G5) */
! 8661: POWERPC_DEF("970gx", CPU_POWERPC_970GX, 970GX),
! 8662: /* PowerPC 970MP */
! 8663: POWERPC_DEF("970mp", CPU_POWERPC_970MP, 970MP),
! 8664: /* PowerPC 970MP v1.0 */
! 8665: POWERPC_DEF("970mp_v1.0", CPU_POWERPC_970MP_v10, 970MP),
! 8666: /* PowerPC 970MP v1.1 */
! 8667: POWERPC_DEF("970mp_v1.1", CPU_POWERPC_970MP_v11, 970MP),
! 8668: #if defined (TODO)
! 8669: /* PowerPC Cell */
! 8670: POWERPC_DEF("Cell", CPU_POWERPC_CELL, 970),
! 8671: #endif
! 8672: #if defined (TODO)
! 8673: /* PowerPC Cell v1.0 */
! 8674: POWERPC_DEF("Cell_v1.0", CPU_POWERPC_CELL_v10, 970),
! 8675: #endif
! 8676: #if defined (TODO)
! 8677: /* PowerPC Cell v2.0 */
! 8678: POWERPC_DEF("Cell_v2.0", CPU_POWERPC_CELL_v20, 970),
! 8679: #endif
! 8680: #if defined (TODO)
! 8681: /* PowerPC Cell v3.0 */
! 8682: POWERPC_DEF("Cell_v3.0", CPU_POWERPC_CELL_v30, 970),
! 8683: #endif
! 8684: #if defined (TODO)
! 8685: /* PowerPC Cell v3.1 */
! 8686: POWERPC_DEF("Cell_v3.1", CPU_POWERPC_CELL_v31, 970),
1.1 root 8687: #endif
8688: #if defined (TODO)
1.1.1.4 ! root 8689: /* PowerPC Cell v3.2 */
! 8690: POWERPC_DEF("Cell_v3.2", CPU_POWERPC_CELL_v32, 970),
1.1 root 8691: #endif
8692: #if defined (TODO)
1.1.1.4 ! root 8693: /* RS64 (Apache/A35) */
! 8694: /* This one seems to support the whole POWER2 instruction set
! 8695: * and the PowerPC 64 one.
! 8696: */
! 8697: /* What about A10 & A30 ? */
! 8698: POWERPC_DEF("RS64", CPU_POWERPC_RS64, RS64),
! 8699: POWERPC_DEF("Apache", CPU_POWERPC_RS64, RS64),
! 8700: POWERPC_DEF("A35", CPU_POWERPC_RS64, RS64),
1.1 root 8701: #endif
8702: #if defined (TODO)
1.1.1.4 ! root 8703: /* RS64-II (NorthStar/A50) */
! 8704: POWERPC_DEF("RS64-II", CPU_POWERPC_RS64II, RS64),
! 8705: POWERPC_DEF("NorthStar", CPU_POWERPC_RS64II, RS64),
! 8706: POWERPC_DEF("A50", CPU_POWERPC_RS64II, RS64),
1.1 root 8707: #endif
8708: #if defined (TODO)
1.1.1.4 ! root 8709: /* RS64-III (Pulsar) */
! 8710: POWERPC_DEF("RS64-III", CPU_POWERPC_RS64III, RS64),
! 8711: POWERPC_DEF("Pulsar", CPU_POWERPC_RS64III, RS64),
1.1 root 8712: #endif
8713: #if defined (TODO)
1.1.1.4 ! root 8714: /* RS64-IV (IceStar/IStar/SStar) */
! 8715: POWERPC_DEF("RS64-IV", CPU_POWERPC_RS64IV, RS64),
! 8716: POWERPC_DEF("IceStar", CPU_POWERPC_RS64IV, RS64),
! 8717: POWERPC_DEF("IStar", CPU_POWERPC_RS64IV, RS64),
! 8718: POWERPC_DEF("SStar", CPU_POWERPC_RS64IV, RS64),
1.1 root 8719: #endif
1.1.1.4 ! root 8720: #endif /* defined (TARGET_PPC64) */
! 8721: /* POWER */
1.1 root 8722: #if defined (TODO)
1.1.1.4 ! root 8723: /* Original POWER */
! 8724: POWERPC_DEF("POWER", CPU_POWERPC_POWER, POWER),
! 8725: POWERPC_DEF("RIOS", CPU_POWERPC_POWER, POWER),
! 8726: POWERPC_DEF("RSC", CPU_POWERPC_POWER, POWER),
! 8727: POWERPC_DEF("RSC3308", CPU_POWERPC_POWER, POWER),
! 8728: POWERPC_DEF("RSC4608", CPU_POWERPC_POWER, POWER),
1.1 root 8729: #endif
8730: #if defined (TODO)
1.1.1.4 ! root 8731: /* POWER2 */
! 8732: POWERPC_DEF("POWER2", CPU_POWERPC_POWER2, POWER),
! 8733: POWERPC_DEF("RSC2", CPU_POWERPC_POWER2, POWER),
! 8734: POWERPC_DEF("P2SC", CPU_POWERPC_POWER2, POWER),
1.1 root 8735: #endif
1.1.1.4 ! root 8736: /* PA semi cores */
1.1 root 8737: #if defined (TODO)
1.1.1.4 ! root 8738: /* PA PA6T */
! 8739: POWERPC_DEF("PA6T", CPU_POWERPC_PA6T, PA6T),
1.1 root 8740: #endif
1.1.1.4 ! root 8741: /* Generic PowerPCs */
! 8742: #if defined (TARGET_PPC64)
! 8743: POWERPC_DEF("ppc64", CPU_POWERPC_PPC64, PPC64),
1.1 root 8744: #endif
1.1.1.4 ! root 8745: POWERPC_DEF("ppc32", CPU_POWERPC_PPC32, PPC32),
! 8746: POWERPC_DEF("ppc", CPU_POWERPC_DEFAULT, DEFAULT),
! 8747: /* Fallback */
! 8748: POWERPC_DEF("default", CPU_POWERPC_DEFAULT, DEFAULT),
! 8749: };
! 8750:
! 8751: /*****************************************************************************/
! 8752: /* Generic CPU instanciation routine */
! 8753: static void init_ppc_proc (CPUPPCState *env, const ppc_def_t *def)
! 8754: {
! 8755: #if !defined(CONFIG_USER_ONLY)
! 8756: int i;
! 8757:
! 8758: env->irq_inputs = NULL;
! 8759: /* Set all exception vectors to an invalid address */
! 8760: for (i = 0; i < POWERPC_EXCP_NB; i++)
! 8761: env->excp_vectors[i] = (target_ulong)(-1ULL);
! 8762: env->excp_prefix = 0x00000000;
! 8763: env->ivor_mask = 0x00000000;
! 8764: env->ivpr_mask = 0x00000000;
! 8765: /* Default MMU definitions */
! 8766: env->nb_BATs = 0;
! 8767: env->nb_tlb = 0;
! 8768: env->nb_ways = 0;
1.1 root 8769: #endif
1.1.1.4 ! root 8770: /* Register SPR common to all PowerPC implementations */
! 8771: gen_spr_generic(env);
! 8772: spr_register(env, SPR_PVR, "PVR",
! 8773: SPR_NOACCESS, SPR_NOACCESS,
! 8774: &spr_read_generic, SPR_NOACCESS,
! 8775: def->pvr);
! 8776: /* Register SVR if it's defined to anything else than POWERPC_SVR_NONE */
! 8777: if (def->svr != POWERPC_SVR_NONE) {
! 8778: if (def->svr & POWERPC_SVR_E500) {
! 8779: spr_register(env, SPR_E500_SVR, "SVR",
! 8780: SPR_NOACCESS, SPR_NOACCESS,
! 8781: &spr_read_generic, SPR_NOACCESS,
! 8782: def->svr & ~POWERPC_SVR_E500);
! 8783: } else {
! 8784: spr_register(env, SPR_SVR, "SVR",
! 8785: SPR_NOACCESS, SPR_NOACCESS,
! 8786: &spr_read_generic, SPR_NOACCESS,
! 8787: def->svr);
! 8788: }
! 8789: }
! 8790: /* PowerPC implementation specific initialisations (SPRs, timers, ...) */
! 8791: (*def->init_proc)(env);
! 8792: /* MSR bits & flags consistency checks */
! 8793: if (env->msr_mask & (1 << 25)) {
! 8794: switch (env->flags & (POWERPC_FLAG_SPE | POWERPC_FLAG_VRE)) {
! 8795: case POWERPC_FLAG_SPE:
! 8796: case POWERPC_FLAG_VRE:
! 8797: break;
! 8798: default:
! 8799: fprintf(stderr, "PowerPC MSR definition inconsistency\n"
! 8800: "Should define POWERPC_FLAG_SPE or POWERPC_FLAG_VRE\n");
! 8801: exit(1);
! 8802: }
! 8803: } else if (env->flags & (POWERPC_FLAG_SPE | POWERPC_FLAG_VRE)) {
! 8804: fprintf(stderr, "PowerPC MSR definition inconsistency\n"
! 8805: "Should not define POWERPC_FLAG_SPE nor POWERPC_FLAG_VRE\n");
! 8806: exit(1);
! 8807: }
! 8808: if (env->msr_mask & (1 << 17)) {
! 8809: switch (env->flags & (POWERPC_FLAG_TGPR | POWERPC_FLAG_CE)) {
! 8810: case POWERPC_FLAG_TGPR:
! 8811: case POWERPC_FLAG_CE:
! 8812: break;
! 8813: default:
! 8814: fprintf(stderr, "PowerPC MSR definition inconsistency\n"
! 8815: "Should define POWERPC_FLAG_TGPR or POWERPC_FLAG_CE\n");
! 8816: exit(1);
! 8817: }
! 8818: } else if (env->flags & (POWERPC_FLAG_TGPR | POWERPC_FLAG_CE)) {
! 8819: fprintf(stderr, "PowerPC MSR definition inconsistency\n"
! 8820: "Should not define POWERPC_FLAG_TGPR nor POWERPC_FLAG_CE\n");
! 8821: exit(1);
! 8822: }
! 8823: if (env->msr_mask & (1 << 10)) {
! 8824: switch (env->flags & (POWERPC_FLAG_SE | POWERPC_FLAG_DWE |
! 8825: POWERPC_FLAG_UBLE)) {
! 8826: case POWERPC_FLAG_SE:
! 8827: case POWERPC_FLAG_DWE:
! 8828: case POWERPC_FLAG_UBLE:
! 8829: break;
! 8830: default:
! 8831: fprintf(stderr, "PowerPC MSR definition inconsistency\n"
! 8832: "Should define POWERPC_FLAG_SE or POWERPC_FLAG_DWE or "
! 8833: "POWERPC_FLAG_UBLE\n");
! 8834: exit(1);
! 8835: }
! 8836: } else if (env->flags & (POWERPC_FLAG_SE | POWERPC_FLAG_DWE |
! 8837: POWERPC_FLAG_UBLE)) {
! 8838: fprintf(stderr, "PowerPC MSR definition inconsistency\n"
! 8839: "Should not define POWERPC_FLAG_SE nor POWERPC_FLAG_DWE nor "
! 8840: "POWERPC_FLAG_UBLE\n");
! 8841: exit(1);
! 8842: }
! 8843: if (env->msr_mask & (1 << 9)) {
! 8844: switch (env->flags & (POWERPC_FLAG_BE | POWERPC_FLAG_DE)) {
! 8845: case POWERPC_FLAG_BE:
! 8846: case POWERPC_FLAG_DE:
! 8847: break;
! 8848: default:
! 8849: fprintf(stderr, "PowerPC MSR definition inconsistency\n"
! 8850: "Should define POWERPC_FLAG_BE or POWERPC_FLAG_DE\n");
! 8851: exit(1);
! 8852: }
! 8853: } else if (env->flags & (POWERPC_FLAG_BE | POWERPC_FLAG_DE)) {
! 8854: fprintf(stderr, "PowerPC MSR definition inconsistency\n"
! 8855: "Should not define POWERPC_FLAG_BE nor POWERPC_FLAG_DE\n");
! 8856: exit(1);
! 8857: }
! 8858: if (env->msr_mask & (1 << 2)) {
! 8859: switch (env->flags & (POWERPC_FLAG_PX | POWERPC_FLAG_PMM)) {
! 8860: case POWERPC_FLAG_PX:
! 8861: case POWERPC_FLAG_PMM:
! 8862: break;
! 8863: default:
! 8864: fprintf(stderr, "PowerPC MSR definition inconsistency\n"
! 8865: "Should define POWERPC_FLAG_PX or POWERPC_FLAG_PMM\n");
! 8866: exit(1);
! 8867: }
! 8868: } else if (env->flags & (POWERPC_FLAG_PX | POWERPC_FLAG_PMM)) {
! 8869: fprintf(stderr, "PowerPC MSR definition inconsistency\n"
! 8870: "Should not define POWERPC_FLAG_PX nor POWERPC_FLAG_PMM\n");
! 8871: exit(1);
! 8872: }
! 8873: if ((env->flags & (POWERPC_FLAG_RTC_CLK | POWERPC_FLAG_BUS_CLK)) == 0) {
! 8874: fprintf(stderr, "PowerPC flags inconsistency\n"
! 8875: "Should define the time-base and decrementer clock source\n");
! 8876: exit(1);
! 8877: }
! 8878: /* Allocate TLBs buffer when needed */
! 8879: #if !defined(CONFIG_USER_ONLY)
! 8880: if (env->nb_tlb != 0) {
! 8881: int nb_tlb = env->nb_tlb;
! 8882: if (env->id_tlbs != 0)
! 8883: nb_tlb *= 2;
! 8884: env->tlb = qemu_mallocz(nb_tlb * sizeof(ppc_tlb_t));
! 8885: /* Pre-compute some useful values */
! 8886: env->tlb_per_way = env->nb_tlb / env->nb_ways;
! 8887: }
! 8888: if (env->irq_inputs == NULL) {
! 8889: fprintf(stderr, "WARNING: no internal IRQ controller registered.\n"
! 8890: " Attempt Qemu to crash very soon !\n");
! 8891: }
1.1 root 8892: #endif
1.1.1.4 ! root 8893: if (env->check_pow == NULL) {
! 8894: fprintf(stderr, "WARNING: no power management check handler "
! 8895: "registered.\n"
! 8896: " Attempt Qemu to crash very soon !\n");
! 8897: }
! 8898: }
! 8899:
! 8900: #if defined(PPC_DUMP_CPU)
! 8901: static void dump_ppc_sprs (CPUPPCState *env)
! 8902: {
! 8903: ppc_spr_t *spr;
! 8904: #if !defined(CONFIG_USER_ONLY)
! 8905: uint32_t sr, sw;
1.1 root 8906: #endif
1.1.1.4 ! root 8907: uint32_t ur, uw;
! 8908: int i, j, n;
! 8909:
! 8910: printf("Special purpose registers:\n");
! 8911: for (i = 0; i < 32; i++) {
! 8912: for (j = 0; j < 32; j++) {
! 8913: n = (i << 5) | j;
! 8914: spr = &env->spr_cb[n];
! 8915: uw = spr->uea_write != NULL && spr->uea_write != SPR_NOACCESS;
! 8916: ur = spr->uea_read != NULL && spr->uea_read != SPR_NOACCESS;
! 8917: #if !defined(CONFIG_USER_ONLY)
! 8918: sw = spr->oea_write != NULL && spr->oea_write != SPR_NOACCESS;
! 8919: sr = spr->oea_read != NULL && spr->oea_read != SPR_NOACCESS;
! 8920: if (sw || sr || uw || ur) {
! 8921: printf("SPR: %4d (%03x) %-8s s%c%c u%c%c\n",
! 8922: (i << 5) | j, (i << 5) | j, spr->name,
! 8923: sw ? 'w' : '-', sr ? 'r' : '-',
! 8924: uw ? 'w' : '-', ur ? 'r' : '-');
! 8925: }
! 8926: #else
! 8927: if (uw || ur) {
! 8928: printf("SPR: %4d (%03x) %-8s u%c%c\n",
! 8929: (i << 5) | j, (i << 5) | j, spr->name,
! 8930: uw ? 'w' : '-', ur ? 'r' : '-');
! 8931: }
1.1 root 8932: #endif
1.1.1.4 ! root 8933: }
! 8934: }
! 8935: fflush(stdout);
! 8936: fflush(stderr);
! 8937: }
1.1 root 8938: #endif
1.1.1.4 ! root 8939:
! 8940: /*****************************************************************************/
! 8941: #include <stdlib.h>
! 8942: #include <string.h>
! 8943:
! 8944: int fflush (FILE *stream);
! 8945:
! 8946: /* Opcode types */
! 8947: enum {
! 8948: PPC_DIRECT = 0, /* Opcode routine */
! 8949: PPC_INDIRECT = 1, /* Indirect opcode table */
! 8950: };
! 8951:
! 8952: static inline int is_indirect_opcode (void *handler)
! 8953: {
! 8954: return ((unsigned long)handler & 0x03) == PPC_INDIRECT;
! 8955: }
! 8956:
! 8957: static inline opc_handler_t **ind_table(void *handler)
! 8958: {
! 8959: return (opc_handler_t **)((unsigned long)handler & ~3);
! 8960: }
! 8961:
! 8962: /* Instruction table creation */
! 8963: /* Opcodes tables creation */
! 8964: static void fill_new_table (opc_handler_t **table, int len)
! 8965: {
! 8966: int i;
! 8967:
! 8968: for (i = 0; i < len; i++)
! 8969: table[i] = &invalid_handler;
! 8970: }
! 8971:
! 8972: static int create_new_table (opc_handler_t **table, unsigned char idx)
! 8973: {
! 8974: opc_handler_t **tmp;
! 8975:
! 8976: tmp = malloc(0x20 * sizeof(opc_handler_t));
! 8977: if (tmp == NULL)
! 8978: return -1;
! 8979: fill_new_table(tmp, 0x20);
! 8980: table[idx] = (opc_handler_t *)((unsigned long)tmp | PPC_INDIRECT);
! 8981:
! 8982: return 0;
! 8983: }
! 8984:
! 8985: static int insert_in_table (opc_handler_t **table, unsigned char idx,
! 8986: opc_handler_t *handler)
! 8987: {
! 8988: if (table[idx] != &invalid_handler)
! 8989: return -1;
! 8990: table[idx] = handler;
! 8991:
! 8992: return 0;
! 8993: }
! 8994:
! 8995: static int register_direct_insn (opc_handler_t **ppc_opcodes,
! 8996: unsigned char idx, opc_handler_t *handler)
! 8997: {
! 8998: if (insert_in_table(ppc_opcodes, idx, handler) < 0) {
! 8999: printf("*** ERROR: opcode %02x already assigned in main "
! 9000: "opcode table\n", idx);
! 9001: #if defined(DO_PPC_STATISTICS) || defined(PPC_DUMP_CPU)
! 9002: printf(" Registered handler '%s' - new handler '%s'\n",
! 9003: ppc_opcodes[idx]->oname, handler->oname);
1.1 root 9004: #endif
1.1.1.4 ! root 9005: return -1;
1.1 root 9006: }
1.1.1.4 ! root 9007:
! 9008: return 0;
! 9009: }
! 9010:
! 9011: static int register_ind_in_table (opc_handler_t **table,
! 9012: unsigned char idx1, unsigned char idx2,
! 9013: opc_handler_t *handler)
! 9014: {
! 9015: if (table[idx1] == &invalid_handler) {
! 9016: if (create_new_table(table, idx1) < 0) {
! 9017: printf("*** ERROR: unable to create indirect table "
! 9018: "idx=%02x\n", idx1);
! 9019: return -1;
! 9020: }
! 9021: } else {
! 9022: if (!is_indirect_opcode(table[idx1])) {
! 9023: printf("*** ERROR: idx %02x already assigned to a direct "
! 9024: "opcode\n", idx1);
! 9025: #if defined(DO_PPC_STATISTICS) || defined(PPC_DUMP_CPU)
! 9026: printf(" Registered handler '%s' - new handler '%s'\n",
! 9027: ind_table(table[idx1])[idx2]->oname, handler->oname);
1.1 root 9028: #endif
1.1.1.4 ! root 9029: return -1;
! 9030: }
! 9031: }
! 9032: if (handler != NULL &&
! 9033: insert_in_table(ind_table(table[idx1]), idx2, handler) < 0) {
! 9034: printf("*** ERROR: opcode %02x already assigned in "
! 9035: "opcode table %02x\n", idx2, idx1);
! 9036: #if defined(DO_PPC_STATISTICS) || defined(PPC_DUMP_CPU)
! 9037: printf(" Registered handler '%s' - new handler '%s'\n",
! 9038: ind_table(table[idx1])[idx2]->oname, handler->oname);
1.1 root 9039: #endif
1.1.1.4 ! root 9040: return -1;
! 9041: }
! 9042:
! 9043: return 0;
! 9044: }
! 9045:
! 9046: static int register_ind_insn (opc_handler_t **ppc_opcodes,
! 9047: unsigned char idx1, unsigned char idx2,
! 9048: opc_handler_t *handler)
! 9049: {
! 9050: int ret;
! 9051:
! 9052: ret = register_ind_in_table(ppc_opcodes, idx1, idx2, handler);
! 9053:
! 9054: return ret;
! 9055: }
! 9056:
! 9057: static int register_dblind_insn (opc_handler_t **ppc_opcodes,
! 9058: unsigned char idx1, unsigned char idx2,
! 9059: unsigned char idx3, opc_handler_t *handler)
! 9060: {
! 9061: if (register_ind_in_table(ppc_opcodes, idx1, idx2, NULL) < 0) {
! 9062: printf("*** ERROR: unable to join indirect table idx "
! 9063: "[%02x-%02x]\n", idx1, idx2);
! 9064: return -1;
! 9065: }
! 9066: if (register_ind_in_table(ind_table(ppc_opcodes[idx1]), idx2, idx3,
! 9067: handler) < 0) {
! 9068: printf("*** ERROR: unable to insert opcode "
! 9069: "[%02x-%02x-%02x]\n", idx1, idx2, idx3);
! 9070: return -1;
! 9071: }
! 9072:
! 9073: return 0;
! 9074: }
! 9075:
! 9076: static int register_insn (opc_handler_t **ppc_opcodes, opcode_t *insn)
! 9077: {
! 9078: if (insn->opc2 != 0xFF) {
! 9079: if (insn->opc3 != 0xFF) {
! 9080: if (register_dblind_insn(ppc_opcodes, insn->opc1, insn->opc2,
! 9081: insn->opc3, &insn->handler) < 0)
! 9082: return -1;
! 9083: } else {
! 9084: if (register_ind_insn(ppc_opcodes, insn->opc1,
! 9085: insn->opc2, &insn->handler) < 0)
! 9086: return -1;
! 9087: }
! 9088: } else {
! 9089: if (register_direct_insn(ppc_opcodes, insn->opc1, &insn->handler) < 0)
! 9090: return -1;
! 9091: }
! 9092:
! 9093: return 0;
! 9094: }
! 9095:
! 9096: static int test_opcode_table (opc_handler_t **table, int len)
! 9097: {
! 9098: int i, count, tmp;
! 9099:
! 9100: for (i = 0, count = 0; i < len; i++) {
! 9101: /* Consistency fixup */
! 9102: if (table[i] == NULL)
! 9103: table[i] = &invalid_handler;
! 9104: if (table[i] != &invalid_handler) {
! 9105: if (is_indirect_opcode(table[i])) {
! 9106: tmp = test_opcode_table(ind_table(table[i]), 0x20);
! 9107: if (tmp == 0) {
! 9108: free(table[i]);
! 9109: table[i] = &invalid_handler;
! 9110: } else {
! 9111: count++;
! 9112: }
! 9113: } else {
! 9114: count++;
! 9115: }
! 9116: }
! 9117: }
! 9118:
! 9119: return count;
! 9120: }
! 9121:
! 9122: static void fix_opcode_tables (opc_handler_t **ppc_opcodes)
! 9123: {
! 9124: if (test_opcode_table(ppc_opcodes, 0x40) == 0)
! 9125: printf("*** WARNING: no opcode defined !\n");
! 9126: }
! 9127:
! 9128: /*****************************************************************************/
! 9129: static int create_ppc_opcodes (CPUPPCState *env, const ppc_def_t *def)
! 9130: {
! 9131: opcode_t *opc, *start, *end;
! 9132:
! 9133: fill_new_table(env->opcodes, 0x40);
! 9134: if (&opc_start < &opc_end) {
! 9135: start = &opc_start;
! 9136: end = &opc_end;
! 9137: } else {
! 9138: start = &opc_end;
! 9139: end = &opc_start;
! 9140: }
! 9141: for (opc = start + 1; opc != end; opc++) {
! 9142: if ((opc->handler.type & def->insns_flags) != 0) {
! 9143: if (register_insn(env->opcodes, opc) < 0) {
! 9144: printf("*** ERROR initializing PowerPC instruction "
! 9145: "0x%02x 0x%02x 0x%02x\n", opc->opc1, opc->opc2,
! 9146: opc->opc3);
! 9147: return -1;
! 9148: }
! 9149: }
! 9150: }
! 9151: fix_opcode_tables(env->opcodes);
! 9152: fflush(stdout);
! 9153: fflush(stderr);
! 9154:
! 9155: return 0;
! 9156: }
! 9157:
! 9158: #if defined(PPC_DUMP_CPU)
! 9159: static void dump_ppc_insns (CPUPPCState *env)
! 9160: {
! 9161: opc_handler_t **table, *handler;
! 9162: const unsigned char *p, *q;
! 9163: uint8_t opc1, opc2, opc3;
! 9164:
! 9165: printf("Instructions set:\n");
! 9166: /* opc1 is 6 bits long */
! 9167: for (opc1 = 0x00; opc1 < 0x40; opc1++) {
! 9168: table = env->opcodes;
! 9169: handler = table[opc1];
! 9170: if (is_indirect_opcode(handler)) {
! 9171: /* opc2 is 5 bits long */
! 9172: for (opc2 = 0; opc2 < 0x20; opc2++) {
! 9173: table = env->opcodes;
! 9174: handler = env->opcodes[opc1];
! 9175: table = ind_table(handler);
! 9176: handler = table[opc2];
! 9177: if (is_indirect_opcode(handler)) {
! 9178: table = ind_table(handler);
! 9179: /* opc3 is 5 bits long */
! 9180: for (opc3 = 0; opc3 < 0x20; opc3++) {
! 9181: handler = table[opc3];
! 9182: if (handler->handler != &gen_invalid) {
! 9183: /* Special hack to properly dump SPE insns */
! 9184: p = strchr(handler->oname, '_');
! 9185: if (p == NULL) {
! 9186: printf("INSN: %02x %02x %02x (%02d %04d) : "
! 9187: "%s\n",
! 9188: opc1, opc2, opc3, opc1,
! 9189: (opc3 << 5) | opc2,
! 9190: handler->oname);
! 9191: } else {
! 9192: q = "speundef";
! 9193: if ((p - handler->oname) != strlen(q) ||
! 9194: memcmp(handler->oname, q, strlen(q)) != 0) {
! 9195: /* First instruction */
! 9196: printf("INSN: %02x %02x %02x (%02d %04d) : "
! 9197: "%.*s\n",
! 9198: opc1, opc2 << 1, opc3, opc1,
! 9199: (opc3 << 6) | (opc2 << 1),
! 9200: (int)(p - handler->oname),
! 9201: handler->oname);
! 9202: }
! 9203: if (strcmp(p + 1, q) != 0) {
! 9204: /* Second instruction */
! 9205: printf("INSN: %02x %02x %02x (%02d %04d) : "
! 9206: "%s\n",
! 9207: opc1, (opc2 << 1) | 1, opc3, opc1,
! 9208: (opc3 << 6) | (opc2 << 1) | 1,
! 9209: p + 1);
! 9210: }
! 9211: }
! 9212: }
! 9213: }
! 9214: } else {
! 9215: if (handler->handler != &gen_invalid) {
! 9216: printf("INSN: %02x %02x -- (%02d %04d) : %s\n",
! 9217: opc1, opc2, opc1, opc2, handler->oname);
! 9218: }
! 9219: }
! 9220: }
! 9221: } else {
! 9222: if (handler->handler != &gen_invalid) {
! 9223: printf("INSN: %02x -- -- (%02d ----) : %s\n",
! 9224: opc1, opc1, handler->oname);
! 9225: }
! 9226: }
! 9227: }
! 9228: }
1.1 root 9229: #endif
1.1.1.4 ! root 9230:
! 9231: int cpu_ppc_register_internal (CPUPPCState *env, const ppc_def_t *def)
! 9232: {
! 9233: env->msr_mask = def->msr_mask;
! 9234: env->mmu_model = def->mmu_model;
! 9235: env->excp_model = def->excp_model;
! 9236: env->bus_model = def->bus_model;
! 9237: env->flags = def->flags;
! 9238: env->bfd_mach = def->bfd_mach;
! 9239: env->check_pow = def->check_pow;
! 9240: if (create_ppc_opcodes(env, def) < 0)
! 9241: return -1;
! 9242: init_ppc_proc(env, def);
! 9243: #if defined(PPC_DUMP_CPU)
1.1 root 9244: {
1.1.1.4 ! root 9245: const unsigned char *mmu_model, *excp_model, *bus_model;
! 9246: switch (env->mmu_model) {
! 9247: case POWERPC_MMU_32B:
! 9248: mmu_model = "PowerPC 32";
! 9249: break;
! 9250: case POWERPC_MMU_SOFT_6xx:
! 9251: mmu_model = "PowerPC 6xx/7xx with software driven TLBs";
! 9252: break;
! 9253: case POWERPC_MMU_SOFT_74xx:
! 9254: mmu_model = "PowerPC 74xx with software driven TLBs";
! 9255: break;
! 9256: case POWERPC_MMU_SOFT_4xx:
! 9257: mmu_model = "PowerPC 4xx with software driven TLBs";
! 9258: break;
! 9259: case POWERPC_MMU_SOFT_4xx_Z:
! 9260: mmu_model = "PowerPC 4xx with software driven TLBs "
! 9261: "and zones protections";
! 9262: break;
! 9263: case POWERPC_MMU_REAL:
! 9264: mmu_model = "PowerPC real mode only";
! 9265: break;
! 9266: case POWERPC_MMU_MPC8xx:
! 9267: mmu_model = "PowerPC MPC8xx";
! 9268: break;
! 9269: case POWERPC_MMU_BOOKE:
! 9270: mmu_model = "PowerPC BookE";
! 9271: break;
! 9272: case POWERPC_MMU_BOOKE_FSL:
! 9273: mmu_model = "PowerPC BookE FSL";
! 9274: break;
! 9275: case POWERPC_MMU_601:
! 9276: mmu_model = "PowerPC 601";
! 9277: break;
! 9278: #if defined (TARGET_PPC64)
! 9279: case POWERPC_MMU_64B:
! 9280: mmu_model = "PowerPC 64";
! 9281: break;
! 9282: case POWERPC_MMU_620:
! 9283: mmu_model = "PowerPC 620";
! 9284: break;
1.1 root 9285: #endif
1.1.1.4 ! root 9286: default:
! 9287: mmu_model = "Unknown or invalid";
! 9288: break;
! 9289: }
! 9290: switch (env->excp_model) {
! 9291: case POWERPC_EXCP_STD:
! 9292: excp_model = "PowerPC";
! 9293: break;
! 9294: case POWERPC_EXCP_40x:
! 9295: excp_model = "PowerPC 40x";
! 9296: break;
! 9297: case POWERPC_EXCP_601:
! 9298: excp_model = "PowerPC 601";
! 9299: break;
! 9300: case POWERPC_EXCP_602:
! 9301: excp_model = "PowerPC 602";
! 9302: break;
! 9303: case POWERPC_EXCP_603:
! 9304: excp_model = "PowerPC 603";
! 9305: break;
! 9306: case POWERPC_EXCP_603E:
! 9307: excp_model = "PowerPC 603e";
! 9308: break;
! 9309: case POWERPC_EXCP_604:
! 9310: excp_model = "PowerPC 604";
! 9311: break;
! 9312: case POWERPC_EXCP_7x0:
! 9313: excp_model = "PowerPC 740/750";
! 9314: break;
! 9315: case POWERPC_EXCP_7x5:
! 9316: excp_model = "PowerPC 745/755";
! 9317: break;
! 9318: case POWERPC_EXCP_74xx:
! 9319: excp_model = "PowerPC 74xx";
! 9320: break;
! 9321: case POWERPC_EXCP_BOOKE:
! 9322: excp_model = "PowerPC BookE";
! 9323: break;
! 9324: #if defined (TARGET_PPC64)
! 9325: case POWERPC_EXCP_970:
! 9326: excp_model = "PowerPC 970";
! 9327: break;
1.1 root 9328: #endif
1.1.1.4 ! root 9329: default:
! 9330: excp_model = "Unknown or invalid";
! 9331: break;
! 9332: }
! 9333: switch (env->bus_model) {
! 9334: case PPC_FLAGS_INPUT_6xx:
! 9335: bus_model = "PowerPC 6xx";
! 9336: break;
! 9337: case PPC_FLAGS_INPUT_BookE:
! 9338: bus_model = "PowerPC BookE";
! 9339: break;
! 9340: case PPC_FLAGS_INPUT_405:
! 9341: bus_model = "PowerPC 405";
! 9342: break;
! 9343: case PPC_FLAGS_INPUT_401:
! 9344: bus_model = "PowerPC 401/403";
! 9345: break;
! 9346: case PPC_FLAGS_INPUT_RCPU:
! 9347: bus_model = "RCPU / MPC8xx";
! 9348: break;
! 9349: #if defined (TARGET_PPC64)
! 9350: case PPC_FLAGS_INPUT_970:
! 9351: bus_model = "PowerPC 970";
! 9352: break;
1.1 root 9353: #endif
1.1.1.4 ! root 9354: default:
! 9355: bus_model = "Unknown or invalid";
! 9356: break;
! 9357: }
! 9358: printf("PowerPC %-12s : PVR %08x MSR %016" PRIx64 "\n"
! 9359: " MMU model : %s\n",
! 9360: def->name, def->pvr, def->msr_mask, mmu_model);
! 9361: #if !defined(CONFIG_USER_ONLY)
! 9362: if (env->tlb != NULL) {
! 9363: printf(" %d %s TLB in %d ways\n",
! 9364: env->nb_tlb, env->id_tlbs ? "splitted" : "merged",
! 9365: env->nb_ways);
! 9366: }
1.1 root 9367: #endif
1.1.1.4 ! root 9368: printf(" Exceptions model : %s\n"
! 9369: " Bus model : %s\n",
! 9370: excp_model, bus_model);
! 9371: printf(" MSR features :\n");
! 9372: if (env->flags & POWERPC_FLAG_SPE)
! 9373: printf(" signal processing engine enable"
! 9374: "\n");
! 9375: else if (env->flags & POWERPC_FLAG_VRE)
! 9376: printf(" vector processor enable\n");
! 9377: if (env->flags & POWERPC_FLAG_TGPR)
! 9378: printf(" temporary GPRs\n");
! 9379: else if (env->flags & POWERPC_FLAG_CE)
! 9380: printf(" critical input enable\n");
! 9381: if (env->flags & POWERPC_FLAG_SE)
! 9382: printf(" single-step trace mode\n");
! 9383: else if (env->flags & POWERPC_FLAG_DWE)
! 9384: printf(" debug wait enable\n");
! 9385: else if (env->flags & POWERPC_FLAG_UBLE)
! 9386: printf(" user BTB lock enable\n");
! 9387: if (env->flags & POWERPC_FLAG_BE)
! 9388: printf(" branch-step trace mode\n");
! 9389: else if (env->flags & POWERPC_FLAG_DE)
! 9390: printf(" debug interrupt enable\n");
! 9391: if (env->flags & POWERPC_FLAG_PX)
! 9392: printf(" inclusive protection\n");
! 9393: else if (env->flags & POWERPC_FLAG_PMM)
! 9394: printf(" performance monitor mark\n");
! 9395: if (env->flags == POWERPC_FLAG_NONE)
! 9396: printf(" none\n");
! 9397: printf(" Time-base/decrementer clock source: %s\n",
! 9398: env->flags & POWERPC_FLAG_RTC_CLK ? "RTC clock" : "bus clock");
! 9399: }
! 9400: dump_ppc_insns(env);
! 9401: dump_ppc_sprs(env);
! 9402: fflush(stdout);
1.1 root 9403: #endif
9404:
1.1.1.4 ! root 9405: return 0;
! 9406: }
1.1 root 9407:
1.1.1.4 ! root 9408: static const ppc_def_t *ppc_find_by_pvr (uint32_t pvr)
! 9409: {
! 9410: const ppc_def_t *ret;
! 9411: uint32_t pvr_rev;
! 9412: int i, best, match, best_match, max;
! 9413:
! 9414: ret = NULL;
! 9415: max = sizeof(ppc_defs) / sizeof(ppc_def_t);
! 9416: best = -1;
! 9417: pvr_rev = pvr & 0xFFFF;
! 9418: /* We want all specified bits to match */
! 9419: best_match = 32 - ctz32(pvr_rev);
! 9420: for (i = 0; i < max; i++) {
! 9421: /* We check that the 16 higher bits are the same to ensure the CPU
! 9422: * model will be the choosen one.
! 9423: */
! 9424: if (((pvr ^ ppc_defs[i].pvr) >> 16) == 0) {
! 9425: /* We want as much as possible of the low-level 16 bits
! 9426: * to be the same but we allow inexact matches.
! 9427: */
! 9428: match = clz32(pvr_rev ^ (ppc_defs[i].pvr & 0xFFFF));
! 9429: /* We check '>=' instead of '>' because the PPC_defs table
! 9430: * is ordered by increasing revision.
! 9431: * Then, we will match the higher revision compatible
! 9432: * with the requested PVR
! 9433: */
! 9434: if (match >= best_match) {
! 9435: best = i;
! 9436: best_match = match;
! 9437: }
1.1 root 9438: }
9439: }
1.1.1.4 ! root 9440: if (best != -1)
! 9441: ret = &ppc_defs[best];
1.1 root 9442:
9443: return ret;
9444: }
9445:
1.1.1.4 ! root 9446: #include <ctype.h>
1.1 root 9447:
1.1.1.4 ! root 9448: const ppc_def_t *cpu_ppc_find_by_name (const unsigned char *name)
! 9449: {
! 9450: const ppc_def_t *ret;
! 9451: const unsigned char *p;
! 9452: int i, max, len;
! 9453:
! 9454: /* Check if the given name is a PVR */
! 9455: len = strlen(name);
! 9456: if (len == 10 && name[0] == '0' && name[1] == 'x') {
! 9457: p = name + 2;
! 9458: goto check_pvr;
! 9459: } else if (len == 8) {
! 9460: p = name;
! 9461: check_pvr:
! 9462: for (i = 0; i < 8; i++) {
! 9463: if (!isxdigit(*p++))
! 9464: break;
! 9465: }
! 9466: if (i == 8)
! 9467: return ppc_find_by_pvr(strtoul(name, NULL, 16));
! 9468: }
! 9469: ret = NULL;
! 9470: max = sizeof(ppc_defs) / sizeof(ppc_def_t);
! 9471: for (i = 0; i < max; i++) {
! 9472: if (strcasecmp(name, ppc_defs[i].name) == 0) {
! 9473: ret = &ppc_defs[i];
1.1 root 9474: break;
9475: }
9476: }
9477:
9478: return ret;
9479: }
9480:
9481: void ppc_cpu_list (FILE *f, int (*cpu_fprintf)(FILE *f, const char *fmt, ...))
9482: {
1.1.1.4 ! root 9483: int i, max;
1.1 root 9484:
1.1.1.4 ! root 9485: max = sizeof(ppc_defs) / sizeof(ppc_def_t);
! 9486: for (i = 0; i < max; i++) {
! 9487: (*cpu_fprintf)(f, "PowerPC %-16s PVR %08x\n",
! 9488: ppc_defs[i].name, ppc_defs[i].pvr);
1.1 root 9489: }
9490: }
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