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1.1 root 1: /*
2: * S/390 virtual CPU header
3: *
4: * Copyright (c) 2009 Ulrich Hecht
5: *
6: * This library is free software; you can redistribute it and/or
7: * modify it under the terms of the GNU Lesser General Public
8: * License as published by the Free Software Foundation; either
9: * version 2 of the License, or (at your option) any later version.
10: *
11: * This library is distributed in the hope that it will be useful,
12: * but WITHOUT ANY WARRANTY; without even the implied warranty of
13: * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14: * Lesser General Public License for more details.
15: *
16: * You should have received a copy of the GNU Lesser General Public
1.1.1.2 root 17: * License along with this library; if not, see <http://www.gnu.org/licenses/>.
1.1 root 18: */
19: #ifndef CPU_S390X_H
20: #define CPU_S390X_H
21:
22: #define TARGET_LONG_BITS 64
23:
24: #define ELF_MACHINE EM_S390
25:
26: #define CPUState struct CPUS390XState
27:
28: #include "cpu-defs.h"
1.1.1.4 ! root 29: #define TARGET_PAGE_BITS 12
! 30:
! 31: #define TARGET_PHYS_ADDR_SPACE_BITS 64
! 32: #define TARGET_VIRT_ADDR_SPACE_BITS 64
! 33:
! 34: #include "cpu-all.h"
1.1 root 35:
36: #include "softfloat.h"
37:
1.1.1.4 ! root 38: #define NB_MMU_MODES 3
1.1 root 39:
1.1.1.4 ! root 40: #define MMU_MODE0_SUFFIX _primary
! 41: #define MMU_MODE1_SUFFIX _secondary
! 42: #define MMU_MODE2_SUFFIX _home
! 43:
! 44: #define MMU_USER_IDX 1
! 45:
! 46: #define MAX_EXT_QUEUE 16
! 47:
! 48: typedef struct PSW {
! 49: uint64_t mask;
! 50: uint64_t addr;
! 51: } PSW;
! 52:
! 53: typedef struct ExtQueue {
! 54: uint32_t code;
! 55: uint32_t param;
! 56: uint32_t param64;
! 57: } ExtQueue;
1.1 root 58:
59: typedef struct CPUS390XState {
60: uint64_t regs[16]; /* GP registers */
61:
62: uint32_t aregs[16]; /* access registers */
63:
64: uint32_t fpc; /* floating-point control register */
1.1.1.4 ! root 65: CPU_DoubleU fregs[16]; /* FP registers */
1.1 root 66: float_status fpu_status; /* passed to softfloat lib */
67:
1.1.1.4 ! root 68: PSW psw;
1.1 root 69:
1.1.1.4 ! root 70: uint32_t cc_op;
! 71: uint64_t cc_src;
! 72: uint64_t cc_dst;
! 73: uint64_t cc_vr;
1.1 root 74:
75: uint64_t __excp_addr;
1.1.1.4 ! root 76: uint64_t psa;
! 77:
! 78: uint32_t int_pgm_code;
! 79: uint32_t int_pgm_ilc;
! 80:
! 81: uint32_t int_svc_code;
! 82: uint32_t int_svc_ilc;
! 83:
! 84: uint64_t cregs[16]; /* control registers */
! 85:
! 86: int pending_int;
! 87: ExtQueue ext_queue[MAX_EXT_QUEUE];
! 88:
! 89: int ext_index;
1.1 root 90:
91: CPU_COMMON
1.1.1.4 ! root 92:
! 93: /* reset does memset(0) up to here */
! 94:
! 95: int cpu_num;
! 96: uint8_t *storage_keys;
! 97:
! 98: uint64_t tod_offset;
! 99: uint64_t tod_basetime;
! 100: QEMUTimer *tod_timer;
! 101:
! 102: QEMUTimer *cpu_timer;
1.1 root 103: } CPUS390XState;
104:
105: #if defined(CONFIG_USER_ONLY)
106: static inline void cpu_clone_regs(CPUState *env, target_ulong newsp)
107: {
1.1.1.4 ! root 108: if (newsp) {
1.1 root 109: env->regs[15] = newsp;
1.1.1.4 ! root 110: }
1.1 root 111: env->regs[0] = 0;
112: }
113: #endif
114:
1.1.1.4 ! root 115: /* Interrupt Codes */
! 116: /* Program Interrupts */
! 117: #define PGM_OPERATION 0x0001
! 118: #define PGM_PRIVILEGED 0x0002
! 119: #define PGM_EXECUTE 0x0003
! 120: #define PGM_PROTECTION 0x0004
! 121: #define PGM_ADDRESSING 0x0005
! 122: #define PGM_SPECIFICATION 0x0006
! 123: #define PGM_DATA 0x0007
! 124: #define PGM_FIXPT_OVERFLOW 0x0008
! 125: #define PGM_FIXPT_DIVIDE 0x0009
! 126: #define PGM_DEC_OVERFLOW 0x000a
! 127: #define PGM_DEC_DIVIDE 0x000b
! 128: #define PGM_HFP_EXP_OVERFLOW 0x000c
! 129: #define PGM_HFP_EXP_UNDERFLOW 0x000d
! 130: #define PGM_HFP_SIGNIFICANCE 0x000e
! 131: #define PGM_HFP_DIVIDE 0x000f
! 132: #define PGM_SEGMENT_TRANS 0x0010
! 133: #define PGM_PAGE_TRANS 0x0011
! 134: #define PGM_TRANS_SPEC 0x0012
! 135: #define PGM_SPECIAL_OP 0x0013
! 136: #define PGM_OPERAND 0x0015
! 137: #define PGM_TRACE_TABLE 0x0016
! 138: #define PGM_SPACE_SWITCH 0x001c
! 139: #define PGM_HFP_SQRT 0x001d
! 140: #define PGM_PC_TRANS_SPEC 0x001f
! 141: #define PGM_AFX_TRANS 0x0020
! 142: #define PGM_ASX_TRANS 0x0021
! 143: #define PGM_LX_TRANS 0x0022
! 144: #define PGM_EX_TRANS 0x0023
! 145: #define PGM_PRIM_AUTH 0x0024
! 146: #define PGM_SEC_AUTH 0x0025
! 147: #define PGM_ALET_SPEC 0x0028
! 148: #define PGM_ALEN_SPEC 0x0029
! 149: #define PGM_ALE_SEQ 0x002a
! 150: #define PGM_ASTE_VALID 0x002b
! 151: #define PGM_ASTE_SEQ 0x002c
! 152: #define PGM_EXT_AUTH 0x002d
! 153: #define PGM_STACK_FULL 0x0030
! 154: #define PGM_STACK_EMPTY 0x0031
! 155: #define PGM_STACK_SPEC 0x0032
! 156: #define PGM_STACK_TYPE 0x0033
! 157: #define PGM_STACK_OP 0x0034
! 158: #define PGM_ASCE_TYPE 0x0038
! 159: #define PGM_REG_FIRST_TRANS 0x0039
! 160: #define PGM_REG_SEC_TRANS 0x003a
! 161: #define PGM_REG_THIRD_TRANS 0x003b
! 162: #define PGM_MONITOR 0x0040
! 163: #define PGM_PER 0x0080
! 164: #define PGM_CRYPTO 0x0119
! 165:
! 166: /* External Interrupts */
! 167: #define EXT_INTERRUPT_KEY 0x0040
! 168: #define EXT_CLOCK_COMP 0x1004
! 169: #define EXT_CPU_TIMER 0x1005
! 170: #define EXT_MALFUNCTION 0x1200
! 171: #define EXT_EMERGENCY 0x1201
! 172: #define EXT_EXTERNAL_CALL 0x1202
! 173: #define EXT_ETR 0x1406
! 174: #define EXT_SERVICE 0x2401
! 175: #define EXT_VIRTIO 0x2603
! 176:
! 177: /* PSW defines */
! 178: #undef PSW_MASK_PER
! 179: #undef PSW_MASK_DAT
! 180: #undef PSW_MASK_IO
! 181: #undef PSW_MASK_EXT
! 182: #undef PSW_MASK_KEY
! 183: #undef PSW_SHIFT_KEY
! 184: #undef PSW_MASK_MCHECK
! 185: #undef PSW_MASK_WAIT
! 186: #undef PSW_MASK_PSTATE
! 187: #undef PSW_MASK_ASC
! 188: #undef PSW_MASK_CC
! 189: #undef PSW_MASK_PM
! 190: #undef PSW_MASK_64
! 191:
! 192: #define PSW_MASK_PER 0x4000000000000000ULL
! 193: #define PSW_MASK_DAT 0x0400000000000000ULL
! 194: #define PSW_MASK_IO 0x0200000000000000ULL
! 195: #define PSW_MASK_EXT 0x0100000000000000ULL
! 196: #define PSW_MASK_KEY 0x00F0000000000000ULL
! 197: #define PSW_SHIFT_KEY 56
! 198: #define PSW_MASK_MCHECK 0x0004000000000000ULL
! 199: #define PSW_MASK_WAIT 0x0002000000000000ULL
! 200: #define PSW_MASK_PSTATE 0x0001000000000000ULL
! 201: #define PSW_MASK_ASC 0x0000C00000000000ULL
! 202: #define PSW_MASK_CC 0x0000300000000000ULL
! 203: #define PSW_MASK_PM 0x00000F0000000000ULL
! 204: #define PSW_MASK_64 0x0000000100000000ULL
! 205: #define PSW_MASK_32 0x0000000080000000ULL
! 206:
! 207: #undef PSW_ASC_PRIMARY
! 208: #undef PSW_ASC_ACCREG
! 209: #undef PSW_ASC_SECONDARY
! 210: #undef PSW_ASC_HOME
! 211:
! 212: #define PSW_ASC_PRIMARY 0x0000000000000000ULL
! 213: #define PSW_ASC_ACCREG 0x0000400000000000ULL
! 214: #define PSW_ASC_SECONDARY 0x0000800000000000ULL
! 215: #define PSW_ASC_HOME 0x0000C00000000000ULL
! 216:
! 217: /* tb flags */
! 218:
! 219: #define FLAG_MASK_PER (PSW_MASK_PER >> 32)
! 220: #define FLAG_MASK_DAT (PSW_MASK_DAT >> 32)
! 221: #define FLAG_MASK_IO (PSW_MASK_IO >> 32)
! 222: #define FLAG_MASK_EXT (PSW_MASK_EXT >> 32)
! 223: #define FLAG_MASK_KEY (PSW_MASK_KEY >> 32)
! 224: #define FLAG_MASK_MCHECK (PSW_MASK_MCHECK >> 32)
! 225: #define FLAG_MASK_WAIT (PSW_MASK_WAIT >> 32)
! 226: #define FLAG_MASK_PSTATE (PSW_MASK_PSTATE >> 32)
! 227: #define FLAG_MASK_ASC (PSW_MASK_ASC >> 32)
! 228: #define FLAG_MASK_CC (PSW_MASK_CC >> 32)
! 229: #define FLAG_MASK_PM (PSW_MASK_PM >> 32)
! 230: #define FLAG_MASK_64 (PSW_MASK_64 >> 32)
! 231: #define FLAG_MASK_32 0x00001000
! 232:
1.1 root 233: static inline int cpu_mmu_index (CPUState *env)
234: {
1.1.1.4 ! root 235: if (env->psw.mask & PSW_MASK_PSTATE) {
! 236: return 1;
! 237: }
! 238:
1.1 root 239: return 0;
240: }
241:
1.1.1.4 ! root 242: static inline void cpu_get_tb_cpu_state(CPUState* env, target_ulong *pc,
! 243: target_ulong *cs_base, int *flags)
! 244: {
! 245: *pc = env->psw.addr;
! 246: *cs_base = 0;
! 247: *flags = ((env->psw.mask >> 32) & ~FLAG_MASK_CC) |
! 248: ((env->psw.mask & PSW_MASK_32) ? FLAG_MASK_32 : 0);
! 249: }
! 250:
! 251: static inline int get_ilc(uint8_t opc)
! 252: {
! 253: switch (opc >> 6) {
! 254: case 0:
! 255: return 1;
! 256: case 1:
! 257: case 2:
! 258: return 2;
! 259: case 3:
! 260: return 3;
! 261: }
! 262:
! 263: return 0;
! 264: }
! 265:
! 266: #define ILC_LATER 0x20
! 267: #define ILC_LATER_INC 0x21
! 268: #define ILC_LATER_INC_2 0x22
! 269:
! 270:
1.1 root 271: CPUS390XState *cpu_s390x_init(const char *cpu_model);
1.1.1.4 ! root 272: void s390x_translate_init(void);
1.1 root 273: int cpu_s390x_exec(CPUS390XState *s);
274: void cpu_s390x_close(CPUS390XState *s);
1.1.1.4 ! root 275: void do_interrupt (CPUState *env);
1.1 root 276:
277: /* you can call this signal handler from your SIGBUS and SIGSEGV
278: signal handlers to inform the virtual CPU of exceptions. non zero
279: is returned if the signal was handled by the virtual CPU. */
280: int cpu_s390x_signal_handler(int host_signum, void *pinfo,
281: void *puc);
282: int cpu_s390x_handle_mmu_fault (CPUS390XState *env, target_ulong address, int rw,
283: int mmu_idx, int is_softmuu);
284: #define cpu_handle_mmu_fault cpu_s390x_handle_mmu_fault
285:
1.1.1.2 root 286:
1.1 root 287: #ifndef CONFIG_USER_ONLY
1.1.1.4 ! root 288: int s390_virtio_hypercall(CPUState *env, uint64_t mem, uint64_t hypercall);
! 289:
! 290: #ifdef CONFIG_KVM
! 291: void kvm_s390_interrupt(CPUState *env, int type, uint32_t code);
1.1.1.3 root 292: void kvm_s390_virtio_irq(CPUState *env, int config_change, uint64_t token);
1.1.1.4 ! root 293: void kvm_s390_interrupt_internal(CPUState *env, int type, uint32_t parm,
! 294: uint64_t parm64, int vm);
! 295: #else
! 296: static inline void kvm_s390_interrupt(CPUState *env, int type, uint32_t code)
! 297: {
! 298: }
! 299:
! 300: static inline void kvm_s390_virtio_irq(CPUState *env, int config_change,
! 301: uint64_t token)
! 302: {
! 303: }
! 304:
! 305: static inline void kvm_s390_interrupt_internal(CPUState *env, int type,
! 306: uint32_t parm, uint64_t parm64,
! 307: int vm)
! 308: {
! 309: }
! 310: #endif
1.1.1.3 root 311: CPUState *s390_cpu_addr2state(uint16_t cpu_addr);
1.1.1.4 ! root 312:
! 313: /* from s390-virtio-bus */
! 314: extern const target_phys_addr_t virtio_size;
! 315:
1.1 root 316: #endif
1.1.1.4 ! root 317: void cpu_lock(void);
! 318: void cpu_unlock(void);
1.1 root 319:
1.1.1.4 ! root 320: static inline void cpu_set_tls(CPUS390XState *env, target_ulong newtls)
! 321: {
! 322: env->aregs[0] = newtls >> 32;
! 323: env->aregs[1] = newtls & 0xffffffffULL;
! 324: }
1.1 root 325:
326: #define cpu_init cpu_s390x_init
327: #define cpu_exec cpu_s390x_exec
328: #define cpu_gen_code cpu_s390x_gen_code
1.1.1.4 ! root 329: #define cpu_signal_handler cpu_s390x_signal_handler
1.1 root 330:
1.1.1.4 ! root 331: #include "exec-all.h"
! 332:
! 333: #ifdef CONFIG_USER_ONLY
1.1 root 334:
335: #define EXCP_OPEX 1 /* operation exception (sigill) */
336: #define EXCP_SVC 2 /* supervisor call (syscall) */
337: #define EXCP_ADDR 5 /* addressing exception */
1.1.1.4 ! root 338: #define EXCP_SPEC 6 /* specification exception */
1.1 root 339:
1.1.1.4 ! root 340: #else
! 341:
! 342: #define EXCP_EXT 1 /* external interrupt */
! 343: #define EXCP_SVC 2 /* supervisor call (syscall) */
! 344: #define EXCP_PGM 3 /* program interruption */
! 345:
! 346: #endif /* CONFIG_USER_ONLY */
! 347:
! 348: #define INTERRUPT_EXT (1 << 0)
! 349: #define INTERRUPT_TOD (1 << 1)
! 350: #define INTERRUPT_CPUTIMER (1 << 2)
1.1 root 351:
352: /* Program Status Word. */
353: #define S390_PSWM_REGNUM 0
354: #define S390_PSWA_REGNUM 1
355: /* General Purpose Registers. */
356: #define S390_R0_REGNUM 2
357: #define S390_R1_REGNUM 3
358: #define S390_R2_REGNUM 4
359: #define S390_R3_REGNUM 5
360: #define S390_R4_REGNUM 6
361: #define S390_R5_REGNUM 7
362: #define S390_R6_REGNUM 8
363: #define S390_R7_REGNUM 9
364: #define S390_R8_REGNUM 10
365: #define S390_R9_REGNUM 11
366: #define S390_R10_REGNUM 12
367: #define S390_R11_REGNUM 13
368: #define S390_R12_REGNUM 14
369: #define S390_R13_REGNUM 15
370: #define S390_R14_REGNUM 16
371: #define S390_R15_REGNUM 17
372: /* Access Registers. */
373: #define S390_A0_REGNUM 18
374: #define S390_A1_REGNUM 19
375: #define S390_A2_REGNUM 20
376: #define S390_A3_REGNUM 21
377: #define S390_A4_REGNUM 22
378: #define S390_A5_REGNUM 23
379: #define S390_A6_REGNUM 24
380: #define S390_A7_REGNUM 25
381: #define S390_A8_REGNUM 26
382: #define S390_A9_REGNUM 27
383: #define S390_A10_REGNUM 28
384: #define S390_A11_REGNUM 29
385: #define S390_A12_REGNUM 30
386: #define S390_A13_REGNUM 31
387: #define S390_A14_REGNUM 32
388: #define S390_A15_REGNUM 33
389: /* Floating Point Control Word. */
390: #define S390_FPC_REGNUM 34
391: /* Floating Point Registers. */
392: #define S390_F0_REGNUM 35
393: #define S390_F1_REGNUM 36
394: #define S390_F2_REGNUM 37
395: #define S390_F3_REGNUM 38
396: #define S390_F4_REGNUM 39
397: #define S390_F5_REGNUM 40
398: #define S390_F6_REGNUM 41
399: #define S390_F7_REGNUM 42
400: #define S390_F8_REGNUM 43
401: #define S390_F9_REGNUM 44
402: #define S390_F10_REGNUM 45
403: #define S390_F11_REGNUM 46
404: #define S390_F12_REGNUM 47
405: #define S390_F13_REGNUM 48
406: #define S390_F14_REGNUM 49
407: #define S390_F15_REGNUM 50
408: /* Total. */
409: #define S390_NUM_REGS 51
410:
411: /* Pseudo registers -- PC and condition code. */
412: #define S390_PC_REGNUM S390_NUM_REGS
413: #define S390_CC_REGNUM (S390_NUM_REGS+1)
414: #define S390_NUM_PSEUDO_REGS 2
415: #define S390_NUM_TOTAL_REGS (S390_NUM_REGS+2)
416:
417:
418:
419: /* Program Status Word. */
420: #define S390_PSWM_REGNUM 0
421: #define S390_PSWA_REGNUM 1
422: /* General Purpose Registers. */
423: #define S390_R0_REGNUM 2
424: #define S390_R1_REGNUM 3
425: #define S390_R2_REGNUM 4
426: #define S390_R3_REGNUM 5
427: #define S390_R4_REGNUM 6
428: #define S390_R5_REGNUM 7
429: #define S390_R6_REGNUM 8
430: #define S390_R7_REGNUM 9
431: #define S390_R8_REGNUM 10
432: #define S390_R9_REGNUM 11
433: #define S390_R10_REGNUM 12
434: #define S390_R11_REGNUM 13
435: #define S390_R12_REGNUM 14
436: #define S390_R13_REGNUM 15
437: #define S390_R14_REGNUM 16
438: #define S390_R15_REGNUM 17
439: /* Access Registers. */
440: #define S390_A0_REGNUM 18
441: #define S390_A1_REGNUM 19
442: #define S390_A2_REGNUM 20
443: #define S390_A3_REGNUM 21
444: #define S390_A4_REGNUM 22
445: #define S390_A5_REGNUM 23
446: #define S390_A6_REGNUM 24
447: #define S390_A7_REGNUM 25
448: #define S390_A8_REGNUM 26
449: #define S390_A9_REGNUM 27
450: #define S390_A10_REGNUM 28
451: #define S390_A11_REGNUM 29
452: #define S390_A12_REGNUM 30
453: #define S390_A13_REGNUM 31
454: #define S390_A14_REGNUM 32
455: #define S390_A15_REGNUM 33
456: /* Floating Point Control Word. */
457: #define S390_FPC_REGNUM 34
458: /* Floating Point Registers. */
459: #define S390_F0_REGNUM 35
460: #define S390_F1_REGNUM 36
461: #define S390_F2_REGNUM 37
462: #define S390_F3_REGNUM 38
463: #define S390_F4_REGNUM 39
464: #define S390_F5_REGNUM 40
465: #define S390_F6_REGNUM 41
466: #define S390_F7_REGNUM 42
467: #define S390_F8_REGNUM 43
468: #define S390_F9_REGNUM 44
469: #define S390_F10_REGNUM 45
470: #define S390_F11_REGNUM 46
471: #define S390_F12_REGNUM 47
472: #define S390_F13_REGNUM 48
473: #define S390_F14_REGNUM 49
474: #define S390_F15_REGNUM 50
475: /* Total. */
476: #define S390_NUM_REGS 51
477:
478: /* Pseudo registers -- PC and condition code. */
479: #define S390_PC_REGNUM S390_NUM_REGS
480: #define S390_CC_REGNUM (S390_NUM_REGS+1)
481: #define S390_NUM_PSEUDO_REGS 2
482: #define S390_NUM_TOTAL_REGS (S390_NUM_REGS+2)
483:
1.1.1.4 ! root 484: /* CC optimization */
! 485:
! 486: enum cc_op {
! 487: CC_OP_CONST0 = 0, /* CC is 0 */
! 488: CC_OP_CONST1, /* CC is 1 */
! 489: CC_OP_CONST2, /* CC is 2 */
! 490: CC_OP_CONST3, /* CC is 3 */
! 491:
! 492: CC_OP_DYNAMIC, /* CC calculation defined by env->cc_op */
! 493: CC_OP_STATIC, /* CC value is env->cc_op */
! 494:
! 495: CC_OP_NZ, /* env->cc_dst != 0 */
! 496: CC_OP_LTGT_32, /* signed less/greater than (32bit) */
! 497: CC_OP_LTGT_64, /* signed less/greater than (64bit) */
! 498: CC_OP_LTUGTU_32, /* unsigned less/greater than (32bit) */
! 499: CC_OP_LTUGTU_64, /* unsigned less/greater than (64bit) */
! 500: CC_OP_LTGT0_32, /* signed less/greater than 0 (32bit) */
! 501: CC_OP_LTGT0_64, /* signed less/greater than 0 (64bit) */
! 502:
! 503: CC_OP_ADD_64, /* overflow on add (64bit) */
! 504: CC_OP_ADDU_64, /* overflow on unsigned add (64bit) */
! 505: CC_OP_SUB_64, /* overflow on substraction (64bit) */
! 506: CC_OP_SUBU_64, /* overflow on unsigned substraction (64bit) */
! 507: CC_OP_ABS_64, /* sign eval on abs (64bit) */
! 508: CC_OP_NABS_64, /* sign eval on nabs (64bit) */
! 509:
! 510: CC_OP_ADD_32, /* overflow on add (32bit) */
! 511: CC_OP_ADDU_32, /* overflow on unsigned add (32bit) */
! 512: CC_OP_SUB_32, /* overflow on substraction (32bit) */
! 513: CC_OP_SUBU_32, /* overflow on unsigned substraction (32bit) */
! 514: CC_OP_ABS_32, /* sign eval on abs (64bit) */
! 515: CC_OP_NABS_32, /* sign eval on nabs (64bit) */
! 516:
! 517: CC_OP_COMP_32, /* complement */
! 518: CC_OP_COMP_64, /* complement */
! 519:
! 520: CC_OP_TM_32, /* test under mask (32bit) */
! 521: CC_OP_TM_64, /* test under mask (64bit) */
! 522:
! 523: CC_OP_LTGT_F32, /* FP compare (32bit) */
! 524: CC_OP_LTGT_F64, /* FP compare (64bit) */
! 525:
! 526: CC_OP_NZ_F32, /* FP dst != 0 (32bit) */
! 527: CC_OP_NZ_F64, /* FP dst != 0 (64bit) */
! 528:
! 529: CC_OP_ICM, /* insert characters under mask */
! 530: CC_OP_SLAG, /* Calculate shift left signed */
! 531: CC_OP_MAX
! 532: };
! 533:
! 534: static const char *cc_names[] = {
! 535: [CC_OP_CONST0] = "CC_OP_CONST0",
! 536: [CC_OP_CONST1] = "CC_OP_CONST1",
! 537: [CC_OP_CONST2] = "CC_OP_CONST2",
! 538: [CC_OP_CONST3] = "CC_OP_CONST3",
! 539: [CC_OP_DYNAMIC] = "CC_OP_DYNAMIC",
! 540: [CC_OP_STATIC] = "CC_OP_STATIC",
! 541: [CC_OP_NZ] = "CC_OP_NZ",
! 542: [CC_OP_LTGT_32] = "CC_OP_LTGT_32",
! 543: [CC_OP_LTGT_64] = "CC_OP_LTGT_64",
! 544: [CC_OP_LTUGTU_32] = "CC_OP_LTUGTU_32",
! 545: [CC_OP_LTUGTU_64] = "CC_OP_LTUGTU_64",
! 546: [CC_OP_LTGT0_32] = "CC_OP_LTGT0_32",
! 547: [CC_OP_LTGT0_64] = "CC_OP_LTGT0_64",
! 548: [CC_OP_ADD_64] = "CC_OP_ADD_64",
! 549: [CC_OP_ADDU_64] = "CC_OP_ADDU_64",
! 550: [CC_OP_SUB_64] = "CC_OP_SUB_64",
! 551: [CC_OP_SUBU_64] = "CC_OP_SUBU_64",
! 552: [CC_OP_ABS_64] = "CC_OP_ABS_64",
! 553: [CC_OP_NABS_64] = "CC_OP_NABS_64",
! 554: [CC_OP_ADD_32] = "CC_OP_ADD_32",
! 555: [CC_OP_ADDU_32] = "CC_OP_ADDU_32",
! 556: [CC_OP_SUB_32] = "CC_OP_SUB_32",
! 557: [CC_OP_SUBU_32] = "CC_OP_SUBU_32",
! 558: [CC_OP_ABS_32] = "CC_OP_ABS_32",
! 559: [CC_OP_NABS_32] = "CC_OP_NABS_32",
! 560: [CC_OP_COMP_32] = "CC_OP_COMP_32",
! 561: [CC_OP_COMP_64] = "CC_OP_COMP_64",
! 562: [CC_OP_TM_32] = "CC_OP_TM_32",
! 563: [CC_OP_TM_64] = "CC_OP_TM_64",
! 564: [CC_OP_LTGT_F32] = "CC_OP_LTGT_F32",
! 565: [CC_OP_LTGT_F64] = "CC_OP_LTGT_F64",
! 566: [CC_OP_NZ_F32] = "CC_OP_NZ_F32",
! 567: [CC_OP_NZ_F64] = "CC_OP_NZ_F64",
! 568: [CC_OP_ICM] = "CC_OP_ICM",
! 569: [CC_OP_SLAG] = "CC_OP_SLAG",
! 570: };
! 571:
! 572: static inline const char *cc_name(int cc_op)
! 573: {
! 574: return cc_names[cc_op];
! 575: }
! 576:
! 577: /* SCLP PV interface defines */
! 578: #define SCLP_CMDW_READ_SCP_INFO 0x00020001
! 579: #define SCLP_CMDW_READ_SCP_INFO_FORCED 0x00120001
! 580:
! 581: #define SCP_LENGTH 0x00
! 582: #define SCP_FUNCTION_CODE 0x02
! 583: #define SCP_CONTROL_MASK 0x03
! 584: #define SCP_RESPONSE_CODE 0x06
! 585: #define SCP_MEM_CODE 0x08
! 586: #define SCP_INCREMENT 0x0a
! 587:
! 588: typedef struct LowCore
! 589: {
! 590: /* prefix area: defined by architecture */
! 591: uint32_t ccw1[2]; /* 0x000 */
! 592: uint32_t ccw2[4]; /* 0x008 */
! 593: uint8_t pad1[0x80-0x18]; /* 0x018 */
! 594: uint32_t ext_params; /* 0x080 */
! 595: uint16_t cpu_addr; /* 0x084 */
! 596: uint16_t ext_int_code; /* 0x086 */
! 597: uint16_t svc_ilc; /* 0x088 */
! 598: uint16_t svc_code; /* 0x08a */
! 599: uint16_t pgm_ilc; /* 0x08c */
! 600: uint16_t pgm_code; /* 0x08e */
! 601: uint32_t data_exc_code; /* 0x090 */
! 602: uint16_t mon_class_num; /* 0x094 */
! 603: uint16_t per_perc_atmid; /* 0x096 */
! 604: uint64_t per_address; /* 0x098 */
! 605: uint8_t exc_access_id; /* 0x0a0 */
! 606: uint8_t per_access_id; /* 0x0a1 */
! 607: uint8_t op_access_id; /* 0x0a2 */
! 608: uint8_t ar_access_id; /* 0x0a3 */
! 609: uint8_t pad2[0xA8-0xA4]; /* 0x0a4 */
! 610: uint64_t trans_exc_code; /* 0x0a8 */
! 611: uint64_t monitor_code; /* 0x0b0 */
! 612: uint16_t subchannel_id; /* 0x0b8 */
! 613: uint16_t subchannel_nr; /* 0x0ba */
! 614: uint32_t io_int_parm; /* 0x0bc */
! 615: uint32_t io_int_word; /* 0x0c0 */
! 616: uint8_t pad3[0xc8-0xc4]; /* 0x0c4 */
! 617: uint32_t stfl_fac_list; /* 0x0c8 */
! 618: uint8_t pad4[0xe8-0xcc]; /* 0x0cc */
! 619: uint32_t mcck_interruption_code[2]; /* 0x0e8 */
! 620: uint8_t pad5[0xf4-0xf0]; /* 0x0f0 */
! 621: uint32_t external_damage_code; /* 0x0f4 */
! 622: uint64_t failing_storage_address; /* 0x0f8 */
! 623: uint8_t pad6[0x120-0x100]; /* 0x100 */
! 624: PSW restart_old_psw; /* 0x120 */
! 625: PSW external_old_psw; /* 0x130 */
! 626: PSW svc_old_psw; /* 0x140 */
! 627: PSW program_old_psw; /* 0x150 */
! 628: PSW mcck_old_psw; /* 0x160 */
! 629: PSW io_old_psw; /* 0x170 */
! 630: uint8_t pad7[0x1a0-0x180]; /* 0x180 */
! 631: PSW restart_psw; /* 0x1a0 */
! 632: PSW external_new_psw; /* 0x1b0 */
! 633: PSW svc_new_psw; /* 0x1c0 */
! 634: PSW program_new_psw; /* 0x1d0 */
! 635: PSW mcck_new_psw; /* 0x1e0 */
! 636: PSW io_new_psw; /* 0x1f0 */
! 637: PSW return_psw; /* 0x200 */
! 638: uint8_t irb[64]; /* 0x210 */
! 639: uint64_t sync_enter_timer; /* 0x250 */
! 640: uint64_t async_enter_timer; /* 0x258 */
! 641: uint64_t exit_timer; /* 0x260 */
! 642: uint64_t last_update_timer; /* 0x268 */
! 643: uint64_t user_timer; /* 0x270 */
! 644: uint64_t system_timer; /* 0x278 */
! 645: uint64_t last_update_clock; /* 0x280 */
! 646: uint64_t steal_clock; /* 0x288 */
! 647: PSW return_mcck_psw; /* 0x290 */
! 648: uint8_t pad8[0xc00-0x2a0]; /* 0x2a0 */
! 649: /* System info area */
! 650: uint64_t save_area[16]; /* 0xc00 */
! 651: uint8_t pad9[0xd40-0xc80]; /* 0xc80 */
! 652: uint64_t kernel_stack; /* 0xd40 */
! 653: uint64_t thread_info; /* 0xd48 */
! 654: uint64_t async_stack; /* 0xd50 */
! 655: uint64_t kernel_asce; /* 0xd58 */
! 656: uint64_t user_asce; /* 0xd60 */
! 657: uint64_t panic_stack; /* 0xd68 */
! 658: uint64_t user_exec_asce; /* 0xd70 */
! 659: uint8_t pad10[0xdc0-0xd78]; /* 0xd78 */
! 660:
! 661: /* SMP info area: defined by DJB */
! 662: uint64_t clock_comparator; /* 0xdc0 */
! 663: uint64_t ext_call_fast; /* 0xdc8 */
! 664: uint64_t percpu_offset; /* 0xdd0 */
! 665: uint64_t current_task; /* 0xdd8 */
! 666: uint32_t softirq_pending; /* 0xde0 */
! 667: uint32_t pad_0x0de4; /* 0xde4 */
! 668: uint64_t int_clock; /* 0xde8 */
! 669: uint8_t pad12[0xe00-0xdf0]; /* 0xdf0 */
! 670:
! 671: /* 0xe00 is used as indicator for dump tools */
! 672: /* whether the kernel died with panic() or not */
! 673: uint32_t panic_magic; /* 0xe00 */
! 674:
! 675: uint8_t pad13[0x11b8-0xe04]; /* 0xe04 */
! 676:
! 677: /* 64 bit extparam used for pfault, diag 250 etc */
! 678: uint64_t ext_params2; /* 0x11B8 */
! 679:
! 680: uint8_t pad14[0x1200-0x11C0]; /* 0x11C0 */
! 681:
! 682: /* System info area */
! 683:
! 684: uint64_t floating_pt_save_area[16]; /* 0x1200 */
! 685: uint64_t gpregs_save_area[16]; /* 0x1280 */
! 686: uint32_t st_status_fixed_logout[4]; /* 0x1300 */
! 687: uint8_t pad15[0x1318-0x1310]; /* 0x1310 */
! 688: uint32_t prefixreg_save_area; /* 0x1318 */
! 689: uint32_t fpt_creg_save_area; /* 0x131c */
! 690: uint8_t pad16[0x1324-0x1320]; /* 0x1320 */
! 691: uint32_t tod_progreg_save_area; /* 0x1324 */
! 692: uint32_t cpu_timer_save_area[2]; /* 0x1328 */
! 693: uint32_t clock_comp_save_area[2]; /* 0x1330 */
! 694: uint8_t pad17[0x1340-0x1338]; /* 0x1338 */
! 695: uint32_t access_regs_save_area[16]; /* 0x1340 */
! 696: uint64_t cregs_save_area[16]; /* 0x1380 */
! 697:
! 698: /* align to the top of the prefix area */
! 699:
! 700: uint8_t pad18[0x2000-0x1400]; /* 0x1400 */
! 701: } __attribute__((packed)) LowCore;
! 702:
! 703: /* STSI */
! 704: #define STSI_LEVEL_MASK 0x00000000f0000000ULL
! 705: #define STSI_LEVEL_CURRENT 0x0000000000000000ULL
! 706: #define STSI_LEVEL_1 0x0000000010000000ULL
! 707: #define STSI_LEVEL_2 0x0000000020000000ULL
! 708: #define STSI_LEVEL_3 0x0000000030000000ULL
! 709: #define STSI_R0_RESERVED_MASK 0x000000000fffff00ULL
! 710: #define STSI_R0_SEL1_MASK 0x00000000000000ffULL
! 711: #define STSI_R1_RESERVED_MASK 0x00000000ffff0000ULL
! 712: #define STSI_R1_SEL2_MASK 0x000000000000ffffULL
! 713:
! 714: /* Basic Machine Configuration */
! 715: struct sysib_111 {
! 716: uint32_t res1[8];
! 717: uint8_t manuf[16];
! 718: uint8_t type[4];
! 719: uint8_t res2[12];
! 720: uint8_t model[16];
! 721: uint8_t sequence[16];
! 722: uint8_t plant[4];
! 723: uint8_t res3[156];
! 724: };
! 725:
! 726: /* Basic Machine CPU */
! 727: struct sysib_121 {
! 728: uint32_t res1[80];
! 729: uint8_t sequence[16];
! 730: uint8_t plant[4];
! 731: uint8_t res2[2];
! 732: uint16_t cpu_addr;
! 733: uint8_t res3[152];
! 734: };
! 735:
! 736: /* Basic Machine CPUs */
! 737: struct sysib_122 {
! 738: uint8_t res1[32];
! 739: uint32_t capability;
! 740: uint16_t total_cpus;
! 741: uint16_t active_cpus;
! 742: uint16_t standby_cpus;
! 743: uint16_t reserved_cpus;
! 744: uint16_t adjustments[2026];
! 745: };
! 746:
! 747: /* LPAR CPU */
! 748: struct sysib_221 {
! 749: uint32_t res1[80];
! 750: uint8_t sequence[16];
! 751: uint8_t plant[4];
! 752: uint16_t cpu_id;
! 753: uint16_t cpu_addr;
! 754: uint8_t res3[152];
! 755: };
! 756:
! 757: /* LPAR CPUs */
! 758: struct sysib_222 {
! 759: uint32_t res1[32];
! 760: uint16_t lpar_num;
! 761: uint8_t res2;
! 762: uint8_t lcpuc;
! 763: uint16_t total_cpus;
! 764: uint16_t conf_cpus;
! 765: uint16_t standby_cpus;
! 766: uint16_t reserved_cpus;
! 767: uint8_t name[8];
! 768: uint32_t caf;
! 769: uint8_t res3[16];
! 770: uint16_t dedicated_cpus;
! 771: uint16_t shared_cpus;
! 772: uint8_t res4[180];
! 773: };
! 774:
! 775: /* VM CPUs */
! 776: struct sysib_322 {
! 777: uint8_t res1[31];
! 778: uint8_t count;
! 779: struct {
! 780: uint8_t res2[4];
! 781: uint16_t total_cpus;
! 782: uint16_t conf_cpus;
! 783: uint16_t standby_cpus;
! 784: uint16_t reserved_cpus;
! 785: uint8_t name[8];
! 786: uint32_t caf;
! 787: uint8_t cpi[16];
! 788: uint8_t res3[24];
! 789: } vm[8];
! 790: uint8_t res4[3552];
! 791: };
! 792:
! 793: /* MMU defines */
! 794: #define _ASCE_ORIGIN ~0xfffULL /* segment table origin */
! 795: #define _ASCE_SUBSPACE 0x200 /* subspace group control */
! 796: #define _ASCE_PRIVATE_SPACE 0x100 /* private space control */
! 797: #define _ASCE_ALT_EVENT 0x80 /* storage alteration event control */
! 798: #define _ASCE_SPACE_SWITCH 0x40 /* space switch event */
! 799: #define _ASCE_REAL_SPACE 0x20 /* real space control */
! 800: #define _ASCE_TYPE_MASK 0x0c /* asce table type mask */
! 801: #define _ASCE_TYPE_REGION1 0x0c /* region first table type */
! 802: #define _ASCE_TYPE_REGION2 0x08 /* region second table type */
! 803: #define _ASCE_TYPE_REGION3 0x04 /* region third table type */
! 804: #define _ASCE_TYPE_SEGMENT 0x00 /* segment table type */
! 805: #define _ASCE_TABLE_LENGTH 0x03 /* region table length */
! 806:
! 807: #define _REGION_ENTRY_ORIGIN ~0xfffULL /* region/segment table origin */
! 808: #define _REGION_ENTRY_INV 0x20 /* invalid region table entry */
! 809: #define _REGION_ENTRY_TYPE_MASK 0x0c /* region/segment table type mask */
! 810: #define _REGION_ENTRY_TYPE_R1 0x0c /* region first table type */
! 811: #define _REGION_ENTRY_TYPE_R2 0x08 /* region second table type */
! 812: #define _REGION_ENTRY_TYPE_R3 0x04 /* region third table type */
! 813: #define _REGION_ENTRY_LENGTH 0x03 /* region third length */
! 814:
! 815: #define _SEGMENT_ENTRY_ORIGIN ~0x7ffULL /* segment table origin */
! 816: #define _SEGMENT_ENTRY_RO 0x200 /* page protection bit */
! 817: #define _SEGMENT_ENTRY_INV 0x20 /* invalid segment table entry */
! 818:
! 819: #define _PAGE_RO 0x200 /* HW read-only bit */
! 820: #define _PAGE_INVALID 0x400 /* HW invalid bit */
! 821:
! 822:
! 823:
! 824: /* EBCDIC handling */
! 825: static const uint8_t ebcdic2ascii[] = {
! 826: 0x00, 0x01, 0x02, 0x03, 0x07, 0x09, 0x07, 0x7F,
! 827: 0x07, 0x07, 0x07, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F,
! 828: 0x10, 0x11, 0x12, 0x13, 0x07, 0x0A, 0x08, 0x07,
! 829: 0x18, 0x19, 0x07, 0x07, 0x07, 0x07, 0x07, 0x07,
! 830: 0x07, 0x07, 0x1C, 0x07, 0x07, 0x0A, 0x17, 0x1B,
! 831: 0x07, 0x07, 0x07, 0x07, 0x07, 0x05, 0x06, 0x07,
! 832: 0x07, 0x07, 0x16, 0x07, 0x07, 0x07, 0x07, 0x04,
! 833: 0x07, 0x07, 0x07, 0x07, 0x14, 0x15, 0x07, 0x1A,
! 834: 0x20, 0xFF, 0x83, 0x84, 0x85, 0xA0, 0x07, 0x86,
! 835: 0x87, 0xA4, 0x5B, 0x2E, 0x3C, 0x28, 0x2B, 0x21,
! 836: 0x26, 0x82, 0x88, 0x89, 0x8A, 0xA1, 0x8C, 0x07,
! 837: 0x8D, 0xE1, 0x5D, 0x24, 0x2A, 0x29, 0x3B, 0x5E,
! 838: 0x2D, 0x2F, 0x07, 0x8E, 0x07, 0x07, 0x07, 0x8F,
! 839: 0x80, 0xA5, 0x07, 0x2C, 0x25, 0x5F, 0x3E, 0x3F,
! 840: 0x07, 0x90, 0x07, 0x07, 0x07, 0x07, 0x07, 0x07,
! 841: 0x70, 0x60, 0x3A, 0x23, 0x40, 0x27, 0x3D, 0x22,
! 842: 0x07, 0x61, 0x62, 0x63, 0x64, 0x65, 0x66, 0x67,
! 843: 0x68, 0x69, 0xAE, 0xAF, 0x07, 0x07, 0x07, 0xF1,
! 844: 0xF8, 0x6A, 0x6B, 0x6C, 0x6D, 0x6E, 0x6F, 0x70,
! 845: 0x71, 0x72, 0xA6, 0xA7, 0x91, 0x07, 0x92, 0x07,
! 846: 0xE6, 0x7E, 0x73, 0x74, 0x75, 0x76, 0x77, 0x78,
! 847: 0x79, 0x7A, 0xAD, 0xAB, 0x07, 0x07, 0x07, 0x07,
! 848: 0x9B, 0x9C, 0x9D, 0xFA, 0x07, 0x07, 0x07, 0xAC,
! 849: 0xAB, 0x07, 0xAA, 0x7C, 0x07, 0x07, 0x07, 0x07,
! 850: 0x7B, 0x41, 0x42, 0x43, 0x44, 0x45, 0x46, 0x47,
! 851: 0x48, 0x49, 0x07, 0x93, 0x94, 0x95, 0xA2, 0x07,
! 852: 0x7D, 0x4A, 0x4B, 0x4C, 0x4D, 0x4E, 0x4F, 0x50,
! 853: 0x51, 0x52, 0x07, 0x96, 0x81, 0x97, 0xA3, 0x98,
! 854: 0x5C, 0xF6, 0x53, 0x54, 0x55, 0x56, 0x57, 0x58,
! 855: 0x59, 0x5A, 0xFD, 0x07, 0x99, 0x07, 0x07, 0x07,
! 856: 0x30, 0x31, 0x32, 0x33, 0x34, 0x35, 0x36, 0x37,
! 857: 0x38, 0x39, 0x07, 0x07, 0x9A, 0x07, 0x07, 0x07,
! 858: };
! 859:
! 860: static const uint8_t ascii2ebcdic [] = {
! 861: 0x00, 0x01, 0x02, 0x03, 0x37, 0x2D, 0x2E, 0x2F,
! 862: 0x16, 0x05, 0x15, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F,
! 863: 0x10, 0x11, 0x12, 0x13, 0x3C, 0x3D, 0x32, 0x26,
! 864: 0x18, 0x19, 0x3F, 0x27, 0x22, 0x1D, 0x1E, 0x1F,
! 865: 0x40, 0x5A, 0x7F, 0x7B, 0x5B, 0x6C, 0x50, 0x7D,
! 866: 0x4D, 0x5D, 0x5C, 0x4E, 0x6B, 0x60, 0x4B, 0x61,
! 867: 0xF0, 0xF1, 0xF2, 0xF3, 0xF4, 0xF5, 0xF6, 0xF7,
! 868: 0xF8, 0xF9, 0x7A, 0x5E, 0x4C, 0x7E, 0x6E, 0x6F,
! 869: 0x7C, 0xC1, 0xC2, 0xC3, 0xC4, 0xC5, 0xC6, 0xC7,
! 870: 0xC8, 0xC9, 0xD1, 0xD2, 0xD3, 0xD4, 0xD5, 0xD6,
! 871: 0xD7, 0xD8, 0xD9, 0xE2, 0xE3, 0xE4, 0xE5, 0xE6,
! 872: 0xE7, 0xE8, 0xE9, 0xBA, 0xE0, 0xBB, 0xB0, 0x6D,
! 873: 0x79, 0x81, 0x82, 0x83, 0x84, 0x85, 0x86, 0x87,
! 874: 0x88, 0x89, 0x91, 0x92, 0x93, 0x94, 0x95, 0x96,
! 875: 0x97, 0x98, 0x99, 0xA2, 0xA3, 0xA4, 0xA5, 0xA6,
! 876: 0xA7, 0xA8, 0xA9, 0xC0, 0x4F, 0xD0, 0xA1, 0x07,
! 877: 0x3F, 0x3F, 0x3F, 0x3F, 0x3F, 0x3F, 0x3F, 0x3F,
! 878: 0x3F, 0x3F, 0x3F, 0x3F, 0x3F, 0x3F, 0x3F, 0x3F,
! 879: 0x3F, 0x3F, 0x3F, 0x3F, 0x3F, 0x3F, 0x3F, 0x3F,
! 880: 0x3F, 0x3F, 0x3F, 0x3F, 0x3F, 0x3F, 0x3F, 0x3F,
! 881: 0x3F, 0x3F, 0x3F, 0x3F, 0x3F, 0x3F, 0x3F, 0x3F,
! 882: 0x3F, 0x3F, 0x3F, 0x3F, 0x3F, 0x3F, 0x3F, 0x3F,
! 883: 0x3F, 0x3F, 0x3F, 0x3F, 0x3F, 0x3F, 0x3F, 0x3F,
! 884: 0x3F, 0x3F, 0x3F, 0x3F, 0x3F, 0x3F, 0x3F, 0x3F,
! 885: 0x3F, 0x3F, 0x3F, 0x3F, 0x3F, 0x3F, 0x3F, 0x3F,
! 886: 0x3F, 0x3F, 0x3F, 0x3F, 0x3F, 0x3F, 0x3F, 0x3F,
! 887: 0x3F, 0x3F, 0x3F, 0x3F, 0x3F, 0x3F, 0x3F, 0x3F,
! 888: 0x3F, 0x3F, 0x3F, 0x3F, 0x3F, 0x3F, 0x3F, 0x3F,
! 889: 0x3F, 0x59, 0x3F, 0x3F, 0x3F, 0x3F, 0x3F, 0x3F,
! 890: 0x3F, 0x3F, 0x3F, 0x3F, 0x3F, 0x3F, 0x3F, 0x3F,
! 891: 0x3F, 0x3F, 0x3F, 0x3F, 0x3F, 0x3F, 0x3F, 0x3F,
! 892: 0x90, 0x3F, 0x3F, 0x3F, 0x3F, 0xEA, 0x3F, 0xFF
! 893: };
! 894:
! 895: static inline void ebcdic_put(uint8_t *p, const char *ascii, int len)
! 896: {
! 897: int i;
! 898:
! 899: for (i = 0; i < len; i++) {
! 900: p[i] = ascii2ebcdic[(int)ascii[i]];
! 901: }
! 902: }
! 903:
! 904: #define SIGP_SENSE 0x01
! 905: #define SIGP_EXTERNAL_CALL 0x02
! 906: #define SIGP_EMERGENCY 0x03
! 907: #define SIGP_START 0x04
! 908: #define SIGP_STOP 0x05
! 909: #define SIGP_RESTART 0x06
! 910: #define SIGP_STOP_STORE_STATUS 0x09
! 911: #define SIGP_INITIAL_CPU_RESET 0x0b
! 912: #define SIGP_CPU_RESET 0x0c
! 913: #define SIGP_SET_PREFIX 0x0d
! 914: #define SIGP_STORE_STATUS_ADDR 0x0e
! 915: #define SIGP_SET_ARCH 0x12
! 916:
! 917: /* cpu status bits */
! 918: #define SIGP_STAT_EQUIPMENT_CHECK 0x80000000UL
! 919: #define SIGP_STAT_INCORRECT_STATE 0x00000200UL
! 920: #define SIGP_STAT_INVALID_PARAMETER 0x00000100UL
! 921: #define SIGP_STAT_EXT_CALL_PENDING 0x00000080UL
! 922: #define SIGP_STAT_STOPPED 0x00000040UL
! 923: #define SIGP_STAT_OPERATOR_INTERV 0x00000020UL
! 924: #define SIGP_STAT_CHECK_STOP 0x00000010UL
! 925: #define SIGP_STAT_INOPERATIVE 0x00000004UL
! 926: #define SIGP_STAT_INVALID_ORDER 0x00000002UL
! 927: #define SIGP_STAT_RECEIVER_CHECK 0x00000001UL
! 928:
! 929: void load_psw(CPUState *env, uint64_t mask, uint64_t addr);
! 930: int mmu_translate(CPUState *env, target_ulong vaddr, int rw, uint64_t asc,
! 931: target_ulong *raddr, int *flags);
! 932: int sclp_service_call(CPUState *env, uint32_t sccb, uint64_t code);
! 933: uint32_t calc_cc(CPUState *env, uint32_t cc_op, uint64_t src, uint64_t dst,
! 934: uint64_t vr);
! 935:
! 936: #define TARGET_HAS_ICE 1
! 937:
! 938: /* The value of the TOD clock for 1.1.1970. */
! 939: #define TOD_UNIX_EPOCH 0x7d91048bca000000ULL
! 940:
! 941: /* Converts ns to s390's clock format */
! 942: static inline uint64_t time2tod(uint64_t ns) {
! 943: return (ns << 9) / 125;
! 944: }
! 945:
! 946: static inline void cpu_inject_ext(CPUState *env, uint32_t code, uint32_t param,
! 947: uint64_t param64)
! 948: {
! 949: if (env->ext_index == MAX_EXT_QUEUE - 1) {
! 950: /* ugh - can't queue anymore. Let's drop. */
! 951: return;
! 952: }
! 953:
! 954: env->ext_index++;
! 955: assert(env->ext_index < MAX_EXT_QUEUE);
! 956:
! 957: env->ext_queue[env->ext_index].code = code;
! 958: env->ext_queue[env->ext_index].param = param;
! 959: env->ext_queue[env->ext_index].param64 = param64;
! 960:
! 961: env->pending_int |= INTERRUPT_EXT;
! 962: cpu_interrupt(env, CPU_INTERRUPT_HARD);
! 963: }
! 964:
! 965: static inline bool cpu_has_work(CPUState *env)
! 966: {
! 967: return (env->interrupt_request & CPU_INTERRUPT_HARD) &&
! 968: (env->psw.mask & PSW_MASK_EXT);
! 969: }
! 970:
! 971: static inline void cpu_pc_from_tb(CPUState *env, TranslationBlock* tb)
! 972: {
! 973: env->psw.addr = tb->pc;
! 974: }
1.1 root 975:
976: #endif
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