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Annotation of qemu/tcg/arm/tcg-target.h, revision 1.1.1.5

1.1       root        1: /*
                      2:  * Tiny Code Generator for QEMU
                      3:  *
                      4:  * Copyright (c) 2008 Fabrice Bellard
                      5:  * Copyright (c) 2008 Andrzej Zaborowski
                      6:  *
                      7:  * Permission is hereby granted, free of charge, to any person obtaining a copy
                      8:  * of this software and associated documentation files (the "Software"), to deal
                      9:  * in the Software without restriction, including without limitation the rights
                     10:  * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
                     11:  * copies of the Software, and to permit persons to whom the Software is
                     12:  * furnished to do so, subject to the following conditions:
                     13:  *
                     14:  * The above copyright notice and this permission notice shall be included in
                     15:  * all copies or substantial portions of the Software.
                     16:  *
                     17:  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
                     18:  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
                     19:  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
                     20:  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
                     21:  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
                     22:  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
                     23:  * THE SOFTWARE.
                     24:  */
                     25: #define TCG_TARGET_ARM 1
                     26: 
                     27: #undef TCG_TARGET_WORDS_BIGENDIAN
                     28: #undef TCG_TARGET_STACK_GROWSUP
                     29: 
1.1.1.5 ! root       30: typedef enum {
1.1       root       31:     TCG_REG_R0 = 0,
                     32:     TCG_REG_R1,
                     33:     TCG_REG_R2,
                     34:     TCG_REG_R3,
                     35:     TCG_REG_R4,
                     36:     TCG_REG_R5,
                     37:     TCG_REG_R6,
                     38:     TCG_REG_R7,
                     39:     TCG_REG_R8,
                     40:     TCG_REG_R9,
                     41:     TCG_REG_R10,
                     42:     TCG_REG_R11,
                     43:     TCG_REG_R12,
                     44:     TCG_REG_R13,
                     45:     TCG_REG_R14,
1.1.1.4   root       46:     TCG_REG_PC,
1.1.1.5 ! root       47: } TCGReg;
1.1       root       48: 
1.1.1.4   root       49: #define TCG_TARGET_NB_REGS 16
1.1.1.2   root       50: 
1.1.1.3   root       51: #define TCG_CT_CONST_ARM 0x100
                     52: 
1.1       root       53: /* used for function call generation */
                     54: #define TCG_REG_CALL_STACK             TCG_REG_R13
                     55: #define TCG_TARGET_STACK_ALIGN         8
1.1.1.4   root       56: #define TCG_TARGET_CALL_ALIGN_ARGS     1
1.1       root       57: #define TCG_TARGET_CALL_STACK_OFFSET   0
                     58: 
1.1.1.4   root       59: /* optional instructions */
1.1.1.5 ! root       60: #define TCG_TARGET_HAS_div_i32          0
        !            61: #define TCG_TARGET_HAS_ext8s_i32        1
        !            62: #define TCG_TARGET_HAS_ext16s_i32       1
        !            63: #define TCG_TARGET_HAS_ext8u_i32        0 /* and r0, r1, #0xff */
        !            64: #define TCG_TARGET_HAS_ext16u_i32       1
        !            65: #define TCG_TARGET_HAS_bswap16_i32      1
        !            66: #define TCG_TARGET_HAS_bswap32_i32      1
        !            67: #define TCG_TARGET_HAS_not_i32          1
        !            68: #define TCG_TARGET_HAS_neg_i32          1
        !            69: #define TCG_TARGET_HAS_rot_i32          1
        !            70: #define TCG_TARGET_HAS_andc_i32         1
        !            71: #define TCG_TARGET_HAS_orc_i32          0
        !            72: #define TCG_TARGET_HAS_eqv_i32          0
        !            73: #define TCG_TARGET_HAS_nand_i32         0
        !            74: #define TCG_TARGET_HAS_nor_i32          0
        !            75: #define TCG_TARGET_HAS_deposit_i32      0
1.1.1.4   root       76: 
1.1.1.3   root       77: #define TCG_TARGET_HAS_GUEST_BASE
                     78: 
1.1       root       79: enum {
                     80:     /* Note: must be synced with dyngen-exec.h */
                     81:     TCG_AREG0 = TCG_REG_R7,
                     82: };
                     83: 
                     84: static inline void flush_icache_range(unsigned long start, unsigned long stop)
                     85: {
                     86: #if QEMU_GNUC_PREREQ(4, 1)
1.1.1.2   root       87:     __builtin___clear_cache((char *) start, (char *) stop);
1.1       root       88: #else
                     89:     register unsigned long _beg __asm ("a1") = start;
                     90:     register unsigned long _end __asm ("a2") = stop;
                     91:     register unsigned long _flg __asm ("a3") = 0;
                     92:     __asm __volatile__ ("swi 0x9f0002" : : "r" (_beg), "r" (_end), "r" (_flg));
                     93: #endif
                     94: }

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