Return to tcg-target.h CVS log

Up to [Qemu by Fabrice Bellard] / qemu / tcg / ia64

Annotation of qemu/tcg/ia64/tcg-target.h, revision 1.1

1.1     ! root        1: /*
        !             2:  * Tiny Code Generator for QEMU
        !             3:  *
        !             4:  * Copyright (c) 2009-2010 Aurelien Jarno <[email protected]>
        !             5:  * Based on i386/tcg-target.c - Copyright (c) 2008 Fabrice Bellard
        !             6:  *
        !             7:  * Permission is hereby granted, free of charge, to any person obtaining a copy
        !             8:  * of this software and associated documentation files (the "Software"), to deal
        !             9:  * in the Software without restriction, including without limitation the rights
        !            10:  * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
        !            11:  * copies of the Software, and to permit persons to whom the Software is
        !            12:  * furnished to do so, subject to the following conditions:
        !            13:  *
        !            14:  * The above copyright notice and this permission notice shall be included in
        !            15:  * all copies or substantial portions of the Software.
        !            16:  *
        !            17:  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
        !            18:  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
        !            19:  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
        !            20:  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
        !            21:  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
        !            22:  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
        !            23:  * THE SOFTWARE.
        !            24:  */
        !            25: #define TCG_TARGET_IA64 1
        !            26: 
        !            27: #define TCG_TARGET_REG_BITS 64
        !            28: 
        !            29: /* We only map the first 64 registers */
        !            30: #define TCG_TARGET_NB_REGS 64
        !            31: enum {
        !            32:     TCG_REG_R0 = 0,
        !            33:     TCG_REG_R1,
        !            34:     TCG_REG_R2,
        !            35:     TCG_REG_R3,
        !            36:     TCG_REG_R4,
        !            37:     TCG_REG_R5,
        !            38:     TCG_REG_R6,
        !            39:     TCG_REG_R7,
        !            40:     TCG_REG_R8,
        !            41:     TCG_REG_R9,
        !            42:     TCG_REG_R10,
        !            43:     TCG_REG_R11,
        !            44:     TCG_REG_R12,
        !            45:     TCG_REG_R13,
        !            46:     TCG_REG_R14,
        !            47:     TCG_REG_R15,
        !            48:     TCG_REG_R16,
        !            49:     TCG_REG_R17,
        !            50:     TCG_REG_R18,
        !            51:     TCG_REG_R19,
        !            52:     TCG_REG_R20,
        !            53:     TCG_REG_R21,
        !            54:     TCG_REG_R22,
        !            55:     TCG_REG_R23,
        !            56:     TCG_REG_R24,
        !            57:     TCG_REG_R25,
        !            58:     TCG_REG_R26,
        !            59:     TCG_REG_R27,
        !            60:     TCG_REG_R28,
        !            61:     TCG_REG_R29,
        !            62:     TCG_REG_R30,
        !            63:     TCG_REG_R31,
        !            64:     TCG_REG_R32,
        !            65:     TCG_REG_R33,
        !            66:     TCG_REG_R34,
        !            67:     TCG_REG_R35,
        !            68:     TCG_REG_R36,
        !            69:     TCG_REG_R37,
        !            70:     TCG_REG_R38,
        !            71:     TCG_REG_R39,
        !            72:     TCG_REG_R40,
        !            73:     TCG_REG_R41,
        !            74:     TCG_REG_R42,
        !            75:     TCG_REG_R43,
        !            76:     TCG_REG_R44,
        !            77:     TCG_REG_R45,
        !            78:     TCG_REG_R46,
        !            79:     TCG_REG_R47,
        !            80:     TCG_REG_R48,
        !            81:     TCG_REG_R49,
        !            82:     TCG_REG_R50,
        !            83:     TCG_REG_R51,
        !            84:     TCG_REG_R52,
        !            85:     TCG_REG_R53,
        !            86:     TCG_REG_R54,
        !            87:     TCG_REG_R55,
        !            88:     TCG_REG_R56,
        !            89:     TCG_REG_R57,
        !            90:     TCG_REG_R58,
        !            91:     TCG_REG_R59,
        !            92:     TCG_REG_R60,
        !            93:     TCG_REG_R61,
        !            94:     TCG_REG_R62,
        !            95:     TCG_REG_R63,
        !            96: };
        !            97: 
        !            98: #define TCG_CT_CONST_ZERO 0x100
        !            99: #define TCG_CT_CONST_S22 0x200
        !           100: 
        !           101: /* used for function call generation */
        !           102: #define TCG_REG_CALL_STACK TCG_REG_R12
        !           103: #define TCG_TARGET_STACK_ALIGN 16
        !           104: #define TCG_TARGET_CALL_STACK_OFFSET 16
        !           105: 
        !           106: /* optional instructions */
        !           107: #define TCG_TARGET_HAS_andc_i32
        !           108: #define TCG_TARGET_HAS_andc_i64
        !           109: #define TCG_TARGET_HAS_bswap16_i32
        !           110: #define TCG_TARGET_HAS_bswap16_i64
        !           111: #define TCG_TARGET_HAS_bswap32_i32
        !           112: #define TCG_TARGET_HAS_bswap32_i64
        !           113: #define TCG_TARGET_HAS_bswap64_i64
        !           114: #define TCG_TARGET_HAS_eqv_i32
        !           115: #define TCG_TARGET_HAS_eqv_i64
        !           116: #define TCG_TARGET_HAS_ext8s_i32
        !           117: #define TCG_TARGET_HAS_ext16s_i32
        !           118: #define TCG_TARGET_HAS_ext8s_i64
        !           119: #define TCG_TARGET_HAS_ext16s_i64
        !           120: #define TCG_TARGET_HAS_ext32s_i64
        !           121: #define TCG_TARGET_HAS_ext8u_i32
        !           122: #define TCG_TARGET_HAS_ext16u_i32
        !           123: #define TCG_TARGET_HAS_ext8u_i64
        !           124: #define TCG_TARGET_HAS_ext16u_i64
        !           125: #define TCG_TARGET_HAS_ext32u_i64
        !           126: #define TCG_TARGET_HAS_nand_i32
        !           127: #define TCG_TARGET_HAS_nand_i64
        !           128: #define TCG_TARGET_HAS_nor_i32
        !           129: #define TCG_TARGET_HAS_nor_i64
        !           130: #define TCG_TARGET_HAS_orc_i32
        !           131: #define TCG_TARGET_HAS_orc_i64
        !           132: #define TCG_TARGET_HAS_rot_i32
        !           133: #define TCG_TARGET_HAS_rot_i64
        !           134: 
        !           135: /* optional instructions automatically implemented */
        !           136: #undef TCG_TARGET_HAS_neg_i32   /* sub r1, r0, r3 */
        !           137: #undef TCG_TARGET_HAS_neg_i64   /* sub r1, r0, r3 */
        !           138: #undef TCG_TARGET_HAS_not_i32   /* xor r1, -1, r3 */
        !           139: #undef TCG_TARGET_HAS_not_i64   /* xor r1, -1, r3 */
        !           140: 
        !           141: /* Note: must be synced with dyngen-exec.h */
        !           142: #define TCG_AREG0 TCG_REG_R7
        !           143: 
        !           144: /* Guest base is supported */
        !           145: #define TCG_TARGET_HAS_GUEST_BASE
        !           146: 
        !           147: static inline void flush_icache_range(unsigned long start, unsigned long stop)
        !           148: {
        !           149:     start = start & ~(32UL - 1UL);
        !           150:     stop = (stop + (32UL - 1UL)) & ~(32UL - 1UL);
        !           151: 
        !           152:     for (; start < stop; start += 32UL) {
        !           153:         asm volatile ("fc.i %0" :: "r" (start));
        !           154:     }
        !           155:     asm volatile (";;sync.i;;srlz.i;;");
        !           156: }

This archive runs on limited infrastructure. Preserving old code on modern bandwidth. Automated agents are requested to crawl responsibly.