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Annotation of qemu/tcg/mips/tcg-target.h, revision 1.1.1.1

1.1       root        1: /*
                      2:  * Tiny Code Generator for QEMU
                      3:  *
                      4:  * Copyright (c) 2008-2009 Arnaud Patard <[email protected]>
                      5:  * Copyright (c) 2009 Aurelien Jarno <[email protected]>
                      6:  * Based on i386/tcg-target.c - Copyright (c) 2008 Fabrice Bellard
                      7:  *
                      8:  * Permission is hereby granted, free of charge, to any person obtaining a copy
                      9:  * of this software and associated documentation files (the "Software"), to deal
                     10:  * in the Software without restriction, including without limitation the rights
                     11:  * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
                     12:  * copies of the Software, and to permit persons to whom the Software is
                     13:  * furnished to do so, subject to the following conditions:
                     14:  *
                     15:  * The above copyright notice and this permission notice shall be included in
                     16:  * all copies or substantial portions of the Software.
                     17:  *
                     18:  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
                     19:  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
                     20:  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
                     21:  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
                     22:  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
                     23:  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
                     24:  * THE SOFTWARE.
                     25:  */
                     26: #define TCG_TARGET_MIPS 1
                     27: 
                     28: #define TCG_TARGET_REG_BITS 32
                     29: #ifdef __MIPSEB__
                     30: # define TCG_TARGET_WORDS_BIGENDIAN
                     31: #endif
                     32: 
                     33: #define TCG_TARGET_NB_REGS 32
                     34: 
                     35: enum {
                     36:     TCG_REG_ZERO = 0,
                     37:     TCG_REG_AT,
                     38:     TCG_REG_V0,
                     39:     TCG_REG_V1,
                     40:     TCG_REG_A0,
                     41:     TCG_REG_A1,
                     42:     TCG_REG_A2,
                     43:     TCG_REG_A3,
                     44:     TCG_REG_T0,
                     45:     TCG_REG_T1,
                     46:     TCG_REG_T2,
                     47:     TCG_REG_T3,
                     48:     TCG_REG_T4,
                     49:     TCG_REG_T5,
                     50:     TCG_REG_T6,
                     51:     TCG_REG_T7,
                     52:     TCG_REG_S0,
                     53:     TCG_REG_S1,
                     54:     TCG_REG_S2,
                     55:     TCG_REG_S3,
                     56:     TCG_REG_S4,
                     57:     TCG_REG_S5,
                     58:     TCG_REG_S6,
                     59:     TCG_REG_S7,
                     60:     TCG_REG_T8,
                     61:     TCG_REG_T9,
                     62:     TCG_REG_K0,
                     63:     TCG_REG_K1,
                     64:     TCG_REG_GP,
                     65:     TCG_REG_SP,
                     66:     TCG_REG_FP,
                     67:     TCG_REG_RA,
                     68: };
                     69: 
                     70: #define TCG_CT_CONST_ZERO 0x100
                     71: #define TCG_CT_CONST_U16  0x200
                     72: #define TCG_CT_CONST_S16  0x400
                     73: 
                     74: /* used for function call generation */
                     75: #define TCG_REG_CALL_STACK TCG_REG_SP
                     76: #define TCG_TARGET_STACK_ALIGN 8
                     77: #define TCG_TARGET_CALL_STACK_OFFSET 16
                     78: #define TCG_TARGET_CALL_ALIGN_ARGS 1
                     79: 
                     80: /* optional instructions */
                     81: #define TCG_TARGET_HAS_div_i32
                     82: #define TCG_TARGET_HAS_not_i32
                     83: #undef TCG_TARGET_HAS_ext8s_i32
                     84: #undef TCG_TARGET_HAS_ext16s_i32
                     85: #undef TCG_TARGET_HAS_bswap32_i32
                     86: #undef TCG_TARGET_HAS_bswap16_i32
                     87: #undef TCG_TARGET_HAS_rot_i32
                     88: 
                     89: /* optional instructions automatically implemented */
                     90: #undef TCG_TARGET_HAS_neg_i32      /* sub  rd, zero, rt   */
                     91: #undef TCG_TARGET_HAS_ext8u_i32    /* andi rt, rs, 0xff   */
                     92: #undef TCG_TARGET_HAS_ext16u_i32   /* andi rt, rs, 0xffff */
                     93: 
                     94: /* Note: must be synced with dyngen-exec.h */
                     95: #define TCG_AREG0 TCG_REG_FP
                     96: #define TCG_AREG1 TCG_REG_S0
                     97: #define TCG_AREG2 TCG_REG_S1
                     98: 
                     99: #include <sys/cachectl.h>
                    100: 
                    101: static inline void flush_icache_range(unsigned long start, unsigned long stop)
                    102: {
                    103:     cacheflush ((void *)start, stop-start, ICACHE);
                    104: }

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