--- qemu/tcg/ppc64/tcg-target.c 2018/04/24 18:25:14 1.1.1.4 +++ qemu/tcg/ppc64/tcg-target.c 2018/04/24 19:18:21 1.1.1.7 @@ -130,7 +130,7 @@ static const int tcg_target_call_iarg_re TCG_REG_R10 }; -static const int tcg_target_call_oarg_regs[2] = { +static const int tcg_target_call_oarg_regs[] = { TCG_REG_R3 }; @@ -151,8 +151,7 @@ static const int tcg_target_callee_save_ TCG_REG_R24, TCG_REG_R25, TCG_REG_R26, - /* TCG_REG_R27, */ /* currently used for the global env, so no - need to save */ + TCG_REG_R27, /* currently used for the global env */ TCG_REG_R28, TCG_REG_R29, TCG_REG_R30, @@ -356,6 +355,7 @@ static int tcg_target_const_match (tcg_t #define SRAWI XO31(824) #define NEG XO31(104) #define MFCR XO31( 19) +#define NOR XO31(124) #define CNTLZW XO31( 26) #define CNTLZD XO31( 58) @@ -435,7 +435,7 @@ static const uint32_t tcg_to_bc[10] = { [TCG_COND_GTU] = BC | BI (7, CR_GT) | BO_COND_TRUE, }; -static void tcg_out_mov (TCGContext *s, TCGType type, int ret, int arg) +static void tcg_out_mov (TCGContext *s, TCGType type, TCGReg ret, TCGReg arg) { tcg_out32 (s, OR | SAB (arg, ret, arg)); } @@ -459,7 +459,7 @@ static void tcg_out_movi32 (TCGContext * } static void tcg_out_movi (TCGContext *s, TCGType type, - int ret, tcg_target_long arg) + TCGReg ret, tcg_target_long arg) { int32_t arg32 = arg; arg = type == TCG_TYPE_I32 ? arg & 0xffffffff : arg; @@ -616,18 +616,19 @@ static void tcg_out_tlb_read (TCGContext static void tcg_out_qemu_ld (TCGContext *s, const TCGArg *args, int opc) { - int addr_reg, data_reg, r0, r1, rbase, mem_index, s_bits, bswap; + int addr_reg, data_reg, r0, r1, rbase, bswap; #ifdef CONFIG_SOFTMMU - int r2; + int r2, mem_index, s_bits; void *label1_ptr, *label2_ptr; #endif data_reg = *args++; addr_reg = *args++; + +#ifdef CONFIG_SOFTMMU mem_index = *args; s_bits = opc & 3; -#ifdef CONFIG_SOFTMMU r0 = 3; r1 = 4; r2 = 0; @@ -746,7 +747,7 @@ static void tcg_out_qemu_ld (TCGContext else tcg_out32 (s, LDX | TAB (data_reg, rbase, r0)); #else if (bswap) { - tcg_out_movi32 (s, TCG_TYPE_I64, 0, 4); + tcg_out_movi32 (s, 0, 4); tcg_out32 (s, LWBRX | RT (data_reg) | RB (r0)); tcg_out32 (s, LWBRX | RT ( r1) | RA (r0)); tcg_out_rld (s, RLDIMI, data_reg, r1, 32, 0); @@ -763,17 +764,18 @@ static void tcg_out_qemu_ld (TCGContext static void tcg_out_qemu_st (TCGContext *s, const TCGArg *args, int opc) { - int addr_reg, r0, r1, rbase, data_reg, mem_index, bswap; + int addr_reg, r0, r1, rbase, data_reg, bswap; #ifdef CONFIG_SOFTMMU - int r2; + int r2, mem_index; void *label1_ptr, *label2_ptr; #endif data_reg = *args++; addr_reg = *args++; - mem_index = *args; #ifdef CONFIG_SOFTMMU + mem_index = *args; + r0 = 3; r1 = 4; r2 = 0; @@ -876,9 +878,14 @@ static void tcg_target_qemu_prologue (TC + 8 /* TOC save area */ + TCG_STATIC_CALL_ARGS_SIZE + ARRAY_SIZE (tcg_target_callee_save_regs) * 8 + + CPU_TEMP_BUF_NLONGS * sizeof(long) ; frame_size = (frame_size + 15) & ~15; + tcg_set_frame(s, TCG_REG_CALL_STACK, frame_size + - CPU_TEMP_BUF_NLONGS * sizeof(long), + CPU_TEMP_BUF_NLONGS * sizeof(long)); + #ifndef __APPLE__ /* First emit adhoc function descriptor */ addr = (uint64_t) s->code_ptr + 24; @@ -905,7 +912,8 @@ static void tcg_target_qemu_prologue (TC } #endif - tcg_out32 (s, MTSPR | RS (3) | CTR); + tcg_out_mov (s, TCG_TYPE_PTR, TCG_AREG0, tcg_target_call_iarg_regs[0]); + tcg_out32 (s, MTSPR | RS (tcg_target_call_iarg_regs[1]) | CTR); tcg_out32 (s, BCCTR | BO_ALWAYS); /* Epilogue */ @@ -924,7 +932,7 @@ static void tcg_target_qemu_prologue (TC tcg_out32 (s, BCLR | BO_ALWAYS); } -static void tcg_out_ld (TCGContext *s, TCGType type, int ret, int arg1, +static void tcg_out_ld (TCGContext *s, TCGType type, TCGReg ret, TCGReg arg1, tcg_target_long arg2) { if (type == TCG_TYPE_I32) @@ -933,7 +941,7 @@ static void tcg_out_ld (TCGContext *s, T tcg_out_ldsta (s, ret, arg1, arg2, LD, LDX); } -static void tcg_out_st (TCGContext *s, TCGType type, int arg, int arg1, +static void tcg_out_st (TCGContext *s, TCGType type, TCGReg arg, TCGReg arg1, tcg_target_long arg2) { if (type == TCG_TYPE_I32) @@ -968,11 +976,6 @@ static void ppc_addi64 (TCGContext *s, i } } -static void tcg_out_addi (TCGContext *s, int reg, tcg_target_long val) -{ - ppc_addi64 (s, reg, reg, val); -} - static void tcg_out_cmp (TCGContext *s, int cond, TCGArg arg1, TCGArg arg2, int const_arg2, int cr, int arch64) { @@ -1449,6 +1452,11 @@ static void tcg_out_op (TCGContext *s, T tcg_out32 (s, NEG | RT (args[0]) | RA (args[1])); break; + case INDEX_op_not_i32: + case INDEX_op_not_i64: + tcg_out32 (s, NOR | SAB (args[1], args[0], args[1])); + break; + case INDEX_op_add_i64: if (const_args[2]) ppc_addi64 (s, args[0], args[1], args[2]); @@ -1553,6 +1561,10 @@ static void tcg_out_op (TCGContext *s, T tcg_out32 (s, c | RS (args[1]) | RA (args[0])); break; + case INDEX_op_ext32u_i64: + tcg_out_rld (s, RLDICL, args[0], args[1], 0, 32); + break; + case INDEX_op_setcond_i32: tcg_out_setcond (s, TCG_TYPE_I32, args[3], args[0], args[1], args[2], const_args[2]); @@ -1621,6 +1633,7 @@ static const TCGTargetOpDef ppc_op_defs[ { INDEX_op_brcond_i64, { "r", "ri" } }, { INDEX_op_neg_i32, { "r", "r" } }, + { INDEX_op_not_i32, { "r", "r" } }, { INDEX_op_add_i64, { "r", "r", "ri" } }, { INDEX_op_sub_i64, { "r", "r", "ri" } }, @@ -1639,6 +1652,7 @@ static const TCGTargetOpDef ppc_op_defs[ { INDEX_op_remu_i64, { "r", "r", "r" } }, { INDEX_op_neg_i64, { "r", "r" } }, + { INDEX_op_not_i64, { "r", "r" } }, { INDEX_op_qemu_ld8u, { "r", "L" } }, { INDEX_op_qemu_ld8s, { "r", "L" } }, @@ -1659,6 +1673,7 @@ static const TCGTargetOpDef ppc_op_defs[ { INDEX_op_ext8s_i64, { "r", "r" } }, { INDEX_op_ext16s_i64, { "r", "r" } }, { INDEX_op_ext32s_i64, { "r", "r" } }, + { INDEX_op_ext32u_i64, { "r", "r" } }, { INDEX_op_setcond_i32, { "r", "r", "ri" } }, { INDEX_op_setcond_i64, { "r", "r", "ri" } },