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Annotation of qemu/tcg/s390/tcg-target.h, revision 1.1.1.3

1.1       root        1: /*
                      2:  * Tiny Code Generator for QEMU
                      3:  *
                      4:  * Copyright (c) 2009 Ulrich Hecht <[email protected]>
                      5:  *
                      6:  * Permission is hereby granted, free of charge, to any person obtaining a copy
                      7:  * of this software and associated documentation files (the "Software"), to deal
                      8:  * in the Software without restriction, including without limitation the rights
                      9:  * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
                     10:  * copies of the Software, and to permit persons to whom the Software is
                     11:  * furnished to do so, subject to the following conditions:
                     12:  *
                     13:  * The above copyright notice and this permission notice shall be included in
                     14:  * all copies or substantial portions of the Software.
                     15:  *
                     16:  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
                     17:  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
                     18:  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
                     19:  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
                     20:  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
                     21:  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
                     22:  * THE SOFTWARE.
                     23:  */
                     24: #define TCG_TARGET_S390 1
                     25: 
                     26: #define TCG_TARGET_WORDS_BIGENDIAN
                     27: 
1.1.1.2   root       28: typedef enum TCGReg {
1.1       root       29:     TCG_REG_R0 = 0,
                     30:     TCG_REG_R1,
                     31:     TCG_REG_R2,
                     32:     TCG_REG_R3,
                     33:     TCG_REG_R4,
                     34:     TCG_REG_R5,
                     35:     TCG_REG_R6,
                     36:     TCG_REG_R7,
                     37:     TCG_REG_R8,
                     38:     TCG_REG_R9,
                     39:     TCG_REG_R10,
                     40:     TCG_REG_R11,
                     41:     TCG_REG_R12,
                     42:     TCG_REG_R13,
                     43:     TCG_REG_R14,
                     44:     TCG_REG_R15
1.1.1.2   root       45: } TCGReg;
                     46: 
1.1       root       47: #define TCG_TARGET_NB_REGS 16
                     48: 
1.1.1.2   root       49: /* optional instructions */
1.1.1.3 ! root       50: #define TCG_TARGET_HAS_div2_i32         1
        !            51: #define TCG_TARGET_HAS_rot_i32          1
        !            52: #define TCG_TARGET_HAS_ext8s_i32        1
        !            53: #define TCG_TARGET_HAS_ext16s_i32       1
        !            54: #define TCG_TARGET_HAS_ext8u_i32        1
        !            55: #define TCG_TARGET_HAS_ext16u_i32       1
        !            56: #define TCG_TARGET_HAS_bswap16_i32      1
        !            57: #define TCG_TARGET_HAS_bswap32_i32      1
        !            58: #define TCG_TARGET_HAS_not_i32          0
        !            59: #define TCG_TARGET_HAS_neg_i32          1
        !            60: #define TCG_TARGET_HAS_andc_i32         0
        !            61: #define TCG_TARGET_HAS_orc_i32          0
        !            62: #define TCG_TARGET_HAS_eqv_i32          0
        !            63: #define TCG_TARGET_HAS_nand_i32         0
        !            64: #define TCG_TARGET_HAS_nor_i32          0
        !            65: #define TCG_TARGET_HAS_deposit_i32      0
1.1.1.2   root       66: 
                     67: #if TCG_TARGET_REG_BITS == 64
1.1.1.3 ! root       68: #define TCG_TARGET_HAS_div2_i64         1
        !            69: #define TCG_TARGET_HAS_rot_i64          1
        !            70: #define TCG_TARGET_HAS_ext8s_i64        1
        !            71: #define TCG_TARGET_HAS_ext16s_i64       1
        !            72: #define TCG_TARGET_HAS_ext32s_i64       1
        !            73: #define TCG_TARGET_HAS_ext8u_i64        1
        !            74: #define TCG_TARGET_HAS_ext16u_i64       1
        !            75: #define TCG_TARGET_HAS_ext32u_i64       1
        !            76: #define TCG_TARGET_HAS_bswap16_i64      1
        !            77: #define TCG_TARGET_HAS_bswap32_i64      1
        !            78: #define TCG_TARGET_HAS_bswap64_i64      1
        !            79: #define TCG_TARGET_HAS_not_i64          0
        !            80: #define TCG_TARGET_HAS_neg_i64          1
        !            81: #define TCG_TARGET_HAS_andc_i64         0
        !            82: #define TCG_TARGET_HAS_orc_i64          0
        !            83: #define TCG_TARGET_HAS_eqv_i64          0
        !            84: #define TCG_TARGET_HAS_nand_i64         0
        !            85: #define TCG_TARGET_HAS_nor_i64          0
        !            86: #define TCG_TARGET_HAS_deposit_i64      0
1.1.1.2   root       87: #endif
                     88: 
                     89: #define TCG_TARGET_HAS_GUEST_BASE
                     90: 
1.1       root       91: /* used for function call generation */
                     92: #define TCG_REG_CALL_STACK             TCG_REG_R15
                     93: #define TCG_TARGET_STACK_ALIGN         8
                     94: #define TCG_TARGET_CALL_STACK_OFFSET   0
                     95: 
1.1.1.2   root       96: #define TCG_TARGET_EXTEND_ARGS 1
                     97: 
1.1       root       98: enum {
                     99:     /* Note: must be synced with dyngen-exec.h */
                    100:     TCG_AREG0 = TCG_REG_R10,
                    101: };
                    102: 
                    103: static inline void flush_icache_range(unsigned long start, unsigned long stop)
                    104: {
                    105: }

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