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1.1 root 1: -include ../../config-host.mak
2:
3: CROSS=xtensa-dc232b-elf-
4:
5: ifndef XT
6: SIM = qemu-system-xtensa
7: SIMFLAGS = -M sim -cpu dc232b -nographic -semihosting $(EXTFLAGS) -kernel
8: SIMDEBUG = -s -S
9: else
10: SIM = xt-run
11: SIMFLAGS = --xtensa-core=DC_B_232L --exit_with_target_code $(EXTFLAGS)
12: SIMDEBUG = --gdbserve=0
13: endif
14:
15: CC = $(CROSS)gcc
16: AS = $(CROSS)gcc -x assembler
17: LD = $(CROSS)ld
18:
19: LDFLAGS = -Tlinker.ld
20:
21: CRT = crt.o vectors.o
22:
23: TESTCASES += test_b.tst
24: TESTCASES += test_bi.tst
25: #TESTCASES += test_boolean.tst
26: TESTCASES += test_break.tst
27: TESTCASES += test_bz.tst
28: TESTCASES += test_clamps.tst
29: TESTCASES += test_fail.tst
30: TESTCASES += test_interrupt.tst
31: TESTCASES += test_loop.tst
32: TESTCASES += test_mac16.tst
33: TESTCASES += test_max.tst
34: TESTCASES += test_min.tst
35: TESTCASES += test_mmu.tst
36: TESTCASES += test_mul16.tst
37: TESTCASES += test_mul32.tst
38: TESTCASES += test_nsa.tst
39: ifdef XT
40: TESTCASES += test_pipeline.tst
41: endif
42: TESTCASES += test_quo.tst
43: TESTCASES += test_rem.tst
44: TESTCASES += test_rst0.tst
45: TESTCASES += test_sar.tst
46: TESTCASES += test_sext.tst
47: TESTCASES += test_shift.tst
48: TESTCASES += test_timer.tst
49: TESTCASES += test_windowed.tst
50:
51: all: build
52:
53: %.o: $(SRC_PATH)/tests/xtensa/%.c
54: $(CC) $(CFLAGS) -c $< -o $@
55:
56: %.o: $(SRC_PATH)/tests/xtensa/%.S
57: $(AS) $(ASFLAGS) -c $< -o $@
58:
59: %.tst: %.o macros.inc $(CRT) Makefile
60: $(LD) $(LDFLAGS) $(NOSTDFLAGS) $(CRT) $< -o $@
61:
62: build: $(TESTCASES)
63:
64: check: $(addprefix run-, $(TESTCASES))
65:
66: run-%.tst: %.tst
67: $(SIM) $(SIMFLAGS) ./$<
68:
69: run-test_fail.tst: test_fail.tst
70: ! $(SIM) $(SIMFLAGS) ./$<
71:
72: debug-%.tst: %.tst
73: $(SIM) $(SIMDEBUG) $(SIMFLAGS) ./$<
74:
75: host-debug-%.tst: %.tst
76: gdb --args $(SIM) $(SIMFLAGS) ./$<
77:
78: clean:
79: $(RM) -fr $(TESTCASES) $(CRT)
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