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1.1 root 1: -include ../../config-host.mak
2:
3: CROSS=xtensa-dc232b-elf-
4:
5: ifndef XT
6: SIM = qemu-system-xtensa
7: SIMFLAGS = -M sim -cpu dc232b -nographic -semihosting $(EXTFLAGS) -kernel
8: SIMDEBUG = -s -S
9: else
10: SIM = xt-run
11: SIMFLAGS = --xtensa-core=DC_B_232L --exit_with_target_code $(EXTFLAGS)
12: SIMDEBUG = --gdbserve=0
13: endif
14:
15: CC = $(CROSS)gcc
16: AS = $(CROSS)gcc -x assembler
17: LD = $(CROSS)ld
18:
19: LDFLAGS = -Tlinker.ld
20:
21: CRT = crt.o vectors.o
22:
23: TESTCASES += test_b.tst
24: TESTCASES += test_bi.tst
25: #TESTCASES += test_boolean.tst
26: TESTCASES += test_bz.tst
27: TESTCASES += test_clamps.tst
28: TESTCASES += test_fail.tst
29: TESTCASES += test_interrupt.tst
30: TESTCASES += test_loop.tst
31: TESTCASES += test_mac16.tst
32: TESTCASES += test_max.tst
33: TESTCASES += test_min.tst
34: TESTCASES += test_mmu.tst
35: TESTCASES += test_mul16.tst
36: TESTCASES += test_mul32.tst
37: TESTCASES += test_nsa.tst
38: ifdef XT
39: TESTCASES += test_pipeline.tst
40: endif
41: TESTCASES += test_quo.tst
42: TESTCASES += test_rem.tst
43: TESTCASES += test_rst0.tst
44: TESTCASES += test_sar.tst
45: TESTCASES += test_sext.tst
46: TESTCASES += test_shift.tst
47: TESTCASES += test_timer.tst
48: TESTCASES += test_windowed.tst
49:
50: all: build
51:
52: %.o: $(SRC_PATH)/tests/xtensa/%.c
53: $(CC) $(CFLAGS) -c $< -o $@
54:
55: %.o: $(SRC_PATH)/tests/xtensa/%.S
56: $(AS) $(ASFLAGS) -c $< -o $@
57:
58: %.tst: %.o macros.inc $(CRT) Makefile
59: $(LD) $(LDFLAGS) $(NOSTDFLAGS) $(CRT) $< -o $@
60:
61: build: $(TESTCASES)
62:
63: check: $(addprefix run-, $(TESTCASES))
64:
65: run-%.tst: %.tst
66: $(SIM) $(SIMFLAGS) ./$<
67:
68: run-test_fail.tst: test_fail.tst
69: ! $(SIM) $(SIMFLAGS) ./$<
70:
71: debug-%.tst: %.tst
72: $(SIM) $(SIMDEBUG) $(SIMFLAGS) ./$<
73:
74: clean:
75: $(RM) -fr $(TESTCASES) $(CRT)
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