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1.1 root 1: //
2: // vgamodes.h: VGA mode set tables
3: //
4:
5: #include "vregset.h"
6:
7: int VGA_InitMode (viddef_t *vid, vmode_t *pcurrentmode);
8: void VGA_SwapBuffers (viddef_t *vid, vmode_t *pcurrentmode, vrect_t *rects);
9: void VGA_SetPalette (viddef_t *vid, vmode_t *pcurrentmode,
10: unsigned char *pal);
11:
12: ///////////////////////////////////////////////////////////////////////////
13: // the following base mode descriptors plus extra data together provide all
14: // the data needed to do VGA mode sets
15: ///////////////////////////////////////////////////////////////////////////
16:
17: typedef struct {
18: int vidbuffer;
19: int *pregset;
20: } vextra_t;
21:
22: int vrsnull[] = {
23: VRS_END,
24: };
25:
26: int vrs320x200x256planar[] = {
27: //
28: // switch to linear, non-chain4 mode
29: //
30: VRS_BYTE_OUT, SC_INDEX, SYNC_RESET,
31: VRS_BYTE_OUT, SC_DATA, 1,
32:
33: VRS_BYTE_OUT, SC_INDEX, MEMORY_MODE,
34: VRS_BYTE_RMW, SC_DATA, ~0x08, 0x04,
35: VRS_BYTE_OUT, GC_INDEX, GRAPHICS_MODE,
36: VRS_BYTE_RMW, GC_DATA, ~0x13, 0x00,
37: VRS_BYTE_OUT, GC_INDEX, MISCELLANOUS,
38: VRS_BYTE_RMW, GC_DATA, ~0x02, 0x00,
39:
40: VRS_BYTE_OUT, SC_INDEX, SYNC_RESET,
41: VRS_BYTE_OUT, SC_DATA, 3,
42:
43: //
44: // change the CRTC from doubleword to byte mode
45: //
46: VRS_BYTE_OUT, CRTC_INDEX, UNDERLINE,
47: VRS_BYTE_RMW, CRTC_DATA, ~0x40, 0x00,
48: VRS_BYTE_OUT, CRTC_INDEX, MODE_CONTROL,
49: VRS_BYTE_RMW, CRTC_DATA, ~0x00, 0x40,
50:
51: VRS_END,
52: };
53:
54: int vrs360x200x256planar[] = {
55: //
56: // switch to linear, non-chain4 mode
57: //
58: VRS_BYTE_OUT, SC_INDEX, SYNC_RESET,
59: VRS_BYTE_OUT, SC_DATA, 1,
60:
61: VRS_WORD_OUT, SC_INDEX, 0x0604,
62: VRS_BYTE_OUT, MISC_OUTPUT, 0x67,
63:
64: VRS_BYTE_OUT, SC_INDEX, SYNC_RESET,
65: VRS_BYTE_OUT, SC_DATA, 3,
66:
67: //
68: // unprotect CRTC0 through CRTC0
69: //
70: VRS_BYTE_OUT, CRTC_INDEX, 0x11,
71: VRS_BYTE_RMW, CRTC_DATA, ~0x80, 0x00,
72:
73: //
74: // change the CRTC from doubleword to byte mode
75: //
76: VRS_BYTE_OUT, CRTC_INDEX, UNDERLINE,
77: VRS_BYTE_RMW, CRTC_DATA, ~0x40, 0x00,
78: VRS_BYTE_OUT, CRTC_INDEX, MODE_CONTROL,
79: VRS_BYTE_RMW, CRTC_DATA, ~0x00, 0x40,
80:
81: //
82: // set up the CRT Controller
83: //
84: VRS_WORD_OUT, CRTC_INDEX, 0x6B00,
85: VRS_WORD_OUT, CRTC_INDEX, 0x5901,
86: VRS_WORD_OUT, CRTC_INDEX, 0x5A02,
87: VRS_WORD_OUT, CRTC_INDEX, 0x8E03,
88: VRS_WORD_OUT, CRTC_INDEX, 0x5E04,
89: VRS_WORD_OUT, CRTC_INDEX, 0x8A05,
90: VRS_WORD_OUT, CRTC_INDEX, 0x3013,
91:
92: VRS_END,
93: };
94:
95: int vrs320x240x256planar[] = {
96: //
97: // switch to linear, non-chain4 mode
98: //
99: VRS_BYTE_OUT, SC_INDEX, SYNC_RESET,
100: VRS_BYTE_OUT, SC_DATA, 1,
101:
102: VRS_BYTE_OUT, SC_INDEX, MEMORY_MODE,
103: VRS_BYTE_RMW, SC_DATA, ~0x08, 0x04,
104: VRS_BYTE_OUT, GC_INDEX, GRAPHICS_MODE,
105: VRS_BYTE_RMW, GC_DATA, ~0x13, 0x00,
106: VRS_BYTE_OUT, GC_INDEX, MISCELLANOUS,
107: VRS_BYTE_RMW, GC_DATA, ~0x02, 0x00,
108:
109: VRS_BYTE_OUT, SC_INDEX, SYNC_RESET,
110: VRS_BYTE_OUT, SC_DATA, 3,
111:
112: //
113: // unprotect CRTC0 through CRTC0
114: //
115: VRS_BYTE_OUT, CRTC_INDEX, 0x11,
116: VRS_BYTE_RMW, CRTC_DATA, ~0x80, 0x00,
117:
118: //
119: // set up the CRT Controller
120: //
121: VRS_WORD_OUT, CRTC_INDEX, 0x0D06,
122: VRS_WORD_OUT, CRTC_INDEX, 0x3E07,
123: VRS_WORD_OUT, CRTC_INDEX, 0x4109,
124: VRS_WORD_OUT, CRTC_INDEX, 0xEA10,
125: VRS_WORD_OUT, CRTC_INDEX, 0xAC11,
126: VRS_WORD_OUT, CRTC_INDEX, 0xDF12,
127: VRS_WORD_OUT, CRTC_INDEX, 0x0014,
128: VRS_WORD_OUT, CRTC_INDEX, 0xE715,
129: VRS_WORD_OUT, CRTC_INDEX, 0x0616,
130: VRS_WORD_OUT, CRTC_INDEX, 0xE317,
131:
132: VRS_END,
133: };
134:
135: int vrs360x240x256planar[] = {
136: //
137: // switch to linear, non-chain4 mode
138: //
139: VRS_BYTE_OUT, SC_INDEX, SYNC_RESET,
140: VRS_BYTE_OUT, SC_DATA, 1,
141:
142: VRS_WORD_OUT, SC_INDEX, 0x0604,
143: VRS_BYTE_OUT, MISC_OUTPUT, 0xE7,
144:
145: VRS_BYTE_OUT, SC_INDEX, SYNC_RESET,
146: VRS_BYTE_OUT, SC_DATA, 3,
147:
148: //
149: // unprotect CRTC0 through CRTC0
150: //
151: VRS_BYTE_OUT, CRTC_INDEX, 0x11,
152: VRS_BYTE_RMW, CRTC_DATA, ~0x80, 0x00,
153:
154: //
155: // set up the CRT Controller
156: //
157: VRS_WORD_OUT, CRTC_INDEX, 0x6B00,
158: VRS_WORD_OUT, CRTC_INDEX, 0x5901,
159: VRS_WORD_OUT, CRTC_INDEX, 0x5A02,
160: VRS_WORD_OUT, CRTC_INDEX, 0x8E03,
161: VRS_WORD_OUT, CRTC_INDEX, 0x5E04,
162: VRS_WORD_OUT, CRTC_INDEX, 0x8A05,
163: VRS_WORD_OUT, CRTC_INDEX, 0x0D06,
164: VRS_WORD_OUT, CRTC_INDEX, 0x3E07,
165: VRS_WORD_OUT, CRTC_INDEX, 0x4109,
166: VRS_WORD_OUT, CRTC_INDEX, 0xEA10,
167: VRS_WORD_OUT, CRTC_INDEX, 0xAC11,
168: VRS_WORD_OUT, CRTC_INDEX, 0xDF12,
169: VRS_WORD_OUT, CRTC_INDEX, 0x3013,
170: VRS_WORD_OUT, CRTC_INDEX, 0x0014,
171: VRS_WORD_OUT, CRTC_INDEX, 0xE715,
172: VRS_WORD_OUT, CRTC_INDEX, 0x0616,
173: VRS_WORD_OUT, CRTC_INDEX, 0xE317,
174:
175: VRS_END,
176: };
177:
178: int vrs320x350x256planar[] = {
179: //
180: // switch to linear, non-chain4 mode
181: //
182: VRS_BYTE_OUT, SC_INDEX, SYNC_RESET,
183: VRS_BYTE_OUT, SC_DATA, 1,
184:
185: VRS_BYTE_OUT, SC_INDEX, MEMORY_MODE,
186: VRS_BYTE_RMW, SC_DATA, ~0x08, 0x04,
187: VRS_BYTE_OUT, GC_INDEX, GRAPHICS_MODE,
188: VRS_BYTE_RMW, GC_DATA, ~0x10, 0x00,
189: VRS_BYTE_OUT, GC_INDEX, MISCELLANOUS,
190: VRS_BYTE_RMW, GC_DATA, ~0x02, 0x00,
191: VRS_BYTE_OUT, MISC_OUTPUT, 0xA3, // 350-scan-line scan rate
192:
193: VRS_BYTE_OUT, SC_INDEX, SYNC_RESET,
194: VRS_BYTE_OUT, SC_DATA, 3,
195:
196: //
197: // unprotect CRTC0 through CRTC0
198: //
199: VRS_BYTE_OUT, CRTC_INDEX, 0x11,
200: VRS_BYTE_RMW, CRTC_DATA, ~0x80, 0x00,
201:
202: //
203: // stop scanning each line twice
204: //
205: VRS_BYTE_OUT, CRTC_INDEX, MAX_SCAN_LINE,
206: VRS_BYTE_RMW, CRTC_DATA, ~0x1F, 0x00,
207:
208: //
209: // change the CRTC from doubleword to byte mode
210: //
211: VRS_BYTE_OUT, CRTC_INDEX, UNDERLINE,
212: VRS_BYTE_RMW, CRTC_DATA, ~0x40, 0x00,
213: VRS_BYTE_OUT, CRTC_INDEX, MODE_CONTROL,
214: VRS_BYTE_RMW, CRTC_DATA, ~0x00, 0x40,
215:
216: //
217: // set the vertical counts for 350-scan-line mode
218: //
219: VRS_WORD_OUT, CRTC_INDEX, 0xBF06,
220: VRS_WORD_OUT, CRTC_INDEX, 0x1F07,
221: VRS_WORD_OUT, CRTC_INDEX, 0x8310,
222: VRS_WORD_OUT, CRTC_INDEX, 0x8511,
223: VRS_WORD_OUT, CRTC_INDEX, 0x5D12,
224: VRS_WORD_OUT, CRTC_INDEX, 0x6315,
225: VRS_WORD_OUT, CRTC_INDEX, 0xBA16,
226:
227: VRS_END,
228: };
229:
230: int vrs360x350x256planar[] = {
231: //
232: // switch to linear, non-chain4 mode
233: //
234: VRS_BYTE_OUT, SC_INDEX, SYNC_RESET,
235: VRS_BYTE_OUT, SC_DATA, 1,
236:
237: VRS_WORD_OUT, SC_INDEX, 0x0604,
238: VRS_BYTE_OUT, MISC_OUTPUT, 0xA7, // 350-scan-line scan rate
239:
240: VRS_BYTE_OUT, SC_INDEX, SYNC_RESET,
241: VRS_BYTE_OUT, SC_DATA, 3,
242:
243: //
244: // unprotect CRTC0 through CRTC0
245: //
246: VRS_BYTE_OUT, CRTC_INDEX, 0x11,
247: VRS_BYTE_RMW, CRTC_DATA, ~0x80, 0x00,
248:
249: //
250: // stop scanning each line twice
251: //
252: VRS_BYTE_OUT, CRTC_INDEX, MAX_SCAN_LINE,
253: VRS_BYTE_RMW, CRTC_DATA, ~0x1F, 0x00,
254:
255: //
256: // change the CRTC from doubleword to byte mode
257: //
258: VRS_BYTE_OUT, CRTC_INDEX, UNDERLINE,
259: VRS_BYTE_RMW, CRTC_DATA, ~0x40, 0x00,
260: VRS_BYTE_OUT, CRTC_INDEX, MODE_CONTROL,
261: VRS_BYTE_RMW, CRTC_DATA, ~0x00, 0x40,
262:
263: //
264: // set the vertical counts for 350-scan-line mode and 360 pixels across
265: //
266: VRS_WORD_OUT, CRTC_INDEX, 0x6B00,
267: VRS_WORD_OUT, CRTC_INDEX, 0x5901,
268: VRS_WORD_OUT, CRTC_INDEX, 0x5A02,
269: VRS_WORD_OUT, CRTC_INDEX, 0x8E03,
270: VRS_WORD_OUT, CRTC_INDEX, 0x5E04,
271: VRS_WORD_OUT, CRTC_INDEX, 0x8A05,
272: VRS_WORD_OUT, CRTC_INDEX, 0xBF06,
273: VRS_WORD_OUT, CRTC_INDEX, 0x1F07,
274: VRS_WORD_OUT, CRTC_INDEX, 0x8310,
275: VRS_WORD_OUT, CRTC_INDEX, 0x8511,
276: VRS_WORD_OUT, CRTC_INDEX, 0x5D12,
277: VRS_WORD_OUT, CRTC_INDEX, 0x3013,
278: VRS_WORD_OUT, CRTC_INDEX, 0x6315,
279: VRS_WORD_OUT, CRTC_INDEX, 0xBA16,
280:
281: VRS_END,
282: };
283:
284: int vrs320x400x256planar[] = {
285: //
286: // switch to linear, non-chain4 mode
287: //
288: VRS_BYTE_OUT, SC_INDEX, SYNC_RESET,
289: VRS_BYTE_OUT, SC_DATA, 1,
290:
291:
292: VRS_BYTE_OUT, SC_INDEX, MEMORY_MODE,
293: VRS_BYTE_RMW, SC_DATA, ~0x08, 0x04,
294: VRS_BYTE_OUT, GC_INDEX, GRAPHICS_MODE,
295: VRS_BYTE_RMW, GC_DATA, ~0x10, 0x00,
296: VRS_BYTE_OUT, GC_INDEX, MISCELLANOUS,
297: VRS_BYTE_RMW, GC_DATA, ~0x02, 0x00,
298:
299: VRS_BYTE_OUT, SC_INDEX, SYNC_RESET,
300: VRS_BYTE_OUT, SC_DATA, 3,
301:
302: //
303: // stop scanning each line twice
304: //
305: VRS_BYTE_OUT, CRTC_INDEX, MAX_SCAN_LINE,
306: VRS_BYTE_RMW, CRTC_DATA, ~0x1F, 0x00,
307:
308: //
309: // change the CRTC from doubleword to byte mode
310: //
311: VRS_BYTE_OUT, CRTC_INDEX, UNDERLINE,
312: VRS_BYTE_RMW, CRTC_DATA, ~0x40, 0x00,
313: VRS_BYTE_OUT, CRTC_INDEX, MODE_CONTROL,
314: VRS_BYTE_RMW, CRTC_DATA, ~0x00, 0x40,
315:
316: VRS_END,
317: };
318:
319: int vrs360x400x256planar[] = {
320: //
321: // switch to linear, non-chain4 mode
322: //
323: VRS_BYTE_OUT, SC_INDEX, SYNC_RESET,
324: VRS_BYTE_OUT, SC_DATA, 1,
325:
326: VRS_WORD_OUT, SC_INDEX, 0x0604,
327: VRS_BYTE_OUT, MISC_OUTPUT, 0x67,
328:
329: VRS_BYTE_OUT, SC_INDEX, SYNC_RESET,
330: VRS_BYTE_OUT, SC_DATA, 3,
331:
332: //
333: // unprotect CRTC0 through CRTC0
334: //
335: VRS_BYTE_OUT, CRTC_INDEX, 0x11,
336: VRS_BYTE_RMW, CRTC_DATA, ~0x80, 0x00,
337:
338: //
339: // stop scanning each line twice
340: //
341: VRS_BYTE_OUT, CRTC_INDEX, MAX_SCAN_LINE,
342: VRS_BYTE_RMW, CRTC_DATA, ~0x1F, 0x00,
343:
344: //
345: // change the CRTC from doubleword to byte mode
346: //
347: VRS_BYTE_OUT, CRTC_INDEX, UNDERLINE,
348: VRS_BYTE_RMW, CRTC_DATA, ~0x40, 0x00,
349: VRS_BYTE_OUT, CRTC_INDEX, MODE_CONTROL,
350: VRS_BYTE_RMW, CRTC_DATA, ~0x00, 0x40,
351:
352: //
353: // set up the CRT Controller
354: //
355: VRS_WORD_OUT, CRTC_INDEX, 0x6B00,
356: VRS_WORD_OUT, CRTC_INDEX, 0x5901,
357: VRS_WORD_OUT, CRTC_INDEX, 0x5A02,
358: VRS_WORD_OUT, CRTC_INDEX, 0x8E03,
359: VRS_WORD_OUT, CRTC_INDEX, 0x5E04,
360: VRS_WORD_OUT, CRTC_INDEX, 0x8A05,
361: VRS_WORD_OUT, CRTC_INDEX, 0x3013,
362:
363: VRS_END,
364: };
365:
366: int vrs320x480x256planar[] = {
367: //
368: // switch to linear, non-chain4 mode
369: //
370: VRS_BYTE_OUT, SC_INDEX, SYNC_RESET,
371: VRS_BYTE_OUT, SC_DATA, 1,
372:
373: VRS_BYTE_OUT, SC_INDEX, MEMORY_MODE,
374: VRS_BYTE_RMW, SC_DATA, ~0x08, 0x04,
375: VRS_BYTE_OUT, GC_INDEX, GRAPHICS_MODE,
376: VRS_BYTE_RMW, GC_DATA, ~0x10, 0x00,
377: VRS_BYTE_OUT, GC_INDEX, MISCELLANOUS,
378: VRS_BYTE_RMW, GC_DATA, ~0x02, 0x00,
379:
380: VRS_BYTE_OUT, SC_INDEX, SYNC_RESET,
381: VRS_BYTE_OUT, SC_DATA, 3,
382:
383: //
384: // unprotect CRTC0 through CRTC0
385: //
386: VRS_BYTE_OUT, CRTC_INDEX, 0x11,
387: VRS_BYTE_RMW, CRTC_DATA, ~0x80, 0x00,
388:
389: //
390: // stop scanning each line twice
391: //
392: VRS_BYTE_OUT, CRTC_INDEX, MAX_SCAN_LINE,
393: VRS_BYTE_RMW, CRTC_DATA, ~0x1F, 0x00,
394:
395: //
396: // change the CRTC from doubleword to byte mode
397: //
398: VRS_BYTE_OUT, CRTC_INDEX, UNDERLINE,
399: VRS_BYTE_RMW, CRTC_DATA, ~0x40, 0x00,
400: VRS_BYTE_OUT, CRTC_INDEX, MODE_CONTROL,
401: VRS_BYTE_RMW, CRTC_DATA, ~0x00, 0x40,
402:
403: //
404: // set up the CRT Controller
405: //
406: VRS_WORD_OUT, CRTC_INDEX, 0x0D06,
407: VRS_WORD_OUT, CRTC_INDEX, 0x3E07,
408: VRS_WORD_OUT, CRTC_INDEX, 0xEA10,
409: VRS_WORD_OUT, CRTC_INDEX, 0xAC11,
410: VRS_WORD_OUT, CRTC_INDEX, 0xDF12,
411: VRS_WORD_OUT, CRTC_INDEX, 0xE715,
412: VRS_WORD_OUT, CRTC_INDEX, 0x0616,
413:
414: VRS_END,
415: };
416:
417: int vrs360x480x256planar[] = {
418: //
419: // switch to linear, non-chain4 mode
420: //
421: VRS_BYTE_OUT, SC_INDEX, SYNC_RESET,
422: VRS_BYTE_OUT, SC_DATA, 1,
423:
424: VRS_WORD_OUT, SC_INDEX, 0x0604,
425: VRS_BYTE_OUT, MISC_OUTPUT, 0xE7,
426:
427: VRS_BYTE_OUT, SC_INDEX, SYNC_RESET,
428: VRS_BYTE_OUT, SC_DATA, 3,
429:
430: //
431: // unprotect CRTC0 through CRTC0
432: //
433: VRS_BYTE_OUT, CRTC_INDEX, 0x11,
434: VRS_BYTE_RMW, CRTC_DATA, ~0x80, 0x00,
435:
436: //
437: // set up the CRT Controller
438: //
439: VRS_WORD_OUT, CRTC_INDEX, 0x6B00,
440: VRS_WORD_OUT, CRTC_INDEX, 0x5901,
441: VRS_WORD_OUT, CRTC_INDEX, 0x5A02,
442: VRS_WORD_OUT, CRTC_INDEX, 0x8E03,
443: VRS_WORD_OUT, CRTC_INDEX, 0x5E04,
444: VRS_WORD_OUT, CRTC_INDEX, 0x8A05,
445: VRS_WORD_OUT, CRTC_INDEX, 0x0D06,
446: VRS_WORD_OUT, CRTC_INDEX, 0x3E07,
447: VRS_WORD_OUT, CRTC_INDEX, 0x4009,
448: VRS_WORD_OUT, CRTC_INDEX, 0xEA10,
449: VRS_WORD_OUT, CRTC_INDEX, 0xAC11,
450: VRS_WORD_OUT, CRTC_INDEX, 0xDF12,
451: VRS_WORD_OUT, CRTC_INDEX, 0x3013,
452: VRS_WORD_OUT, CRTC_INDEX, 0x0014,
453: VRS_WORD_OUT, CRTC_INDEX, 0xE715,
454: VRS_WORD_OUT, CRTC_INDEX, 0x0616,
455: VRS_WORD_OUT, CRTC_INDEX, 0xE317,
456:
457: VRS_END,
458: };
459:
460: //
461: // extra VGA-specific data for vgavidmodes
462: //
463: vextra_t extra320x200x256linear = {
464: 1, vrsnull
465: };
466: vextra_t extra320x200x256planar = {
467: 1, vrs320x200x256planar
468: };
469: vextra_t extra360x200x256planar = {
470: 1, vrs360x200x256planar
471: };
472: vextra_t extra320x240x256planar = {
473: 1, vrs320x240x256planar
474: };
475: vextra_t extra360x240x256planar = {
476: 1, vrs360x240x256planar
477: };
478: vextra_t extra320x350x256planar = {
479: 1, vrs320x350x256planar
480: };
481: vextra_t extra360x350x256planar = {
482: 1, vrs360x350x256planar
483: };
484: vextra_t extra320x400x256planar = {
485: 1, vrs320x400x256planar
486: };
487: vextra_t extra360x400x256planar = {
488: 1, vrs360x400x256planar
489: };
490: vextra_t extra320x480x256planar = {
491: 1, vrs320x480x256planar
492: };
493: vextra_t extra360x480x256planar = {
494: 1, vrs360x480x256planar
495: };
496:
497: //
498: // base mode descriptors, in ascending order of number of pixels
499: //
500:
501: vmode_t vgavidmodes[] = {
502: {
503: NULL,
504: "320x200", " ***** standard VGA modes ***** ",
505: 320, 200, (200.0/320.0)*(320.0/240.0), 320, 0, 1, &extra320x200x256linear,
506: VGA_InitMode, VGA_SwapBuffers, VGA_SetPalette,
507: VGA_BeginDirectRect, VGA_EndDirectRect
508: },
509: {
510: NULL,
511: "320x200", " ***** Mode X-style modes ***** ",
512: 320, 200, (200.0/320.0)*(320.0/240.0), 320, 1, 1, &extra320x200x256planar,
513: VGA_InitMode, VGA_SwapBuffers, VGA_SetPalette,
514: VGA_BeginDirectRect, VGA_EndDirectRect
515: },
516: {
517: NULL,
518: "360x200", NULL, 360, 200, (200.0/360.0)*(320.0/240.0),
519: 384, 1, 1, &extra360x200x256planar, VGA_InitMode,
520: VGA_SwapBuffers,
521: VGA_SetPalette, VGA_BeginDirectRect, VGA_EndDirectRect
522: },
523: {
524: NULL,
525: "320x240", NULL, 320, 240, (240.0/320.0)*(320.0/240.0),
526: 320, 1, 1, &extra320x240x256planar, VGA_InitMode,
527: VGA_SwapBuffers,
528: VGA_SetPalette, VGA_BeginDirectRect, VGA_EndDirectRect
529: },
530: {
531: NULL,
532: "360x240", NULL, 360, 240, (240.0/360.0)*(320.0/240.0),
533: 384, 1, 1, &extra360x240x256planar,
534: VGA_InitMode, VGA_SwapBuffers, VGA_SetPalette,
535: VGA_BeginDirectRect, VGA_EndDirectRect
536: },
537: {
538: NULL,
539: "320x350", NULL, 320, 350, (350.0/320.0)*(320.0/240.0),
540: 320, 1, 1, &extra320x350x256planar, VGA_InitMode,
541: VGA_SwapBuffers,
542: VGA_SetPalette, VGA_BeginDirectRect, VGA_EndDirectRect
543: },
544: {
545: NULL,
546: "360x350", NULL, 360, 350, (350.0/360.0)*(320.0/240.0),
547: 384, 1, 1, &extra360x350x256planar, VGA_InitMode,
548: VGA_SwapBuffers,
549: VGA_SetPalette, VGA_BeginDirectRect, VGA_EndDirectRect
550: },
551: {
552: NULL,
553: "320x400", NULL, 320, 400, (400.0/320.0)*(320.0/240.0), 320,
554: 1, 1, &extra320x400x256planar, VGA_InitMode,
555: VGA_SwapBuffers,
556: VGA_SetPalette, VGA_BeginDirectRect, VGA_EndDirectRect
557: },
558: {
559: NULL,
560: "360x400", NULL, 360, 400, (400.0/360.0)*(320.0/240.0),
561: 384, 1, 1, &extra360x400x256planar, VGA_InitMode,
562: VGA_SwapBuffers,
563: VGA_SetPalette, VGA_BeginDirectRect, VGA_EndDirectRect
564: },
565: {
566: NULL,
567: "320x480", NULL, 320, 480, (480.0/320.0)*(320.0/240.0),
568: 320, 1, 1, &extra320x480x256planar, VGA_InitMode,
569: VGA_SwapBuffers,
570: VGA_SetPalette, VGA_BeginDirectRect, VGA_EndDirectRect
571: },
572: {
573: NULL,
574: "360x480", NULL, 360, 480, (480.0/360.0)*(320.0/240.0),
575: 384, 1, 1, &extra360x480x256planar, VGA_InitMode,
576: VGA_SwapBuffers,
577: VGA_SetPalette, VGA_BeginDirectRect, VGA_EndDirectRect
578: },
579: };
580:
This archive runs on limited infrastructure. Preserving old code on modern bandwidth. Automated agents are requested to crawl responsibly.