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Annotation of researchv10dc/cmd/gcc/PROBLEMS, revision 1.1.1.1

1.1       root        1: 3. When find_reloads is used to count number of spills needed
                      2: it does not take into account the fact that a reload may
                      3: turn out to be a dummy.
                      4: 
                      5: I'm not sure this really happens any more.  Doesn't it find
                      6: all the dummies on both passes?
                      7: 
                      8: 10.     movl a3@,a0
                      9:        movl a3@(16),a1
                     10:        clrb a0@(a1:l)
                     11: is generated and may be worse than
                     12:        movl a3@,a0
                     13:        addl a3@(16),a0
                     14:        clrb a0@
                     15: If ordering of operands is improved, many more
                     16: such cases will be generated from typical array accesses.
                     17: 
                     18: 23. (memory >> 24) and (memory >> 24) == CONST  optimizations
                     19: ought to be done machine independently.
                     20: 
                     21: 38. Hack expand_mult so that if there is no same-modes multiply
                     22: it will use a widening multiply and then truncate rather than
                     23: calling the library.
                     24: 
                     25: 39. Hack expanding of division to notice cases for
                     26: long -> short division.
                     27: 
                     28: 40. Represent divide insns as (DIV:SI ...) followed by
                     29: a separate lowpart extract.  Represent remainder insns as DIV:SI
                     30: followed by a separate highpart extract.  Then cse can work on
                     31: the DIV:SI part.  Problem is, this may not be desirable on machines
                     32: where computing the quotient alone does not necessarily give
                     33: a remainder--such as the 68020 for long operands.
                     34: 
                     35: 42. In subst in combine.c at line 704 or so, a reg that really
                     36: wants an areg gets a dreg.  It is i*4, for indexing.  Why?
                     37: 
                     38: 52. Reloading can look at how reload_contents got set up.
                     39: If it was copied from a register, just reload from that register.
                     40: Otherwise, perhaps can change the previous insn to move the
                     41: data via the reload reg, thus avoiding one memory ref.
                     42: 
                     43: 53. Know that certain library routines do not clobber memory.
                     44: 
                     45: 63. Potential problem in cc_status.value2, if it ever activates itself
                     46: after a two-address subtraction (which currently cannot happen).
                     47: It is supposed to compare the current value of the destination
                     48: but eliminating it would use the results of the subtraction, equivalent
                     49: to comparing the previous value of the destination.
                     50: 
                     51: 65. Should loops that neither start nor end with a break
                     52: be rearranged to end with the last break?
                     53: 
                     54: 69. Define the floating point converting arithmetic instructions
                     55: for the 68881.
                     56: 
                     57: 74. Combine loop opt with cse opt in one pass.  Do cse on each loop,
                     58: then loop opt on that loop, and go from innermost loops outward.
                     59: Make loop invariants available for cse at end of loop.
                     60: 
                     61: 85. pea can force a value to be reloaded into an areg
                     62: which can make it worse than separate adding and pushing.
                     63: This can only happen for adding something within addql range
                     64: and it only loses if the qty becomes dead at that point
                     65: so it can be added to with no copying.
                     66: 
                     67: 93. If a pseudo doesn't get a hard reg everywhere,
                     68: can it get one during a loop?
                     69: 
                     70: 95. Can simplify shift of result of a bfextu.  See testunsfld.c.
                     71: Likewise and of result of a bfextu.  See hyph.c.
                     72: 
                     73: 96. Can do SImode bitfield insns without reloading, but must
                     74: alter the operands in special ways.
                     75: 
                     76: 99. final could check loop-entry branches to see if they
                     77: screw up deletion of a test instruction.  If they do,
                     78: can put another test instruction before the branch and
                     79: make it conditional and redirect it.
                     80: 
                     81: 106. Aliasing may be impossible if data types of refs differ
                     82: and data type of containing objects also differ.
                     83: (But check this wrt unions.)
                     84: 
                     85: 108. Can speed up flow analysis by making a table saying which
                     86: register is set and which registers are used by each instruction that
                     87: only sets one register and only uses two.  This way avoid the tree
                     88: walk for such instructions (most instructions).
                     89: 
                     90: 109. It is desirable to avoid converting INDEX to SImode if a
                     91: narrower mode suffices, as HImode does on the 68000.
                     92: How can this be done?
                     93: 
                     94: 110. Possible special combination pattern:
                     95: If the two operands to a comparison die there and both come from insns
                     96: that are identical except for replacing one operand with the other,
                     97: throw away those insns.  Ok if insns being discarded are known 1 to 1.
                     98: An andl #1 after a seq is 1 to 1, but how should compiler know that?
                     99: 
                    100: 112. Can convert float to unsigned int by subtracting a constant,
                    101: converting to signed int, and changing the sign bit.
                    102: 
                    103: 117. Any number of slow zero-extensions in one loop, that have
                    104: their clr insns moved out of the loop, can share one register
                    105: if their original life spans are disjoint.
                    106: But it may be hard to be sure of this since
                    107: the life span data that regscan produces may be hard to interpret
                    108: validly or may be incorrect after cse.
                    109: 
                    110: 118. In cse, when a bfext insn refers to a register, if the field
                    111: corresponds to a halfword or a byte and the register is equivalent
                    112: to a memory location, it would be possible to detect this and
                    113: replace it with a simple memory reference.
                    114: 
                    115: 121. Insns that store two values cannot be moved out of loops.
                    116: The code in scan_loop doesn't even try to deal with them.
                    117: 
                    118: 122. When insn-output.c turns a bit-test into a sign-test,
                    119: it should see whether the cc is already set up with that sign.

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