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1.1 root 1: /* Search an insn for pseudo regs that must be in hard regs and are not.
2: Copyright (C) 1987, 1988 Free Software Foundation, Inc.
3:
4: This file is part of GNU CC.
5:
6: GNU CC is distributed in the hope that it will be useful,
7: but WITHOUT ANY WARRANTY. No author or distributor
8: accepts responsibility to anyone for the consequences of using it
9: or for whether it serves any particular purpose or works at all,
10: unless he says so in writing. Refer to the GNU CC General Public
11: License for full details.
12:
13: Everyone is granted permission to copy, modify and redistribute
14: GNU CC, but only under the conditions described in the
15: GNU CC General Public License. A copy of this license is
16: supposed to have been given to you along with GNU CC so you
17: can know your rights and responsibilities. It should be in a
18: file named COPYING. Among other things, the copyright notice
19: and this notice must be preserved on all copies. */
20:
21:
22: /* This file contains subroutines used only from the file reload1.c.
23: It knows how to scan one insn for operands and values
24: that need to be copied into registers to make valid code.
25: It also finds other operands and values which are valid
26: but for which equivalent values in registers exist and
27: ought to be used instead.
28:
29: Before processing the first insn of the function, call `init_reload'.
30:
31: To scan an insn, call `find_reloads'. This does two things:
32: 1. sets up tables describing which values must be reloaded
33: for this insn, and what kind of hard regs they must be reloaded into;
34: 2. optionally record the locations where those values appear in
35: the data, so they can be replaced properly later.
36: This is done only if the second arg to `find_reloads' is nonzero.
37:
38: The third arg to `find_reloads' specifies the value of `indirect_ok'.
39:
40: Then you must choose the hard regs to reload those pseudo regs into,
41: and generate appropriate load insns before this insn and perhaps
42: also store insns after this insn. Set up the array `reload_reg_rtx'
43: to contain the REG rtx's for the registers you used. In some
44: cases `find_reloads' will return a nonzero value in `reload_reg_rtx'
45: for certain reloads. Then that tells you which register to use,
46: so you do not need to allocate one. But you still do need to add extra
47: instructions to copy the value into and out of that register.
48:
49: Finally you must call `subst_reloads' to substitute the reload reg rtx's
50: into the locations already recorded.
51:
52: NOTE SIDE EFFECTS:
53:
54: find_reloads can alter the operands of the instruction it is called on.
55:
56: 1. Two operands of any sort may be interchanged, if they are in a
57: commutative instruction.
58: This happens only if find_reloads thinks the instruction will compile
59: better that way.
60:
61: 2. Pseudo-registers that are equivalent to constants are replaced
62: with those constants if they are not in hard registers.
63:
64: 1 happens every time find_reloads is called.
65: 2 happens only when REPLACE is 1, which is only when
66: actually doing the reloads, not when just counting them.
67: */
68:
69: #define REG_OK_STRICT
70:
71: #include "config.h"
72: #include "rtl.h"
73: #include "insn-config.h"
74: #include "recog.h"
75: #include "reload.h"
76: #include "regs.h"
77: #include "hard-reg-set.h"
78:
79: /* The variables set up by `find_reloads' are:
80:
81: n_reloads number of distinct reloads needed; max reload # + 1
82: tables indexed by reload number
83: reload_in rtx for value to reload from
84: reload_out rtx for where to store reload-reg afterward if nec
85: (often the same as reload_in)
86: reload_reg_class enum reg_class, saying what regs to reload into
87: reload_inmode enum machine_mode; mode this operand should have
88: when reloaded, on input.
89: reload_outmode enum machine_mode; mode this operand should have
90: when reloaded, on output.
91: reload_strict_low char; 1 if this reload is inside a STRICT_LOW_PART.
92: reload_optional char, nonzero for an optional reload.
93: Optional reloads are ignored unless the
94: value is already sitting in a register.
95: reload_inc int, amount to increment reload_in by
96: before this insn.
97: reload_reg_rtx rtx. This is the register to reload into.
98: If it is zero when `find_reloads' returns,
99: you must find a suitable register in the class
100: specified by reload_reg_class, and store here
101: an rtx for that register with mode from
102: reload_inmode or reload_outmode.
103: reload_nocombine char, nonzero if this reload shouldn't be
104: combined with another reload. */
105:
106: int n_reloads;
107:
108: rtx reload_in[FIRST_PSEUDO_REGISTER];
109: rtx reload_out[FIRST_PSEUDO_REGISTER];
110: enum reg_class reload_reg_class[FIRST_PSEUDO_REGISTER];
111: enum machine_mode reload_inmode[FIRST_PSEUDO_REGISTER];
112: enum machine_mode reload_outmode[FIRST_PSEUDO_REGISTER];
113: char reload_strict_low[FIRST_PSEUDO_REGISTER];
114: rtx reload_reg_rtx[FIRST_PSEUDO_REGISTER];
115: char reload_optional[FIRST_PSEUDO_REGISTER];
116: int reload_inc[FIRST_PSEUDO_REGISTER];
117: char reload_nocombine[FIRST_PSEUDO_REGISTER];
118:
119: /* Replacing reloads.
120:
121: If `replace_reloads' is nonzero, then as each reload is recorded
122: an entry is made for it in the table `replacements'.
123: Then later `subst_reloads' can look through that table and
124: perform all the replacements needed. */
125:
126: /* Nonzero means record the places to replace. */
127: static int replace_reloads;
128:
129: /* Each replacement is recorded with a structure like this. */
130: struct replacement
131: {
132: rtx *where; /* Location to store in */
133: int what; /* which reload this is for */
134: enum machine_mode mode; /* mode it must have */
135: };
136:
137: static struct replacement replacements[MAX_RECOG_OPERANDS * ((MAX_REGS_PER_ADDRESS * 2) + 1)];
138:
139: /* Number of replacements currently recorded. */
140: static int n_replacements;
141:
142: /* MEM-rtx's created for pseudo-regs in stack slots not directly addressable;
143: (see reg_equiv_address). */
144: static rtx memlocs[MAX_RECOG_OPERANDS * ((MAX_REGS_PER_ADDRESS * 2) + 1)];
145: static int n_memlocs;
146:
147: /* The instruction we are doing reloads for;
148: so we can test whether a register dies in it. */
149: static rtx this_insn;
150:
151: /* Nonzero means (MEM (REG n)) is valid even if (REG n) is spilled. */
152: static int indirect_ok;
153:
154: /* If hard_regs_live_known is nonzero,
155: we can tell which hard regs are currently live,
156: at least enough to succeed in choosing dummy reloads. */
157: static int hard_regs_live_known;
158:
159: /* Indexed by hard reg number,
160: element is nonegative if hard reg has been spilled.
161: This vector is passed to `find_reloads' as an argument
162: and is not changed here. */
163: static short *static_reload_reg_p;
164:
165: static rtx find_dummy_reload ();
166: static rtx find_reloads_toplev ();
167: static void find_reloads_address ();
168: static void find_reloads_address_1 ();
169: static int hard_reg_set_here_p ();
170: static int refers_to_regno_p ();
171: static rtx forget_volatility ();
172: static rtx subst_reg_equivs ();
173: static rtx subst_indexed_address ();
174: rtx find_equiv_reg ();
175: static int find_inc_amount ();
176:
177: /* Record one reload that needs to be performed.
178: IN is an rtx saying where the data are to be found before this instruction.
179: OUT says where they must be stored after the instruction.
180: (IN is zero for data not read, and OUT is zero for data not written.)
181: INLOC and OUTLOC point to the places in the instructions where
182: IN and OUT were found.
183: CLASS is a register class required for the reloaded data.
184: INMODE is the machine mode that the instruction requires
185: for the reg that replaces IN and OUTMODE is likewise for OUT.
186:
187: If IN is zero, then OUT's location and mode should be passed as
188: INLOC and INMODE.
189:
190: STRICT_LOW is the 1 if there is a containing STRICT_LOW_PART rtx.
191:
192: OPTIONAL nonzero means this reload does not need to be performed:
193: it can be discarded if that is more convenient. */
194:
195: static int
196: push_reload (in, out, inloc, outloc, class,
197: inmode, outmode, strict_low, optional)
198: register rtx in, out;
199: rtx *inloc, *outloc;
200: enum reg_class class;
201: enum machine_mode inmode, outmode;
202: int strict_low;
203: int optional;
204: {
205: register int i;
206: int noshare = 0;
207:
208: /* Compare two RTX's. */
209: #define MATCHES(x, y) (x == y || (x != 0 && GET_CODE (x) != REG && rtx_equal_p (x, y)))
210:
211: /* If IN is a pseudo register everywhere-equivalent to a constant, and
212: it is not in a hard register, reload straight from the constant,
213: since we want to get rid of such pseudo registers. */
214: if (in != 0 && GET_CODE (in) == REG)
215: {
216: register int regno = REGNO (in);
217:
218: if (regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0
219: && reg_equiv_constant[regno] != 0)
220: in = reg_equiv_constant[regno];
221: }
222:
223: /* Likewise for OUT. Of course, OUT will never be equivalent to
224: an actual constant, but it might be equivalent to a memory location
225: (in the case of a parameter). */
226: if (out != 0 && GET_CODE (out) == REG)
227: {
228: register int regno = REGNO (out);
229:
230: if (regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0
231: && reg_equiv_constant[regno] != 0)
232: out = reg_equiv_constant[regno];
233: }
234:
235: /* If we have a read-write operand with an address side-effect,
236: change either IN or OUT so the side-effect happens only once. */
237: if (in != 0 && out != 0 && GET_CODE (in) == MEM && rtx_equal_p (in, out))
238: {
239: if (GET_CODE (XEXP (in, 0)) == POST_INC
240: || GET_CODE (XEXP (in, 0)) == POST_DEC)
241: in = gen_rtx (MEM, GET_MODE (in), XEXP (XEXP (in, 0), 0));
242: if (GET_CODE (XEXP (in, 0)) == PRE_INC
243: || GET_CODE (XEXP (in, 0)) == PRE_DEC)
244: out = gen_rtx (MEM, GET_MODE (out), XEXP (XEXP (out, 0), 0));
245: }
246:
247: /* If IN appears in OUT, we can't share any input-only reload for IN. */
248: if (in != 0 && out != 0 && reg_mentioned_p (in, out))
249: noshare = 1;
250:
251: if (class == NO_REGS)
252: abort ();
253:
254: /* Narrow down the class of register wanted if that is
255: desirable on this machine for efficiency. */
256: if (in != 0)
257: class = PREFERRED_RELOAD_CLASS(in, class);
258:
259: /* We can use an existing reload if the class is right
260: and at least one of IN and OUT is a match
261: and the other is at worst neutral.
262: (A zero compared against anything is neutral.) */
263: for (i = 0; i < n_reloads; i++)
264: if (reload_reg_class[i] == class
265: && reload_strict_low[i] == strict_low
266: && ((in != 0 && MATCHES (reload_in[i], in) && ! noshare
267: && (out == 0 || reload_out[i] == 0 || MATCHES (reload_out[i], out)))
268: ||
269: (out != 0 && MATCHES (reload_out[i], out)
270: && (in == 0 || reload_in[i] == 0 || MATCHES (reload_in[i], in)))))
271: break;
272:
273: if (i == n_reloads)
274: {
275: /* We found no existing reload suitable for re-use.
276: So add an additional reload. */
277:
278: reload_in[i] = in;
279: reload_out[i] = out;
280: reload_reg_class[i] = class;
281: reload_inmode[i] = inmode;
282: reload_outmode[i] = outmode;
283: reload_reg_rtx[i] = 0;
284: reload_optional[i] = optional;
285: reload_inc[i] = 0;
286: reload_strict_low[i] = strict_low;
287: reload_nocombine[i] = 0;
288:
289: n_reloads++;
290: }
291: else
292: {
293: /* We are reusing an existing reload,
294: but we may have additional information for it.
295: For example, we may now have both IN and OUT
296: while the old one may have just one of them. */
297:
298: if (inmode != VOIDmode)
299: reload_inmode[i] = inmode;
300: if (outmode != VOIDmode)
301: reload_outmode[i] = outmode;
302: if (in != 0)
303: reload_in[i] = in;
304: if (out != 0)
305: reload_out[i] = out;
306: reload_optional[i] &= optional;
307: }
308:
309: /* If the ostensible rtx being reload differs from the rtx found
310: in the location to substitute, this reload is not safe to combine
311: because we cannot reliably tell whether it appears in the insn. */
312:
313: if (in != 0 && in != *inloc)
314: reload_nocombine[i] = 1;
315:
316: /* If this is an IN/OUT reload in an insn that sets the CC,
317: it must be for an autoincrement. It doesn't work to store
318: the incremented value after the insn because that would clobber the CC.
319: So we must do the increment of the value reloaded from,
320: increment it, store it back, then decrement again. */
321: if (out != 0 && GET_CODE (PATTERN (this_insn)) == SET
322: && SET_DEST (PATTERN (this_insn)) == cc0_rtx)
323: {
324: out = 0;
325: reload_out[i] = 0;
326: reload_inc[i] = find_inc_amount (PATTERN (this_insn), in);
327: /* If we did not find a nonzero amount-to-increment-by,
328: that contradicts the belief that IN is being incremented
329: in an address in this insn. */
330: if (reload_inc[i] == 0)
331: abort ();
332: }
333:
334: /* If we will replace IN and OUT with the reload-reg,
335: record where they are located so that substitution need
336: not do a tree walk. */
337:
338: if (replace_reloads)
339: {
340: if (inloc != 0)
341: {
342: register struct replacement *r = &replacements[n_replacements++];
343: r->what = i;
344: r->where = inloc;
345: r->mode = inmode;
346: }
347: if (outloc != 0 && outloc != inloc)
348: {
349: register struct replacement *r = &replacements[n_replacements++];
350: r->what = i;
351: r->where = outloc;
352: r->mode = outmode;
353: }
354: }
355:
356: /* If this reload is just being introduced and it has both
357: an incoming quantity and an outgoing quantity that are
358: supposed to be made to match, see if either one of the two
359: can serve as the place to reload into.
360:
361: If one of them is acceptable, set reload_reg_rtx[i]
362: to that one. */
363:
364: if (in != 0 && out != 0 && in != out && reload_reg_rtx[i] == 0)
365: {
366: reload_reg_rtx[i] = find_dummy_reload (in, out, inloc, outloc,
367: reload_reg_class[i], i);
368:
369: /* If the outgoing register already contains the same value
370: as the incoming one, we can dispense with loading it.
371: The easiest way to tell the caller that is to give a phony
372: value for the incoming operand (same as outgoing one). */
373: if (reload_reg_rtx[i] == out
374: && (GET_CODE (in) == REG || CONSTANT_P (in))
375: && 0 != find_equiv_reg (in, this_insn, 0, REGNO (out),
376: static_reload_reg_p, i))
377: reload_in[i] = out;
378: }
379:
380: return i;
381: }
382:
383: /* Record an additional place we must replace a value
384: for which we have already recorded a reload.
385: RELOADNUM is the value returned by push_reload
386: when the reload was recorded.
387: This is used in insn patterns that use match_dup. */
388:
389: static void
390: push_replacement (loc, reloadnum, mode)
391: rtx *loc;
392: int reloadnum;
393: enum machine_mode mode;
394: {
395: if (replace_reloads)
396: {
397: register struct replacement *r = &replacements[n_replacements++];
398: r->what = reloadnum;
399: r->where = loc;
400: r->mode = mode;
401: }
402: }
403:
404: /* If there is only one output reload, try to combine it
405: with a (logically unrelated) input reload
406: to reduce the number of reload registers needed.
407:
408: This is safe if the input reload does not appear in
409: the value being output-reloaded, because this implies
410: it is not needed any more once the original insn completes. */
411:
412: static void
413: combine_reloads ()
414: {
415: int i;
416: int output_reload = -1;
417:
418: /* Find the output reload; return unless there is exactly one
419: and that one is mandatory. */
420:
421: for (i = 0; i < n_reloads; i++)
422: if (reload_out[i] != 0)
423: {
424: if (output_reload >= 0)
425: return;
426: output_reload = i;
427: }
428:
429: if (output_reload < 0 || reload_optional[output_reload])
430: return;
431:
432: /* An input-output reload isn't combinable. */
433:
434: if (reload_in[output_reload] != 0)
435: return;
436:
437: /* Check each input reload; can we combine it? */
438:
439: for (i = 0; i < n_reloads; i++)
440: if (reload_in[i] && ! reload_optional[i] && ! reload_nocombine[i]
441: && reload_inmode[i] == reload_outmode[output_reload]
442: && reload_inc[i] == 0
443: && reload_reg_rtx[i] == 0
444: && reload_strict_low[i] == 0
445: && reload_reg_class[i] == reload_reg_class[output_reload]
446: && ! reg_mentioned_p (reload_in[i], reload_out[output_reload]))
447: {
448: int j;
449:
450: /* We have found a reload to combine with! */
451: reload_out[i] = reload_out[output_reload];
452: reload_outmode[i] = reload_outmode[output_reload];
453: /* Mark the old output reload as inoperative. */
454: reload_out[output_reload] = 0;
455:
456: /* Transfer all replacements from the old reload to the combined. */
457: for (j = 0; j < n_replacements; j++)
458: if (replacements[j].what == output_reload)
459: replacements[j].what = i;
460:
461: return;
462: }
463: }
464:
465: /* Try to find a reload register for an in-out reload (expressions IN and OUT).
466: See if one of IN and OUT is a register that may be used;
467: this is desirable since a spill-register won't be needed.
468: If so, return the register rtx that proves acceptable.
469:
470: INLOC and OUTLOC are locations where IN and OUT appear in the insn.
471: CLASS is the register class required for the reload.
472:
473: If FOR_REAL is >= 0, it is the number of the reload,
474: and in some cases when it can be discovered that OUT doesn't need
475: to be computed, clear out reload_out[FOR_REAL].
476:
477: If FOR_REAL is -1, this should not be done, because this call
478: is just to see if a register can be found, not to find and install it. */
479:
480: static rtx
481: find_dummy_reload (in, out, inloc, outloc, class, for_real)
482: rtx in, out;
483: rtx *inloc, *outloc;
484: enum reg_class class;
485: int for_real;
486: {
487: rtx value = 0;
488: rtx orig_in = in;
489:
490: while (GET_CODE (out) == SUBREG)
491: out = SUBREG_REG (out);
492: while (GET_CODE (in) == SUBREG)
493: in = SUBREG_REG (in);
494:
495: /* If operands exceed a word, we can't use either of them
496: unless they have the same size. */
497: if (GET_MODE_SIZE (GET_MODE (out)) != GET_MODE_SIZE (GET_MODE (in))
498: && (GET_MODE_SIZE (GET_MODE (out)) > UNITS_PER_WORD
499: || GET_MODE_SIZE (GET_MODE (in)) > UNITS_PER_WORD))
500: return 0;
501:
502: /* See if OUT will do. */
503: if (GET_CODE (out) == REG)
504: {
505: register int regno = REGNO (out);
506:
507: /* When we consider whether the insn uses OUT,
508: ignore references within IN. They don't prevent us
509: from copying IN into OUT, because those refs would
510: move into the insn that reloads IN.
511:
512: However, we only ignore IN in its role as this operand.
513: If the insn uses IN elsewhere and it contains OUT,
514: that counts. We can't be sure it's the "same" operand
515: so it might not go through this reload. */
516: *inloc = const0_rtx;
517:
518: if (reg_renumber[regno] >= 0)
519: regno = reg_renumber[regno];
520: if (regno < FIRST_PSEUDO_REGISTER
521: && ! refers_to_regno_p (regno, PATTERN (this_insn), outloc)
522: && TEST_HARD_REG_BIT (reg_class_contents[(int) class], regno))
523: value = out;
524:
525: *inloc = orig_in;
526: }
527:
528: /* Consider using IN if OUT was not acceptable
529: or if OUT dies in this insn (like the quotient in a divmod insn).
530: We can't use IN unless it is free after this insn,
531: which means we must know accurately which hard regs are live.
532: Also, the result can't go in IN if IN is used within OUT. */
533: if (hard_regs_live_known
534: && GET_CODE (in) == REG
535: && (value == 0
536: || find_regno_note (this_insn, REG_DEAD, REGNO (value))))
537: {
538: register int regno = REGNO (in);
539: if (find_regno_note (this_insn, REG_DEAD, regno))
540: {
541: if (reg_renumber[regno] >= 0)
542: regno = reg_renumber[regno];
543: if (regno < FIRST_PSEUDO_REGISTER
544: && ! refers_to_regno_p (regno, out, 0)
545: && ! hard_reg_set_here_p (regno, PATTERN (this_insn))
546: && TEST_HARD_REG_BIT (reg_class_contents[(int) class], regno))
547: {
548: /* If we were going to use OUT as the reload reg
549: and changed our mind, it means OUT is a dummy that
550: dies here. So don't bother copying value to it. */
551: if (for_real >= 0 && value == out)
552: reload_out[for_real] = 0;
553: value = in;
554: }
555: }
556: }
557:
558: return value;
559: }
560:
561: /* This page contains subroutines used mainly for determining
562: whether the IN or an OUT of a reload can serve as the
563: reload register. */
564:
565: /* Return 1 if hard reg number REGNO is stored in by expression X,
566: either explicitly or in the guise of a pseudo-reg allocated to REGNO.
567: X should be the body of an instruction. */
568:
569: static int
570: hard_reg_set_here_p (regno, x)
571: register int regno;
572: rtx x;
573: {
574: if (GET_CODE (x) == SET)
575: {
576: register rtx op0 = SET_DEST (x);
577: if (GET_CODE (op0) == REG)
578: {
579: register int r = REGNO (op0);
580: if (reg_renumber[r] >= 0)
581: r = reg_renumber[r];
582: if (r == regno)
583: return 1;
584: }
585: }
586: else if (GET_CODE (x) == PARALLEL)
587: {
588: register int i = XVECLEN (x, 0) - 1;
589: for (; i >= 0; i--)
590: if (hard_reg_set_here_p (regno, XVECEXP (x, 0, i)))
591: return 1;
592: }
593:
594: return 0;
595: }
596:
597: /* Return nonzero if hard register REGNO appears
598: either explicitly or implicitly in X
599: other than being stored into.
600:
601: References contained within the substructure at LOC do not count.
602: LOC may be zero, meaning don't ignore anything. */
603:
604: static int
605: refers_to_regno_p (regno, x, loc)
606: int regno;
607: rtx x;
608: rtx *loc;
609: {
610: register int i;
611: register RTX_CODE code;
612: register char *fmt;
613:
614: repeat:
615: code = GET_CODE (x);
616: if (code == REG)
617: {
618: i = REGNO (x);
619: if (reg_renumber[i] >= 0)
620: i = reg_renumber[i];
621: return i == regno;
622: }
623:
624: if (code == SET)
625: {
626: if (GET_CODE (SET_DEST (x)) != REG
627: && refers_to_regno_p (regno, SET_DEST (x), loc))
628: return 1;
629: if (loc == &SET_SRC (x))
630: return 0;
631: x = SET_SRC (x);
632: goto repeat;
633: }
634:
635: /* X does not match, so try its subexpressions. */
636:
637: fmt = GET_RTX_FORMAT (code);
638: for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
639: {
640: if (fmt[i] == 'e' && loc != &XEXP (x, i))
641: {
642: if (i == 0)
643: {
644: x = XEXP (x, 0);
645: goto repeat;
646: }
647: else
648: if (refers_to_regno_p (regno, XEXP (x, i), loc))
649: return 1;
650: }
651: else if (fmt[i] == 'E')
652: {
653: register int j;
654: for (j = XVECLEN (x, i) - 1; j >=0; j--)
655: if (loc != &XVECEXP (x, i, j)
656: && refers_to_regno_p (regno, XVECEXP (x, i, j), loc))
657: return 1;
658: }
659: }
660: return 0;
661: }
662:
663: /* Return 1 if ADDR is a valid memory address for mode MODE,
664: and check that each pseudo reg has the proper kind of
665: hard reg. */
666:
667: int
668: strict_memory_address_p (mode, addr)
669: enum machine_mode mode;
670: register rtx addr;
671: {
672: GO_IF_LEGITIMATE_ADDRESS (mode, addr, win);
673: return 0;
674:
675: win:
676: return 1;
677: }
678:
679:
680: /* Like rtx_equal_p except that it considers two REGs as equal
681: if they renumber to the same value and has special hacks for
682: autoincrement and autodecrement.
683: This is specifically intended for find_reloads to use
684: in determining whether two operands match.
685: X is the operand whose number is the lower of the two.
686:
687: The value is 2 if Y contains a pre-increment that matches
688: a non-incrementing address in X. */
689:
690: /* ??? To be completely correct, we should arrange to pass
691: for X the output operand and for Y the input operand.
692: For now, we assume that the output operand has the lower number
693: because that is natural in (SET output (... input ...)). */
694:
695: int
696: operands_match_p (x, y)
697: rtx x, y;
698: {
699: register int i;
700: register RTX_CODE code = GET_CODE (x);
701: register char *fmt;
702: int success_2;
703:
704: if (x == y)
705: return 1;
706: if ((code == REG || (code == SUBREG && GET_CODE (SUBREG_REG (x)) == REG))
707: && (GET_CODE (y) == REG || (GET_CODE (y) == SUBREG
708: && GET_CODE (SUBREG_REG (y)) == REG)))
709: {
710: register int j;
711: if (code == SUBREG)
712: {
713: i = REGNO (SUBREG_REG (x));
714: if (reg_renumber[i] >= 0)
715: i = reg_renumber[i];
716: i += SUBREG_WORD (x);
717: }
718: else
719: {
720: i = REGNO (x);
721: if (reg_renumber[i] >= 0)
722: i = reg_renumber[i];
723: }
724: if (GET_CODE (y) == SUBREG)
725: {
726: j = REGNO (SUBREG_REG (y));
727: if (reg_renumber[j] >= 0)
728: j = reg_renumber[j];
729: j += SUBREG_WORD (y);
730: }
731: else
732: {
733: j = REGNO (y);
734: if (reg_renumber[j] >= 0)
735: j = reg_renumber[j];
736: }
737: return i == j;
738: }
739: /* If two operands must match, because they are really a single
740: operand of an assembler insn, then two postincrements are invalid
741: because the assembler insn would increment only once.
742: On the other hand, an postincrement matches ordinary indexing
743: if the postincrement is the output operand. */
744: if (code == POST_DEC || code == POST_INC)
745: return operands_match_p (XEXP (x, 0), y);
746: /* Two preincrements are invalid
747: because the assembler insn would increment only once.
748: On the other hand, an preincrement matches ordinary indexing
749: if the preincrement is the input operand.
750: In this case, return 2, since some callers need to do special
751: things when this happens. */
752: if (GET_CODE (y) == PRE_DEC || GET_CODE (y) == PRE_INC)
753: return operands_match_p (x, XEXP (y, 0)) ? 2 : 0;
754: /* Now we have disposed of all the cases
755: in which different rtx codes can match. */
756: if (code != GET_CODE (y))
757: return 0;
758: if (code == LABEL_REF)
759: return XEXP (x, 0) == XEXP (y, 0);
760: if (code == SYMBOL_REF)
761: return XSTR (x, 0) == XSTR (y, 0);
762:
763: /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent. */
764:
765: if (GET_MODE (x) != GET_MODE (y))
766: return 0;
767:
768: /* Compare the elements. If any pair of corresponding elements
769: fail to match, return 0 for the whole things. */
770:
771: success_2 = 0;
772: fmt = GET_RTX_FORMAT (code);
773: for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
774: {
775: int val;
776: switch (fmt[i])
777: {
778: case 'i':
779: if (XINT (x, i) != XINT (y, i))
780: return 0;
781: break;
782:
783: case 'e':
784: val = operands_match_p (XEXP (x, i), XEXP (y, i));
785: if (val == 0)
786: return 0;
787: /* If any subexpression returns 2,
788: we should return 2 if we are successful. */
789: if (val == 2)
790: success_2 = 1;
791: break;
792:
793: case '0':
794: break;
795:
796: /* It is believed that rtx's at this level will never
797: contain anything but integers and other rtx's,
798: except for within LABEL_REFs and SYMBOL_REFs. */
799: default:
800: abort ();
801: }
802: }
803: return 1 + success_2;
804: }
805:
806: /* Main entry point of this file: search the body of INSN
807: for values that need reloading and record them with push_reload.
808: REPLACE nonzero means record also where the values occur
809: so that subst_reloads can be used.
810: IND_OK says that a memory reference is a valid memory address.
811:
812: LIVE_KNOWN says we have valid information about which hard
813: regs are live at each point in the program; this is true when
814: we are called from global_alloc but false when stupid register
815: allocation has been done.
816:
817: RELOAD_REG_P if nonzero is a vector indexed by hard reg number
818: which is nonzero if the reg has been commandeered for reloading into.
819: It is copied into STATIC_RELOAD_REG_P and referenced from there
820: by various subroutines. */
821:
822: void
823: find_reloads (insn, replace, ind_ok, live_known, reload_reg_p)
824: rtx insn;
825: int replace, ind_ok;
826: int live_known;
827: short *reload_reg_p;
828: {
829: #ifdef REGISTER_CONSTRAINTS
830:
831: enum reload_modified { RELOAD_NOTHING, RELOAD_READ, RELOAD_READ_WRITE, RELOAD_WRITE };
832:
833: register int insn_code_number;
834: register int i;
835: int noperands;
836: /* These are the constraints for the insn. We don't change them. */
837: char *constraints1[MAX_RECOG_OPERANDS];
838: /* These start out as the constraints for the insn
839: and they are chewed up as we consider alternatives. */
840: char *constraints[MAX_RECOG_OPERANDS];
841: int this_alternative[MAX_RECOG_OPERANDS];
842: char this_alternative_win[MAX_RECOG_OPERANDS];
843: char this_alternative_offmemok[MAX_RECOG_OPERANDS];
844: char this_alternative_earlyclobber[MAX_RECOG_OPERANDS];
845: int this_alternative_matches[MAX_RECOG_OPERANDS];
846: int swapped;
847: int goal_alternative[MAX_RECOG_OPERANDS];
848: int this_alternative_number;
849: int goal_alternative_number;
850: int operand_reloadnum[MAX_RECOG_OPERANDS];
851: int goal_alternative_matches[MAX_RECOG_OPERANDS];
852: int goal_alternative_matched[MAX_RECOG_OPERANDS];
853: char goal_alternative_win[MAX_RECOG_OPERANDS];
854: char goal_alternative_offmemok[MAX_RECOG_OPERANDS];
855: int goal_alternative_swapped;
856: enum reload_modified modified[MAX_RECOG_OPERANDS];
857: int best;
858: int commutative;
859: char operands_match[MAX_RECOG_OPERANDS][MAX_RECOG_OPERANDS];
860: rtx substed_operand[MAX_RECOG_OPERANDS];
861: rtx body = PATTERN (insn);
862: int goal_earlyclobber, this_earlyclobber;
863: enum machine_mode operand_mode[MAX_RECOG_OPERANDS];
864:
865: this_insn = insn;
866: n_reloads = 0;
867: n_replacements = 0;
868: n_memlocs = 0;
869: replace_reloads = replace;
870: indirect_ok = ind_ok;
871: hard_regs_live_known = live_known;
872: static_reload_reg_p = reload_reg_p;
873:
874: /* Find what kind of insn this is. NOPERANDS gets number of operands.
875: Make OPERANDS point to a vector of operand values.
876: Make OPERAND_LOCS point to a vector of pointers to
877: where the operands were found.
878: Fill CONSTRAINTS and CONSTRAINTS1 with pointers to the
879: constraint-strings for this insn.
880: Return if the insn needs no reload processing. */
881:
882: switch (GET_CODE (body))
883: {
884: case USE:
885: case CLOBBER:
886: case ASM_INPUT:
887: case ADDR_VEC:
888: case ADDR_DIFF_VEC:
889: return;
890:
891: case PARALLEL:
892: case SET:
893: noperands = asm_noperands (body);
894: if (noperands > 0)
895: {
896: /* This insn is an `asm' with operands. */
897:
898: insn_code_number = -1;
899:
900: /* expand_asm_operands makes sure there aren't too many operands. */
901: if (noperands > MAX_RECOG_OPERANDS)
902: abort ();
903:
904: /* Now get the operand values and constraints out of the insn. */
905:
906: decode_asm_operands (body, recog_operand, recog_operand_loc,
907: constraints, operand_mode);
908: bcopy (constraints, constraints1, noperands * sizeof (char *));
909: break;
910: }
911:
912: default:
913: /* Ordinary insn: recognize it, allocate space for operands and
914: constraints, and get them out via insn_extract. */
915:
916: insn_code_number = recog_memoized (insn);
917: noperands = insn_n_operands[insn_code_number];
918: insn_extract (insn);
919: for (i = 0; i < noperands; i++)
920: {
921: constraints[i] = constraints1[i]
922: = insn_operand_constraint[insn_code_number][i];
923: operand_mode[i] = insn_operand_mode[insn_code_number][i];
924: }
925: }
926:
927: if (noperands == 0)
928: return;
929:
930: commutative = -1;
931:
932: /* If we will need to know, later, whether some pair of operands
933: are the same, we must compare them now and save the result.
934: Reloading the base and index registers will clobber them
935: and afterward they will fail to match. */
936:
937: for (i = 0; i < noperands; i++)
938: {
939: register char *p;
940: register int c;
941:
942: substed_operand[i] = recog_operand[i];
943: p = constraints[i];
944:
945: /* Scan this operand's constraint to see if it should match another. */
946:
947: while (c = *p++)
948: if (c == '%')
949: commutative = i;
950: else if (c >= '0' && c <= '9')
951: {
952: c -= '0';
953: operands_match[c][i]
954: = operands_match_p (recog_operand[c], recog_operand[i]);
955: /* If C can be commuted with C+1, and C might need to match I,
956: then C+1 might also need to match I. */
957: if (commutative >= 0)
958: {
959: if (c == commutative || c == commutative + 1)
960: {
961: int other = c + (c == commutative ? 1 : -1);
962: operands_match[other][i]
963: = operands_match_p (recog_operand[other], recog_operand[i]);
964: }
965: if (i == commutative || i == commutative + 1)
966: {
967: int other = i + (i == commutative ? 1 : -1);
968: operands_match[c][other]
969: = operands_match_p (recog_operand[c], recog_operand[other]);
970: }
971: /* Note that C is supposed to be less than I.
972: No need to consider altering both C and I
973: because in that case we would alter one into the other. */
974: }
975: }
976: }
977:
978: /* Examine each operand that is a memory reference or memory address
979: and reload parts of the addresses into index registers.
980: While we are at it, initialize the array `modified'.
981: Also here any references to pseudo regs that didn't get hard regs
982: but are equivalent to constants get replaced in the insn itself
983: with those constants. Nobody will ever see them again. */
984:
985: for (i = 0; i < noperands; i++)
986: {
987: register RTX_CODE code = GET_CODE (recog_operand[i]);
988: modified[i] = RELOAD_READ;
989: if (constraints[i][0] == 'p')
990: {
991: find_reloads_address (VOIDmode, 0,
992: recog_operand[i], recog_operand_loc[i]);
993: substed_operand[i] = recog_operand[i] = *recog_operand_loc[i];
994: }
995: else if (code == MEM)
996: {
997: find_reloads_address (GET_MODE (recog_operand[i]),
998: recog_operand_loc[i],
999: XEXP (recog_operand[i], 0),
1000: &XEXP (recog_operand[i], 0));
1001: substed_operand[i] = recog_operand[i] = *recog_operand_loc[i];
1002: }
1003: else if (code == SUBREG)
1004: find_reloads_toplev (recog_operand[i]);
1005: else if (code == REG)
1006: {
1007: /* This is equivalent to calling find_reloads_toplev.
1008: The code is duplicated for speed. */
1009: register int regno = REGNO (recog_operand[i]);
1010: if (regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0
1011: && reg_equiv_constant[regno] != 0)
1012: substed_operand[i] = recog_operand[i]
1013: = reg_equiv_constant[regno];
1014: if (reg_equiv_address[regno] != 0)
1015: {
1016: *recog_operand_loc[i] = recog_operand[i]
1017: = gen_rtx (MEM, GET_MODE (recog_operand[i]),
1018: reg_equiv_address[regno]);
1019: find_reloads_address (GET_MODE (recog_operand[i]),
1020: recog_operand_loc[i],
1021: XEXP (recog_operand[i], 0),
1022: &XEXP (recog_operand[i], 0));
1023: substed_operand[i] = recog_operand[i] = *recog_operand_loc[i];
1024: }
1025: }
1026: }
1027:
1028: /* Now see what we need for pseudo-regs that didn't get hard regs
1029: or got the wrong kind of hard reg. For this, we must consider
1030: all the operands together against the register constraints. */
1031:
1032: best = MAX_RECOG_OPERANDS + 100;
1033:
1034: swapped = 0;
1035: try_swapped:
1036: this_alternative_number = 0;
1037: /* The constraints are made of several alternatives.
1038: Each operand's constraint looks like foo,bar,... with commas
1039: separating the alternatives. The first alternatives for all
1040: operands go together, the second alternatives go together, etc.
1041:
1042: First loop over alternatives. */
1043:
1044: while (*constraints[0])
1045: {
1046: /* Loop over operands for one constraint alternative. */
1047: /* LOSERS counts those that don't fit this alternative
1048: and would require loading. */
1049: int losers = 0;
1050: /* BAD is set to 1 if it some operand can't fit this alternative
1051: even after reloading. */
1052: int bad = 0;
1053: /* REJECT is a count of how undesirable this alternative says it is
1054: if any reloading is required. If the alternative matches exactly
1055: then REJECT is ignored, but otherwise it gets this much
1056: counted against it in addition to the reloading needed. */
1057: int reject = 0;
1058:
1059: this_earlyclobber = 0;
1060:
1061: for (i = 0; i < noperands; i++)
1062: {
1063: register char *p = constraints[i];
1064: register int win = 0;
1065: int badop = 1;
1066: int c;
1067: register rtx operand = recog_operand[i];
1068: int offset = 0;
1069: int force_reload = 0;
1070: int offmemok = 0;
1071: int earlyclobber = 0;
1072:
1073: /* If the operand is a SUBREG, extract
1074: the REG or MEM within. */
1075:
1076: while (GET_CODE (operand) == SUBREG)
1077: {
1078: offset += SUBREG_WORD (operand);
1079: operand = SUBREG_REG (operand);
1080: if (GET_CODE (operand) == MEM
1081: /*** This is overcautious, as for BYTES_BIG_ENDIAN it is still possible
1082: to avoid setting force_reload if the mode of the subreg
1083: is SImode or bigger. */
1084: #ifndef BYTES_BIG_ENDIAN
1085: && offset != 0
1086: #endif
1087: && !offsetable_memref_p (operand))
1088: force_reload = 1;
1089: }
1090:
1091: this_alternative[i] = (int) NO_REGS;
1092: this_alternative_win[i] = 0;
1093: this_alternative_offmemok[i] = 0;
1094: this_alternative_earlyclobber[i] = 0;
1095: this_alternative_matches[i] = -1;
1096:
1097: /* Scan this alternative's specs for this operand;
1098: set WIN if the operand fits any letter in this alternative.
1099: Otherwise, clear BADOP if this operand could
1100: fit some letter after reloads. */
1101:
1102: while (*p && (c = *p++) != ',')
1103: switch (c)
1104: {
1105: case '=':
1106: modified[i] = RELOAD_WRITE;
1107: break;
1108:
1109: case '+':
1110: modified[i] = RELOAD_READ_WRITE;
1111: break;
1112:
1113: case '*':
1114: break;
1115:
1116: case '%':
1117: commutative = i;
1118: break;
1119:
1120: case '?':
1121: reject++;
1122: break;
1123:
1124: case '!':
1125: reject = 100;
1126: break;
1127:
1128: case '#':
1129: /* Ignore rest of this alternative as far as
1130: reloading is concerned. */
1131: while (*p && *p != ',') p++;
1132: break;
1133:
1134: case '0':
1135: case '1':
1136: case '2':
1137: case '3':
1138: case '4':
1139: c -= '0';
1140: this_alternative_matches[i] = c;
1141: /* We are supposed to match a previous operand.
1142: If we do, we win if that one did.
1143: If we do not, count both of the operands as losers.
1144: (This is too conservative, since most of the time
1145: only a single reload insn will be needed to make
1146: the two operands win. As a result, this alternative
1147: may be rejected when it is actually desirable.) */
1148: if ((swapped && (c != commutative || i != commutative + 1))
1149: /* If we are matching as if two operands were swapped,
1150: also pretend that operands_match had been computed
1151: with swapped.
1152: But if I is the second of those and C is the first,
1153: don't exchange them, because operands_match is valid
1154: only on one side of its diagonal. */
1155: ? (operands_match
1156: [(c == commutative || c == commutative + 1)
1157: ? 2*commutative + 1 - c : c]
1158: [(i == commutative || i == commutative + 1)
1159: ? 2*commutative + 1 - i : i])
1160: : operands_match[c][i])
1161: win = this_alternative_win[c];
1162: else
1163: {
1164: /* Operands don't match. */
1165: rtx value;
1166: /* Retroactively mark the operand we had to match
1167: as a loser, if it wasn't already. */
1168: if (this_alternative_win[c])
1169: losers++;
1170: this_alternative_win[c] = 0;
1171: if (this_alternative[c] == (int) NO_REGS)
1172: bad = 1;
1173: /* But count the pair only once in the total badness of
1174: this alternative, if the pair can be a dummy reload. */
1175: value
1176: = find_dummy_reload (recog_operand[i], recog_operand[c],
1177: recog_operand_loc[i], recog_operand_loc[c],
1178: this_alternative[c], -1);
1179:
1180: if (value != 0)
1181: losers--;
1182: }
1183: /* This can be fixed with reloads if the operand
1184: we are supposed to match can be fixed with reloads. */
1185: badop = 0;
1186: break;
1187:
1188: case 'p':
1189: /* All necessary reloads for an address_operand
1190: were handled in find_reloads_address. */
1191: this_alternative[i] = (int) ALL_REGS;
1192: win = 1;
1193: break;
1194:
1195: case 'm':
1196: if (GET_CODE (operand) == MEM
1197: || (GET_CODE (operand) == REG
1198: && REGNO (operand) >= FIRST_PSEUDO_REGISTER
1199: && reg_renumber[REGNO (operand)] < 0))
1200: win = 1;
1201: if (GET_CODE (operand) == CONST_DOUBLE)
1202: badop = 0;
1203: break;
1204:
1205: case '<':
1206: if (GET_CODE (operand) == MEM
1207: && (GET_CODE (XEXP (operand, 0)) == PRE_DEC
1208: || GET_CODE (XEXP (operand, 0)) == POST_DEC))
1209: win = 1;
1210: break;
1211:
1212: case '>':
1213: if (GET_CODE (operand) == MEM
1214: && (GET_CODE (XEXP (operand, 0)) == PRE_INC
1215: || GET_CODE (XEXP (operand, 0)) == POST_INC))
1216: win = 1;
1217: break;
1218:
1219: /* Memory operand whose address is offsettable. */
1220: case 'o':
1221: if ((GET_CODE (operand) == MEM
1222: && offsetable_memref_p (operand))
1223: || (GET_CODE (operand) == REG
1224: && REGNO (operand) >= FIRST_PSEUDO_REGISTER
1225: && reg_renumber[REGNO (operand)] < 0))
1226: win = 1;
1227: if (GET_CODE (operand) == CONST_DOUBLE
1228: || (GET_CODE (operand) == MEM
1229: && GET_CODE (XEXP (operand, 0)) != POST_INC
1230: && GET_CODE (XEXP (operand, 0)) != POST_DEC
1231: && GET_CODE (XEXP (operand, 0)) != PRE_INC
1232: && GET_CODE (XEXP (operand, 0)) != PRE_DEC))
1233: badop = 0;
1234: offmemok = 1;
1235: break;
1236:
1237: case '&':
1238: /* Output operand that is stored before the need for the
1239: input operands (and their index registers) is over. */
1240: if (GET_CODE (operand) == REG)
1241: earlyclobber = 1, this_earlyclobber = 1;
1242: break;
1243:
1244: case 'F':
1245: if (GET_CODE (operand) == CONST_DOUBLE)
1246: win = 1;
1247: break;
1248:
1249: case 'G':
1250: case 'H':
1251: if (GET_CODE (operand) == CONST_DOUBLE
1252: && CONST_DOUBLE_OK_FOR_LETTER_P (operand, c))
1253: win = 1;
1254: break;
1255:
1256: case 's':
1257: if (GET_CODE (operand) == CONST_INT)
1258: break;
1259: case 'i':
1260: if (CONSTANT_P (operand))
1261: win = 1;
1262: break;
1263:
1264: case 'n':
1265: if (GET_CODE (operand) == CONST_INT)
1266: win = 1;
1267: break;
1268:
1269: case 'I':
1270: case 'J':
1271: case 'K':
1272: case 'L':
1273: case 'M':
1274: if (GET_CODE (operand) == CONST_INT
1275: && CONST_OK_FOR_LETTER_P (INTVAL (operand), c))
1276: win = 1;
1277: break;
1278:
1279: case 'g':
1280: if (GENERAL_REGS == ALL_REGS
1281: || GET_CODE (operand) != REG
1282: || (REGNO (operand) >= FIRST_PSEUDO_REGISTER
1283: && reg_renumber[REGNO (operand)] < 0))
1284: win = 1;
1285: /* Drop through into 'r' case */
1286:
1287: case 'r':
1288: this_alternative[i]
1289: = (int) reg_class_subunion[this_alternative[i]][(int) GENERAL_REGS];
1290: goto reg;
1291:
1292: default:
1293: this_alternative[i]
1294: = (int) reg_class_subunion[this_alternative[i]][(int) REG_CLASS_FROM_LETTER (c)];
1295:
1296: reg:
1297: badop = 0;
1298: if (GET_CODE (operand) == REG
1299: && reg_renumbered_fits_class_p (operand,
1300: this_alternative[i],
1301: offset, GET_MODE (recog_operand[i])))
1302: win = 1;
1303: break;
1304: }
1305: constraints[i] = p;
1306:
1307: /* Record which operands fit this alternative. */
1308: this_alternative_earlyclobber[i] = earlyclobber;
1309: if (win && ! force_reload)
1310: this_alternative_win[i] = 1;
1311: else
1312: {
1313: this_alternative_offmemok[i] = offmemok;
1314: losers++;
1315: if (badop)
1316: bad = 1;
1317: }
1318: }
1319:
1320: /* Now see if any output operands that are marked "earlyclobber"
1321: in this alternative conflict with any input operands
1322: or any memory addresses. */
1323:
1324: for (i = 0; i < noperands; i++)
1325: if (this_alternative_earlyclobber[i]
1326: && this_alternative_win[i])
1327: {
1328: int j;
1329: for (j = 0; j < noperands; j++)
1330: /* Is this an input operand or a memory ref? */
1331: if ((GET_CODE (recog_operand[j]) == MEM
1332: || modified[j] != RELOAD_WRITE)
1333: /* Does it refer to the earlyclobber operand? */
1334: && refers_to_regno_p (REGNO (recog_operand[i]),
1335: recog_operand[j], 0))
1336: break;
1337: /* If an earlyclobber operand conflicts with something,
1338: it must be reloaded, so request this and count the cost. */
1339: if (j != noperands)
1340: {
1341: losers++;
1342: this_alternative_win[i] = 0;
1343: }
1344: }
1345:
1346: /* If one alternative accepts all the operands, no reload required,
1347: choose that alternative; don't consider the remaining ones. */
1348: if (losers == 0)
1349: {
1350: /* Unswap these so that they are never swapped at `finish'. */
1351: recog_operand[1] = substed_operand[1];
1352: recog_operand[2] = substed_operand[2];
1353: for (i = 0; i < noperands; i++)
1354: goal_alternative_win[i] = 1;
1355: bcopy (this_alternative, goal_alternative,
1356: sizeof this_alternative);
1357: bcopy (this_alternative_offmemok, goal_alternative_offmemok,
1358: sizeof this_alternative_offmemok);
1359: bcopy (this_alternative_matches, goal_alternative_matches,
1360: sizeof this_alternative_matches);
1361: goal_alternative_number = this_alternative_number;
1362: goal_alternative_swapped = swapped;
1363: goal_earlyclobber = this_earlyclobber;
1364: goto finish;
1365: }
1366:
1367: /* REJECT, set by the ! and ? constraint characters,
1368: discourages the use of this alternative for a reload goal. */
1369: if (reject > 0)
1370: losers += reject;
1371:
1372: /* If this alternative can be made to work by reloading,
1373: and it needs less reloading than the others checked so far,
1374: record it as the chosen goal for reloading. */
1375: if (! bad && best > losers)
1376: {
1377: bcopy (this_alternative, goal_alternative,
1378: sizeof this_alternative);
1379: bcopy (this_alternative_win, goal_alternative_win,
1380: sizeof this_alternative_win);
1381: bcopy (this_alternative_offmemok, goal_alternative_offmemok,
1382: sizeof this_alternative_offmemok);
1383: bcopy (this_alternative_matches, goal_alternative_matches,
1384: sizeof this_alternative_matches);
1385: goal_alternative_swapped = swapped;
1386: best = losers;
1387: goal_alternative_number = this_alternative_number;
1388: goal_earlyclobber = this_earlyclobber;
1389: }
1390: this_alternative_number++;
1391: }
1392:
1393: /* If insn is commutative (it's safe to exchange a certain pair of operands)
1394: then we need to try each alternative twice,
1395: the second time matching those two operands
1396: as if we had exchanged them.
1397: To do this, really exchange them in operands.
1398:
1399: If we have just tried the alternatives the second time,
1400: return operands to normal and drop through. */
1401:
1402: if (commutative >= 0)
1403: {
1404: swapped = !swapped;
1405: if (swapped)
1406: {
1407: recog_operand[commutative] = substed_operand[commutative + 1];
1408: recog_operand[commutative + 1] = substed_operand[commutative];
1409:
1410: bcopy (constraints1, constraints, noperands * sizeof (char *));
1411: goto try_swapped;
1412: }
1413: else
1414: {
1415: recog_operand[commutative] = substed_operand[commutative];
1416: recog_operand[commutative + 1] = substed_operand[commutative + 1];
1417: }
1418: }
1419:
1420: /* The operands don't meet the constraints.
1421: goal_alternative describes the alternative
1422: that we could reach by reloading the fewest operands.
1423: Reload so as to fit it. */
1424:
1425: if (best == MAX_RECOG_OPERANDS + 100)
1426: abort (); /* No alternative works with reloads?? */
1427:
1428: /* Jump to `finish' from above if all operands are valid already.
1429: In that case, goal_alternative_win is all 1. */
1430: finish:
1431:
1432: /* Right now, for any pair of operands I and J that are required to match,
1433: with I < J,
1434: goal_alternative_matches[J] is I.
1435: Set up goal_alternative_matched as the inverse function:
1436: goal_alternative_matched[I] = J. */
1437:
1438: for (i = 0; i < noperands; i++)
1439: goal_alternative_matched[i] = -1;
1440:
1441: for (i = 0; i < noperands; i++)
1442: if (! goal_alternative_win[i]
1443: && goal_alternative_matches[i] >= 0)
1444: goal_alternative_matched[goal_alternative_matches[i]] = i;
1445:
1446: /* If the best alternative is with operands 1 and 2 swapped,
1447: consider them swapped before reporting the reloads. */
1448:
1449: if (goal_alternative_swapped)
1450: {
1451: register rtx tem;
1452:
1453: tem = substed_operand[commutative];
1454: substed_operand[commutative] = substed_operand[commutative + 1];
1455: substed_operand[commutative + 1] = tem;
1456: tem = recog_operand[commutative];
1457: recog_operand[commutative] = recog_operand[commutative + 1];
1458: recog_operand[commutative + 1] = tem;
1459: }
1460:
1461: /* Perform whatever substitutions on the operands we are supposed
1462: to make due to commutativity or replacement of registers
1463: with equivalent constants or memory slots. */
1464:
1465: for (i = 0; i < noperands; i++)
1466: {
1467: *recog_operand_loc[i] = substed_operand[i];
1468: /* While we are looping on operands, initialize this. */
1469: operand_reloadnum[i] = -1;
1470: }
1471:
1472: /* Now record reloads for all the operands that need them. */
1473: for (i = 0; i < noperands; i++)
1474: if (! goal_alternative_win[i])
1475: {
1476: /* Operands that match previous ones have already been handled. */
1477: if (goal_alternative_matches[i] >= 0)
1478: ;
1479: /* This clause forces a double constant into memory
1480: if necessary. But right now it appears never necessary.
1481: Perhaps there should be a heuristic here to detect cases
1482: when it is desirable, even though not necessary, to move
1483: the constant to memory. I can't decide when it is desirable. */
1484: else if (GET_CODE (recog_operand[i]) == CONST_DOUBLE
1485: && alternative_allows_memconst (constraints1[i], goal_alternative_number)
1486: && goal_alternative[i] == (int) NO_REGS)
1487: {
1488: *recog_operand_loc[i] = recog_operand[i]
1489: = force_const_double_mem (recog_operand[i]);
1490: find_reloads_toplev (recog_operand[i]);
1491: }
1492: /* Handle an operand with a nonoffsetable address
1493: appearing where an offsetable address will do
1494: by reloading the address into a base register. */
1495: else if (goal_alternative_matched[i] == -1
1496: && goal_alternative_offmemok[i]
1497: && GET_CODE (recog_operand[i]) == MEM
1498: && GET_CODE (XEXP (recog_operand[i], 0)) != POST_INC
1499: && GET_CODE (XEXP (recog_operand[i], 0)) != POST_DEC
1500: && GET_CODE (XEXP (recog_operand[i], 0)) != PRE_INC
1501: && GET_CODE (XEXP (recog_operand[i], 0)) != PRE_DEC)
1502: push_reload (XEXP (recog_operand[i], 0), 0,
1503: &XEXP (recog_operand[i], 0), 0,
1504: BASE_REG_CLASS, GET_MODE (XEXP (recog_operand[i], 0)),
1505: 0, 0, 0);
1506: else if (goal_alternative_matched[i] == -1)
1507: operand_reloadnum[i] =
1508: push_reload (modified[i] != RELOAD_WRITE ? recog_operand[i] : 0,
1509: modified[i] != RELOAD_READ ? recog_operand[i] : 0,
1510: recog_operand_loc[i], 0,
1511: (enum reg_class) goal_alternative[i],
1512: (modified[i] == RELOAD_WRITE ? VOIDmode : operand_mode[i]),
1513: (modified[i] == RELOAD_READ ? VOIDmode : operand_mode[i]),
1514: (insn_code_number < 0 ? 0
1515: : insn_operand_strict_low[insn_code_number][i]),
1516: 0);
1517: /* In a matching pair of operands, one must be input only
1518: and the other must be output only.
1519: Pass the input operand as IN and the other as OUT. */
1520: else if (modified[i] == RELOAD_READ
1521: && modified[goal_alternative_matched[i]] == RELOAD_WRITE)
1522: operand_reloadnum[goal_alternative_matched[i]]
1523: = operand_reloadnum[i]
1524: = push_reload (recog_operand[i],
1525: recog_operand[goal_alternative_matched[i]],
1526: recog_operand_loc[i],
1527: recog_operand_loc[goal_alternative_matched[i]],
1528: (enum reg_class) goal_alternative[i],
1529: operand_mode[i],
1530: operand_mode[goal_alternative_matched[i]],
1531: VOIDmode, 0);
1532: else if (modified[i] == RELOAD_WRITE
1533: && modified[goal_alternative_matched[i]] == RELOAD_READ)
1534: operand_reloadnum[goal_alternative_matched[i]]
1535: = operand_reloadnum[i]
1536: = push_reload (recog_operand[goal_alternative_matched[i]],
1537: recog_operand[i],
1538: recog_operand_loc[goal_alternative_matched[i]],
1539: recog_operand_loc[i],
1540: (enum reg_class) goal_alternative[i],
1541: operand_mode[goal_alternative_matched[i]],
1542: operand_mode[i],
1543: VOIDmode, 0);
1544: else abort ();
1545: }
1546: else if (goal_alternative_matched[i] < 0
1547: && goal_alternative_matches[i] < 0)
1548: {
1549: rtx operand = recog_operand[i];
1550: /* For each non-matching operand that's a pseudo-register
1551: that didn't get a hard register, make an optional reload.
1552: This may get done even if the insn needs no reloads otherwise. */
1553: /* (It would be safe to make an optional reload for a matching pair
1554: of operands, but we don't bother yet.) */
1555: while (GET_CODE (operand) == SUBREG)
1556: operand = XEXP (operand, 0);
1557: if (GET_CODE (operand) == REG
1558: && REGNO (operand) >= FIRST_PSEUDO_REGISTER
1559: && reg_renumber[REGNO (operand)] < 0
1560: && (enum reg_class) goal_alternative[i] != NO_REGS)
1561: operand_reloadnum[i]
1562: = push_reload (modified[i] != RELOAD_WRITE ? recog_operand[i] : 0,
1563: modified[i] != RELOAD_READ ? recog_operand[i] : 0,
1564: recog_operand_loc[i], 0,
1565: (enum reg_class) goal_alternative[i],
1566: (modified[i] == RELOAD_WRITE ? VOIDmode : operand_mode[i]),
1567: (modified[i] == RELOAD_READ ? VOIDmode : operand_mode[i]),
1568: insn_operand_strict_low[insn_code_number][i],
1569: 1);
1570: else
1571: operand_reloadnum[i] = -1;
1572: }
1573:
1574: /* Perhaps an output reload can be combined with another
1575: to reduce needs by one. */
1576: if (!goal_earlyclobber)
1577: combine_reloads ();
1578:
1579: /* If this insn pattern contains any MATCH_DUP's, make sure that
1580: they will be substituted if the operands they match are substituted.
1581: Also do now any substitutions we already did on the operands. */
1582: if (insn_code_number >= 0)
1583: for (i = insn_n_dups[insn_code_number] - 1; i >= 0; i--)
1584: {
1585: int opno = recog_dup_num[i];
1586: *recog_dup_loc[i] = *recog_operand_loc[opno];
1587: if (operand_reloadnum[opno] >= 0)
1588: push_replacement (recog_dup_loc[i], operand_reloadnum[opno],
1589: insn_operand_mode[insn_code_number][opno]);
1590: }
1591:
1592: /* For each reload of a reg into some other class of reg,
1593: search for an existing equivalent reg (same value now) in the right class.
1594: We can use it as long as we don't need to change its contents. */
1595: for (i = 0; i < n_reloads; i++)
1596: if (reload_reg_rtx[i] == 0
1597: && reload_in[i] != 0
1598: && GET_CODE (reload_in[i]) == REG
1599: && reload_out[i] == 0)
1600: {
1601: reload_reg_rtx[i]
1602: = find_equiv_reg (reload_in[i], insn, reload_reg_class[i], -1,
1603: static_reload_reg_p, 0);
1604: /* Prevent generation of insn to load the value
1605: because the one we found already has the value. */
1606: if (reload_reg_rtx[i])
1607: reload_in[i] = reload_reg_rtx[i];
1608: }
1609:
1610: #else /* no REGISTER_CONSTRAINTS */
1611: int noperands;
1612: int insn_code_number;
1613: register int i;
1614: rtx body = PATTERN (insn);
1615:
1616: n_reloads = 0;
1617: n_replacements = 0;
1618: replace_reloads = replace;
1619: indirect_ok = ind_ok;
1620: this_insn = insn;
1621:
1622: /* Find what kind of insn this is. NOPERANDS gets number of operands.
1623: Store the operand values in RECOG_OPERAND and the locations
1624: of the words in the insn that point to them in RECOG_OPERAND_LOC.
1625: Return if the insn needs no reload processing. */
1626:
1627: switch (GET_CODE (body))
1628: {
1629: case USE:
1630: case CLOBBER:
1631: case ASM_INPUT:
1632: case ADDR_VEC:
1633: case ADDR_DIFF_VEC:
1634: return;
1635:
1636: case PARALLEL:
1637: case SET:
1638: noperands = asm_noperands (body);
1639: if (noperands > 0)
1640: {
1641: /* This insn is an `asm' with operands.
1642: First, find out how many operands, and allocate space. */
1643:
1644: insn_code_number = -1;
1645: /* ??? This is a bug! ???
1646: Give up and delete this insn if it has too many operands. */
1647: if (noperands > MAX_RECOG_OPERANDS)
1648: abort ();
1649:
1650: /* Now get the operand values out of the insn. */
1651:
1652: decode_asm_operands (body, recog_operand, recog_operand_loc, 0, 0);
1653: break;
1654: }
1655:
1656: default:
1657: /* Ordinary insn: recognize it, allocate space for operands and
1658: constraints, and get them out via insn_extract. */
1659:
1660: insn_code_number = recog_memoized (insn);
1661: noperands = insn_n_operands[insn_code_number];
1662: insn_extract (insn);
1663: }
1664:
1665: if (noperands == 0)
1666: return;
1667:
1668: for (i = 0; i < noperands; i++)
1669: {
1670: register RTX_CODE code = GET_CODE (recog_operand[i]);
1671:
1672: if (insn_code_number >= 0)
1673: if (insn_operand_address_p[insn_code_number][i])
1674: find_reloads_address (VOIDmode, 0,
1675: recog_operand[i], recog_operand_loc[i]);
1676: if (code == MEM)
1677: find_reloads_address (GET_MODE (recog_operand[i]),
1678: recog_operand_loc[i],
1679: XEXP (recog_operand[i], 0),
1680: &XEXP (recog_operand[i], 0));
1681: if (code == SUBREG)
1682: find_reloads_toplev (recog_operand[i]);
1683: if (code == REG)
1684: {
1685: register int regno = REGNO (recog_operand[i]);
1686: if (regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0
1687: && reg_equiv_constant[regno] != 0)
1688: recog_operand[i] = *recog_operand_loc[i]
1689: = reg_equiv_constant[regno];
1690: }
1691: }
1692: #endif /* no REGISTER_CONSTRAINTS */
1693: }
1694:
1695: /* Return 1 if alternative number ALTNUM in constraint-string CONSTRAINT
1696: accepts a memory operand with constant address. */
1697:
1698: static int
1699: alternative_allows_memconst (constraint, altnum)
1700: char *constraint;
1701: int altnum;
1702: {
1703: register int c;
1704: /* Skip alternatives before the one requested. */
1705: while (altnum > 0)
1706: {
1707: while (*constraint++ != ',');
1708: altnum--;
1709: }
1710: /* Scan the requested alternative for 'm' or 'o'.
1711: If one of them is present, this alternative accepts memory constants. */
1712: while ((c = *constraint++) && c != ',' && c != '#')
1713: if (c == 'm' || c == 'o')
1714: return 1;
1715: return 0;
1716: }
1717:
1718: /* Scan X for memory references and scan the addresses for reloading.
1719: Also checks for references to "constant" regs that we want to eliminate
1720: and replaces them with the values they stand for.
1721: We may alter X descructively if it contains a reference to such.
1722: If X is just a constant reg, we return the equivalent value
1723: instead of X. */
1724:
1725: static rtx
1726: find_reloads_toplev (x)
1727: rtx x;
1728: {
1729: register RTX_CODE code = GET_CODE (x);
1730:
1731: register char *fmt = GET_RTX_FORMAT (code);
1732: register int i;
1733:
1734: if (code == REG)
1735: {
1736: /* This code is duplicated for speed in find_reloads. */
1737: register int regno = REGNO (x);
1738: if (regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0
1739: && reg_equiv_constant[regno] != 0)
1740: x = reg_equiv_constant[regno];
1741: else if (reg_equiv_address[regno] != 0)
1742: {
1743: x = gen_rtx (MEM, GET_MODE (x),
1744: reg_equiv_address[regno]);
1745: find_reloads_address (GET_MODE (x), 0,
1746: XEXP (x, 0),
1747: &XEXP (x, 0));
1748: }
1749: return x;
1750:
1751:
1752: }
1753: else if (code == MEM)
1754: {
1755: rtx tem = x;
1756: find_reloads_address (GET_MODE (x), &tem, XEXP (x, 0), &XEXP (x, 0));
1757: return tem;
1758: }
1759: else
1760: for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1761: {
1762: if (fmt[i] == 'e')
1763: XEXP (x, i) = find_reloads_toplev (XEXP (x, i));
1764: }
1765: return x;
1766: }
1767:
1768: static rtx
1769: make_memloc (ad, regno)
1770: rtx ad;
1771: int regno;
1772: {
1773: register int i;
1774: rtx tem = reg_equiv_address[regno];
1775: for (i = 0; i < n_memlocs; i++)
1776: if (rtx_equal_p (tem, XEXP (memlocs[i], 0)))
1777: return memlocs[i];
1778: tem = gen_rtx (MEM, GET_MODE (ad), tem);
1779: memlocs[n_memlocs++] = tem;
1780: return tem;
1781: }
1782:
1783: /* Record all reloads needed for handling memory address AD
1784: which appears in *LOC in a memory reference to mode MODE
1785: which itself is stored in location *MEMREFLOC.
1786: (MEMREFLOC may be zero, meaning don't ever bother to copy the memref.)
1787: Note that we take shortcuts assuming that no multi-reg machine mode
1788: occurs as part of an address. */
1789:
1790: static void
1791: find_reloads_address (mode, memrefloc, ad, loc)
1792: enum machine_mode mode;
1793: rtx *memrefloc;
1794: rtx ad;
1795: rtx *loc;
1796: {
1797: register int regno;
1798: rtx tem;
1799:
1800: if (GET_CODE (ad) == REG)
1801: {
1802: regno = REGNO (ad);
1803:
1804: if (regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0
1805: && reg_equiv_constant[regno] != 0)
1806: {
1807: if (strict_memory_address_p (mode, reg_equiv_constant[regno]))
1808: {
1809: *loc = ad = reg_equiv_constant[regno];
1810: return;
1811: }
1812: }
1813: if (reg_equiv_address[regno] != 0)
1814: {
1815: rtx tem = make_memloc (ad, regno);
1816: push_reload (XEXP (tem, 0), 0, &XEXP (tem, 0), 0,
1817: BASE_REG_CLASS,
1818: GET_MODE (XEXP (tem, 0)), 0, VOIDmode, 0);
1819: push_reload (tem, 0, loc, 0, BASE_REG_CLASS,
1820: GET_MODE (ad), 0, VOIDmode, 0);
1821: return;
1822: }
1823: if (! (regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0
1824: ? indirect_ok
1825: : REGNO_OK_FOR_BASE_P (regno)))
1826: push_reload (ad, 0, loc, 0, BASE_REG_CLASS,
1827: GET_MODE (ad), 0, VOIDmode, 0);
1828: return;
1829: }
1830:
1831: if (strict_memory_address_p (mode, ad))
1832: {
1833: /* The address appears valid, so reloads are not needed.
1834: But the address may contain an eliminable register.
1835: This can happen because a machine with indirect addressing
1836: may consider a pseudo register by itself a valid address even when
1837: it has failed to get a hard reg.
1838: So do a tree-walk to find and eliminate all such regs. */
1839:
1840: *loc = subst_reg_equivs (ad);
1841:
1842: /* Check result for validity after substitution. */
1843: if (strict_memory_address_p (mode, ad))
1844: return;
1845: }
1846:
1847: /* If we have address of a stack slot but it's not valid
1848: (displacement is too large), compute the sum in a register. */
1849: if (GET_CODE (ad) == PLUS
1850: && GET_CODE (XEXP (ad, 0)) == REG
1851: && (REGNO (XEXP (ad, 0)) == FRAME_POINTER_REGNUM
1852: || REGNO (XEXP (ad, 0)) == ARG_POINTER_REGNUM)
1853: && GET_CODE (XEXP (ad, 1)) == CONST_INT)
1854: {
1855: /* Unshare the MEM rtx so we can safely alter it. */
1856: if (memrefloc)
1857: {
1858: *memrefloc = copy_rtx (*memrefloc);
1859: loc = &XEXP (*memrefloc, 0);
1860: }
1861: push_reload (ad, 0, loc, 0, BASE_REG_CLASS,
1862: GET_MODE (ad), 0, VOIDmode, 0);
1863: return;
1864: }
1865:
1866: /* See if address becomes valid when an eliminable register
1867: in a sum is replaced. */
1868:
1869: tem = subst_indexed_address (ad);
1870: if (tem != ad && strict_memory_address_p (mode, tem))
1871: {
1872: /* Ok, we win that way. Replace any additional eliminable
1873: registers. */
1874:
1875: tem = subst_reg_equivs (tem);
1876:
1877: /* Make sure that didn't make the address invalid again. */
1878:
1879: if (strict_memory_address_p (mode, tem))
1880: {
1881: *loc = tem;
1882: return;
1883: }
1884: }
1885:
1886: /* If constants aren't valid addresses, reload the constant address
1887: into a register. */
1888: if (CONSTANT_ADDRESS_P (ad) && ! strict_memory_address_p (mode, ad))
1889: {
1890: push_reload (ad, 0, loc, 0,
1891: BASE_REG_CLASS,
1892: GET_MODE (ad), 0, VOIDmode, 0);
1893: return;
1894: }
1895:
1896: find_reloads_address_1 (ad, 0, loc);
1897: }
1898:
1899: /* Find all pseudo regs appearing in AD
1900: that are eliminable in favor of equivalent values
1901: and do not have hard regs; replace them by their equivalents. */
1902:
1903: static rtx
1904: subst_reg_equivs (ad)
1905: rtx ad;
1906: {
1907: register RTX_CODE code = GET_CODE (ad);
1908: register int i;
1909: register char *fmt;
1910:
1911: switch (code)
1912: {
1913: case CONST_INT:
1914: case CONST:
1915: case CONST_DOUBLE:
1916: case SYMBOL_REF:
1917: case LABEL_REF:
1918: case PC:
1919: case CC0:
1920: return ad;
1921:
1922: case REG:
1923: {
1924: register int regno = REGNO (ad);
1925:
1926: if (regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0
1927: && reg_equiv_constant[regno] != 0)
1928: return reg_equiv_constant[regno];
1929: }
1930: return ad;
1931: }
1932:
1933: fmt = GET_RTX_FORMAT (code);
1934: for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1935: if (fmt[i] == 'e')
1936: XEXP (ad, i) = subst_reg_equivs (XEXP (ad, i));
1937: return ad;
1938: }
1939:
1940: /* If ADDR is a sum containing a pseudo register that should be
1941: replaced with a constant (from reg_equiv_constant),
1942: return the result of doing so, and also apply the associative
1943: law so that the result is more likely to be a valid address.
1944: (But it is not guaranteed to be one.)
1945:
1946: In all other cases, return ADDR. */
1947:
1948: static rtx
1949: subst_indexed_address (addr)
1950: rtx addr;
1951: {
1952: rtx const_part = 0;
1953: rtx var_part = 0;
1954: int regno;
1955:
1956: if (GET_CODE (addr) == PLUS)
1957: {
1958: if (CONSTANT_P (XEXP (addr, 0)))
1959: const_part = XEXP (addr, 0),
1960: var_part = XEXP (addr, 1);
1961: else if (CONSTANT_P (XEXP (addr, 1)))
1962: const_part = XEXP (addr, 1),
1963: var_part = XEXP (addr, 0);
1964:
1965: if (const_part == 0)
1966: return addr;
1967:
1968: if (GET_CODE (const_part) == CONST)
1969: const_part = XEXP (const_part, 0);
1970:
1971: if (GET_CODE (var_part) == REG
1972: && (regno = REGNO (var_part)) >= FIRST_PSEUDO_REGISTER
1973: && reg_renumber[regno] < 0
1974: && reg_equiv_constant[regno] != 0)
1975: return gen_rtx (CONST, VOIDmode,
1976: gen_rtx (PLUS, Pmode, const_part,
1977: reg_equiv_constant[regno]));
1978:
1979: if (GET_CODE (var_part) != PLUS)
1980: return addr;
1981:
1982: if (GET_CODE (XEXP (var_part, 0)) == REG
1983: && (regno = REGNO (XEXP (var_part, 0))) >= FIRST_PSEUDO_REGISTER
1984: && reg_renumber[regno] < 0
1985: && reg_equiv_constant[regno] != 0)
1986: return gen_rtx (PLUS, Pmode, XEXP (var_part, 1),
1987: gen_rtx (CONST, VOIDmode,
1988: gen_rtx (PLUS, Pmode, const_part,
1989: reg_equiv_constant[regno])));
1990:
1991: if (GET_CODE (XEXP (var_part, 1)) == REG
1992: && (regno = REGNO (XEXP (var_part, 1))) >= FIRST_PSEUDO_REGISTER
1993: && reg_renumber[regno] < 0
1994: && reg_equiv_constant[regno] != 0)
1995: return gen_rtx (PLUS, Pmode, XEXP (var_part, 0),
1996: gen_rtx (CONST, VOIDmode,
1997: gen_rtx (PLUS, Pmode, const_part,
1998: reg_equiv_constant[regno])));
1999: }
2000: return addr;
2001: }
2002:
2003: /* Record the pseudo registers we must reload into hard registers
2004: in a subexpression of a memory address, X.
2005: CONTEXT = 1 means we are considering regs as index regs,
2006: = 0 means we are considering them as base regs.
2007:
2008: We return X, whose operands may have been altered,
2009: or perhaps a RELOAD rtx if X itself was a REG that must be reloaded. */
2010:
2011: /* Note that we take shortcuts assuming that no multi-reg machine mode
2012: occurs as part of an address.
2013: Also, this is not fully machine-customizable; it works for machines
2014: such as vaxes and 68000's and 32000's, but other possible machines
2015: could have addressing modes that this does not handle right. */
2016:
2017: static void
2018: find_reloads_address_1 (x, context, loc)
2019: rtx x;
2020: int context;
2021: rtx *loc;
2022: {
2023: register RTX_CODE code = GET_CODE (x);
2024:
2025: if (code == PLUS)
2026: {
2027: register rtx op0 = XEXP (x, 0);
2028: register rtx op1 = XEXP (x, 1);
2029: register RTX_CODE code0 = GET_CODE (op0);
2030: register RTX_CODE code1 = GET_CODE (op1);
2031: if (code0 == MULT || code0 == SIGN_EXTEND || code1 == MEM)
2032: {
2033: find_reloads_address_1 (op0, 1, &XEXP (x, 0));
2034: find_reloads_address_1 (op1, 0, &XEXP (x, 1));
2035: }
2036: else if (code1 == MULT || code1 == SIGN_EXTEND || code0 == MEM)
2037: {
2038: find_reloads_address_1 (op0, 0, &XEXP (x, 0));
2039: find_reloads_address_1 (op1, 1, &XEXP (x, 1));
2040: }
2041: else if (code0 == CONST_INT || code0 == CONST
2042: || code0 == SYMBOL_REF || code0 == LABEL_REF)
2043: {
2044: find_reloads_address_1 (op1, 0, &XEXP (x, 1));
2045: }
2046: else if (code1 == CONST_INT || code1 == CONST
2047: || code1 == SYMBOL_REF || code1 == LABEL_REF)
2048: {
2049: find_reloads_address_1 (op0, 0, &XEXP (x, 0));
2050: }
2051: else if (code0 == REG && code1 == REG)
2052: {
2053: if (REG_OK_FOR_INDEX_P (op0)
2054: && REG_OK_FOR_BASE_P (op1))
2055: return;
2056: else if (REG_OK_FOR_INDEX_P (op1)
2057: && REG_OK_FOR_BASE_P (op0))
2058: return;
2059: else if (REG_OK_FOR_BASE_P (op1))
2060: find_reloads_address_1 (op0, 1, &XEXP (x, 0));
2061: else if (REG_OK_FOR_BASE_P (op0))
2062: find_reloads_address_1 (op1, 1, &XEXP (x, 1));
2063: else if (REG_OK_FOR_INDEX_P (op1))
2064: find_reloads_address_1 (op0, 0, &XEXP (x, 0));
2065: else if (REG_OK_FOR_INDEX_P (op0))
2066: find_reloads_address_1 (op1, 0, &XEXP (x, 1));
2067: else
2068: {
2069: find_reloads_address_1 (op0, 1, &XEXP (x, 0));
2070: find_reloads_address_1 (op1, 0, &XEXP (x, 1));
2071: }
2072: }
2073: else if (code0 == REG)
2074: {
2075: find_reloads_address_1 (op0, 1, &XEXP (x, 0));
2076: find_reloads_address_1 (op1, 0, &XEXP (x, 1));
2077: }
2078: else if (code1 == REG)
2079: {
2080: find_reloads_address_1 (op1, 1, &XEXP (x, 1));
2081: find_reloads_address_1 (op0, 0, &XEXP (x, 0));
2082: }
2083: }
2084: else if (code == POST_INC || code == POST_DEC
2085: || code == PRE_INC || code == PRE_DEC)
2086: {
2087: if (GET_CODE (XEXP (x, 0)) == REG)
2088: {
2089: register int regno = REGNO (XEXP (x, 0));
2090:
2091: /* A register that is incremented cannot be constant! */
2092: if (regno >= FIRST_PSEUDO_REGISTER
2093: && reg_equiv_constant[regno] != 0)
2094: abort ();
2095:
2096: /* Handle a register that is equivalent to a memory location
2097: which cannot be addressed directly. */
2098: if (reg_equiv_address[regno] != 0)
2099: {
2100: rtx tem = make_memloc (XEXP (x, 0), regno);
2101: /* First reload the memory location's address. */
2102: push_reload (XEXP (tem, 0), 0, &XEXP (tem, 0), 0,
2103: BASE_REG_CLASS,
2104: GET_MODE (XEXP (tem, 0)), 0, VOIDmode, 0);
2105: /* Then reload the memory reference itself,
2106: pretending it is located in the PRE_INC or whatever. */
2107: push_reload (tem, tem, &XEXP (x, 0), 0,
2108: context ? INDEX_REG_CLASS : BASE_REG_CLASS,
2109: GET_MODE (tem), GET_MODE (tem), VOIDmode, 0);
2110: return;
2111: }
2112:
2113: /* Handle any other sort of register. */
2114:
2115: if (reg_renumber[regno] >= 0)
2116: regno = reg_renumber[regno];
2117: if ((regno >= FIRST_PSEUDO_REGISTER
2118: || !(context ? REGNO_OK_FOR_INDEX_P (regno)
2119: : REGNO_OK_FOR_BASE_P (regno))))
2120: {
2121: register rtx link;
2122: int reloadnum
2123: = push_reload (XEXP (x, 0), XEXP (x, 0),
2124: &XEXP (x, 0), 0,
2125: context ? INDEX_REG_CLASS : BASE_REG_CLASS,
2126: GET_MODE (XEXP (x, 0)),
2127: GET_MODE (XEXP (x, 0)), VOIDmode, 0);
2128:
2129: for (link = REG_NOTES (this_insn);
2130: link; link = XEXP (link, 1))
2131: if (REG_NOTE_KIND (link) == REG_INC
2132: && REGNO (XEXP (link, 0)) == REGNO (XEXP (x, 0)))
2133: push_replacement (&XEXP (link, 0), reloadnum, VOIDmode);
2134: }
2135: return;
2136: }
2137: }
2138: else if (code == REG)
2139: {
2140: register int regno = REGNO (x);
2141:
2142: if (regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0
2143: && reg_equiv_constant[regno] != 0)
2144: {
2145: push_reload (reg_equiv_constant[regno], 0, loc, 0,
2146: context ? INDEX_REG_CLASS : BASE_REG_CLASS,
2147: GET_MODE (x), 0, VOIDmode, 0);
2148: return;
2149: }
2150:
2151: if (reg_equiv_address[regno] != 0)
2152: {
2153: x = make_memloc (x, regno);
2154: push_reload (XEXP (x, 0), 0, &XEXP (x, 0), 0,
2155: BASE_REG_CLASS,
2156: GET_MODE (XEXP (x, 0)), 0, VOIDmode, 0);
2157: }
2158:
2159: if (reg_renumber[regno] >= 0)
2160: regno = reg_renumber[regno];
2161: if ((regno >= FIRST_PSEUDO_REGISTER
2162: || !(context ? REGNO_OK_FOR_INDEX_P (regno)
2163: : REGNO_OK_FOR_BASE_P (regno))))
2164: {
2165: push_reload (x, 0, loc, 0,
2166: context ? INDEX_REG_CLASS : BASE_REG_CLASS,
2167: GET_MODE (x), 0, VOIDmode, 0);
2168: return;
2169: }
2170: }
2171: else
2172: {
2173: register char *fmt = GET_RTX_FORMAT (code);
2174: register int i;
2175: for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2176: {
2177: if (fmt[i] == 'e')
2178: find_reloads_address_1 (XEXP (x, i), context, &XEXP (x, i));
2179: }
2180: }
2181: }
2182:
2183: /* Substitute into X the registers into which we have reloaded
2184: the things that need reloading. The array `replacements'
2185: says contains the locations of all pointers that must be changed
2186: and says what to replace them with.
2187:
2188: Return the rtx that X translates into; usually X, but modified. */
2189:
2190: void
2191: subst_reloads ()
2192: {
2193: register int i;
2194:
2195: for (i = 0; i < n_replacements; i++)
2196: {
2197: register struct replacement *r = &replacements[i];
2198: register rtx reloadreg = reload_reg_rtx[r->what];
2199: if (reloadreg)
2200: {
2201: /* Encapsulate RELOADREG so its machine mode matches what
2202: used to be there. */
2203: if (GET_MODE (reloadreg) != r->mode && r->mode != VOIDmode)
2204: reloadreg = gen_rtx (SUBREG, r->mode, reloadreg, 0);
2205: *r->where = reloadreg;
2206: }
2207: /* If reload got no reg and isn't optional, something's wrong. */
2208: else if (! reload_optional[r->what])
2209: abort ();
2210: }
2211: }
2212:
2213: #if 0
2214:
2215: /* [[This function is currently obsolete, now that volatility
2216: is represented by a special bit `volatil' so VOLATILE is never used;
2217: and UNCHANGING has never been brought into use.]]
2218:
2219: Alter X by eliminating all VOLATILE and UNCHANGING expressions.
2220: Each of them is replaced by its operand.
2221: Thus, (PLUS (VOLATILE (MEM (REG 5))) (CONST_INT 4))
2222: becomes (PLUS (MEM (REG 5)) (CONST_INT 4)).
2223:
2224: If X is itself a VOLATILE expression,
2225: we return the expression that should replace it
2226: but we do not modify X. */
2227:
2228: static rtx
2229: forget_volatility (x)
2230: register rtx x;
2231: {
2232: enum rtx_code code = GET_CODE (x);
2233: register char *fmt;
2234: register int i;
2235: register rtx value = 0;
2236:
2237: switch (code)
2238: {
2239: case LABEL_REF:
2240: case SYMBOL_REF:
2241: case CONST_INT:
2242: case CONST_DOUBLE:
2243: case CONST:
2244: case REG:
2245: case CC0:
2246: case PC:
2247: return x;
2248:
2249: case VOLATILE:
2250: case UNCHANGING:
2251: return XEXP (x, 0);
2252: }
2253:
2254: fmt = GET_RTX_FORMAT (code);
2255: for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2256: {
2257: if (fmt[i] == 'e')
2258: XEXP (x, i) = forget_volatility (XEXP (x, i));
2259: if (fmt[i] == 'E')
2260: {
2261: register int j;
2262: for (j = XVECLEN (x, i) - 1; j >= 0; j--)
2263: XVECEXP (x, i, j) = forget_volatility (XVECEXP (x, i, j));
2264: }
2265: }
2266:
2267: return x;
2268: }
2269:
2270: #endif
2271:
2272: /* Check the insns before INSN to see if there is a suitable register
2273: containing the same value as GOAL.
2274: If OTHER is -1, look for a register in class CLASS.
2275: Otherwise, just see if register number OTHER shares GOAL's value.
2276:
2277: Return an rtx for the register found, or zero if none is found.
2278:
2279: If RELOAD_REG_P is (short *)1,
2280: we reject any hard reg that appears in reload_reg_rtx
2281: because such a hard reg is also needed coming into this insn.
2282:
2283: If RELOAD_REG_P is any other nonzero value,
2284: it is a vector indexed by hard reg number
2285: and we reject any hard reg whose element in the vector is nonnegative
2286: as well as any that appears in reload_reg_rtx.
2287:
2288: If GOAL is zero, then GOALREG is a register number; we look
2289: for an equivalent for that register.
2290:
2291: This function is used by jump.c as well as in the reload pass.
2292:
2293: If GOAL is a PLUS, we assume it adds the stack pointer to a constant. */
2294:
2295: rtx
2296: find_equiv_reg (goal, insn, class, other, reload_reg_p, goalreg)
2297: register rtx goal;
2298: rtx insn;
2299: enum reg_class class;
2300: register int other;
2301: short *reload_reg_p;
2302: int goalreg;
2303: {
2304: register rtx p = insn;
2305: rtx valtry, value, where;
2306: register rtx pat;
2307: register int regno = -1;
2308: int valueno;
2309: int goal_mem = 0;
2310: int goal_const = 0;
2311:
2312: if (goal == 0)
2313: regno = goalreg;
2314: else if (GET_CODE (goal) == REG)
2315: regno = REGNO (goal);
2316: else if (GET_CODE (goal) == MEM)
2317: goal_mem = 1;
2318: else if (CONSTANT_P (goal))
2319: goal_const = 1;
2320: else
2321: return 0;
2322:
2323: /* Scan insns back from INSN, looking for one that copies
2324: a value into or out of GOAL.
2325: Stop and give up if we reach a label. */
2326:
2327: while (1)
2328: {
2329: p = PREV_INSN (p);
2330: if (p == 0 || GET_CODE (p) == CODE_LABEL)
2331: return 0;
2332: if (GET_CODE (p) == INSN
2333: /* If we don't want spill regs (true for all calls in this file) */
2334: && (! (reload_reg_p != 0 && reload_reg_p != (short *)1)
2335: /* then ignore insns introduced by reload; they aren't useful
2336: and can cause results in reload_as_needed to be different
2337: from what they were when calculating the need for spills.
2338: If we notice an input-reload insn here, we will reject it below,
2339: but it might hide a usable equivalent. That makes bad code.
2340: It may even abort: perhaps no reg was spilled for this insn
2341: because it was assumed we would find that equivalent. */
2342: || INSN_UID (p) < reload_first_uid))
2343: {
2344: pat = PATTERN (p);
2345: /* First check for something that sets some reg equal to GOAL. */
2346: if (GET_CODE (pat) == SET
2347: && ((regno >= 0
2348: && GET_CODE (SET_SRC (pat)) == REG
2349: && (goal == 0 ? true_regnum (SET_SRC (pat)) : REGNO (SET_SRC (pat))) == regno
2350: && GET_CODE (valtry = SET_DEST (pat)) == REG)
2351: ||
2352: (regno >= 0
2353: && GET_CODE (SET_DEST (pat)) == REG
2354: && (goal == 0 ? true_regnum (SET_DEST (pat)) : REGNO (SET_DEST (pat))) == regno
2355: && GET_CODE (valtry = SET_SRC (pat)) == REG)
2356: ||
2357: (goal_const && rtx_equal_p (SET_SRC (pat), goal)
2358: && GET_CODE (valtry = SET_DEST (pat)) == REG)
2359: || (goal_mem
2360: && GET_CODE (valtry = SET_DEST (pat)) == REG
2361: && rtx_renumbered_equal_p (goal, SET_SRC (pat)))
2362: || (goal_mem
2363: && GET_CODE (valtry = SET_SRC (pat)) == REG
2364: && rtx_renumbered_equal_p (goal, SET_DEST (pat)))))
2365: if (other >= 0
2366: ? (goal == 0 ? true_regnum (valtry) : REGNO (valtry)) == other
2367: : (valueno = REGNO (valtry),
2368: reg_renumber[valueno] >= 0 ? valueno = reg_renumber[valueno] : 0,
2369: valueno < FIRST_PSEUDO_REGISTER &&
2370: TEST_HARD_REG_BIT (reg_class_contents[(int) class],
2371: valueno)))
2372: {
2373: value = valtry;
2374: where = p;
2375: break;
2376: }
2377: }
2378: }
2379:
2380: /* We found a previous insn copying GOAL into a suitable other reg VALUE
2381: (or copying VALUE into GOAL, if GOAL is also a register).
2382: Now verify that VALUE is really valid. */
2383:
2384: if (regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] >= 0)
2385: regno = reg_renumber[regno];
2386:
2387: /* VALUENO gets the register number of VALUE;
2388: for a pseudo reg, it gets the hard reg number that the pseudo has,
2389: and we give up if the pseudo has no hard reg. */
2390:
2391: valueno = REGNO (value);
2392: if (valueno >= FIRST_PSEUDO_REGISTER)
2393: valueno = reg_renumber[valueno];
2394:
2395: if (valueno < 0)
2396: return 0;
2397:
2398: /* Don't find the sp as an equiv, since pushes that we don't notice
2399: would invalidate it. */
2400: if (valueno == STACK_POINTER_REGNUM)
2401: return 0;
2402:
2403: /* Reject VALUE if it was loaded from GOAL
2404: and is also a register that appears in the address of GOAL. */
2405:
2406: if (goal_mem && value == SET_DEST (PATTERN (where))
2407: && refers_to_regno_p (valueno, goal, 0))
2408: return 0;
2409:
2410: /* Reject VALUE if it is one of the regs reserved for reloads.
2411: Reload1 knows how to reuse them anyway, and it would get
2412: confused if we allocated one without its knowledge.
2413: (Now that insns introduced by reload are ignored above,
2414: this case shouldn't happen, but I'm not positive.) */
2415:
2416: if (reload_reg_p != 0 && reload_reg_p != (short *)1
2417: && reload_reg_p[valueno] >= 0)
2418: return 0;
2419:
2420: /* Reject VALUE if it is a register being used for an input reload
2421: even if it is not one of those reserved. */
2422:
2423: if (reload_reg_p != 0)
2424: {
2425: int i;
2426: for (i = 0; i < n_reloads; i++)
2427: if (reload_reg_rtx[i] != 0 && reload_in[i])
2428: {
2429: int regno1 = REGNO (reload_reg_rtx[i]);
2430: if (reg_renumber[regno1] >= 0)
2431: regno1 = reg_renumber[regno1];
2432: if (valueno == regno1)
2433: return 0;
2434: }
2435: }
2436:
2437: /* Now verify that the values of GOAL and VALUE remain unaltered
2438: until INSN is reached. */
2439:
2440: p = insn;
2441: while (1)
2442: {
2443: p = PREV_INSN (p);
2444: if (p == where)
2445: return value;
2446:
2447: /* Don't trust the conversion past a function call
2448: if either of the two is in a call-clobbered register, or memory. */
2449: if (GET_CODE (p) == CALL_INSN
2450: && ((regno >= 0 && regno < FIRST_PSEUDO_REGISTER
2451: && call_used_regs[regno])
2452: ||
2453: (valueno >= 0 && valueno < FIRST_PSEUDO_REGISTER
2454: && call_used_regs[valueno])
2455: ||
2456: goal_mem))
2457: return 0;
2458:
2459: if (GET_CODE (p) == INSN || GET_CODE (p) == JUMP_INSN
2460: || GET_CODE (p) == CALL_INSN)
2461: {
2462: /* If this insn P stores in either GOAL or VALUE, return 0.
2463: If GOAL is a memory ref and this insn writes memory, return 0.
2464: If GOAL is a memory ref and its address is not constant,
2465: and this insn P changes a register, return 0.
2466: That is in lieue of checking whether GOAL uses this register. */
2467:
2468: pat = PATTERN (p);
2469: if (GET_CODE (pat) == SET || GET_CODE (pat) == CLOBBER)
2470: {
2471: register rtx dest = SET_DEST (pat);
2472: while (GET_CODE (dest) == SUBREG
2473: || GET_CODE (dest) == ZERO_EXTRACT
2474: || GET_CODE (dest) == SIGN_EXTRACT
2475: || GET_CODE (dest) == STRICT_LOW_PART)
2476: dest = XEXP (dest, 0);
2477: if (GET_CODE (dest) == REG)
2478: {
2479: register int xregno = REGNO (dest);
2480: if (reg_renumber[xregno] >= 0)
2481: xregno = reg_renumber[xregno];
2482: if (xregno == regno || xregno == valueno || goal_mem)
2483: return 0;
2484: }
2485: else if (goal_mem && GET_CODE (dest) == MEM
2486: && ! push_operand (dest, GET_MODE (dest)))
2487: return 0;
2488: }
2489: else if (GET_CODE (pat) == PARALLEL)
2490: {
2491: register int i;
2492: for (i = XVECLEN (pat, 0) - 1; i >= 0; i--)
2493: {
2494: register rtx v1 = XVECEXP (pat, 0, i);
2495: if (GET_CODE (v1) == SET || GET_CODE (v1) == CLOBBER)
2496: {
2497: register rtx dest = SET_DEST (v1);
2498: while (GET_CODE (dest) == SUBREG
2499: || GET_CODE (dest) == ZERO_EXTRACT
2500: || GET_CODE (dest) == SIGN_EXTRACT
2501: || GET_CODE (dest) == STRICT_LOW_PART)
2502: dest = XEXP (dest, 0);
2503: if (GET_CODE (dest) == REG)
2504: {
2505: register int xregno = REGNO (dest);
2506: if (reg_renumber[xregno] >= 0)
2507: xregno = reg_renumber[xregno];
2508: if (xregno == regno || xregno == valueno || goal_mem)
2509: return 0;
2510: }
2511: else if (goal_mem && GET_CODE (dest) == MEM
2512: && ! push_operand (dest, GET_MODE (dest)))
2513: return 0;
2514: }
2515: }
2516: }
2517: /* If this insn auto-increments or auto-decrements
2518: either regno or valueno, return 0 now.
2519: If GOAL is a memory ref and its address is not constant,
2520: and this insn P increments a register, return 0.
2521: That is in lieue of checking whether GOAL uses this register. */
2522: {
2523: register rtx link;
2524:
2525: for (link = REG_NOTES (p); link; link = XEXP (link, 1))
2526: if (REG_NOTE_KIND (link) == REG_INC)
2527: {
2528: register int incno = REGNO (XEXP (link, 0));
2529: if (reg_renumber[incno] >= 0)
2530: incno = reg_renumber[incno];
2531: if (incno == regno || incno == valueno || goal_mem)
2532: return 0;
2533: }
2534: }
2535: }
2536: }
2537: }
2538:
2539: /* Find a place where INCED appears in an increment or decrement operator
2540: within X, and return the amount INCED is incremented by
2541: (negative if decremented). */
2542:
2543: static int
2544: find_inc_amount (x, inced)
2545: rtx x, inced;
2546: {
2547: register enum rtx_code code = GET_CODE (x);
2548: register char *fmt;
2549: register int i;
2550:
2551: if (code == MEM)
2552: {
2553: register rtx addr = XEXP (x, 0);
2554: if ((GET_CODE (addr) == PRE_DEC
2555: || GET_CODE (addr) == POST_DEC)
2556: && XEXP (addr, 0) == inced)
2557: return - GET_MODE_SIZE (GET_MODE (x));
2558: if ((GET_CODE (addr) == PRE_INC
2559: || GET_CODE (addr) == POST_INC)
2560: && XEXP (addr, 0) == inced)
2561: return GET_MODE_SIZE (GET_MODE (x));
2562: }
2563:
2564: fmt = GET_RTX_FORMAT (code);
2565: for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2566: {
2567: if (fmt[i] == 'e')
2568: {
2569: register int tem = find_inc_amount (XEXP (x, i), inced);
2570: if (tem != 0)
2571: return tem;
2572: }
2573: if (fmt[i] == 'E')
2574: {
2575: register int j;
2576: for (j = XVECLEN (x, i) - 1; j >= 0; j--)
2577: {
2578: register int tem = find_inc_amount (XVECEXP (x, i, j), inced);
2579: if (tem != 0)
2580: return tem;
2581: }
2582: }
2583: }
2584:
2585: return 0;
2586: }
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