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1.1 root 1: /* Definitions of target machine for GNU compiler. Sun 68000/68020 version.
2: Copyright (C) 1987, 1988 Free Software Foundation, Inc.
3:
4: This file is part of GNU CC.
5:
6: GNU CC is distributed in the hope that it will be useful,
7: but WITHOUT ANY WARRANTY. No author or distributor
8: accepts responsibility to anyone for the consequences of using it
9: or for whether it serves any particular purpose or works at all,
10: unless he says so in writing. Refer to the GNU CC General Public
11: License for full details.
12:
13: Everyone is granted permission to copy, modify and redistribute
14: GNU CC, but only under the conditions described in the
15: GNU CC General Public License. A copy of this license is
16: supposed to have been given to you along with GNU CC so you
17: can know your rights and responsibilities. It should be in a
18: file named COPYING. Among other things, the copyright notice
19: and this notice must be preserved on all copies. */
20:
21:
22: /* Note that some other tm- files include this one and then override
23: many of the definitions that relate to assembler syntax. */
24:
25:
26: /* Names to predefine in the preprocessor for this target machine. */
27:
28: /* See tm-sun3.h, tm-sun2.h, tm-isi68.h for different CPP_PREDEFINES. */
29:
30: /* Print subsidiary information on the compiler version in use. */
31: #ifdef MOTOROLA
32: #define TARGET_VERSION printf (" (68k, Motorola syntax)");
33: #else
34: #define TARGET_VERSION printf (" (68k, MIT syntax)");
35: #endif
36:
37: /* Run-time compilation parameters selecting different hardware subsets. */
38:
39: extern int target_flags;
40:
41: /* Macros used in the machine description to test the flags. */
42:
43: /* Compile for a 68020 (not a 68000 or 68010). */
44: #define TARGET_68020 (target_flags & 1)
45: /* Compile 68881 insns for floating point (not library calls). */
46: #define TARGET_68881 (target_flags & 2)
47: /* Compile using 68020 bitfield insns. */
48: #define TARGET_BITFIELD (target_flags & 4)
49: /* Compile using rtd insn calling sequence.
50: This will not work unless you use prototypes at least
51: for all functions that can take varying numbers of args. */
52: #define TARGET_RTD (target_flags & 8)
53: /* Compile passing first two args in regs 0 and 1.
54: This exists only to test compiler features that will
55: be needed for RISC chips. It is not usable
56: and is not intended to be usable on this cpu. */
57: #define TARGET_REGPARM (target_flags & 020)
58: /* Compile with 16-bit `int'. */
59: #define TARGET_SHORT (target_flags & 040)
60:
61: /* Macro to define tables used to set the flags.
62: This is a list in braces of pairs in braces,
63: each pair being { "NAME", VALUE }
64: where VALUE is the bits to set or minus the bits to clear.
65: An empty string NAME is used to identify the default VALUE. */
66:
67: #define TARGET_SWITCHES \
68: { { "68020", 5}, \
69: { "68881", 2}, \
70: { "bitfield", 4}, \
71: { "68000", -5}, \
72: { "soft-float", -2}, \
73: { "nobitfield", -4}, \
74: { "rtd", 8}, \
75: { "nortd", -8}, \
76: { "short", 040}, \
77: { "noshort", -040}, \
78: { "", TARGET_DEFAULT}}
79: /* TARGET_DEFAULT is defined in tm-sun*.h and tm-isi68.h, etc. */
80:
81: /* target machine storage layout */
82:
83: /* Define this if most significant bit is lowest numbered
84: in instructions that operate on numbered bit-fields.
85: This is true for 68020 insns such as bfins and bfexts.
86: We make it true always by avoiding using the single-bit insns
87: except in special cases with constant bit numbers. */
88: #define BITS_BIG_ENDIAN
89:
90: /* Define this if most significant byte of a word is the lowest numbered. */
91: /* That is true on the 68000. */
92: #define BYTES_BIG_ENDIAN
93:
94: /* Define this if most significant word of a multiword number is numbered. */
95: /* For 68000 we can decide arbitrarily
96: since there are no machine instructions for them. */
97: /* #define WORDS_BIG_ENDIAN */
98:
99: /* number of bits in an addressible storage unit */
100: #define BITS_PER_UNIT 8
101:
102: /* Width in bits of a "word", which is the contents of a machine register.
103: Note that this is not necessarily the width of data type `int';
104: if using 16-bit ints on a 68000, this would still be 32.
105: But on a machine with 16-bit registers, this would be 16. */
106: #define BITS_PER_WORD 32
107:
108: /* Width of a word, in units (bytes). */
109: #define UNITS_PER_WORD 4
110:
111: /* Width in bits of a pointer.
112: See also the macro `Pmode' defined below. */
113: #define POINTER_SIZE 32
114:
115: /* Allocation boundary (in *bits*) for storing pointers in memory. */
116: #define POINTER_BOUNDARY 16
117:
118: /* Allocation boundary (in *bits*) for storing arguments in argument list. */
119: #define PARM_BOUNDARY (TARGET_SHORT ? 16 : 32)
120:
121: /* Boundary (in *bits*) on which stack pointer should be aligned. */
122: #define STACK_BOUNDARY 16
123:
124: /* Allocation boundary (in *bits*) for the code of a function. */
125: #define FUNCTION_BOUNDARY 16
126:
127: /* Alignment of field after `int : 0' in a structure. */
128: #define EMPTY_FIELD_BOUNDARY 16
129:
130: /* No data type wants to be aligned rounder than this. */
131: #define BIGGEST_ALIGNMENT 16
132:
133: /* Define this if move instructions will actually fail to work
134: when given unaligned data. */
135: #define STRICT_ALIGNMENT
136:
137: /* Define number of bits in most basic integer type.
138: (If undefined, default is BITS_PER_WORD). */
139:
140: #define INT_TYPE_SIZE (TARGET_SHORT ? 16 : 32)
141:
142: /* Standard register usage. */
143:
144: /* Number of actual hardware registers.
145: The hardware registers are assigned numbers for the compiler
146: from 0 to just below FIRST_PSEUDO_REGISTER.
147: All registers that the compiler knows about must be given numbers,
148: even those that are not normally considered general registers.
149: For the 68000, we give the data registers numbers 0-7,
150: the address registers numbers 010-017,
151: and the 68881 floating point registers numbers 020-027. */
152: #define FIRST_PSEUDO_REGISTER 24
153:
154: /* 1 for registers that have pervasive standard uses
155: and are not available for the register allocator.
156: On the 68000, only the stack pointer is such. */
157: #define FIXED_REGISTERS \
158: {0, 0, 0, 0, 0, 0, 0, 0, \
159: 0, 0, 0, 0, 0, 0, 0, 1, \
160: 0, 0, 0, 0, 0, 0, 0, 0}
161:
162: /* 1 for registers not available across function calls.
163: These must include the FIXED_REGISTERS and also any
164: registers that can be used without being saved.
165: The latter must include the registers where values are returned
166: and the register where structure-value addresses are passed.
167: Aside from that, you can include as many other registers as you like. */
168: #define CALL_USED_REGISTERS \
169: {1, 1, 0, 0, 0, 0, 0, 0, \
170: 1, 1, 0, 0, 0, 0, 0, 1, \
171: 1, 1, 0, 0, 0, 0, 0, 0}
172:
173: /* Return number of consecutive hard regs needed starting at reg REGNO
174: to hold something of mode MODE.
175: This is ordinarily the length in words of a value of mode MODE
176: but can be less for certain modes in special long registers.
177:
178: On the 68000, ordinary registers hold 32 bits worth;
179: for the 68881 registers, a single register is always enough for
180: anything that can be stored in them at all. */
181: #define HARD_REGNO_NREGS(REGNO, MODE) \
182: ((REGNO) >= 16 ? 1 \
183: : ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD))
184:
185: /* Value is 1 if hard register REGNO can hold a value of machine-mode MODE.
186: On the 68000, the cpu registers can hold any mode but the 68881 registers
187: can hold only SFmode or DFmode. And the 68881 registers can't hold anything
188: if 68881 use is disabled. */
189: #define HARD_REGNO_MODE_OK(REGNO, MODE) \
190: ((REGNO) < 16 || (TARGET_68881 && ((MODE) == SFmode || (MODE) == DFmode)))
191:
192: /* Value is 1 if it is a good idea to tie two pseudo registers
193: when one has mode MODE1 and one has mode MODE2.
194: If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2,
195: for any hard reg, then this must be 0 for correct output. */
196: #define MODES_TIEABLE_P(MODE1, MODE2) \
197: (((MODE1) == SFmode || (MODE1) == DFmode) \
198: == ((MODE2) == SFmode || (MODE2) == DFmode))
199:
200: /* Specify the registers used for certain standard purposes.
201: The values of these macros are register numbers. */
202:
203: /* m68000 pc isn't overloaded on a register. */
204: /* #define PC_REGNUM */
205:
206: /* Register to use for pushing function arguments. */
207: #define STACK_POINTER_REGNUM 15
208:
209: /* Base register for access to local variables of the function. */
210: #define FRAME_POINTER_REGNUM 14
211:
212: /* Value should be nonzero if functions must have frame pointers.
213: Zero means the frame pointer need not be set up (and parms
214: may be accessed via the stack pointer) in functions that seem suitable.
215: This is computed in `reload', in reload1.c. */
216: #define FRAME_POINTER_REQUIRED 0
217:
218: /* Base register for access to arguments of the function. */
219: #define ARG_POINTER_REGNUM 14
220:
221: /* Register in which static-chain is passed to a function. */
222: #define STATIC_CHAIN_REGNUM 8
223:
224: /* Register in which address to store a structure value
225: is passed to a function. */
226: #define STRUCT_VALUE_REGNUM 9
227:
228: /* Define the classes of registers for register constraints in the
229: machine description. Also define ranges of constants.
230:
231: One of the classes must always be named ALL_REGS and include all hard regs.
232: If there is more than one class, another class must be named NO_REGS
233: and contain no registers.
234:
235: The name GENERAL_REGS must be the name of a class (or an alias for
236: another name such as ALL_REGS). This is the class of registers
237: that is allowed by "g" or "r" in a register constraint.
238: Also, registers outside this class are allocated only when
239: instructions express preferences for them.
240:
241: The classes must be numbered in nondecreasing order; that is,
242: a larger-numbered class must never be contained completely
243: in a smaller-numbered class.
244:
245: For any two classes, it is very desirable that there be another
246: class that represents their union. */
247:
248: /* The 68000 has three kinds of registers, so eight classes would be
249: a complete set. One of them is not needed. */
250:
251: enum reg_class { NO_REGS, DATA_REGS, ADDR_REGS, GENERAL_REGS, FP_REGS, FP_OR_DATA_REGS, ALL_REGS, LIM_REG_CLASSES };
252:
253: #define N_REG_CLASSES (int) LIM_REG_CLASSES
254:
255: /* Give names of register classes as strings for dump file. */
256:
257: #define REG_CLASS_NAMES \
258: {"NO_REGS", "DATA_REGS", "ADDR_REGS", "GENERAL_REGS", \
259: "FP_REGS", "FP_OR_DATA_REGS", "ALL_REGS" }
260:
261: /* Define which registers fit in which classes.
262: This is an initializer for a vector of HARD_REG_SET
263: of length N_REG_CLASSES. */
264:
265: #define REG_CLASS_CONTENTS {0, 0xff, 0xff00, 0xffff, 0xff0000, 0xff00ff, 0xffffff}
266:
267: /* The same information, inverted:
268: Return the class number of the smallest class containing
269: reg number REGNO. This could be a conditional expression
270: or could index an array. */
271:
272: #define REGNO_REG_CLASS(REGNO) \
273: ((REGNO) >= 16 ? FP_REGS : (REGNO) < 8 ? DATA_REGS : ADDR_REGS)
274:
275: /* The class value for index registers, and the one for base regs. */
276:
277: #define INDEX_REG_CLASS GENERAL_REGS
278: #define BASE_REG_CLASS ADDR_REGS
279:
280: /* Get reg_class from a letter such as appears in the machine description. */
281:
282: #define REG_CLASS_FROM_LETTER(C) \
283: ((C) == 'a' ? ADDR_REGS : ((C) == 'd' ? DATA_REGS : ((C) == 'f' ? FP_REGS : NO_REGS)))
284:
285: /* The letters I, J, K, L and M in a register constraint string
286: can be used to stand for particular ranges of immediate operands.
287: This macro defines what the ranges are.
288: C is the letter, and VALUE is a constant value.
289: Return 1 if VALUE is in the range specified by C.
290:
291: For the 68000, `I' is used for the range 1 to 8
292: allowed as immediate shift counts and in addq.
293: `J' is used for the range of signed numbers that fit in 16 bits.
294: `K' is for numbers that moveq can't handle.
295: `L' is for range -8 to -1, range of values that can be added with subq. */
296:
297: #define CONST_OK_FOR_LETTER_P(VALUE, C) \
298: ((C) == 'I' ? (VALUE) > 0 && (VALUE) <= 8 : \
299: (C) == 'J' ? (VALUE) >= -0x8000 && (VALUE) <= 0x7FFF : \
300: (C) == 'K' ? (VALUE) < -0x80 || (VALUE) >= 0x80 : \
301: (C) == 'L' ? (VALUE) < 0 && (VALUE) >= -8 : 0)
302:
303: /* Similar, but for floating constants, and defining letters G and H.
304: Here VALUE is the CONST_DOUBLE rtx itself. */
305:
306: #define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) \
307: ((C) == 'G' ? ! (TARGET_68881 && standard_68881_constant_p (VALUE)) : 1)
308:
309: /* Given an rtx X being reloaded into a reg required to be
310: in class CLASS, return the class of reg to actually use.
311: In general this is just CLASS; but on some machines
312: in some cases it is preferable to use a more restrictive class.
313: On the 68000 series, use a data reg if possible when the
314: value is a constant in the range where moveq could be used. */
315: #define PREFERRED_RELOAD_CLASS(X,CLASS) \
316: ((GET_CODE (X) == CONST_INT \
317: && (unsigned) (INTVAL (X) + 0x80) < 0x100 \
318: && (CLASS) != ADDR_REGS) \
319: ? DATA_REGS : (CLASS))
320:
321: /* Return the maximum number of consecutive registers
322: needed to represent mode MODE in a register of class CLASS. */
323: /* On the 68000, this is the size of MODE in words,
324: except in the FP regs, where a single reg is always enough. */
325: #define CLASS_MAX_NREGS(CLASS, MODE) \
326: ((CLASS) == FP_REGS ? 1 \
327: : ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD))
328:
329: /* Stack layout; function entry, exit and calling. */
330:
331: /* Define this if pushing a word on the stack
332: makes the stack pointer a smaller address. */
333: #define STACK_GROWS_DOWNWARD
334:
335: /* Define this if the nominal address of the stack frame
336: is at the high-address end of the local variables;
337: that is, each additional local variable allocated
338: goes at a more negative offset in the frame. */
339: #define FRAME_GROWS_DOWNWARD
340:
341: /* Offset within stack frame to start allocating local variables at.
342: If FRAME_GROWS_DOWNWARD, this is the offset to the END of the
343: first local allocated. Otherwise, it is the offset to the BEGINNING
344: of the first local allocated. */
345: #define STARTING_FRAME_OFFSET 0
346:
347: /* If we generate an insn to push BYTES bytes,
348: this says how many the stack pointer really advances by.
349: On the 68000, sp@- in a byte insn really pushes a word. */
350: #define PUSH_ROUNDING(BYTES) (((BYTES) + 1) & ~1)
351:
352: /* Offset of first parameter from the argument pointer register value. */
353: #define FIRST_PARM_OFFSET 8
354:
355: /* Value is 1 if returning from a function call automatically
356: pops the arguments described by the number-of-args field in the call.
357: FUNTYPE is the data type of the function (as a tree),
358: or for a library call it is an identifier node for the subroutine name.
359:
360: On the 68000, the RTS insn cannot pop anything.
361: On the 68010, the RTD insn may be used to pop them if the number
362: of args is fixed, but if the number is variable then the caller
363: must pop them all. RTD can't be used for library calls now
364: because the library is compiled with the Unix compiler.
365: Use of RTD is a selectable option, since it is incompatible with
366: standard Unix calling sequences. If the option is not selected,
367: the caller must always pop the args. */
368:
369: #define RETURN_POPS_ARGS(FUNTYPE) \
370: (TARGET_RTD && TREE_CODE (FUNTYPE) != IDENTIFIER_NODE \
371: && (TYPE_ARG_TYPES (FUNTYPE) == 0 \
372: || TREE_VALUE (tree_last (TYPE_ARG_TYPES (FUNTYPE))) == void_type_node))
373:
374: /* Define how to find the value returned by a function.
375: VALTYPE is the data type of the value (as a tree).
376: If the precise function being called is known, FUNC is its FUNCTION_DECL;
377: otherwise, FUNC is 0. */
378:
379: /* On the 68000 the return value is in D0 regardless. */
380:
381: #define FUNCTION_VALUE(VALTYPE, FUNC) \
382: gen_rtx (REG, TYPE_MODE (VALTYPE), 0)
383:
384: /* Define how to find the value returned by a library function
385: assuming the value has mode MODE. */
386:
387: /* On the 68000 the return value is in D0 regardless. */
388:
389: #define LIBCALL_VALUE(MODE) gen_rtx (REG, MODE, 0)
390:
391: /* 1 if N is a possible register number for a function value.
392: On the 68000, d0 is the only register thus used. */
393:
394: #define FUNCTION_VALUE_REGNO_P(N) ((N) == 0)
395:
396: /* 1 if N is a possible register number for function argument passing.
397: On the 68000, no registers are used in this way. */
398:
399: #define FUNCTION_ARG_REGNO_P(N) 0
400:
401: /* Define a data type for recording info about an argument list
402: during the scan of that argument list. This data type should
403: hold all necessary information about the function itself
404: and about the args processed so far, enough to enable macros
405: such as FUNCTION_ARG to determine where the next arg should go.
406:
407: On the m68k, this is a single integer, which is a number of bytes
408: of arguments scanned so far. */
409:
410: #define CUMULATIVE_ARGS int
411:
412: /* Initialize a variable CUM of type CUMULATIVE_ARGS
413: for a call to a function whose data type is FNTYPE.
414: For a library call, FNTYPE is 0.
415:
416: On the m68k, the offset starts at 0. */
417:
418: #define INIT_CUMULATIVE_ARGS(CUM,FNTYPE) \
419: ((CUM) = 0)
420:
421: /* Update the data in CUM to advance over an argument
422: of mode MODE and data type TYPE.
423: (TYPE is null for libcalls where that information may not be available.) */
424:
425: #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \
426: ((CUM) += ((MODE) != BLKmode \
427: ? (GET_MODE_SIZE (MODE) + 3) & ~3 \
428: : (int_size_in_bytes (TYPE) + 3) & ~3))
429:
430: /* Define where to put the arguments to a function.
431: Value is zero to push the argument on the stack,
432: or a hard register in which to store the argument.
433:
434: MODE is the argument's machine mode.
435: TYPE is the data type of the argument (as a tree).
436: This is null for libcalls where that information may
437: not be available.
438: CUM is a variable of type CUMULATIVE_ARGS which gives info about
439: the preceding args and about the function being called.
440: NAMED is nonzero if this argument is a named parameter
441: (otherwise it is an extra parameter matching an ellipsis). */
442:
443: /* On the 68000 all args are pushed, except if -mregparm is specified
444: then the first two words of arguments are passed in d0, d1.
445: *NOTE* -mregparm does not work.
446: It exists only to test register calling conventions. */
447:
448: #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \
449: ((TARGET_REGPARM && (CUM) < 8) ? gen_rtx (REG, (MODE), (CUM) / 4) : 0)
450:
451: /* For an arg passed partly in registers and partly in memory,
452: this is the number of registers used.
453: For args passed entirely in registers or entirely in memory, zero. */
454:
455: #define FUNCTION_ARG_PARTIAL_NREGS(CUM, MODE, TYPE, NAMED) \
456: ((TARGET_REGPARM && (CUM) < 8 \
457: && 8 < ((CUM) + ((MODE) == BLKmode \
458: ? int_size_in_bytes (TYPE) \
459: : GET_MODE_SIZE (MODE)))) \
460: ? 2 - (CUM) / 4 : 0)
461:
462: /* This macro generates the assembly code for function entry.
463: FILE is a stdio stream to output the code to.
464: SIZE is an int: how many units of temporary storage to allocate.
465: Refer to the array `regs_ever_live' to determine which registers
466: to save; `regs_ever_live[I]' is nonzero if register number I
467: is ever used in the function. This macro is responsible for
468: knowing which registers should not be saved even if used. */
469:
470: /* Note that the order of the bit mask for fmovem is the opposite
471: of the order for movem! */
472:
473: #define FUNCTION_PROLOGUE(FILE, SIZE) \
474: { register int regno; \
475: register int mask = 0; \
476: static char *reg_names[] = REGISTER_NAMES; \
477: extern char call_used_regs[]; \
478: int fsize = (SIZE); \
479: if (frame_pointer_needed) \
480: { if (TARGET_68020 || fsize < 0x8000) \
481: fprintf (FILE, "\tlink a6,#%d\n", -fsize); \
482: else \
483: fprintf (FILE, "\tlink a6,#0\n\tsubl #%d,sp\n", fsize); } \
484: for (regno = 16; regno < FIRST_PSEUDO_REGISTER; regno++) \
485: if (regs_ever_live[regno] && ! call_used_regs[regno]) \
486: mask |= 1 << (regno - 16); \
487: if (mask != 0) \
488: fprintf (FILE, "\tfmovem #0x%x,sp@-\n", mask & 0xff); \
489: mask = 0; \
490: for (regno = 0; regno < 16; regno++) \
491: if (regs_ever_live[regno] && ! call_used_regs[regno]) \
492: mask |= 1 << (15 - regno); \
493: if (frame_pointer_needed) \
494: mask &= ~ (1 << (15-FRAME_POINTER_REGNUM)); \
495: if (exact_log2 (mask) >= 0) \
496: fprintf (FILE, "\tmovel %s,sp@-\n", reg_names[15 - exact_log2 (mask)]); \
497: else if (mask) fprintf (FILE, "\tmoveml #0x%x,sp@-\n", mask); }
498:
499: /* Output assembler code to FILE to increment profiler label # LABELNO
500: for profiling a function entry. */
501:
502: #define FUNCTION_PROFILER(FILE, LABELNO) \
503: fprintf (FILE, "\tlea LP%d,a0\n\tjsr mcount\n", (LABELNO));
504:
505: /* EXIT_IGNORE_STACK should be nonzero if, when returning from a function,
506: the stack pointer does not matter. The value is tested only in
507: functions that have frame pointers.
508: No definition is equivalent to always zero. */
509:
510: #define EXIT_IGNORE_STACK 1
511:
512: /* This macro generates the assembly code for function exit,
513: on machines that need it. If FUNCTION_EPILOGUE is not defined
514: then individual return instructions are generated for each
515: return statement. Args are same as for FUNCTION_PROLOGUE.
516:
517: The function epilogue should not depend on the current stack pointer!
518: It should use the frame pointer only. This is mandatory because
519: of alloca; we also take advantage of it to omit stack adjustments
520: before returning. */
521:
522: #define FUNCTION_EPILOGUE(FILE, SIZE) \
523: { register int regno; \
524: register int mask, fmask; \
525: register int nregs; \
526: int offset, foffset; \
527: extern char call_used_regs[]; \
528: static char *reg_names[] = REGISTER_NAMES; \
529: extern int current_function_pops_args; \
530: extern int current_function_args_size; \
531: int fsize = (SIZE); \
532: int big = 0; \
533: nregs = 0; fmask = 0; \
534: for (regno = 16; regno < FIRST_PSEUDO_REGISTER; regno++) \
535: if (regs_ever_live[regno] && ! call_used_regs[regno]) \
536: { nregs++; fmask |= 1 << (23 - regno); } \
537: foffset = nregs * 12; \
538: nregs = 0; mask = 0; \
539: if (frame_pointer_needed) regs_ever_live[FRAME_POINTER_REGNUM] = 0; \
540: for (regno = 0; regno < 16; regno++) \
541: if (regs_ever_live[regno] && ! call_used_regs[regno]) \
542: { nregs++; mask |= 1 << regno; } \
543: offset = foffset + nregs * 4; \
544: if (offset + fsize >= 0x8000 && frame_pointer_needed && (mask || fmask)) \
545: { fprintf (FILE, "\tmovel #%d,a0\n", -fsize); \
546: fsize = 0, big = 1; } \
547: if (exact_log2 (mask) >= 0) { \
548: if (big) \
549: fprintf (FILE, "\tmovel a6@(-%d,a0:l),%s\n", \
550: offset + fsize, reg_names[exact_log2 (mask)]); \
551: else if (! frame_pointer_needed) \
552: fprintf (FILE, "\tmovel sp@+,%s\n", \
553: reg_names[exact_log2 (mask)]); \
554: else \
555: fprintf (FILE, "\tmovel a6@(-%d),%s\n", \
556: offset + fsize, reg_names[exact_log2 (mask)]); } \
557: else if (mask) { \
558: if (big) \
559: fprintf (FILE, "\tmoveml a6@(-%d,a0:l),#0x%x\n", \
560: offset + fsize, mask); \
561: else if (! frame_pointer_needed) \
562: fprintf (FILE, "\tmoveml sp@+,#0x%x\n", mask); \
563: else \
564: fprintf (FILE, "\tmoveml a6@(-%d),#0x%x\n", \
565: offset + fsize, mask); } \
566: if (fmask) { \
567: if (big) \
568: fprintf (FILE, "\tfmovem a6@(-%d,a0:l),#0x%x\n", \
569: foffset + fsize, fmask); \
570: else if (! frame_pointer_needed) \
571: fprintf (FILE, "\tfmovem sp@+,#0x%x\n", fmask); \
572: else \
573: fprintf (FILE, "\tfmovem a6@(-%d),#0x%x\n", \
574: foffset + fsize, fmask); } \
575: if (frame_pointer_needed) \
576: fprintf (FILE, "\tunlk a6\n"); \
577: if (current_function_pops_args && current_function_args_size) \
578: fprintf (FILE, "\trtd #%d\n", current_function_args_size); \
579: else fprintf (FILE, "\trts\n"); }
580:
581: /* If the memory address ADDR is relative to the frame pointer,
582: correct it to be relative to the stack pointer instead.
583: This is for when we don't use a frame pointer.
584: ADDR should be a variable name. */
585:
586: #define FIX_FRAME_POINTER_ADDRESS(ADDR,DEPTH) \
587: { int offset = -1; \
588: if (ADDR == frame_pointer_rtx) \
589: offset = 0; \
590: else if (GET_CODE (ADDR) == PLUS && XEXP (ADDR, 0) == frame_pointer_rtx \
591: && GET_CODE (XEXP (ADDR, 1)) == CONST_INT) \
592: offset = INTVAL (XEXP (ADDR, 1)); \
593: if (offset >= 0) \
594: { int regno; \
595: extern char call_used_regs[]; \
596: for (regno = 16; regno < FIRST_PSEUDO_REGISTER; regno++) \
597: if (regs_ever_live[regno] && ! call_used_regs[regno]) \
598: offset += 12; \
599: for (regno = 0; regno < 16; regno++) \
600: if (regs_ever_live[regno] && ! call_used_regs[regno]) \
601: offset += 4; \
602: offset -= 4; \
603: ADDR = plus_constant (stack_pointer_rtx, offset + (DEPTH)); } }
604:
605: /* Addressing modes, and classification of registers for them. */
606:
607: #define HAVE_POST_INCREMENT
608: /* #define HAVE_POST_DECREMENT */
609:
610: #define HAVE_PRE_DECREMENT
611: /* #define HAVE_PRE_INCREMENT */
612:
613: /* Macros to check register numbers against specific register classes. */
614:
615: /* These assume that REGNO is a hard or pseudo reg number.
616: They give nonzero only if REGNO is a hard reg of the suitable class
617: or a pseudo reg currently allocated to a suitable hard reg.
618: Since they use reg_renumber, they are safe only once reg_renumber
619: has been allocated, which happens in local-alloc.c. */
620:
621: #define REGNO_OK_FOR_INDEX_P(REGNO) \
622: ((REGNO) < 16 || (unsigned) reg_renumber[REGNO] < 16)
623: #define REGNO_OK_FOR_BASE_P(REGNO) \
624: (((REGNO) ^ 010) < 8 || (unsigned) (reg_renumber[REGNO] ^ 010) < 8)
625: #define REGNO_OK_FOR_DATA_P(REGNO) \
626: ((REGNO) < 8 || (unsigned) reg_renumber[REGNO] < 8)
627: #define REGNO_OK_FOR_FP_P(REGNO) \
628: (((REGNO) ^ 020) < 8 || (unsigned) (reg_renumber[REGNO] ^ 020) < 8)
629:
630: /* Now macros that check whether X is a register and also,
631: strictly, whether it is in a specified class.
632:
633: These macros are specific to the 68000, and may be used only
634: in code for printing assembler insns and in conditions for
635: define_optimization. */
636:
637: /* 1 if X is a data register. */
638:
639: #define DATA_REG_P(X) (REG_P (X) && REGNO_OK_FOR_DATA_P (REGNO (X)))
640:
641: /* 1 if X is an fp register. */
642:
643: #define FP_REG_P(X) (REG_P (X) && REGNO_OK_FOR_FP_P (REGNO (X)))
644:
645: /* 1 if X is an address register */
646:
647: #define ADDRESS_REG_P(X) (REG_P (X) && REGNO_OK_FOR_BASE_P (REGNO (X)))
648:
649: /* Maximum number of registers that can appear in a valid memory address. */
650:
651: #define MAX_REGS_PER_ADDRESS 2
652:
653: /* Recognize any constant value that is a valid address. */
654:
655: #define CONSTANT_ADDRESS_P(X) CONSTANT_P (X)
656:
657: /* Nonzero if the constant value X is a legitimate general operand.
658: It is given that X satisfies CONSTANT_P or is a CONST_DOUBLE. */
659:
660: #define LEGITIMATE_CONSTANT_P(X) 1
661:
662: /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx
663: and check its validity for a certain class.
664: We have two alternate definitions for each of them.
665: The usual definition accepts all pseudo regs; the other rejects
666: them unless they have been allocated suitable hard regs.
667: The symbol REG_OK_STRICT causes the latter definition to be used.
668:
669: Most source files want to accept pseudo regs in the hope that
670: they will get allocated to the class that the insn wants them to be in.
671: Source files for reload pass need to be strict.
672: After reload, it makes no difference, since pseudo regs have
673: been eliminated by then. */
674:
675: #ifndef REG_OK_STRICT
676:
677: /* Nonzero if X is a hard reg that can be used as an index
678: or if it is a pseudo reg. */
679: #define REG_OK_FOR_INDEX_P(X) ((REGNO (X) ^ 020) >= 8)
680: /* Nonzero if X is a hard reg that can be used as a base reg
681: or if it is a pseudo reg. */
682: #define REG_OK_FOR_BASE_P(X) ((REGNO (X) & ~027) != 0)
683:
684: #else
685:
686: /* Nonzero if X is a hard reg that can be used as an index. */
687: #define REG_OK_FOR_INDEX_P(X) REGNO_OK_FOR_INDEX_P (REGNO (X))
688: /* Nonzero if X is a hard reg that can be used as a base reg. */
689: #define REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P (REGNO (X))
690:
691: #endif
692:
693: /* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression
694: that is a valid memory address for an instruction.
695: The MODE argument is the machine mode for the MEM expression
696: that wants to use this address.
697:
698: The other macros defined here are used only in GO_IF_LEGITIMATE_ADDRESS. */
699:
700: #define INDIRECTABLE_1_ADDRESS_P(X) \
701: (CONSTANT_ADDRESS_P (X) \
702: || (GET_CODE (X) == REG && REG_OK_FOR_BASE_P (X)) \
703: || ((GET_CODE (X) == PRE_DEC || GET_CODE (X) == POST_INC) \
704: && REG_P (XEXP (X, 0)) \
705: && REG_OK_FOR_BASE_P (XEXP (X, 0))) \
706: || (GET_CODE (X) == PLUS \
707: && REG_P (XEXP (X, 0)) && REG_OK_FOR_BASE_P (XEXP (X, 0)) \
708: && GET_CODE (XEXP (X, 1)) == CONST_INT \
709: && ((unsigned) INTVAL (XEXP (X, 1)) + 0x8000) < 0x10000))
710:
711: #if 0
712: /* This should replace the last two lines
713: except that Sun's assembler does not seem to handle such operands. */
714: && (TARGET_68020 ? CONSTANT_ADDRESS_P (XEXP (X, 1)) \
715: : (GET_CODE (XEXP (X, 1)) == CONST_INT \
716: && ((unsigned) INTVAL (XEXP (X, 1)) + 0x8000) < 0x10000))))
717: #endif
718:
719:
720: #define GO_IF_NONINDEXED_ADDRESS(X, ADDR) \
721: { if (INDIRECTABLE_1_ADDRESS_P (X)) goto ADDR; }
722:
723: #define GO_IF_INDEXABLE_BASE(X, ADDR) \
724: { if (GET_CODE (X) == LABEL_REF) goto ADDR; \
725: if (GET_CODE (X) == REG && REG_OK_FOR_BASE_P (X)) goto ADDR; }
726:
727: #define GO_IF_INDEXING(X, ADDR) \
728: { if (GET_CODE (X) == PLUS && LEGITIMATE_INDEX_P (XEXP (X, 0))) \
729: { GO_IF_INDEXABLE_BASE (XEXP (X, 1), ADDR); } \
730: if (GET_CODE (X) == PLUS && LEGITIMATE_INDEX_P (XEXP (X, 1))) \
731: { GO_IF_INDEXABLE_BASE (XEXP (X, 0), ADDR); } }
732:
733: #define GO_IF_INDEXED_ADDRESS(X, ADDR) \
734: { GO_IF_INDEXING (X, ADDR); \
735: if (GET_CODE (X) == PLUS) \
736: { if (GET_CODE (XEXP (X, 1)) == CONST_INT \
737: && (unsigned) INTVAL (XEXP (X, 1)) + 0x80 < 0x100) \
738: { rtx go_temp = XEXP (X, 0); GO_IF_INDEXING (go_temp, ADDR); } \
739: if (GET_CODE (XEXP (X, 0)) == CONST_INT \
740: && (unsigned) INTVAL (XEXP (X, 0)) + 0x80 < 0x100) \
741: { rtx go_temp = XEXP (X, 1); GO_IF_INDEXING (go_temp, ADDR); } } }
742:
743: #define LEGITIMATE_INDEX_REG_P(X) \
744: ((GET_CODE (X) == REG && REG_OK_FOR_INDEX_P (X)) \
745: || (GET_CODE (X) == SIGN_EXTEND \
746: && GET_CODE (XEXP (X, 0)) == REG \
747: && GET_MODE (XEXP (X, 0)) == HImode \
748: && REG_OK_FOR_INDEX_P (XEXP (X, 0))))
749:
750: #define LEGITIMATE_INDEX_P(X) \
751: (LEGITIMATE_INDEX_REG_P (X) \
752: || (TARGET_68020 && GET_CODE (X) == MULT \
753: && LEGITIMATE_INDEX_REG_P (XEXP (X, 0)) \
754: && GET_CODE (XEXP (X, 1)) == CONST_INT \
755: && (INTVAL (XEXP (X, 1)) == 2 \
756: || INTVAL (XEXP (X, 1)) == 4 \
757: || INTVAL (XEXP (X, 1)) == 8)))
758:
759: #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \
760: { GO_IF_NONINDEXED_ADDRESS (X, ADDR); \
761: GO_IF_INDEXED_ADDRESS (X, ADDR); }
762:
763: /* Try machine-dependent ways of modifying an illegitimate address
764: to be legitimate. If we find one, return the new, valid address.
765: This macro is used in only one place: `memory_address' in explow.c.
766:
767: OLDX is the address as it was before break_out_memory_refs was called.
768: In some cases it is useful to look at this to decide what needs to be done.
769:
770: MODE and WIN are passed so that this macro can use
771: GO_IF_LEGITIMATE_ADDRESS.
772:
773: It is always safe for this macro to do nothing. It exists to recognize
774: opportunities to optimize the output.
775:
776: For the 68000, we handle X+REG by loading X into a register R and
777: using R+REG. R will go in an address reg and indexing will be used.
778: However, if REG is a broken-out memory address or multiplication,
779: nothing needs to be done because REG can certainly go in an address reg. */
780:
781: #define LEGITIMIZE_ADDRESS(X,OLDX,MODE,WIN) \
782: { register int ch = (X) != (OLDX); \
783: if (GET_CODE (X) == PLUS) \
784: { if (GET_CODE (XEXP (X, 0)) == MULT) \
785: ch = 1, XEXP (X, 0) = force_operand (XEXP (X, 0), 0); \
786: if (GET_CODE (XEXP (X, 1)) == MULT) \
787: ch = 1, XEXP (X, 1) = force_operand (XEXP (X, 1), 0); \
788: if (ch && GET_CODE (XEXP (X, 1)) == REG \
789: && GET_CODE (XEXP (X, 0)) == REG) \
790: return X; \
791: if (ch) { GO_IF_LEGITIMATE_ADDRESS (MODE, X, WIN); } \
792: if (GET_CODE (XEXP (X, 0)) == REG \
793: || (GET_CODE (XEXP (X, 0)) == SIGN_EXTEND \
794: && GET_CODE (XEXP (XEXP (X, 0), 0)) == REG \
795: && GET_MODE (XEXP (XEXP (X, 0), 0)) == HImode)) \
796: { register rtx temp = gen_reg_rtx (Pmode); \
797: register rtx val = force_operand (XEXP (X, 1), temp); \
798: if (val != temp) emit_move_insn (temp, val); \
799: XEXP (X, 1) = temp; \
800: return X; } \
801: else if (GET_CODE (XEXP (X, 1)) == REG \
802: || (GET_CODE (XEXP (X, 1)) == SIGN_EXTEND \
803: && GET_CODE (XEXP (XEXP (X, 1), 0)) == REG \
804: && GET_MODE (XEXP (XEXP (X, 1), 0)) == HImode)) \
805: { register rtx temp = gen_reg_rtx (Pmode); \
806: register rtx val = force_operand (XEXP (X, 0), temp); \
807: if (val != temp) emit_move_insn (temp, val); \
808: XEXP (X, 0) = temp; \
809: return X; }}}
810:
811: /* Go to LABEL if ADDR (a legitimate address expression)
812: has an effect that depends on the machine mode it is used for.
813: On the 68000, only predecrement and postincrement address depend thus
814: (the amount of decrement or increment being the length of the operand). */
815:
816: #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR,LABEL) \
817: if (GET_CODE (ADDR) == POST_INC || GET_CODE (ADDR) == PRE_DEC) goto LABEL
818:
819: /* Specify the machine mode that this machine uses
820: for the index in the tablejump instruction. */
821: #define CASE_VECTOR_MODE HImode
822:
823: /* Define this if the tablejump instruction expects the table
824: to contain offsets from the address of the table.
825: Do not define this if the table should contain absolute addresses. */
826: #define CASE_VECTOR_PC_RELATIVE
827:
828: /* Specify the tree operation to be used to convert reals to integers. */
829: #define IMPLICIT_FIX_EXPR FIX_ROUND_EXPR
830:
831: /* This is the kind of divide that is easiest to do in the general case. */
832: #define EASY_DIV_EXPR TRUNC_DIV_EXPR
833:
834: /* Define this as 1 if `char' should by default be signed; else as 0. */
835: #define DEFAULT_SIGNED_CHAR 1
836:
837: /* Max number of bytes we can move from memory to memory
838: in one reasonably fast instruction. */
839: #define MOVE_MAX 4
840:
841: /* Define this if zero-extension is slow (more than one real instruction). */
842: #define SLOW_ZERO_EXTEND
843:
844: /* Nonzero if access to memory by bytes is slow and undesirable. */
845: #define SLOW_BYTE_ACCESS 0
846:
847: /* Define if shifts truncate the shift count
848: which implies one can omit a sign-extension or zero-extension
849: of a shift count. */
850: #define SHIFT_COUNT_TRUNCATED
851:
852: /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits
853: is done just by pretending it is already truncated. */
854: #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
855:
856: /* We assume that the store-condition-codes instructions store 0 for false
857: and some other value for true. This is the value stored for true. */
858:
859: #define STORE_FLAG_VALUE -1
860:
861: /* Specify the machine mode that pointers have.
862: After generation of rtl, the compiler makes no further distinction
863: between pointers and any other objects of this machine mode. */
864: #define Pmode SImode
865:
866: /* A function address in a call instruction
867: is a byte address (for indexing purposes)
868: so give the MEM rtx a byte's mode. */
869: #define FUNCTION_MODE QImode
870:
871: /* Compute the cost of computing a constant rtl expression RTX
872: whose rtx-code is CODE. The body of this macro is a portion
873: of a switch statement. If the code is computed here,
874: return it with a return statement. Otherwise, break from the switch. */
875:
876: #define CONST_COSTS(RTX,CODE) \
877: case CONST_INT: \
878: /* Constant zero is super cheap due to clr instruction. */ \
879: if (RTX == const0_rtx) return 0; \
880: if ((unsigned) INTVAL (RTX) < 077) return 1; \
881: case CONST: \
882: case LABEL_REF: \
883: case SYMBOL_REF: \
884: return 3; \
885: case CONST_DOUBLE: \
886: return 5;
887:
888: /* Tell final.c how to eliminate redundant test instructions. */
889:
890: /* Here we define machine-dependent flags and fields in cc_status
891: (see `conditions.h'). */
892:
893: /* Set if the cc value is actually in the 68881, so a floating point
894: conditional branch must be output. */
895: #define CC_IN_68881 040
896:
897: /* Store in cc_status the expressions
898: that the condition codes will describe
899: after execution of an instruction whose pattern is EXP.
900: Do not alter them if the instruction would not alter the cc's. */
901:
902: /* On the 68000, all the insns to store in an address register
903: fail to set the cc's. However, in some cases these instructions
904: can make it possibly invalid to use the saved cc's. In those
905: cases we clear out some or all of the saved cc's so they won't be used. */
906:
907: #define NOTICE_UPDATE_CC(EXP) \
908: { if (GET_CODE (EXP) == SET) \
909: { if (ADDRESS_REG_P (XEXP (EXP, 0))) \
910: { if (cc_status.value1 \
911: && reg_mentioned_p (XEXP (EXP, 0), cc_status.value1)) \
912: cc_status.value1 = 0; \
913: if (cc_status.value2 \
914: && reg_mentioned_p (XEXP (EXP, 0), cc_status.value2)) \
915: cc_status.value2 = 0; } \
916: else if (!FP_REG_P (XEXP (EXP, 0)) \
917: && XEXP (EXP, 0) != cc0_rtx \
918: && (FP_REG_P (XEXP (EXP, 1)) \
919: || GET_CODE (XEXP (EXP, 1)) == FIX \
920: || GET_CODE (XEXP (EXP, 1)) == FLOAT_TRUNCATE \
921: || GET_CODE (XEXP (EXP, 1)) == FLOAT_EXTEND)) \
922: { CC_STATUS_INIT; } \
923: else if (GET_CODE (SET_SRC (EXP)) == CALL) \
924: { CC_STATUS_INIT; } \
925: else if (XEXP (EXP, 0) != pc_rtx) \
926: { cc_status.flags = 0; \
927: cc_status.value1 = XEXP (EXP, 0); \
928: cc_status.value2 = XEXP (EXP, 1); } } \
929: else if (GET_CODE (EXP) == PARALLEL \
930: && GET_CODE (XVECEXP (EXP, 0, 0)) == SET) \
931: { if (ADDRESS_REG_P (XEXP (XVECEXP (EXP, 0, 0), 0))) \
932: CC_STATUS_INIT; \
933: else if (XEXP (XVECEXP (EXP, 0, 0), 0) != pc_rtx) \
934: { cc_status.flags = 0; \
935: cc_status.value1 = XEXP (XVECEXP (EXP, 0, 0), 0); \
936: cc_status.value2 = XEXP (XVECEXP (EXP, 0, 0), 1); } } \
937: else CC_STATUS_INIT; \
938: if (cc_status.value2 != 0 \
939: && ADDRESS_REG_P (cc_status.value2) \
940: && GET_MODE (cc_status.value2) == QImode) \
941: CC_STATUS_INIT; \
942: if (cc_status.value2 != 0) \
943: switch (GET_CODE (cc_status.value2)) \
944: { case PLUS: case MINUS: case MULT: case UMULT: \
945: case DIV: case UDIV: case MOD: case UMOD: case NEG: \
946: case ASHIFT: case LSHIFT: case ASHIFTRT: case LSHIFTRT: \
947: case ROTATE: case ROTATERT: \
948: if (GET_MODE (cc_status.value2) != VOIDmode) \
949: cc_status.flags |= CC_NO_OVERFLOW; \
950: break; \
951: case ZERO_EXTEND: \
952: /* (SET r1 (ZERO_EXTEND r2)) on this machine
953: ends with a move insn moving r2 in r2's mode.
954: Thus, the cc's are set for r2.
955: This can set N bit spuriously. */ \
956: cc_status.flags |= CC_NOT_NEGATIVE; } \
957: if (cc_status.value1 && GET_CODE (cc_status.value1) == REG \
958: && cc_status.value2 \
959: && reg_mentioned_p (cc_status.value1, cc_status.value2)) \
960: cc_status.value2 = 0; \
961: if ((cc_status.value1 && FP_REG_P (cc_status.value1)) \
962: || (cc_status.value2 && FP_REG_P (cc_status.value2))) \
963: cc_status.flags = CC_IN_68881; }
964:
965: #define OUTPUT_JUMP(NORMAL, FLOAT, NO_OV) \
966: { if (cc_prev_status.flags & CC_IN_68881) \
967: return FLOAT; \
968: if (cc_prev_status.flags & CC_NO_OVERFLOW) \
969: return NO_OV; \
970: return NORMAL; }
971:
972: /* Control the assembler format that we output. */
973:
974: /* Output at beginning of assembler file. */
975:
976: #define ASM_FILE_START "#NO_APP\n"
977:
978: /* Output to assembler file text saying following lines
979: may contain character constants, extra white space, comments, etc. */
980:
981: #define ASM_APP_ON "#APP\n"
982:
983: /* Output to assembler file text saying following lines
984: no longer contain unusual constructs. */
985:
986: #define ASM_APP_OFF "#NO_APP\n"
987:
988: /* Output before read-only data. */
989:
990: #define TEXT_SECTION_ASM_OP ".text"
991:
992: /* Output before writable data. */
993:
994: #define DATA_SECTION_ASM_OP ".data"
995:
996: /* How to refer to registers in assembler output.
997: This sequence is indexed by compiler's hard-register-number (see above). */
998:
999: #define REGISTER_NAMES \
1000: {"d0", "d1", "d2", "d3", "d4", "d5", "d6", "d7", \
1001: "a0", "a1", "a2", "a3", "a4", "a5", "a6", "sp", \
1002: "fp0", "fp1", "fp2", "fp3", "fp4", "fp5", "fp6", "fp7"}
1003:
1004: /* How to renumber registers for dbx and gdb.
1005: On the Sun-3, the floating point registers have numbers
1006: 18 to 25, not 16 to 23 as they do in the compiler. */
1007:
1008: #define DBX_REGISTER_NUMBER(REGNO) ((REGNO) < 16 ? (REGNO) : (REGNO) + 2)
1009:
1010: /* This is how to output the definition of a user-level label named NAME,
1011: such as the label on a static function or variable NAME. */
1012:
1013: #define ASM_OUTPUT_LABEL(FILE,NAME) \
1014: do { assemble_name (FILE, NAME); fputs (":\n", FILE); } while (0)
1015:
1016: /* This is how to output a command to make the user-level label named NAME
1017: defined for reference from other files. */
1018:
1019: #define ASM_GLOBALIZE_LABEL(FILE,NAME) \
1020: do { fputs (".globl ", FILE); assemble_name (FILE, NAME); fputs ("\n", FILE);} while (0)
1021:
1022: /* This is how to output a reference to a user-level label named NAME.
1023: `assemble_name' uses this. */
1024:
1025: #define ASM_OUTPUT_LABELREF(FILE,NAME) \
1026: fprintf (FILE, "_%s", NAME)
1027:
1028: /* This is how to output an internal numbered label where
1029: PREFIX is the class of label and NUM is the number within the class. */
1030:
1031: #define ASM_OUTPUT_INTERNAL_LABEL(FILE,PREFIX,NUM) \
1032: fprintf (FILE, "%s%d:\n", PREFIX, NUM)
1033:
1034: /* This is how to store into the string LABEL
1035: the symbol_ref name of an internal numbered label where
1036: PREFIX is the class of label and NUM is the number within the class.
1037: This is suitable for output with `assemble_name'. */
1038:
1039: #define ASM_GENERATE_INTERNAL_LABEL(LABEL,PREFIX,NUM) \
1040: sprintf (LABEL, "*%s%d", PREFIX, NUM)
1041:
1042: /* This is how to output an assembler line defining a `double' constant. */
1043:
1044: #define ASM_OUTPUT_DOUBLE(FILE,VALUE) \
1045: fprintf (FILE, "\t.double 0r%.20g\n", (VALUE))
1046:
1047: /* This is how to output an assembler line defining a `float' constant. */
1048:
1049: #define ASM_OUTPUT_FLOAT(FILE,VALUE) \
1050: do { union { float f; long l;} tem; \
1051: tem.f = (VALUE); \
1052: fprintf (FILE, "\t.long 0x%x\n", tem.l); \
1053: } while (0)
1054:
1055: /* This is how to output an assembler line defining an `int' constant. */
1056:
1057: #define ASM_OUTPUT_INT(FILE,VALUE) \
1058: ( fprintf (FILE, "\t.long "), \
1059: output_addr_const (FILE, (VALUE)), \
1060: fprintf (FILE, "\n"))
1061:
1062: /* Likewise for `char' and `short' constants. */
1063:
1064: #define ASM_OUTPUT_SHORT(FILE,VALUE) \
1065: ( fprintf (FILE, "\t.word "), \
1066: output_addr_const (FILE, (VALUE)), \
1067: fprintf (FILE, "\n"))
1068:
1069: #define ASM_OUTPUT_CHAR(FILE,VALUE) \
1070: ( fprintf (FILE, "\t.byte "), \
1071: output_addr_const (FILE, (VALUE)), \
1072: fprintf (FILE, "\n"))
1073:
1074: /* This is how to output an assembler line for a numeric constant byte. */
1075:
1076: #define ASM_OUTPUT_BYTE(FILE,VALUE) \
1077: fprintf (FILE, "\t.byte 0x%x\n", (VALUE))
1078:
1079: /* This is how to output an element of a case-vector that is absolute.
1080: (The 68000 does not use such vectors,
1081: but we must define this macro anyway.) */
1082:
1083: #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \
1084: fprintf (FILE, "\t.long L%d\n", VALUE)
1085:
1086: /* This is how to output an element of a case-vector that is relative. */
1087:
1088: #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, VALUE, REL) \
1089: fprintf (FILE, "\t.word L%d-L%d\n", VALUE, REL)
1090:
1091: /* This is how to output an assembler line
1092: that says to advance the location counter
1093: to a multiple of 2**LOG bytes. */
1094:
1095: #define ASM_OUTPUT_ALIGN(FILE,LOG) \
1096: if ((LOG) == 1) \
1097: fprintf (FILE, "\t.even\n"); \
1098: else if ((LOG) != 0) \
1099: abort ();
1100:
1101: #define ASM_OUTPUT_SKIP(FILE,SIZE) \
1102: fprintf (FILE, "\t.skip %d\n", (SIZE))
1103:
1104: /* This says how to output an assembler line
1105: to define a global common symbol. */
1106:
1107: #define ASM_OUTPUT_COMMON(FILE, NAME, SIZE) \
1108: ( fputs (".comm ", (FILE)), \
1109: assemble_name ((FILE), (NAME)), \
1110: fprintf ((FILE), ",%d\n", (SIZE)))
1111:
1112: /* This says how to output an assembler line
1113: to define a local common symbol. */
1114:
1115: #define ASM_OUTPUT_LOCAL(FILE, NAME, SIZE) \
1116: ( fputs (".lcomm ", (FILE)), \
1117: assemble_name ((FILE), (NAME)), \
1118: fprintf ((FILE), ",%d\n", (SIZE)))
1119:
1120: /* Store in OUTPUT a string (made with alloca) containing
1121: an assembler-name for a local static variable named NAME.
1122: LABELNO is an integer which is different for each call. */
1123:
1124: #define ASM_FORMAT_PRIVATE_NAME(OUTPUT, NAME, LABELNO) \
1125: ( (OUTPUT) = (char *) alloca (strlen ((NAME)) + 10), \
1126: sprintf ((OUTPUT), "%s.%d", (NAME), (LABELNO)))
1127:
1128: /* Define the parentheses used to group arithmetic operations
1129: in assembler code. */
1130:
1131: #define ASM_OPEN_PAREN "("
1132: #define ASM_CLOSE_PAREN ")"
1133:
1134: /* Define results of standard character escape sequences. */
1135: #define TARGET_BELL 007
1136: #define TARGET_BS 010
1137: #define TARGET_TAB 011
1138: #define TARGET_NEWLINE 012
1139: #define TARGET_VT 013
1140: #define TARGET_FF 014
1141: #define TARGET_CR 015
1142:
1143: /* Print operand X (an rtx) in assembler syntax to file FILE.
1144: CODE is a letter or dot (`z' in `%z0') or 0 if no letter was specified.
1145: For `%' followed by punctuation, CODE is the punctuation and X is null.
1146:
1147: On the 68000, we use several CODE characters:
1148: 'f' for float insn (print a CONST_DOUBLE as a float rather than in hex)
1149: 'b' for byte insn (no effect, on the Sun; this is for the ISI).
1150: '.' for dot needed in Motorola-style opcode names.
1151: '-' for an operand pushing on the stack:
1152: sp@-, -(sp) or -(%sp) depending on the style of syntax.
1153: '+' for an operand pushing on the stack:
1154: sp@+, (sp)+ or (%sp)+ depending on the style of syntax.
1155: 's' for a reference to the top word on the stack:
1156: sp@, (sp) or (%sp) depending on the style of syntax.
1157: '#' for an immediate operand prefix (# in MIT and Motorola syntax
1158: but & in SGS syntax).
1159: '!' for the cc register (used in an `and to cc' insn). */
1160:
1161: #define PRINT_OPERAND(FILE, X, CODE) \
1162: { if (CODE == '.') ; \
1163: else if (CODE == '#') fprintf (FILE, "#"); \
1164: else if (CODE == '-') fprintf (FILE, "sp@-"); \
1165: else if (CODE == '+') fprintf (FILE, "sp@+"); \
1166: else if (CODE == 's') fprintf (FILE, "sp@"); \
1167: else if (CODE == '!') fprintf (FILE, "cc"); \
1168: else if (GET_CODE (X) == REG) \
1169: fprintf (FILE, "%s", reg_name [REGNO (X)]); \
1170: else if (GET_CODE (X) == MEM) \
1171: output_address (XEXP (X, 0)); \
1172: else if (GET_CODE (X) == CONST_DOUBLE && GET_MODE (X) == SFmode) \
1173: { union { double d; int i[2]; } u; \
1174: union { float f; int i; } u1; \
1175: u.i[0] = XINT (X, 0); u.i[1] = XINT (X, 1); \
1176: u1.f = u.d; \
1177: if (CODE == 'f') \
1178: fprintf (FILE, "#0r%.9g", u1.f); \
1179: else \
1180: fprintf (FILE, "#0x%x", u1.i); } \
1181: else if (GET_CODE (X) == CONST_DOUBLE) \
1182: { union { double d; int i[2]; } u; \
1183: u.i[0] = XINT (X, 0); u.i[1] = XINT (X, 1); \
1184: fprintf (FILE, "#0r%.20g", u.d); } \
1185: else { putc ('#', FILE); output_addr_const (FILE, X); }}
1186:
1187: /* Note that this contains a kludge that knows that the only reason
1188: we have an address (plus (label_ref...) (reg...))
1189: is in the insn before a tablejump, and we know that m68k.md
1190: generates a label LInnn: on such an insn. */
1191: #define PRINT_OPERAND_ADDRESS(FILE, ADDR) \
1192: { register rtx reg1, reg2, breg, ireg; \
1193: register rtx addr = ADDR; \
1194: rtx offset; \
1195: switch (GET_CODE (addr)) \
1196: { \
1197: case REG: \
1198: fprintf (FILE, "%s@", reg_name [REGNO (addr)]); \
1199: break; \
1200: case PRE_DEC: \
1201: fprintf (FILE, "%s@-", reg_name [REGNO (XEXP (addr, 0))]); \
1202: break; \
1203: case POST_INC: \
1204: fprintf (FILE, "%s@+", reg_name [REGNO (XEXP (addr, 0))]); \
1205: break; \
1206: case PLUS: \
1207: reg1 = 0; reg2 = 0; \
1208: ireg = 0; breg = 0; \
1209: offset = 0; \
1210: if (CONSTANT_ADDRESS_P (XEXP (addr, 0))) \
1211: { \
1212: offset = XEXP (addr, 0); \
1213: addr = XEXP (addr, 1); \
1214: } \
1215: else if (CONSTANT_ADDRESS_P (XEXP (addr, 1))) \
1216: { \
1217: offset = XEXP (addr, 1); \
1218: addr = XEXP (addr, 0); \
1219: } \
1220: if (GET_CODE (addr) != PLUS) ; \
1221: else if (GET_CODE (XEXP (addr, 0)) == SIGN_EXTEND) \
1222: { \
1223: reg1 = XEXP (addr, 0); \
1224: addr = XEXP (addr, 1); \
1225: } \
1226: else if (GET_CODE (XEXP (addr, 1)) == SIGN_EXTEND) \
1227: { \
1228: reg1 = XEXP (addr, 1); \
1229: addr = XEXP (addr, 0); \
1230: } \
1231: else if (GET_CODE (XEXP (addr, 0)) == MULT) \
1232: { \
1233: reg1 = XEXP (addr, 0); \
1234: addr = XEXP (addr, 1); \
1235: } \
1236: else if (GET_CODE (XEXP (addr, 1)) == MULT) \
1237: { \
1238: reg1 = XEXP (addr, 1); \
1239: addr = XEXP (addr, 0); \
1240: } \
1241: else if (GET_CODE (XEXP (addr, 0)) == REG) \
1242: { \
1243: reg1 = XEXP (addr, 0); \
1244: addr = XEXP (addr, 1); \
1245: } \
1246: else if (GET_CODE (XEXP (addr, 1)) == REG) \
1247: { \
1248: reg1 = XEXP (addr, 1); \
1249: addr = XEXP (addr, 0); \
1250: } \
1251: if (GET_CODE (addr) == REG || GET_CODE (addr) == MULT \
1252: || GET_CODE (addr) == SIGN_EXTEND) \
1253: { if (reg1 == 0) reg1 = addr; else reg2 = addr; addr = 0; } \
1254: /* for OLD_INDEXING \
1255: else if (GET_CODE (addr) == PLUS) \
1256: { \
1257: if (GET_CODE (XEXP (addr, 0)) == REG) \
1258: { \
1259: reg2 = XEXP (addr, 0); \
1260: addr = XEXP (addr, 1); \
1261: } \
1262: else if (GET_CODE (XEXP (addr, 1)) == REG) \
1263: { \
1264: reg2 = XEXP (addr, 1); \
1265: addr = XEXP (addr, 0); \
1266: } \
1267: } \
1268: */ \
1269: if (offset != 0) { if (addr != 0) abort (); addr = offset; } \
1270: if ((reg1 && (GET_CODE (reg1) == SIGN_EXTEND \
1271: || GET_CODE (reg1) == MULT)) \
1272: || (reg2 != 0 && REGNO_OK_FOR_BASE_P (REGNO (reg2)))) \
1273: { breg = reg2; ireg = reg1; } \
1274: else if (reg1 != 0 && REGNO_OK_FOR_BASE_P (REGNO (reg1))) \
1275: { breg = reg1; ireg = reg2; } \
1276: if (ireg != 0 && breg == 0 && GET_CODE (addr) == LABEL_REF) \
1277: { int scale = 1; \
1278: if (GET_CODE (ireg) == MULT) \
1279: { scale = INTVAL (XEXP (ireg, 1)); \
1280: ireg = XEXP (ireg, 0); } \
1281: if (GET_CODE (ireg) == SIGN_EXTEND) \
1282: fprintf (FILE, "pc@(L%d-LI%d-2:b,%s:w", \
1283: CODE_LABEL_NUMBER (XEXP (addr, 0)), \
1284: CODE_LABEL_NUMBER (XEXP (addr, 0)), \
1285: reg_name[REGNO (XEXP (ireg, 0))]); \
1286: else \
1287: fprintf (FILE, "pc@(L%d-LI%d-2:b,%s:l", \
1288: CODE_LABEL_NUMBER (XEXP (addr, 0)), \
1289: CODE_LABEL_NUMBER (XEXP (addr, 0)), \
1290: reg_name[REGNO (ireg)]); \
1291: if (scale != 1) fprintf (FILE, ":%d", scale); \
1292: putc (')', FILE); \
1293: break; } \
1294: if (ireg != 0 || breg != 0) \
1295: { int scale = 1; \
1296: if (breg == 0) \
1297: abort (); \
1298: fprintf (FILE, "%s@(", reg_name[REGNO (breg)]); \
1299: if (addr != 0) \
1300: output_addr_const (FILE, addr); \
1301: if (addr != 0 && ireg != 0) \
1302: putc (',', FILE); \
1303: if (ireg != 0 && GET_CODE (ireg) == MULT) \
1304: { scale = INTVAL (XEXP (ireg, 1)); \
1305: ireg = XEXP (ireg, 0); } \
1306: if (ireg != 0 && GET_CODE (ireg) == SIGN_EXTEND) \
1307: fprintf (FILE, "%s:w", reg_name[REGNO (XEXP (ireg, 0))]); \
1308: else if (ireg != 0) \
1309: fprintf (FILE, "%s:l", reg_name[REGNO (ireg)]); \
1310: if (scale != 1) fprintf (FILE, ":%d", scale); \
1311: putc (')', FILE); \
1312: break; \
1313: } \
1314: else if (reg1 != 0 && GET_CODE (addr) == LABEL_REF) \
1315: { fprintf (FILE, "pc@(L%d-LI%d-2:b,%s:l)", \
1316: CODE_LABEL_NUMBER (XEXP (addr, 0)), \
1317: CODE_LABEL_NUMBER (XEXP (addr, 0)), \
1318: reg_name[REGNO (reg1)]); \
1319: break; } \
1320: default: \
1321: if (GET_CODE (addr) == CONST_INT \
1322: && INTVAL (addr) < 0x8000 \
1323: && INTVAL (addr) >= -0x8000) \
1324: fprintf (FILE, "%d:w", INTVAL (addr)); \
1325: else \
1326: output_addr_const (FILE, addr); \
1327: }}
1328:
1329: /*
1330: Local variables:
1331: version-control: t
1332: End:
1333: */
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