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1.1 root 1: /* Definitions of target machine for GNU compiler. NS32000 version.
2: Copyright (C) 1988 Free Software Foundation, Inc.
3: Contributed by Michael Tiemann ([email protected])
4:
5: This file is part of GNU CC.
6:
7: GNU CC is distributed in the hope that it will be useful,
8: but WITHOUT ANY WARRANTY. No author or distributor
9: accepts responsibility to anyone for the consequences of using it
10: or for whether it serves any particular purpose or works at all,
11: unless he says so in writing. Refer to the GNU CC General Public
12: License for full details.
13:
14: Everyone is granted permission to copy, modify and redistribute
15: GNU CC, but only under the conditions described in the
16: GNU CC General Public License. A copy of this license is
17: supposed to have been given to you along with GNU CC so you
18: can know your rights and responsibilities. It should be in a
19: file named COPYING. Among other things, the copyright notice
20: and this notice must be preserved on all copies. */
21:
22:
23: /* Note that some other tm- files include this one and then override
24: many of the definitions that relate to assembler syntax. */
25:
26:
27: /* Names to predefine in the preprocessor for this target machine. */
28:
29: #define CPP_PREDEFINES "-Dns32000 -Dunix"
30:
31: /* Print subsidiary information on the compiler version in use. */
32: #define TARGET_VERSION printf (" (32000, National syntax)");
33:
34: /* Run-time compilation parameters selecting different hardware subsets. */
35:
36: extern int target_flags;
37:
38: /* Macros used in the machine description to test the flags. */
39:
40: /* Compile 32081 insns for floating point (not library calls). */
41: #define TARGET_32081 (target_flags & 1)
42: /* Compile using rtd insn calling sequence.
43: This will not work unless you use prototypes at least
44: for all functions that can take varying numbers of args. */
45: #define TARGET_RTD (target_flags & 2)
46: /* Compile passing first two args in regs 0 and 1. */
47: #define TARGET_REGPARM (target_flags & 4)
48:
49: /* Macro to define tables used to set the flags.
50: This is a list in braces of pairs in braces,
51: each pair being { "NAME", VALUE }
52: where VALUE is the bits to set or minus the bits to clear.
53: An empty string NAME is used to identify the default VALUE. */
54:
55: #define TARGET_SWITCHES \
56: { { "32081", 1}, \
57: { "soft-float", -1}, \
58: { "rtd", 2}, \
59: { "nortd", -2}, \
60: { "regparm", 4}, \
61: { "noregparm", -4}, \
62: { "", TARGET_DEFAULT}}
63:
64: /* target machine storage layout */
65:
66: /* Define this if most significant bit is lowest numbered
67: in instructions that operate on numbered bit-fields.
68: This is not true on the ns32k. */
69: /* #define BITS_BIG_ENDIAN */
70:
71: /* Define this if most significant byte of a word is the lowest numbered. */
72: /* That is not true on the ns32k. */
73: /* #define BYTES_BIG_ENDIAN */
74:
75: /* Define this if most significant word of a multiword number is numbered. */
76: /* This is not true on the ns32k. */
77: /* #define WORDS_BIG_ENDIAN */
78:
79: /* Number of bits in an addressible storage unit */
80: #define BITS_PER_UNIT 8
81:
82: /* Width in bits of a "word", which is the contents of a machine register.
83: Note that this is not necessarily the width of data type `int';
84: if using 16-bit ints on a 32000, this would still be 32.
85: But on a machine with 16-bit registers, this would be 16. */
86: #define BITS_PER_WORD 32
87:
88: /* Width of a word, in units (bytes). */
89: #define UNITS_PER_WORD 4
90:
91: /* Width in bits of a pointer.
92: See also the macro `Pmode' defined below. */
93: #define POINTER_SIZE 32
94:
95: /* Allocation boundary (in *bits*) for storing pointers in memory. */
96: #define POINTER_BOUNDARY 16
97:
98: /* Allocation boundary (in *bits*) for storing arguments in argument list. */
99: #define PARM_BOUNDARY 32
100:
101: /* Boundary (in *bits*) on which stack pointer should be aligned. */
102: #define STACK_BOUNDARY 32
103:
104: /* Allocation boundary (in *bits*) for the code of a function. */
105: #define FUNCTION_BOUNDARY 16
106:
107: /* Alignment of field after `int : 0' in a structure. */
108: #define EMPTY_FIELD_BOUNDARY 32
109:
110: /* Every structure's size must be a multiple of this. */
111: #define STRUCTURE_SIZE_BOUNDARY 8
112:
113: /* No data type wants to be aligned rounder than this. */
114: #define BIGGEST_ALIGNMENT 32
115:
116: /* Define this if move instructions will actually fail to work
117: when given unaligned data. National claims that the NS32032
118: works without strict alignment, but rumor has it that operands
119: crossing a page boundary cause unpredictable results. */
120: #define STRICT_ALIGNMENT
121:
122: /* Standard register usage. */
123:
124: /* Number of actual hardware registers.
125: The hardware registers are assigned numbers for the compiler
126: from 0 to just below FIRST_PSEUDO_REGISTER.
127: All registers that the compiler knows about must be given numbers,
128: even those that are not normally considered general registers. */
129: #define FIRST_PSEUDO_REGISTER 18
130:
131: /* 1 for registers that have pervasive standard uses
132: and are not available for the register allocator.
133: On the ns32k, these are the FP, SP, (SB and PC are not included here). */
134: #define FIXED_REGISTERS {0, 0, 0, 0, 0, 0, 0, 0, \
135: 0, 0, 0, 0, 0, 0, 0, 0, \
136: 1, 1}
137:
138: /* 1 for registers not available across function calls.
139: These must include the FIXED_REGISTERS and also any
140: registers that can be used without being saved.
141: The latter must include the registers where values are returned
142: and the register where structure-value addresses are passed.
143: Aside from that, you can include as many other registers as you like. */
144: #define CALL_USED_REGISTERS {1, 1, 1, 0, 0, 0, 0, 0, \
145: 1, 1, 1, 1, 0, 0, 0, 0, \
146: 1, 1}
147:
148: /* Return number of consecutive hard regs needed starting at reg REGNO
149: to hold something of mode MODE.
150: This is ordinarily the length in words of a value of mode MODE
151: but can be less for certain modes in special long registers.
152: On the ns32k, all registers are 32 bits long. */
153: #define HARD_REGNO_NREGS(REGNO, MODE) \
154: ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
155:
156: /* Value is 1 if hard register REGNO can hold a value of machine-mode MODE.
157: On the 32000, all registers can hold all modes, except that
158: double precision floats (and double ints) must fall on even-register
159: boundaries */
160: #define HARD_REGNO_MODE_OK(REGNO, MODE) \
161: ((MODE) == DFmode \
162: ? (((REGNO) & 1) == 0 \
163: && (TARGET_32081 ? (REGNO) < 16 : (REGNO) < 8)) \
164: : (MODE) == DImode ? ((REGNO) & 1) == 0 && (REGNO) < 8 \
165: : 1)
166:
167: /* Value is 1 if it is a good idea to tie two pseudo registers
168: when one has mode MODE1 and one has mode MODE2.
169: If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2,
170: for any hard reg, then this must be 0 for correct output. */
171: #define MODES_TIEABLE_P(MODE1, MODE2) \
172: (((MODE1) == DFmode || (MODE1) == DImode) == ((MODE2) == DFmode || (MODE2) == DImode))
173:
174: /* Specify the registers used for certain standard purposes.
175: The values of these macros are register numbers. */
176:
177: /* NS32000 pc is not overloaded on a register. */
178: /* #define PC_REGNUM */
179:
180: /* Register to use for pushing function arguments. */
181: #define STACK_POINTER_REGNUM 17
182:
183: /* Base register for access to local variables of the function. */
184: #define FRAME_POINTER_REGNUM 16
185:
186: /* Value should be nonzero if functions must have frame pointers.
187: Zero means the frame pointer need not be set up (and parms
188: may be accessed via the stack pointer) in functions that seem suitable.
189: This is computed in `reload', in reload1.c. */
190: #define FRAME_POINTER_REQUIRED 0
191:
192: /* Base register for access to arguments of the function. */
193: #define ARG_POINTER_REGNUM 16
194:
195: /* Register in which static-chain is passed to a function. */
196: #define STATIC_CHAIN_REGNUM 1
197:
198: /* Register in which address to store a structure value
199: is passed to a function. */
200: #define STRUCT_VALUE_REGNUM 2
201:
202: /* Define the classes of registers for register constraints in the
203: machine description. Also define ranges of constants.
204:
205: One of the classes must always be named ALL_REGS and include all hard regs.
206: If there is more than one class, another class must be named NO_REGS
207: and contain no registers.
208:
209: The name GENERAL_REGS must be the name of a class (or an alias for
210: another name such as ALL_REGS). This is the class of registers
211: that is allowed by "g" or "r" in a register constraint.
212: Also, registers outside this class are allocated only when
213: instructions express preferences for them.
214:
215: The classes must be numbered in nondecreasing order; that is,
216: a larger-numbered class must never be contained completely
217: in a smaller-numbered class.
218:
219: For any two classes, it is very desirable that there be another
220: class that represents their union. */
221:
222: enum reg_class { NO_REGS, GENERAL_REGS, FLOAT_REGS, GEN_AND_FLOAT_REGS,
223: GEN_AND_MEM_REGS, ALL_REGS, LIM_REG_CLASSES };
224:
225: #define N_REG_CLASSES (int) LIM_REG_CLASSES
226:
227: /* Give names of register classes as strings for dump file. */
228:
229: #define REG_CLASS_NAMES \
230: {"NO_REGS", "GENERAL_REGS", "FLOAT_REGS", "GEN_AND_FLOAT_REGS", "GEN_AND_MEM_REGS", "ALL_REGS" }
231:
232: /* Define which registers fit in which classes.
233: This is an initializer for a vector of HARD_REG_SET
234: of length N_REG_CLASSES. */
235:
236: #define REG_CLASS_CONTENTS {0, 0x00ff, 0xff00, 0xffff, 0x300ff, 0x3ffff, }
237:
238: /* The same information, inverted:
239: Return the class number of the smallest class containing
240: reg number REGNO. This could be a conditional expression
241: or could index an array. */
242:
243: #define REGNO_REG_CLASS(REGNO) \
244: ((REGNO) < 8 ? GENERAL_REGS : (REGNO) < 16 ? FLOAT_REGS : ALL_REGS)
245:
246: /* The class value for index registers, and the one for base regs. */
247:
248: #define INDEX_REG_CLASS GENERAL_REGS
249: #define BASE_REG_CLASS GEN_AND_MEM_REGS
250:
251: /* Get reg_class from a letter such as appears in the machine description. */
252:
253: #define REG_CLASS_FROM_LETTER(C) \
254: ((C) == 'r' ? GENERAL_REGS \
255: : (C) == 'f' ? FLOAT_REGS \
256: : (C) == 'x' ? GEN_AND_MEM_REGS \
257: : NO_REGS)
258:
259: /* The letters I, J, K, L and M in a register constraint string
260: can be used to stand for particular ranges of immediate operands.
261: This macro defines what the ranges are.
262: C is the letter, and VALUE is a constant value.
263: Return 1 if VALUE is in the range specified by C.
264:
265: On the ns32k, these letters are used as follows:
266:
267: I : Matches integers which are valid shift amounts for scaled indexing.
268: These are 0, 1, 2, 3 for byte, word, double, and quadword.
269: J : Matches integers which fit a "quick" operand.
270: K : Matches integers 0 to 7 (for inss and exts instructions). */
271:
272: #define CONST_OK_FOR_LETTER_P(VALUE, C) \
273: ((VALUE) < 8 && (VALUE) + 8 >= 0 ? \
274: ((C) == 'I' ? (0 <= (VALUE) && (VALUE) <= 3) : \
275: (C) == 'J' ? (VALUE) <= 7 : \
276: (C) == 'K' ? 0 <= (VALUE) : 0) : 0)
277:
278: /* Similar, but for floating constants, and defining letters G and H.
279: Here VALUE is the CONST_DOUBLE rtx itself. */
280:
281: #define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) 1
282:
283: /* Given an rtx X being reloaded into a reg required to be
284: in class CLASS, return the class of reg to actually use.
285: In general this is just CLASS; but on some machines
286: in some cases it is preferable to use a more restrictive class. */
287:
288: #define PREFERRED_RELOAD_CLASS(X,CLASS) (CLASS)
289:
290: /* Return the maximum number of consecutive registers
291: needed to represent mode MODE in a register of class CLASS. */
292: /* On the 32000, this is the size of MODE in words */
293: #define CLASS_MAX_NREGS(CLASS, MODE) \
294: ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
295:
296: /* Stack layout; function entry, exit and calling. */
297:
298: /* Define this if pushing a word on the stack
299: makes the stack pointer a smaller address. */
300: #define STACK_GROWS_DOWNWARD
301:
302: /* Define this if the nominal address of the stack frame
303: is at the high-address end of the local variables;
304: that is, each additional local variable allocated
305: goes at a more negative offset in the frame. */
306: #define FRAME_GROWS_DOWNWARD
307:
308: /* Offset within stack frame to start allocating local variables at.
309: If FRAME_GROWS_DOWNWARD, this is the offset to the END of the
310: first local allocated. Otherwise, it is the offset to the BEGINNING
311: of the first local allocated. */
312: #define STARTING_FRAME_OFFSET 0
313:
314: /* If we generate an insn to push BYTES bytes,
315: this says how many the stack pointer really advances by.
316: On the 32000, sp@- in a byte insn really pushes a BYTE. */
317: #define PUSH_ROUNDING(BYTES) (BYTES)
318:
319: /* Offset of first parameter from the argument pointer register value. */
320: #define FIRST_PARM_OFFSET 8
321:
322: /* Value is 1 if returning from a function call automatically
323: pops the arguments described by the number-of-args field in the call.
324: FUNTYPE is the data type of the function (as a tree),
325: or for a library call it is an identifier node for the subroutine name.
326:
327: On the 32000, the RET insn may be used to pop them if the number
328: of args is fixed, but if the number is variable then the caller
329: must pop them all. RET can't be used for library calls now
330: because the library is compiled with the Unix compiler.
331: Use of RET is a selectable option, since it is incompatible with
332: standard Unix calling sequences. If the option is not selected,
333: the caller must always pop the args. */
334:
335: #define RETURN_POPS_ARGS(FUNTYPE) \
336: (TARGET_RTD && TREE_CODE (FUNTYPE) != IDENTIFIER_NODE \
337: && (TYPE_ARG_TYPES (FUNTYPE) == 0 \
338: || TREE_VALUE (tree_last (TYPE_ARG_TYPES (FUNTYPE))) == void_type_node))
339:
340: /* Define how to find the value returned by a function.
341: VALTYPE is the data type of the value (as a tree).
342: If the precise function being called is known, FUNC is its FUNCTION_DECL;
343: otherwise, FUNC is 0. */
344:
345: /* On the 32000 the return value is in R0,
346: or perhaps in F0 is there is fp support. */
347:
348: #define FUNCTION_VALUE(VALTYPE, FUNC) \
349: (TREE_CODE (VALTYPE) == REAL_TYPE && TARGET_32081 \
350: ? gen_rtx (REG, TYPE_MODE (VALTYPE), 8) \
351: : gen_rtx (REG, TYPE_MODE (VALTYPE), 0))
352:
353: /* Define how to find the value returned by a library function
354: assuming the value has mode MODE. */
355:
356: /* On the 32000 the return value is in R0,
357: or perhaps F0 is there is fp support. */
358:
359: #define LIBCALL_VALUE(MODE) \
360: (((MODE) == DFmode || (MODE) == SFmode) && TARGET_32081 \
361: ? gen_rtx (REG, MODE, 8) \
362: : gen_rtx (REG, MODE, 0))
363:
364: /* 1 if N is a possible register number for a function value.
365: On the 32000, R0 and F0 are the only registers thus used. */
366:
367: #define FUNCTION_VALUE_REGNO_P(N) (((N) & ~8) == 0)
368:
369: /* 1 if N is a possible register number for function argument passing.
370: On the 32000, no registers are used in this way. */
371:
372: #define FUNCTION_ARG_REGNO_P(N) 0
373:
374: /* Define a data type for recording info about an argument list
375: during the scan of that argument list. This data type should
376: hold all necessary information about the function itself
377: and about the args processed so far, enough to enable macros
378: such as FUNCTION_ARG to determine where the next arg should go.
379:
380: On the ns32k, this is a single integer, which is a number of bytes
381: of arguments scanned so far. */
382:
383: #define CUMULATIVE_ARGS int
384:
385: /* Initialize a variable CUM of type CUMULATIVE_ARGS
386: for a call to a function whose data type is FNTYPE.
387: For a library call, FNTYPE is 0.
388:
389: On the ns32k, the offset starts at 0. */
390:
391: #define INIT_CUMULATIVE_ARGS(CUM,FNTYPE) \
392: ((CUM) = 0)
393:
394: /* Update the data in CUM to advance over an argument
395: of mode MODE and data type TYPE.
396: (TYPE is null for libcalls where that information may not be available.) */
397:
398: #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \
399: ((CUM) += ((MODE) != BLKmode \
400: ? (GET_MODE_SIZE (MODE) + 3) & ~3 \
401: : (int_size_in_bytes (TYPE) + 3) & ~3))
402:
403: /* Define where to put the arguments to a function.
404: Value is zero to push the argument on the stack,
405: or a hard register in which to store the argument.
406:
407: MODE is the argument's machine mode.
408: TYPE is the data type of the argument (as a tree).
409: This is null for libcalls where that information may
410: not be available.
411: CUM is a variable of type CUMULATIVE_ARGS which gives info about
412: the preceding args and about the function being called.
413: NAMED is nonzero if this argument is a named parameter
414: (otherwise it is an extra parameter matching an ellipsis). */
415:
416: /* On the 32000 all args are pushed, except if -mregparm is specified
417: then the first two words of arguments are passed in r0, r1.
418: *NOTE* -mregparm does not work.
419: It exists only to test register calling conventions. */
420:
421: #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \
422: ((TARGET_REGPARM && (CUM) < 8) ? gen_rtx (REG, (MODE), (CUM) / 4) : 0)
423:
424: /* For an arg passed partly in registers and partly in memory,
425: this is the number of registers used.
426: For args passed entirely in registers or entirely in memory, zero. */
427:
428: #define FUNCTION_ARG_PARTIAL_NREGS(CUM, MODE, TYPE, NAMED) \
429: ((TARGET_REGPARM && (CUM) < 8 \
430: && 8 < ((CUM) + ((MODE) == BLKmode \
431: ? int_size_in_bytes (TYPE) \
432: : GET_MODE_SIZE (MODE)))) \
433: ? 2 - (CUM) / 4 : 0)
434:
435: /* This macro generates the assembly code for function entry.
436: FILE is a stdio stream to output the code to.
437: SIZE is an int: how many units of temporary storage to allocate.
438: Refer to the array `regs_ever_live' to determine which registers
439: to save; `regs_ever_live[I]' is nonzero if register number I
440: is ever used in the function. This macro is responsible for
441: knowing which registers should not be saved even if used. */
442:
443: #define FUNCTION_PROLOGUE(FILE, SIZE) \
444: { register int regno; \
445: register int nregs; \
446: char used_regs_buf[32], *bufp = used_regs_buf; \
447: int used_fregs_buf[8], *fbufp = used_fregs_buf; \
448: extern char call_used_regs[]; \
449: for (regno = 0, nregs = 0; regno < 8; regno++) \
450: if (regs_ever_live[regno] && !call_used_regs[regno]) { \
451: nregs += 1; \
452: *bufp++ = 'r'; *bufp++ = regno+'0'; *bufp++ = ','; \
453: } \
454: for (; regno < 16; regno++) \
455: if (regs_ever_live[regno] && !call_used_regs[regno]) { \
456: *fbufp++ = regno; \
457: } \
458: if (bufp > used_regs_buf) --bufp; \
459: *bufp = '\0'; \
460: if (frame_pointer_needed) \
461: fprintf (FILE, "\tenter [%s],%d\n", used_regs_buf,SIZE); \
462: else if (nregs == 1) \
463: fprintf (FILE, "\tmovd %s,tos\n", used_regs_buf); \
464: else if (nregs) fprintf (FILE, "\tsave [%s]\n", used_regs_buf); \
465: *fbufp = -1; \
466: fbufp = used_fregs_buf; \
467: while (*fbufp >= 0) \
468: { \
469: if ((*fbufp & 1) || (fbufp[0] != fbufp[1] - 1)) \
470: fprintf (FILE, "\tmovf f%d,tos\n", *fbufp++ - 8); \
471: else \
472: { \
473: fprintf (FILE, "\tmovl f%d,tos\n", fbufp[0] - 8); \
474: fbufp += 2; \
475: } \
476: } \
477: }
478:
479: /* Output assembler code to FILE to increment profiler label # LABELNO
480: for profiling a function entry.
481:
482: THIS DEFINITION FOR THE 32000 IS A GUESS. IT HAS NOT BEEN TESTED. */
483:
484: #define FUNCTION_PROFILER(FILE, LABELNO) \
485: fprintf (FILE, "\taddr LP%d,r0\n\tbsr mcount\n", (LABELNO))
486:
487: /* EXIT_IGNORE_STACK should be nonzero if, when returning from a function,
488: the stack pointer does not matter. The value is tested only in
489: functions that have frame pointers.
490: No definition is equivalent to always zero. */
491:
492: /* #define EXIT_IGNORE_STACK */
493:
494: /* This macro generates the assembly code for function exit,
495: on machines that need it. If FUNCTION_EPILOGUE is not defined
496: then individual return instructions are generated for each
497: return statement. Args are same as for FUNCTION_PROLOGUE.
498:
499: The function epilogue should not depend on the current stack pointer!
500: It should use the frame pointer only. This is mandatory because
501: of alloca; we also take advantage of it to omit stack adjustments
502: before returning. */
503:
504: #define FUNCTION_EPILOGUE(FILE, SIZE) \
505: { extern int current_function_pops_args; \
506: extern int current_function_args_size; \
507: register int regno; \
508: register int nregs; \
509: char used_regs_buf[32], *bufp = used_regs_buf; \
510: int used_fregs_buf[8], *fbufp = used_fregs_buf; \
511: extern char call_used_regs[]; \
512: *fbufp++ = -2; \
513: for (regno = 8; regno < 16; regno++) \
514: if (regs_ever_live[regno] && !call_used_regs[regno]) { \
515: *fbufp++ = regno; \
516: } \
517: fbufp--; \
518: while (fbufp > used_fregs_buf) \
519: { \
520: if ((*fbufp & 1) && fbufp[0] == fbufp[-1] + 1) \
521: { \
522: fprintf (FILE, "\tmovl tos,f%d\n", fbufp[-1] - 8); \
523: fbufp -= 2; \
524: } \
525: else fprintf (FILE, "\tmovf tos,f%d\n", *fbufp-- - 8); \
526: } \
527: for (regno = 0, nregs = 0; regno < 8; regno++) \
528: if (regs_ever_live[regno] && ! call_used_regs[regno]) { \
529: nregs++; \
530: *bufp++ = 'r'; *bufp++ = regno+'0'; *bufp++ = ','; \
531: } \
532: if (bufp > used_regs_buf) --bufp; \
533: *bufp = '\0'; \
534: if (frame_pointer_needed) \
535: fprintf (FILE, "\texit [%s]\n", used_regs_buf); \
536: else if (nregs == 1) \
537: fprintf (FILE, "\tmovd tos,%s\n", used_regs_buf); \
538: else if (nregs) \
539: fprintf (FILE, "\trestore [%s]\n", used_regs_buf); \
540: if (current_function_pops_args && current_function_args_size) \
541: fprintf (FILE, "\tret %d\n", current_function_args_size); \
542: else fprintf (FILE, "\tret 0\n"); }
543:
544: /* If the memory address ADDR is relative to the frame pointer,
545: correct it to be relative to the stack pointer instead.
546: This is for when we don't use a frame pointer.
547: ADDR should be a variable name. */
548:
549: #if 0
550: #define FIX_FRAME_POINTER_ADDRESS(ADDR,DEPTH) \
551: { int offset = -1; \
552: if (GET_CODE (ADDR) == REG && REGNO (ADDR) == FRAME_POINTER_REGNUM) \
553: offset = 0; \
554: else if (GET_CODE (ADDR) == PLUS && GET_CODE (XEXP (ADDR, 0)) == REG \
555: && REGNO (XEXP (ADDR, 0)) == FRAME_POINTER_REGNUM \
556: && GET_CODE (XEXP (ADDR, 1)) == CONST_INT) \
557: offset = INTVAL (XEXP (ADDR, 1)); \
558: if (offset >= 0) \
559: { int regno; \
560: extern char call_used_regs[]; \
561: for (regno = 0; regno < 8; regno++) \
562: if (regs_ever_live[regno] && ! call_used_regs[regno]) \
563: offset += 4; \
564: offset -= 4; \
565: ADDR = plus_constant (gen_rtx (REG, Pmode, STACK_POINTER_REGNUM), \
566: offset + (DEPTH)); } }
567: #else
568: #define FIX_FRAME_POINTER_ADDRESS(ADDR,DEPTH) \
569: if (check_reg(ADDR, FRAME_POINTER_REGNUM)) { \
570: register int regno, offset = (DEPTH) - 4; \
571: extern char call_used_regs[]; \
572: for (regno = 0; regno < 16; regno++) \
573: if (regs_ever_live[regno] && ! call_used_regs[regno]) \
574: offset += 4; \
575: if (GET_CODE (ADDR) == REG && REGNO (ADDR) == FRAME_POINTER_REGNUM) \
576: ADDR = plus_constant(stack_pointer_rtx, offset); \
577: else if (GET_CODE(ADDR) == PLUS) { \
578: register rtx a0 = XEXP(ADDR, 0); \
579: if (GET_CODE(a0) == REG && REGNO(a0) == FRAME_POINTER_REGNUM) \
580: if (GET_CODE(XEXP(ADDR, 1)) == CONST_INT) \
581: ADDR = plus_constant(stack_pointer_rtx, \
582: offset + INTVAL(XEXP(ADDR, 1))); \
583: else \
584: ADDR = plus_constant(gen_rtx(PLUS, Pmode, \
585: stack_pointer_rtx, XEXP (ADDR, 1)), \
586: offset); \
587: else if (GET_CODE(a0) == MEM) { \
588: register rtx a1 = XEXP(a0, 0); \
589: if (GET_CODE(a1) == REG && REGNO(a1) == FRAME_POINTER_REGNUM) \
590: ADDR = gen_rtx(PLUS, Pmode, \
591: gen_rtx(MEM, Pmode, \
592: plus_constant(stack_pointer_rtx, offset)), \
593: XEXP(ADDR, 1)); \
594: else if (GET_CODE(a1) == PLUS && GET_CODE(XEXP(a1, 0)) == REG \
595: && REGNO(XEXP(a1, 0)) == FRAME_POINTER_REGNUM) \
596: ADDR = gen_rtx(PLUS, Pmode, \
597: gen_rtx(MEM, Pmode, \
598: plus_constant(stack_pointer_rtx, \
599: offset+INTVAL(XEXP(a1, 1)))),\
600: XEXP(ADDR, 1)); \
601: else \
602: abort(); \
603: } else if (GET_CODE(XEXP(ADDR, 1)) == MEM) { \
604: register rtx a1 = XEXP(XEXP(ADDR, 1), 0); \
605: if (GET_CODE(a1) == REG && REGNO(a1) == FRAME_POINTER_REGNUM) \
606: ADDR = gen_rtx(PLUS, Pmode, \
607: XEXP(ADDR, 0), \
608: gen_rtx(MEM, Pmode, \
609: plus_constant(stack_pointer_rtx, \
610: offset))); \
611: else if (GET_CODE(a1) == PLUS && GET_CODE(XEXP(a1, 0)) == REG \
612: && REGNO(XEXP(a1, 0)) == FRAME_POINTER_REGNUM) \
613: ADDR = gen_rtx(PLUS, Pmode, \
614: XEXP(ADDR, 0), \
615: gen_rtx(MEM, Pmode, \
616: plus_constant(stack_pointer_rtx, \
617: offset+INTVAL(XEXP(a1, 1)))));\
618: else \
619: abort(); \
620: } else \
621: abort(); \
622: } else if (GET_CODE(ADDR) == MEM) { \
623: register rtx a0 = XEXP(ADDR, 0); \
624: if (GET_CODE (a0) == REG && REGNO (a0) == FRAME_POINTER_REGNUM) \
625: ADDR = gen_rtx(MEM, Pmode, \
626: plus_constant(stack_pointer_rtx, offset)); \
627: else if (GET_CODE(a0) == PLUS && GET_CODE(XEXP(a0, 0)) == REG \
628: && REGNO(XEXP(a0, 0)) == FRAME_POINTER_REGNUM \
629: && GET_CODE(XEXP(a0, 1)) == CONST_INT) \
630: ADDR = gen_rtx(MEM, Pmode, \
631: plus_constant(stack_pointer_rtx, \
632: offset + INTVAL(XEXP(a0, 1)))); \
633: else \
634: abort(); \
635: } else \
636: abort(); \
637: }
638: #endif
639:
640: /* Addressing modes, and classification of registers for them. */
641:
642: /* #define HAVE_POST_INCREMENT */
643: /* #define HAVE_POST_DECREMENT */
644:
645: /* #define HAVE_PRE_DECREMENT */
646: /* #define HAVE_PRE_INCREMENT */
647:
648: /* Macros to check register numbers against specific register classes. */
649:
650: /* These assume that REGNO is a hard or pseudo reg number.
651: They give nonzero only if REGNO is a hard reg of the suitable class
652: or a pseudo reg currently allocated to a suitable hard reg.
653: Since they use reg_renumber, they are safe only once reg_renumber
654: has been allocated, which happens in local-alloc.c. */
655:
656: /* note that FP and SP cannot be used as an index. What about PC? */
657: #define REGNO_OK_FOR_INDEX_P(REGNO) \
658: ((REGNO) < 8 || (unsigned)reg_renumber[REGNO] < 8)
659: #define REGNO_OK_FOR_BASE_P(REGNO) \
660: ((REGNO) < 8 || (unsigned)reg_renumber[REGNO] < 8 \
661: || (REGNO) == FRAME_POINTER_REGNUM || (REGNO) == STACK_POINTER_REGNUM)
662:
663: /* Maximum number of registers that can appear in a valid memory address. */
664:
665: #define MAX_REGS_PER_ADDRESS 2
666:
667: /* Recognize any constant value that is a valid address. */
668:
669: #define CONSTANT_ADDRESS_P(X) \
670: (GET_CODE (X) == LABEL_REF || GET_CODE (X) == SYMBOL_REF \
671: || GET_CODE (X) == CONST \
672: || (GET_CODE (X) == CONST_INT \
673: && ((unsigned)INTVAL (X) >= 0xe0000000 \
674: || (unsigned)INTVAL (X) < 0x20000000)))
675:
676: #define CONSTANT_ADDRESS_NO_LABEL_P(X) \
677: (GET_CODE (X) == CONST_INT \
678: && ((unsigned)INTVAL (X) >= 0xe0000000 \
679: || (unsigned)INTVAL (X) < 0x20000000))
680:
681: /* Nonzero if the constant value X is a legitimate general operand.
682: It is given that X satisfies CONSTANT_P or is a CONST_DOUBLE. */
683:
684: #define LEGITIMATE_CONSTANT_P(X) 1
685:
686: /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx
687: and check its validity for a certain class.
688: We have two alternate definitions for each of them.
689: The usual definition accepts all pseudo regs; the other rejects
690: them unless they have been allocated suitable hard regs.
691: The symbol REG_OK_STRICT causes the latter definition to be used.
692:
693: Most source files want to accept pseudo regs in the hope that
694: they will get allocated to the class that the insn wants them to be in.
695: Source files for reload pass need to be strict.
696: After reload, it makes no difference, since pseudo regs have
697: been eliminated by then. */
698:
699: #ifndef REG_OK_STRICT
700:
701: /* Nonzero if X is a hard reg that can be used as an index
702: or if it is a pseudo reg. */
703: #define REG_OK_FOR_INDEX_P(X) \
704: (REGNO (X) < 8 || REGNO (X) >= FIRST_PSEUDO_REGISTER)
705: /* Nonzero if X is a hard reg that can be used as a base reg
706: of if it is a pseudo reg. */
707: #define REG_OK_FOR_BASE_P(X) (REGNO (X) < 8 || REGNO (X) >= FRAME_POINTER_REGNUM)
708: /* Nonzero if X is a floating point reg or a pseudo reg. */
709:
710: #else
711:
712: /* Nonzero if X is a hard reg that can be used as an index. */
713: #define REG_OK_FOR_INDEX_P(X) REGNO_OK_FOR_INDEX_P (REGNO (X))
714: /* Nonzero if X is a hard reg that can be used as a base reg. */
715: #define REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P (REGNO (X))
716:
717: #endif
718:
719: /* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression
720: that is a valid memory address for an instruction.
721: The MODE argument is the machine mode for the MEM expression
722: that wants to use this address.
723:
724: The other macros defined here are used only in GO_IF_LEGITIMATE_ADDRESS. */
725:
726: /* 1 if X is an address that we could indirect through. */
727: /***** NOTE ***** There is a bug in the Sequent assembler which fails
728: to fixup addressing information for symbols used as offsets
729: from registers which are not FP or SP (or SB or PC). This
730: makes _x(fp) valid, while _x(r0) is invalid. */
731:
732: #define INDIRECTABLE_1_ADDRESS_P(X) \
733: (CONSTANT_P (X) \
734: || (GET_CODE (X) == REG && REG_OK_FOR_BASE_P (X)) \
735: || (GET_CODE (X) == PLUS \
736: && GET_CODE (XEXP (X, 0)) == REG \
737: && REG_OK_FOR_BASE_P (XEXP (X, 0)) \
738: && CONSTANT_ADDRESS_P (XEXP (X, 1))))
739:
740: #define MEM_REG(X) \
741: ((GET_CODE (X) == REG && (REGNO (X) ^ 16) < 2) \
742: || (GET_CODE (X) == SYMBOL_REF))
743:
744: #define INDIRECTABLE_2_ADDRESS_P(X) \
745: (GET_CODE (X) == MEM \
746: && (((xfoo0 = XEXP (X, 0), MEM_REG (xfoo0)) \
747: || (GET_CODE (xfoo0) == PLUS \
748: && MEM_REG (XEXP (xfoo0, 0)) \
749: && CONSTANT_ADDRESS_NO_LABEL_P (XEXP (xfoo0, 1)))) \
750: || CONSTANT_ADDRESS_P (xfoo0)))
751:
752: #define INDIRECTABLE_ADDRESS_P(X) \
753: (INDIRECTABLE_1_ADDRESS_P(X) \
754: || INDIRECTABLE_2_ADDRESS_P (X) \
755: || (GET_CODE (X) == PLUS \
756: && CONSTANT_ADDRESS_NO_LABEL_P (XEXP (X, 1)) \
757: && INDIRECTABLE_2_ADDRESS_P (XEXP (X, 0))))
758:
759: /* Go to ADDR if X is a valid address not using indexing.
760: (This much is the easy part.) */
761: #define GO_IF_NONINDEXED_ADDRESS(X, ADDR) \
762: { register rtx xfoob = (X); \
763: if (GET_CODE (xfoob) == REG) goto ADDR; \
764: if (INDIRECTABLE_1_ADDRESS_P(X)) goto ADDR; \
765: if (INDIRECTABLE_2_ADDRESS_P (X)) goto ADDR; \
766: if (GET_CODE (X) == PLUS) \
767: if (CONSTANT_ADDRESS_NO_LABEL_P (XEXP (X, 1))) \
768: if (INDIRECTABLE_2_ADDRESS_P (XEXP (X, 0))) \
769: goto ADDR; \
770: }
771:
772: /* 1 if PROD is either a reg times size of mode MODE
773: or just a reg, if MODE is just one byte. Actually, on the ns32k,
774: since the index mode is independent of the operand size,
775: we can match more stuff...
776:
777: This macro's expansion uses the temporary variables xfoo0, xfoo1
778: and xfoo2 that must be declared in the surrounding context. */
779: #define INDEX_TERM_P(PROD, MODE) \
780: ((GET_CODE (PROD) == REG && REG_OK_FOR_INDEX_P (PROD)) \
781: || (GET_CODE (PROD) == MULT \
782: && (xfoo0 = XEXP (PROD, 0), xfoo1 = XEXP (PROD, 1), \
783: (GET_CODE (xfoo1) == CONST_INT \
784: && GET_CODE (xfoo0) == REG \
785: && FITS_INDEX_RANGE (INTVAL (xfoo1)) \
786: && REG_OK_FOR_INDEX_P (xfoo0)))))
787:
788: #define FITS_INDEX_RANGE(X) \
789: ((xfoo2 = (unsigned)(X)-1), \
790: ((xfoo2 < 4 && xfoo2 != 2) || xfoo2 == 7))
791:
792: #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \
793: { register rtx xfooy, xfooz, xfoo0, xfoo1; \
794: unsigned xfoo2; \
795: xfooy = X; \
796: GO_IF_NONINDEXED_ADDRESS (xfooy, ADDR); \
797: if (GET_CODE (xfooy) == PLUS) \
798: { \
799: if (GET_CODE (XEXP (xfooy, 1)) == CONST_INT \
800: && GET_CODE (XEXP (xfooy, 0)) == PLUS) \
801: xfooy = XEXP (xfooy, 0); \
802: else if (GET_CODE (XEXP (xfooy, 0)) == CONST_INT \
803: && GET_CODE (XEXP (xfooy, 1)) == PLUS) \
804: xfooy = XEXP (xfooy, 1); \
805: xfooz = XEXP (xfooy, 1); \
806: if (INDEX_TERM_P (xfooz, MODE)) \
807: { rtx t = XEXP (xfooy, 0); GO_IF_NONINDEXED_ADDRESS (t, ADDR); } \
808: xfooz = XEXP (xfooy, 0); \
809: if (INDEX_TERM_P (xfooz, MODE)) \
810: { rtx t = XEXP (xfooy, 1); GO_IF_NONINDEXED_ADDRESS (t, ADDR); } \
811: } \
812: else if (INDEX_TERM_P (xfooy, MODE)) \
813: goto ADDR; \
814: else if (GET_CODE (xfooy) == PRE_DEC) \
815: if (REGNO (XEXP (xfooy, 0)) == STACK_POINTER_REGNUM) goto ADDR; \
816: else abort (); \
817: }
818:
819: /* Try machine-dependent ways of modifying an illegitimate address
820: to be legitimate. If we find one, return the new, valid address.
821: This macro is used in only one place: `memory_address' in explow.c.
822:
823: OLDX is the address as it was before break_out_memory_refs was called.
824: In some cases it is useful to look at this to decide what needs to be done.
825:
826: MODE and WIN are passed so that this macro can use
827: GO_IF_LEGITIMATE_ADDRESS.
828:
829: It is always safe for this macro to do nothing. It exists to recognize
830: opportunities to optimize the output.
831:
832: For the ns32k, we do nothing */
833:
834: #define LEGITIMIZE_ADDRESS(X,OLDX,MODE,WIN) {}
835:
836: /* Go to LABEL if ADDR (a legitimate address expression)
837: has an effect that depends on the machine mode it is used for.
838: On the ns32k, only predecrement and postincrement address depend thus
839: (the amount of decrement or increment being the length of the operand). */
840:
841: #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR,LABEL) \
842: { if (GET_CODE (ADDR) == POST_INC || GET_CODE (ADDR) == PRE_DEC) \
843: goto LABEL;}
844:
845: /* Specify the machine mode that this machine uses
846: for the index in the tablejump instruction.
847: Can do SImode, but HI mode is more efficient. */
848: #define CASE_VECTOR_MODE HImode
849:
850: /* Define this if the tablejump instruction expects the table
851: to contain offsets from the address of the table.
852: Do not define this if the table should contain absolute addresses. */
853: #define CASE_VECTOR_PC_RELATIVE
854:
855: /* Specify the tree operation to be used to convert reals to integers. */
856: #define IMPLICIT_FIX_EXPR FIX_ROUND_EXPR
857:
858: /* This is the kind of divide that is easiest to do in the general case. */
859: #define EASY_DIV_EXPR TRUNC_DIV_EXPR
860:
861: /* Define this as 1 if `char' should by default be signed; else as 0. */
862: #define DEFAULT_SIGNED_CHAR 1
863:
864: /* Max number of bytes we can move from memory to memory
865: in one reasonably fast instruction. */
866: #define MOVE_MAX 4
867:
868: /* Define this if zero-extension is slow (more than one real instruction). */
869: /* #define SLOW_ZERO_EXTEND */
870:
871: /* Nonzero if access to memory by bytes is slow and undesirable. */
872: #define SLOW_BYTE_ACCESS 0
873:
874: /* Define if shifts truncate the shift count
875: which implies one can omit a sign-extension or zero-extension
876: of a shift count. */
877: /* #define SHIFT_COUNT_TRUNCATED */
878:
879: /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits
880: is done just by pretending it is already truncated. */
881: #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
882:
883: /* We assume that the store-condition-codes instructions store 0 for false
884: and some other value for true. This is the value stored for true. */
885:
886: #define STORE_FLAG_VALUE 1
887:
888: /* Specify the machine mode that pointers have.
889: After generation of rtl, the compiler makes no further distinction
890: between pointers and any other objects of this machine mode. */
891: #define Pmode SImode
892:
893: /* A function address in a call instruction
894: is a byte address (for indexing purposes)
895: so give the MEM rtx a byte's mode. */
896: #define FUNCTION_MODE QImode
897:
898: /* Compute the cost of computing a constant rtl expression RTX
899: whose rtx-code is CODE. The body of this macro is a portion
900: of a switch statement. If the code is computed here,
901: return it with a return statement. Otherwise, break from the switch. */
902:
903: #define CONST_COSTS(RTX,CODE) \
904: case CONST_INT: \
905: if (INTVAL (RTX) <= 7 && INTVAL (RTX) >= -8) return 0; \
906: if (INTVAL (RTX) < 0x4000 && INTVAL (RTX) >= -0x4000) \
907: return 1; \
908: case CONST: \
909: case LABEL_REF: \
910: case SYMBOL_REF: \
911: return 3; \
912: case CONST_DOUBLE: \
913: return 5;
914:
915: /* Tell final.c how to eliminate redundant test instructions. */
916:
917: /* Here we define machine-dependent flags and fields in cc_status
918: (see `conditions.h'). */
919:
920: /* This bit means that what ought to be in the Z bit
921: should be tested in the F bit. */
922: #define CC_Z_IN_F 040
923:
924: /* This bit means that what ought to be in the Z bit
925: is complemented in the F bit. */
926: #define CC_Z_IN_NOT_F 0100
927:
928: /* Store in cc_status the expressions
929: that the condition codes will describe
930: after execution of an instruction whose pattern is EXP.
931: Do not alter them if the instruction would not alter the cc's. */
932:
933: #define NOTICE_UPDATE_CC(EXP) \
934: { if (GET_CODE (EXP) == SET) \
935: { if (GET_CODE (SET_DEST (EXP)) == CC0) \
936: { cc_status.flags = 0; \
937: cc_status.value1 = SET_DEST (EXP); \
938: cc_status.value2 = SET_SRC (EXP); \
939: } \
940: else if (GET_CODE (SET_SRC (EXP)) == CALL) \
941: { CC_STATUS_INIT; } \
942: else if (GET_CODE (SET_DEST (EXP)) == REG) \
943: { if (cc_status.value1 \
944: && reg_mentioned_p (SET_DEST (EXP), cc_status.value1)) \
945: cc_status.value1 = 0; \
946: if (cc_status.value2 \
947: && reg_mentioned_p (SET_DEST (EXP), cc_status.value2)) \
948: cc_status.value2 = 0; \
949: } \
950: else if (GET_CODE (SET_DEST (EXP)) == MEM) \
951: { CC_STATUS_INIT; } \
952: } \
953: else if (GET_CODE (EXP) == PARALLEL \
954: && GET_CODE (XVECEXP (EXP, 0, 0)) == SET) \
955: { if (GET_CODE (SET_DEST (XVECEXP (EXP, 0, 0))) == CC0) \
956: { cc_status.flags = 0; \
957: cc_status.value1 = SET_DEST (XVECEXP (EXP, 0, 0)); \
958: cc_status.value2 = SET_SRC (XVECEXP (EXP, 0, 0)); \
959: } \
960: else if (GET_CODE (SET_DEST (XVECEXP (EXP, 0, 0))) == REG) \
961: { if (cc_status.value1 \
962: && reg_mentioned_p (SET_DEST (XVECEXP (EXP, 0, 0)), cc_status.value1)) \
963: cc_status.value1 = 0; \
964: if (cc_status.value2 \
965: && reg_mentioned_p (SET_DEST (XVECEXP (EXP, 0, 0)), cc_status.value2)) \
966: cc_status.value2 = 0; \
967: } \
968: else if (GET_CODE (SET_DEST (XVECEXP (EXP, 0, 0))) == MEM) \
969: { CC_STATUS_INIT; } \
970: } \
971: else if (GET_CODE (EXP) == CALL) \
972: { /* all bets are off */ CC_STATUS_INIT; } \
973: else { /* nothing happens? CC_STATUS_INIT; */} \
974: if (cc_status.value1 && GET_CODE (cc_status.value1) == REG \
975: && cc_status.value2 \
976: && reg_mentioned_p (cc_status.value1, cc_status.value2)) \
977: printf ("here!\n", cc_status.value2 = 0); \
978: }
979:
980: #define OUTPUT_JUMP(NORMAL, NO_OV) \
981: { if (cc_status.flags & CC_NO_OVERFLOW) \
982: return NO_OV; \
983: return NORMAL; }
984:
985: /* Control the assembler format that we output. */
986:
987: /* Output at beginning of assembler file. */
988:
989: #define ASM_FILE_START "#NO_APP\n"
990:
991: /* Output to assembler file text saying following lines
992: may contain character constants, extra white space, comments, etc. */
993:
994: #define ASM_APP_ON "#APP\n"
995:
996: /* Output to assembler file text saying following lines
997: no longer contain unusual constructs. */
998:
999: #define ASM_APP_OFF "#NO_APP\n"
1000:
1001: /* Output before read-only data. */
1002:
1003: #define TEXT_SECTION_ASM_OP ".text"
1004:
1005: /* Output before writable data. */
1006:
1007: #define DATA_SECTION_ASM_OP ".data"
1008:
1009: /* How to refer to registers in assembler output.
1010: This sequence is indexed by compiler's hard-register-number (see above). */
1011:
1012: #define REGISTER_NAMES \
1013: {"r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", \
1014: "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7", \
1015: "fp", "sp", "sb", "pc"}
1016:
1017: /* How to renumber registers for dbx and gdb.
1018: NS32000 may need more change in the numeration. */
1019:
1020: #define DBX_REGISTER_NUMBER(REGNO) ((REGNO < 8) ? (REGNO)+4 : (REGNO))
1021:
1022: /* This is how to output the definition of a user-level label named NAME,
1023: such as the label on a static function or variable NAME. */
1024:
1025: #define ASM_OUTPUT_LABEL(FILE,NAME) \
1026: do { assemble_name (FILE, NAME); fputs (":\n", FILE); } while (0)
1027:
1028: /* This is how to output a command to make the user-level label named NAME
1029: defined for reference from other files. */
1030:
1031: #define ASM_GLOBALIZE_LABEL(FILE,NAME) \
1032: do { fputs (".globl ", FILE); assemble_name (FILE, NAME); fputs ("\n", FILE);} while (0)
1033:
1034: /* This is how to output a reference to a user-level label named NAME.
1035: `assemble_name' uses this. */
1036:
1037: #define ASM_OUTPUT_LABELREF(FILE,NAME) \
1038: fprintf (FILE, "_%s", NAME)
1039:
1040: /* This is how to output an internal numbered label where
1041: PREFIX is the class of label and NUM is the number within the class. */
1042:
1043: #define ASM_OUTPUT_INTERNAL_LABEL(FILE,PREFIX,NUM) \
1044: fprintf (FILE, "%s%d:\n", PREFIX, NUM)
1045:
1046: /* This is how to store into the string LABEL
1047: the symbol_ref name of an internal numbered label where
1048: PREFIX is the class of label and NUM is the number within the class.
1049: This is suitable for output with `assemble_name'. */
1050:
1051: #define ASM_GENERATE_INTERNAL_LABEL(LABEL,PREFIX,NUM) \
1052: sprintf (LABEL, "*%s%d", PREFIX, NUM)
1053:
1054: /* This is how to output an assembler line defining a `double' constant. */
1055:
1056: #define ASM_OUTPUT_DOUBLE(FILE,VALUE) \
1057: fprintf (FILE, "\t.double 0d%.20e\n", (VALUE))
1058:
1059: /* This is how to output an assembler line defining a `float' constant. */
1060:
1061: #define ASM_OUTPUT_FLOAT(FILE,VALUE) \
1062: fprintf (FILE, "\t.float 0f%.20e\n", (VALUE))
1063:
1064: /* This is how to output an assembler line defining an `int' constant. */
1065:
1066: #define ASM_OUTPUT_INT(FILE,VALUE) \
1067: ( fprintf (FILE, "\t.long "), \
1068: output_addr_const (FILE, (VALUE)), \
1069: fprintf (FILE, "\n"))
1070:
1071: /* Likewise for `char' and `short' constants. */
1072:
1073: #define ASM_OUTPUT_SHORT(FILE,VALUE) \
1074: ( fprintf (FILE, "\t.word "), \
1075: output_addr_const (FILE, (VALUE)), \
1076: fprintf (FILE, "\n"))
1077:
1078: #define ASM_OUTPUT_CHAR(FILE,VALUE) \
1079: ( fprintf (FILE, "\t.byte "), \
1080: output_addr_const (FILE, (VALUE)), \
1081: fprintf (FILE, "\n"))
1082:
1083: /* This is how to output an assembler line for a numeric constant byte. */
1084:
1085: #define ASM_OUTPUT_BYTE(FILE,VALUE) \
1086: fprintf (FILE, "\t.byte 0x%x\n", (VALUE))
1087:
1088: /* This is how to output an element of a case-vector that is absolute.
1089: (The 68000 does not use such vectors,
1090: but we must define this macro anyway.) */
1091:
1092: #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \
1093: fprintf (FILE, "\t.long L%d\n", VALUE)
1094:
1095: /* This is how to output an element of a case-vector that is relative. */
1096: /* ** Notice that the second element is LI format! */
1097: #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, VALUE, REL) \
1098: fprintf (FILE, "\t.word L%d-LI%d\n", VALUE, REL)
1099:
1100: /* This is how to output an assembler line
1101: that says to advance the location counter
1102: to a multiple of 2**LOG bytes. */
1103:
1104: #define ASM_OUTPUT_ALIGN(FILE,LOG) \
1105: fprintf (FILE, "\t.align %d\n", (LOG))
1106:
1107: #define ASM_OUTPUT_SKIP(FILE,SIZE) \
1108: fprintf (FILE, "\t.space %d\n", (SIZE))
1109:
1110: /* This says how to output an assembler line
1111: to define a global common symbol. */
1112:
1113: #define ASM_OUTPUT_COMMON(FILE, NAME, SIZE) \
1114: ( fputs (".comm ", (FILE)), \
1115: assemble_name ((FILE), (NAME)), \
1116: fprintf ((FILE), ",%d\n", (SIZE)))
1117:
1118: /* This says how to output an assembler line
1119: to define a local common symbol. */
1120:
1121: #define ASM_OUTPUT_LOCAL(FILE, NAME, SIZE) \
1122: ( fputs (".lcomm ", (FILE)), \
1123: assemble_name ((FILE), (NAME)), \
1124: fprintf ((FILE), ",%d\n", (SIZE)))
1125:
1126: /* Store in OUTPUT a string (made with alloca) containing
1127: an assembler-name for a local static variable named NAME.
1128: LABELNO is an integer which is different for each call. */
1129:
1130: #define ASM_FORMAT_PRIVATE_NAME(OUTPUT, NAME, LABELNO) \
1131: ( (OUTPUT) = (char *) alloca (strlen ((NAME)) + 10), \
1132: sprintf ((OUTPUT), "%s.%d", (NAME), (LABELNO)))
1133:
1134: /* Define the parentheses used to group arithmetic operations
1135: in assembler code. */
1136:
1137: #define ASM_OPEN_PAREN "("
1138: #define ASM_CLOSE_PAREN ")"
1139:
1140: /* Define results of standard character escape sequences. */
1141: #define TARGET_BELL 007
1142: #define TARGET_BS 010
1143: #define TARGET_TAB 011
1144: #define TARGET_NEWLINE 012
1145: #define TARGET_VT 013
1146: #define TARGET_FF 014
1147: #define TARGET_CR 015
1148:
1149: /* Print an instruction operand X on file FILE.
1150: CODE is the code from the %-spec that requested printing this operand;
1151: if `%z3' was used to print operand 3, then CODE is 'z'. */
1152:
1153: /* %$ means print the prefix for an immediate operand. */
1154:
1155: #define PRINT_OPERAND(FILE, X, CODE) \
1156: { if (CODE == '$') fprintf (FILE, "$"); \
1157: else if (CODE == '?'); \
1158: else if (GET_CODE (X) == REG) \
1159: fprintf (FILE, "%s", reg_name [REGNO (X)]); \
1160: else if (GET_CODE (X) == MEM) \
1161: output_address (XEXP (X, 0)); \
1162: else if (GET_CODE (X) == CONST_DOUBLE) \
1163: if (GET_MODE (X) == DFmode) \
1164: { union { double d; int i[2]; } u; \
1165: u.i[0] = XINT (X, 0); u.i[1] = XINT (X, 1); \
1166: fprintf (FILE, "$0d%.20e", u.d); } \
1167: else { union { float f; int i; } u; \
1168: u.i = XINT (X, 0); \
1169: fprintf (FILE, "$0f%.20e", u.f); } \
1170: else { putc ('$', FILE); output_addr_const (FILE, X); }}
1171:
1172: /* Print a memory operand whose address is X, on file FILE. */
1173:
1174: #define PRINT_OPERAND_ADDRESS(FILE, ADDR) \
1175: { register rtx reg1, reg2, breg, ireg; \
1176: register rtx addr = ADDR; \
1177: rtx offset; \
1178: int mem=0, multval, offset_printed; \
1179: char reg1_str[256], reg2_str[256]; \
1180: retry: \
1181: switch (GET_CODE (addr)) \
1182: { \
1183: case MEM: \
1184: fprintf (FILE, "0("); \
1185: addr = XEXP (addr, 0); \
1186: mem =1; \
1187: goto retry; \
1188: case REG: \
1189: fprintf (FILE, "0(%s)", reg_name [REGNO (addr)]); \
1190: break; \
1191: case PRE_DEC: \
1192: if (REGNO(XEXP(addr, 0)) != STACK_POINTER_REGNUM) \
1193: fprintf(FILE, ")1:%d", REGNO(XEXP(addr,0))); \
1194: else fprintf (FILE, "tos", reg_name [REGNO (XEXP (addr, 0))]); \
1195: break; \
1196: case POST_INC: \
1197: if (REGNO(XEXP(addr, 0)) != STACK_POINTER_REGNUM) \
1198: fprintf(FILE, ")2:%d", REGNO(XEXP(addr,0))); \
1199: else fprintf (FILE, "tos", reg_name [REGNO (XEXP (addr, 0))]); \
1200: break; \
1201: case MULT: \
1202: reg1 = XEXP (addr, 0); /* [rX:Y] */ \
1203: reg2 = XEXP (addr, 1); /* CONST/REG */ \
1204: if (GET_CODE (reg1) == CONST_INT && GET_CODE(reg2) == REG) { \
1205: reg1 = reg2; \
1206: reg2 = XEXP (addr, 0); /* [rX:Y] */ \
1207: } else \
1208: if (GET_CODE (reg2) != CONST_INT || \
1209: GET_CODE (reg1) != REG) { \
1210: abort(); \
1211: } \
1212: fprintf (FILE, "0[%s:%c]", \
1213: reg_name[ REGNO(reg1) ], \
1214: "XbwXdXXXq"[INTVAL (reg2)]); \
1215: break; \
1216: case PLUS: \
1217: reg1 = 0; reg2 = 0; \
1218: ireg = 0; breg = 0; \
1219: offset = 0; \
1220: multval = 0; \
1221: reg1_str[0] = 0; reg2_str[0] = 0; \
1222: offset_printed = 0; \
1223: if (CONSTANT_ADDRESS_P (XEXP (addr, 0)) \
1224: || GET_CODE (XEXP (addr, 0)) == MEM) \
1225: { \
1226: /* CONST / MEM(PLUS((REG)(CONST))) */ \
1227: offset = XEXP (addr, 0); \
1228: /* (REG) / PLUS((REG)(CONST)) / MULT((REG)(CONST)) */ \
1229: addr = XEXP (addr, 1); \
1230: } \
1231: else if (CONSTANT_ADDRESS_P (XEXP (addr, 1)) \
1232: || GET_CODE (XEXP (addr, 1)) == MEM) \
1233: { \
1234: /* CONST / MEM(PLUS((REG)(CONST))) */ \
1235: offset = XEXP (addr, 1); \
1236: /* (REG) / PLUS((REG)(CONST)) / MULT((REG)(CONST)) */ \
1237: addr = XEXP (addr, 0); \
1238: } \
1239: if (offset != 0) { \
1240: if (GET_CODE (offset) == MEM) { \
1241: offset = XEXP (offset, 0); /* skip MEM */ \
1242: switch (GET_CODE (offset)) { \
1243: case REG: \
1244: sprintf (reg1_str, "(%s)", \
1245: reg_name[REGNO (offset)]); \
1246: offset = 0; \
1247: break; \
1248: case PLUS: \
1249: if (!CONSTANT_ADDRESS_P (XEXP (offset, 1))) { \
1250: fprintf (FILE, \
1251: "PROGRAM in disorder PRINT_ADDR, PLUS, PLUS\n"); \
1252: print_rtl(FILE, offset); \
1253: exit (1); \
1254: } \
1255: if (GET_CODE (XEXP(offset,0)) != REG) { \
1256: fprintf (FILE, \
1257: "PROGRAM in disorder PRINT_ADDR, PLUS, REG\n"); \
1258: print_rtl(FILE, offset); \
1259: exit (1); \
1260: } \
1261: sprintf (reg1_str, "(%s))", \
1262: reg_name[REGNO (XEXP(offset,0))]); \
1263: offset = XEXP (offset, 1); \
1264: break; \
1265: default: \
1266: abort(); \
1267: } \
1268: } else { /* !MEM */ \
1269: if (!CONSTANT_ADDRESS_P (offset)) { \
1270: abort(); \
1271: } \
1272: output_addr_const (FILE, offset); \
1273: offset_printed = 1; \
1274: offset = 0; \
1275: } \
1276: } \
1277: \
1278: if (GET_CODE (addr) == PLUS) { \
1279: if (GET_CODE (XEXP (addr, 0)) == MULT) \
1280: { \
1281: reg1 = XEXP (addr, 0); /* [rX:Y] */ \
1282: addr = XEXP (addr, 1); /* CONST/REG */ \
1283: if (GET_CODE (XEXP (reg1, 1)) != CONST_INT || \
1284: GET_CODE (XEXP (reg1, 0)) != REG) { \
1285: abort(); \
1286: } \
1287: sprintf (reg2_str, "[%s:%c]", \
1288: reg_name[ REGNO(XEXP (reg1, 0)) ], \
1289: "XbwXdXXXq"[INTVAL (XEXP (reg1, 1))]); \
1290: reg1 = 0; \
1291: } \
1292: else if (GET_CODE (XEXP (addr, 1)) == MULT) \
1293: { \
1294: reg1 = XEXP (addr, 1); /* [rX:Y] */ \
1295: addr = XEXP (addr, 0); /* CONST */ \
1296: if (GET_CODE (XEXP (reg1, 1)) != CONST_INT || \
1297: GET_CODE (XEXP (reg1, 0)) != REG) { \
1298: abort(); \
1299: } \
1300: sprintf (reg2_str, "[%s:%c]", \
1301: reg_name[ REGNO(XEXP (reg1, 0)) ], \
1302: "XbwXdXXXq"[INTVAL (XEXP (reg1, 1))]); \
1303: reg1 = 0; \
1304: } \
1305: else if (GET_CODE (XEXP (addr, 0)) == REG) \
1306: { \
1307: sprintf (reg2_str, "[%s:b]", \
1308: reg_name[ REGNO(XEXP (addr, 0)) ]); \
1309: addr = XEXP (addr, 1); /* CONST / REG */ \
1310: } \
1311: else if (GET_CODE (XEXP (addr, 1)) == REG) \
1312: { \
1313: sprintf (reg2_str, "[%s:b]", \
1314: reg_name[ REGNO(XEXP (addr, 1)) ]); \
1315: addr = XEXP (addr, 0); /* CONST / REG */ \
1316: } \
1317: } \
1318: if (addr) \
1319: switch (GET_CODE (addr)) { \
1320: case MULT: \
1321: if(*reg2_str) { \
1322: fprintf (FILE, \
1323: "PROGRAM in disorder PRINT_ADDR, INDEX, two mults\n"); \
1324: print_rtl(FILE, addr); \
1325: exit (1); \
1326: } \
1327: reg1 = XEXP (addr, 0); /* [rX:Y] */ \
1328: addr = XEXP (addr, 1); /* CONST */ \
1329: if (GET_CODE (addr) != CONST_INT) { \
1330: fprintf (FILE, \
1331: "PROGRAM in disorder PRINT_ADDR, INDEX, !CONS3 (%d)\n", \
1332: GET_CODE (addr)); \
1333: print_rtl(FILE, addr); \
1334: exit (1); \
1335: } \
1336: sprintf (reg2_str, "[%s:%c]", reg_name[ REGNO(reg1) ], \
1337: "XbwXdXXXq"[INTVAL (addr)]); \
1338: break; \
1339: case REG: \
1340: if (!*reg1_str) { \
1341: if (offset || offset_printed) \
1342: sprintf (reg1_str, "(%s)", reg_name[REGNO (addr)]); \
1343: else \
1344: sprintf (reg1_str, "0(%s)", reg_name[REGNO (addr)]); \
1345: } else if (!*reg2_str) \
1346: sprintf (reg2_str, "[%s:b]", \
1347: reg_name[REGNO (addr)]); \
1348: else { \
1349: abort(); \
1350: } \
1351: break; \
1352: default: \
1353: if (offset_printed) \
1354: fprintf (FILE, "+"); \
1355: output_addr_const (FILE, addr); \
1356: offset_printed ++; \
1357: } \
1358: if (offset) { \
1359: if(!offset_printed) \
1360: fputc ('0', FILE); \
1361: fputc ('(', FILE); \
1362: output_addr_const (FILE, offset); \
1363: } \
1364: if (*reg1_str) \
1365: fprintf (FILE, "%s", reg1_str); \
1366: if (*reg2_str) \
1367: fprintf (FILE, "%s", reg2_str); \
1368: break; \
1369: default: \
1370: output_addr_const (FILE, addr); \
1371: } \
1372: if(mem) \
1373: fprintf(FILE,")");}
1374:
1375: /*
1376: Local variables:
1377: version-control: t
1378: End:
1379: */
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