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1.1 root 1: /* Definitions of target machine for GNU compiler, for SPUR chip.
2: Copyright (C) 1988 Free Software Foundation, Inc.
3:
4: This file is part of GNU CC.
5:
6: GNU CC is distributed in the hope that it will be useful,
7: but WITHOUT ANY WARRANTY. No author or distributor
8: accepts responsibility to anyone for the consequences of using it
9: or for whether it serves any particular purpose or works at all,
10: unless he says so in writing. Refer to the GNU CC General Public
11: License for full details.
12:
13: Everyone is granted permission to copy, modify and redistribute
14: GNU CC, but only under the conditions described in the
15: GNU CC General Public License. A copy of this license is
16: supposed to have been given to you along with GNU CC so you
17: can know your rights and responsibilities. It should be in a
18: file named COPYING. Among other things, the copyright notice
19: and this notice must be preserved on all copies. */
20:
21:
22: /* Note that some other tm- files include this one and then override
23: many of the definitions that relate to assembler syntax. */
24:
25:
26: /* Names to predefine in the preprocessor for this target machine. */
27:
28: #define CPP_PREDEFINES "-Dspur"
29:
30: /* Print subsidiary information on the compiler version in use. */
31: #define TARGET_VERSION ;
32:
33: /* Run-time compilation parameters selecting different hardware subsets.
34:
35: On the SPUR, we don't yet need any. */
36:
37: extern int target_flags;
38:
39: /* Nonzero if we should generate code to use the fpu. */
40: #define TARGET_FPU (target_flags & 1)
41:
42: /* Macro to define tables used to set the flags.
43: This is a list in braces of pairs in braces,
44: each pair being { "NAME", VALUE }
45: where VALUE is the bits to set or minus the bits to clear.
46: An empty string NAME is used to identify the default VALUE. */
47:
48: #define TARGET_SWITCHES \
49: { {"fpu", 1}, \
50: {"soft-float", -1}, \
51: { "", TARGET_DEFAULT}}
52:
53: #define TARGET_DEFAULT 0
54:
55: /* target machine storage layout */
56:
57: /* Define this if most significant bit is lowest numbered
58: in instructions that operate on numbered bit-fields.
59: This is a moot question on the SPUR due to the lack of bit-field insns. */
60: /* #define BITS_BIG_ENDIAN */
61:
62: /* Define this if most significant byte of a word is the lowest numbered. */
63: /* That is not true on SPUR. */
64: /* #define BYTES_BIG_ENDIAN */
65:
66: /* Define this if most significant word of a multiword number is numbered. */
67: /* For SPUR we can decide arbitrarily
68: since there are no machine instructions for them. */
69: /* #define WORDS_BIG_ENDIAN */
70:
71: /* number of bits in an addressible storage unit */
72: #define BITS_PER_UNIT 8
73:
74: /* Width in bits of a "word", which is the contents of a machine register.
75: Note that this is not necessarily the width of data type `int';
76: if using 16-bit ints on a 68000, this would still be 32.
77: But on a machine with 16-bit registers, this would be 16. */
78: #define BITS_PER_WORD 32
79:
80: /* Width of a word, in units (bytes). */
81: #define UNITS_PER_WORD 4
82:
83: /* Width in bits of a pointer.
84: See also the macro `Pmode' defined below. */
85: #define POINTER_SIZE 32
86:
87: /* Allocation boundary (in *bits*) for storing pointers in memory. */
88: #define POINTER_BOUNDARY 32
89:
90: /* Allocation boundary (in *bits*) for storing arguments in argument list. */
91: #define PARM_BOUNDARY 64
92:
93: /* Boundary (in *bits*) on which stack pointer should be aligned. */
94: #define STACK_BOUNDARY 64
95:
96: /* Allocation boundary (in *bits*) for the code of a function. */
97: #define FUNCTION_BOUNDARY 32
98:
99: /* Alignment of field after `int : 0' in a structure. */
100: #define EMPTY_FIELD_BOUNDARY 32
101:
102: /* Every structure's size must be a multiple of this. */
103: #define STRUCTURE_SIZE_BOUNDARY 32
104:
105: /* No data type wants to be aligned rounder than this. */
106: #define BIGGEST_ALIGNMENT 64
107:
108: /* Define this if move instructions will actually fail to work
109: when given unaligned data. */
110: #define STRICT_ALIGNMENT
111:
112: /* Standard register usage. */
113:
114: /* Number of actual hardware registers.
115: The hardware registers are assigned numbers for the compiler
116: from 0 to just below FIRST_PSEUDO_REGISTER.
117: All registers that the compiler knows about must be given numbers,
118: even those that are not normally considered general registers.
119:
120: SPUR has 32 fullword registers and 15 floating point registers. */
121:
122: #define FIRST_PSEUDO_REGISTER 47
123:
124: /* 1 for registers that have pervasive standard uses
125: and are not available for the register allocator.
126: On SPUR, this includes all the global registers
127: and the callee return address register. */
128: #define FIXED_REGISTERS \
129: {1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
130: 1, 0, 0, 0, 0, 0, \
131: 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, \
132: 1, 0, 0, 0, 0, 0, \
133: 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}
134:
135: /* 1 for registers not available across function calls.
136: These must include the FIXED_REGISTERS and also any
137: registers that can be used without being saved.
138: The latter must include the registers where values are returned
139: and the register where structure-value addresses are passed.
140: Aside from that, you can include as many other registers as you like. */
141: #define CALL_USED_REGISTERS \
142: {1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
143: 1, 0, 0, 0, 0, 0, \
144: 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, \
145: 1, 1, 1, 1, 1, 1, \
146: 1, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0}
147:
148: /* Return number of consecutive hard regs needed starting at reg REGNO
149: to hold something of mode MODE.
150: This is ordinarily the length in words of a value of mode MODE
151: but can be less for certain modes in special long registers.
152:
153: On SPUR, ordinary registers hold 32 bits worth;
154: a single floating point register is always enough for
155: anything that can be stored in them at all. */
156: #define HARD_REGNO_NREGS(REGNO, MODE) \
157: ((REGNO) >= 32 ? 1 \
158: : ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD))
159:
160: /* Value is 1 if hard register REGNO can hold a value of machine-mode MODE.
161: On SPUR, the cpu registers can hold any mode but the float registers
162: can hold only SFmode or DFmode. And they can't hold anything if use
163: of hardware floating point is disabled. */
164: #define HARD_REGNO_MODE_OK(REGNO, MODE) \
165: (((REGNO) < 32 && (GET_MODE_SIZE (MODE) <= 4 || (REGNO) < 31)) \
166: || (TARGET_FPU && ((MODE) == SFmode || (MODE) == DFmode)))
167:
168: /* Value is 1 if it is a good idea to tie two pseudo registers
169: when one has mode MODE1 and one has mode MODE2.
170: If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2,
171: for any hard reg, then this must be 0 for correct output. */
172: #define MODES_TIEABLE_P(MODE1, MODE2) \
173: (((MODE1) == SFmode || (MODE1) == DFmode) \
174: == ((MODE2) == SFmode || (MODE2) == DFmode))
175:
176: /* Specify the registers used for certain standard purposes.
177: The values of these macros are register numbers. */
178:
179: /* SPUR pc isn't overloaded on a register that the compiler knows about. */
180: /* #define PC_REGNUM */
181:
182: /* Register to use for pushing function arguments. */
183: #define STACK_POINTER_REGNUM 4
184:
185: /* Base register for access to local variables of the function. */
186: #define FRAME_POINTER_REGNUM 25
187:
188: /* Value should be nonzero if functions must have frame pointers.
189: Zero means the frame pointer need not be set up (and parms
190: may be accessed via the stack pointer) in functions that seem suitable.
191: This is computed in `reload', in reload1.c. */
192: #define FRAME_POINTER_REQUIRED 1
193:
194: /* Base register for access to arguments of the function. */
195: #define ARG_POINTER_REGNUM 25
196:
197: /* Register in which static-chain is passed to a function. */
198: /* ??? */
199: #define STATIC_CHAIN_REGNUM 8
200:
201: /* Register in which address to store a structure value
202: is passed to a function. */
203: #define STRUCT_VALUE_REGNUM 27
204: #define STRUCT_VALUE_INCOMING_REGNUM 11
205:
206: /* Define the classes of registers for register constraints in the
207: machine description. Also define ranges of constants.
208:
209: One of the classes must always be named ALL_REGS and include all hard regs.
210: If there is more than one class, another class must be named NO_REGS
211: and contain no registers.
212:
213: The name GENERAL_REGS must be the name of a class (or an alias for
214: another name such as ALL_REGS). This is the class of registers
215: that is allowed by "g" or "r" in a register constraint.
216: Also, registers outside this class are allocated only when
217: instructions express preferences for them.
218:
219: The classes must be numbered in nondecreasing order; that is,
220: a larger-numbered class must never be contained completely
221: in a smaller-numbered class.
222:
223: For any two classes, it is very desirable that there be another
224: class that represents their union. */
225:
226: /* The 68000 has two kinds of registers, hence four classes. */
227:
228: enum reg_class { NO_REGS, GENERAL_REGS, FP_REGS, ALL_REGS, LIM_REG_CLASSES };
229:
230: #define N_REG_CLASSES (int) LIM_REG_CLASSES
231:
232: /* Give names of register classes as strings for dump file. */
233:
234: #define REG_CLASS_NAMES \
235: {"NO_REGS", "GENERAL_REGS", "FP_REGS", "ALL_REGS" }
236:
237: /* Define which registers fit in which classes.
238: This is an initializer for a vector of HARD_REG_SET
239: of length N_REG_CLASSES. */
240:
241: #define REG_CLASS_CONTENTS {{0, 0}, {-1, 0}, {0, 0x7fff}, {-1, 0x7fff}}
242:
243: /* The same information, inverted:
244: Return the class number of the smallest class containing
245: reg number REGNO. This could be a conditional expression
246: or could index an array. */
247:
248: #define REGNO_REG_CLASS(REGNO) \
249: ((REGNO) >= 32 ? FP_REGS : GENERAL_REGS)
250:
251: /* The class value for index registers, and the one for base regs. */
252: #define INDEX_REG_CLASS GENERAL_REGS
253: #define BASE_REG_CLASS GENERAL_REGS
254:
255: /* Get reg_class from a letter such as appears in the machine description. */
256:
257: #define REG_CLASS_FROM_LETTER(C) \
258: ((C) == 'f' ? FP_REGS : NO_REGS)
259:
260: /* The letters I, J, K, L and M in a register constraint string
261: can be used to stand for particular ranges of immediate operands.
262: This macro defines what the ranges are.
263: C is the letter, and VALUE is a constant value.
264: Return 1 if VALUE is in the range specified by C.
265:
266: For SPUR, `I' is used for the range of constants an insn
267: can actually contain.
268: `J' is used for the range which is just zero (since that is R0).
269: `K' is used for the 5-bit operand of a compare insns. */
270:
271: #define CONST_OK_FOR_LETTER_P(VALUE, C) \
272: ((C) == 'I' ? (unsigned) ((VALUE) + 0x2000) < 0x4000 \
273: : (C) == 'J' ? (VALUE) == 0 \
274: : (C) == 'K' ? (unsigned) (VALUE) < 0x20 \
275: : 0)
276:
277: /* Similar, but for floating constants, and defining letters G and H.
278: Here VALUE is the CONST_DOUBLE rtx itself. */
279:
280: #define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) \
281: ((C) == 'G' && XINT (VALUE, 0) == 0 && XINT (VALUE, 1) == 0)
282:
283: /* Given an rtx X being reloaded into a reg required to be
284: in class CLASS, return the class of reg to actually use.
285: In general this is just CLASS; but on some machines
286: in some cases it is preferable to use a more restrictive class. */
287: #define PREFERRED_RELOAD_CLASS(X,CLASS) (CLASS)
288:
289: /* Return the maximum number of consecutive registers
290: needed to represent mode MODE in a register of class CLASS. */
291: /* On SPUR, this is the size of MODE in words,
292: except in the FP regs, where a single reg is always enough. */
293: #define CLASS_MAX_NREGS(CLASS, MODE) \
294: ((CLASS) == FP_REGS ? 1 \
295: : ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD))
296:
297: /* Stack layout; function entry, exit and calling. */
298:
299: /* Define this if pushing a word on the stack
300: makes the stack pointer a smaller address. */
301: #define STACK_GROWS_DOWNWARD
302:
303: /* Define this if the nominal address of the stack frame
304: is at the high-address end of the local variables;
305: that is, each additional local variable allocated
306: goes at a more negative offset in the frame. */
307: #define FRAME_GROWS_DOWNWARD
308:
309: /* Offset within stack frame to start allocating local variables at.
310: If FRAME_GROWS_DOWNWARD, this is the offset to the END of the
311: first local allocated. Otherwise, it is the offset to the BEGINNING
312: of the first local allocated. */
313: #define STARTING_FRAME_OFFSET 0
314:
315: /* If we generate an insn to push BYTES bytes,
316: this says how many the stack pointer really advances by.
317: On SPUR, don't define this because there are no push insns. */
318: /* #define PUSH_ROUNDING(BYTES) */
319:
320: /* Offset of first parameter from the argument pointer register value. */
321: #define FIRST_PARM_OFFSET 0
322:
323: /* Value is 1 if returning from a function call automatically
324: pops the arguments described by the number-of-args field in the call.
325: FUNTYPE is the data type of the function (as a tree),
326: or for a library call it is an identifier node for the subroutine name. */
327:
328: #define RETURN_POPS_ARGS(FUNTYPE) 0
329:
330: /* Define how to find the value returned by a function.
331: VALTYPE is the data type of the value (as a tree).
332: If the precise function being called is known, FUNC is its FUNCTION_DECL;
333: otherwise, FUNC is 0. */
334:
335: /* On SPUR the value is found in the second "output" register. */
336:
337: #define FUNCTION_VALUE(VALTYPE, FUNC) \
338: gen_rtx (REG, TYPE_MODE (VALTYPE), 27)
339:
340: /* But the called function leaves it in the second "input" register. */
341:
342: #define FUNCTION_OUTGOING_VALUE(VALTYPE, FUNC) \
343: gen_rtx (REG, TYPE_MODE (VALTYPE), 11)
344:
345: /* Define how to find the value returned by a library function
346: assuming the value has mode MODE. */
347:
348: #define LIBCALL_VALUE(MODE) gen_rtx (REG, MODE, 27)
349:
350: /* 1 if N is a possible register number for a function value
351: as seen by the caller.
352: On SPUR, the first "output" reg is the only register thus used. */
353:
354: #define FUNCTION_VALUE_REGNO_P(N) ((N) == 27)
355:
356: /* 1 if N is a possible register number for function argument passing.
357: On SPUR, these are the "output" registers. */
358:
359: #define FUNCTION_ARG_REGNO_P(N) ((N) < 32 && (N) > 26)
360:
361: /* Define a data type for recording info about an argument list
362: during the scan of that argument list. This data type should
363: hold all necessary information about the function itself
364: and about the args processed so far, enough to enable macros
365: such as FUNCTION_ARG to determine where the next arg should go.
366:
367: On SPUR, this is a single integer, which is a number of words
368: of arguments scanned so far (including the invisible argument,
369: if any, which holds the structure-value-address).
370: Thus 5 or more means all following args should go on the stack. */
371:
372: #define CUMULATIVE_ARGS int
373:
374: /* Initialize a variable CUM of type CUMULATIVE_ARGS
375: for a call to a function whose data type is FNTYPE.
376: For a library call, FNTYPE is 0.
377:
378: On SPUR, the offset normally starts at 0, but starts at 4 bytes
379: when the function gets a structure-value-address as an
380: invisible first argument. */
381:
382: #define INIT_CUMULATIVE_ARGS(CUM,FNTYPE) \
383: ((CUM) = ((FNTYPE) != 0 && TYPE_MODE (TREE_TYPE (FNTYPE)) == BLKmode))
384:
385: /* Update the data in CUM to advance over an argument
386: of mode MODE and data type TYPE.
387: (TYPE is null for libcalls where that information may not be available.) */
388:
389: #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \
390: ((CUM) += ((MODE) != BLKmode \
391: ? (GET_MODE_SIZE (MODE) + 3) / 4 \
392: : (int_size_in_bytes (TYPE) + 3) / 4))
393:
394: /* Determine where to put an argument to a function.
395: Value is zero to push the argument on the stack,
396: or a hard register in which to store the argument.
397:
398: MODE is the argument's machine mode.
399: TYPE is the data type of the argument (as a tree).
400: This is null for libcalls where that information may
401: not be available.
402: CUM is a variable of type CUMULATIVE_ARGS which gives info about
403: the preceding args and about the function being called.
404: NAMED is nonzero if this argument is a named parameter
405: (otherwise it is an extra parameter matching an ellipsis). */
406:
407: /* On SPUR the first five words of args are normally in registers
408: and the rest are pushed. But any arg that won't entirely fit in regs
409: is pushed. */
410:
411: #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \
412: (5 >= ((CUM) \
413: + ((MODE) == BLKmode \
414: ? (int_size_in_bytes (TYPE) + 3) / 4 \
415: : (GET_MODE_SIZE (MODE) + 3) / 4)) \
416: ? gen_rtx (REG, (MODE), 27 + (CUM)) \
417: : 0)
418:
419: /* Define where a function finds its arguments.
420: This is different from FUNCTION_ARG because of register windows. */
421:
422: #define FUNCTION_INCOMING_ARG(CUM, MODE, TYPE, NAMED) \
423: (5 >= ((CUM) \
424: + ((MODE) == BLKmode \
425: ? (int_size_in_bytes (TYPE) + 3) / 4 \
426: : (GET_MODE_SIZE (MODE) + 3) / 4)) \
427: ? gen_rtx (REG, (MODE), 11 + (CUM)) \
428: : 0)
429:
430: /* For an arg passed partly in registers and partly in memory,
431: this is the number of registers used.
432: For args passed entirely in registers or entirely in memory, zero. */
433:
434: #define FUNCTION_ARG_PARTIAL_NREGS(CUM, MODE, TYPE, NAMED) 0
435:
436: /* This macro generates the assembly code for function entry.
437: FILE is a stdio stream to output the code to.
438: SIZE is an int: how many units of temporary storage to allocate.
439: Refer to the array `regs_ever_live' to determine which registers
440: to save; `regs_ever_live[I]' is nonzero if register number I
441: is ever used in the function. This macro is responsible for
442: knowing which registers should not be saved even if used. */
443:
444: /* On spur, move-double insns between fpu and cpu need an 8-byte block
445: of memory. If any fpu reg is used in the function, we allocate
446: such a block here, at the bottom of the frame, just in case it's needed. */
447:
448: #define FUNCTION_PROLOGUE(FILE, SIZE) \
449: { \
450: static char *reg_names[] = REGISTER_NAMES; \
451: extern char call_used_regs[]; \
452: extern int current_function_pretend_args_size; \
453: int fsize = ((SIZE) + 7) & ~7; \
454: int nregs, i, fp_used = 0; \
455: for (i = 32, nregs = 0; i < FIRST_PSEUDO_REGISTER; i++) \
456: { \
457: if (regs_ever_live[i] && ! call_used_regs[i]) \
458: nregs++; \
459: if (regs_ever_live[i]) fp_used = 1; \
460: } \
461: if (fp_used) fsize += 8; \
462: fprintf (FILE, "0:\trd_special r24,pc\n"); \
463: fprintf (FILE, "\tadd_nt r25,r4,$%d\n", \
464: - current_function_pretend_args_size); \
465: if (fsize + nregs != 0 || current_function_pretend_args_size > 0) \
466: fprintf (FILE, "\tadd_nt r4,r25,$%d\n", - fsize - nregs * 16); \
467: for (i = 32, nregs = 0; i < FIRST_PSEUDO_REGISTER; i++) \
468: if (regs_ever_live[i] && ! call_used_regs[i]) \
469: { \
470: fprintf (FILE, "\tst_ext1 %s,r4,$%d\n", \
471: reg_names[i], 8 * nregs++); \
472: fprintf (FILE, "\tst_ext2 %s,r4,$%d\n", \
473: reg_names[i], 8 * nregs++); \
474: } \
475: }
476:
477: /* Output assembler code to FILE to increment profiler label # LABELNO
478: for profiling a function entry. */
479:
480: #define FUNCTION_PROFILER(FILE, LABELNO) \
481: abort ();
482:
483: /* EXIT_IGNORE_STACK should be nonzero if, when returning from a function,
484: the stack pointer does not matter. The value is tested only in
485: functions that have frame pointers.
486: No definition is equivalent to always zero. */
487:
488: extern int may_call_alloca;
489: extern int current_function_pretend_args_size;
490:
491: #define EXIT_IGNORE_STACK \
492: (get_frame_size () != 0 \
493: || may_call_alloca || current_function_pretend_args_size)
494:
495: /* This macro generates the assembly code for function exit,
496: on machines that need it. If FUNCTION_EPILOGUE is not defined
497: then individual return instructions are generated for each
498: return statement. Args are same as for FUNCTION_PROLOGUE.
499:
500: The function epilogue should not depend on the current stack pointer!
501: It should use the frame pointer only. This is mandatory because
502: of alloca; we also take advantage of it to omit stack adjustments
503: before returning. */
504:
505: #define FUNCTION_EPILOGUE(FILE, SIZE) \
506: { \
507: static char *reg_names[] = REGISTER_NAMES; \
508: extern char call_used_regs[]; \
509: extern int may_call_alloca; \
510: extern int current_function_pretend_args_size; \
511: int fsize = ((SIZE) + 7) & ~7; \
512: int nregs, i, fp_used = 0; \
513: for (i = 32, nregs = 0; i < FIRST_PSEUDO_REGISTER; i++) \
514: { \
515: if (regs_ever_live[i] && ! call_used_regs[i]) \
516: nregs++; \
517: if (regs_ever_live[i]) fp_used = 1; \
518: } \
519: if (fp_used) fsize += 8; \
520: if (nregs != 0) \
521: { \
522: fprintf (FILE, "\tadd_nt r4,r25,$%d\n", - fsize - nregs * 16); \
523: for (i = 32, nregs = 0; i < FIRST_PSEUDO_REGISTER; i++) \
524: if (regs_ever_live[i] && ! call_used_regs[i]) \
525: { \
526: fprintf (FILE, "\tld_ext1 %s,r4,$%d\n\tnop\n", \
527: reg_names[i], 8 * nregs++); \
528: fprintf (FILE, "\tld_ext2 %s,r4,$%d\n\tnop\n", \
529: reg_names[i], 8 * nregs++); \
530: } \
531: } \
532: if (fsize != 0 || nregs != 0 || may_call_alloca \
533: || current_function_pretend_args_size > 0) \
534: fprintf (FILE, "\tadd_nt r4,r25,$%d\n", \
535: current_function_pretend_args_size); \
536: fprintf (FILE, "\treturn r10,$8\n\tnop\n"); \
537: }
538:
539: /* If the memory address ADDR is relative to the frame pointer,
540: correct it to be relative to the stack pointer instead.
541: This is for when we don't use a frame pointer.
542: ADDR should be a variable name. */
543:
544: #define FIX_FRAME_POINTER_ADDRESS(ADDR,DEPTH) abort ();
545:
546: /* Addressing modes, and classification of registers for them. */
547:
548: /* #define HAVE_POST_INCREMENT */
549: /* #define HAVE_POST_DECREMENT */
550:
551: /* #define HAVE_PRE_DECREMENT */
552: /* #define HAVE_PRE_INCREMENT */
553:
554: /* Macros to check register numbers against specific register classes. */
555:
556: /* These assume that REGNO is a hard or pseudo reg number.
557: They give nonzero only if REGNO is a hard reg of the suitable class
558: or a pseudo reg currently allocated to a suitable hard reg.
559: Since they use reg_renumber, they are safe only once reg_renumber
560: has been allocated, which happens in local-alloc.c. */
561:
562: #define REGNO_OK_FOR_INDEX_P(REGNO) \
563: ((REGNO) < 32 || (unsigned) reg_renumber[REGNO] < 32)
564: #define REGNO_OK_FOR_BASE_P(REGNO) \
565: ((REGNO) < 32 || (unsigned) reg_renumber[REGNO] < 32)
566: #define REGNO_OK_FOR_FP_P(REGNO) \
567: (((REGNO) ^ 0x20) < 14 || (unsigned) (reg_renumber[REGNO] ^ 0x20) < 14)
568:
569: /* Now macros that check whether X is a register and also,
570: strictly, whether it is in a specified class.
571:
572: These macros are specific to the SPUR, and may be used only
573: in code for printing assembler insns and in conditions for
574: define_optimization. */
575:
576: /* 1 if X is an fp register. */
577:
578: #define FP_REG_P(X) (REG_P (X) && REGNO_OK_FOR_FP_P (REGNO (X)))
579:
580: /* Maximum number of registers that can appear in a valid memory address. */
581:
582: #define MAX_REGS_PER_ADDRESS 2
583:
584: /* Recognize any constant value that is a valid address. */
585:
586: #define CONSTANT_ADDRESS_P(X) CONSTANT_P (X)
587:
588: /* Nonzero if the constant value X is a legitimate general operand.
589: It is given that X satisfies CONSTANT_P or is a CONST_DOUBLE. */
590:
591: #define LEGITIMATE_CONSTANT_P(X) \
592: ((GET_CODE (X) == CONST_INT \
593: && (unsigned) (INTVAL (X) + 0x2000) < 0x4000)\
594: || (GET_CODE (X) == SYMBOL_REF && (X)->unchanging))
595:
596: /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx
597: and check its validity for a certain class.
598: We have two alternate definitions for each of them.
599: The usual definition accepts all pseudo regs; the other rejects
600: them unless they have been allocated suitable hard regs.
601: The symbol REG_OK_STRICT causes the latter definition to be used.
602:
603: Most source files want to accept pseudo regs in the hope that
604: they will get allocated to the class that the insn wants them to be in.
605: Source files for reload pass need to be strict.
606: After reload, it makes no difference, since pseudo regs have
607: been eliminated by then. */
608:
609: #ifndef REG_OK_STRICT
610:
611: /* Nonzero if X is a hard reg that can be used as an index
612: or if it is a pseudo reg. */
613: #define REG_OK_FOR_INDEX_P(X) (((unsigned) REGNO (X)) - 32 >= 14)
614: /* Nonzero if X is a hard reg that can be used as a base reg
615: or if it is a pseudo reg. */
616: #define REG_OK_FOR_BASE_P(X) (((unsigned) REGNO (X)) - 32 >= 14)
617:
618: #else
619:
620: /* Nonzero if X is a hard reg that can be used as an index. */
621: #define REG_OK_FOR_INDEX_P(X) REGNO_OK_FOR_INDEX_P (REGNO (X))
622: /* Nonzero if X is a hard reg that can be used as a base reg. */
623: #define REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P (REGNO (X))
624:
625: #endif
626:
627: /* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression
628: that is a valid memory address for an instruction.
629: The MODE argument is the machine mode for the MEM expression
630: that wants to use this address.
631:
632: On SPUR, the actual legitimate addresses must be REG+REG or REG+SMALLINT.
633: But we can treat a SYMBOL_REF as legitimate if it is part of this
634: function's constant-pool, because such addresses can actually
635: be output as REG+SMALLINT. */
636:
637: #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \
638: { if (GET_CODE (X) == REG \
639: && REG_OK_FOR_BASE_P (X)) \
640: goto ADDR; \
641: if (GET_CODE (X) == SYMBOL_REF && (X)->unchanging) \
642: goto ADDR; \
643: if (GET_CODE (X) == PLUS \
644: && GET_CODE (XEXP (X, 0)) == REG \
645: && REG_OK_FOR_BASE_P (XEXP (X, 0))) \
646: { \
647: if (GET_CODE (XEXP (X, 1)) == CONST_INT \
648: && INTVAL (XEXP (X, 1)) >= -0x2000 \
649: && INTVAL (XEXP (X, 1)) < 0x2000) \
650: goto ADDR; \
651: } \
652: }
653:
654: /* Try machine-dependent ways of modifying an illegitimate address
655: to be legitimate. If we find one, return the new, valid address.
656: This macro is used in only one place: `memory_address' in explow.c.
657:
658: OLDX is the address as it was before break_out_memory_refs was called.
659: In some cases it is useful to look at this to decide what needs to be done.
660:
661: MODE and WIN are passed so that this macro can use
662: GO_IF_LEGITIMATE_ADDRESS.
663:
664: It is always safe for this macro to do nothing. It exists to recognize
665: opportunities to optimize the output. */
666:
667: /* On SPUR, change REG+N into REG+REG, and REG+(X*Y) into REG+REG. */
668:
669: #define LEGITIMIZE_ADDRESS(X,OLDX,MODE,WIN) \
670: { if (GET_CODE (X) == PLUS && CONSTANT_ADDRESS_P (XEXP (X, 1))) \
671: (X) = gen_rtx (PLUS, SImode, XEXP (X, 0), \
672: copy_to_mode_reg (SImode, XEXP (X, 1))); \
673: if (GET_CODE (X) == PLUS && CONSTANT_ADDRESS_P (XEXP (X, 0))) \
674: (X) = gen_rtx (PLUS, SImode, XEXP (X, 1), \
675: copy_to_mode_reg (SImode, XEXP (X, 0))); \
676: if (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 0)) == MULT) \
677: (X) = gen_rtx (PLUS, SImode, XEXP (X, 1), \
678: force_operand (XEXP (X, 0), 0)); \
679: if (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 1)) == MULT) \
680: (X) = gen_rtx (PLUS, SImode, XEXP (X, 0), \
681: force_operand (XEXP (X, 1), 0)); \
682: if (memory_address_p (MODE, X)) \
683: goto WIN; }
684:
685: /* Go to LABEL if ADDR (a legitimate address expression)
686: has an effect that depends on the machine mode it is used for.
687: On the SPUR this is never true. */
688:
689: #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR,LABEL)
690:
691: /* Specify the machine mode that this machine uses
692: for the index in the tablejump instruction. */
693: #define CASE_VECTOR_MODE SImode
694:
695: /* Define this if the tablejump instruction expects the table
696: to contain offsets from the address of the table.
697: Do not define this if the table should contain absolute addresses. */
698: /* #define CASE_VECTOR_PC_RELATIVE */
699:
700: /* Specify the tree operation to be used to convert reals to integers. */
701: #define IMPLICIT_FIX_EXPR FIX_ROUND_EXPR
702:
703: /* This is the kind of divide that is easiest to do in the general case. */
704: #define EASY_DIV_EXPR TRUNC_DIV_EXPR
705:
706: /* Define this as 1 if `char' should by default be signed; else as 0. */
707: #define DEFAULT_SIGNED_CHAR 0
708:
709: /* Max number of bytes we can move from memory to memory
710: in one reasonably fast instruction. */
711: #define MOVE_MAX 4
712:
713: /* Nonzero if access to memory by bytes is slow and undesirable. */
714: #define SLOW_BYTE_ACCESS 1
715:
716: /* Do not break .stabs pseudos into continuations. */
717: #define DBX_CONTIN_LENGTH 0
718:
719: /* Don't try to use the `x' type-cross-reference character in DBX data.
720: Also has the consequence of putting each struct, union or enum
721: into a separate .stabs, containing only cross-refs to the others. */
722: #define DBX_NO_XREFS
723:
724: /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits
725: is done just by pretending it is already truncated. */
726: #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
727:
728: /* Specify the machine mode that pointers have.
729: After generation of rtl, the compiler makes no further distinction
730: between pointers and any other objects of this machine mode. */
731: #define Pmode SImode
732:
733: /* A function address in a call instruction
734: is a byte address (for indexing purposes)
735: so give the MEM rtx a byte's mode. */
736: #define FUNCTION_MODE SImode
737:
738: /* Define this if addresses of constant functions
739: shouldn't be put through pseudo regs where they can be cse'd.
740: Desirable on machines where ordinary constants are expensive
741: but a CALL with constant address is cheap. */
742: #define NO_FUNCTION_CSE
743:
744: /* Compute the cost of computing a constant rtl expression RTX
745: whose rtx-code is CODE. The body of this macro is a portion
746: of a switch statement. If the code is computed here,
747: return it with a return statement. Otherwise, break from the switch. */
748:
749: #define CONST_COSTS(RTX,CODE) \
750: case CONST_INT: \
751: if (INTVAL (RTX) < 0x2000 && INTVAL (RTX) >= -0x2000) return 1; \
752: case CONST: \
753: case LABEL_REF: \
754: case SYMBOL_REF: \
755: return 2; \
756: case CONST_DOUBLE: \
757: return 4;
758:
759: /* Tell final.c how to eliminate redundant test instructions. */
760:
761: /* Here we define machine-dependent flags and fields in cc_status
762: (see `conditions.h'). */
763:
764: /* (None are needed on SPUR.) */
765:
766: /* Store in cc_status the expressions
767: that the condition codes will describe
768: after execution of an instruction whose pattern is EXP.
769: Do not alter them if the instruction would not alter the cc's. */
770:
771: /* The SPUR does not really have a condition code. */
772:
773: #define NOTICE_UPDATE_CC(EXP) \
774: { CC_STATUS_INIT; }
775:
776: /* Control the assembler format that we output. */
777:
778: /* Output at beginning of assembler file. */
779:
780: #define ASM_FILE_START ""
781:
782: /* Output to assembler file text saying following lines
783: may contain character constants, extra white space, comments, etc. */
784:
785: #define ASM_APP_ON ""
786:
787: /* Output to assembler file text saying following lines
788: no longer contain unusual constructs. */
789:
790: #define ASM_APP_OFF ""
791:
792: /* Output before read-only data. */
793:
794: #define TEXT_SECTION_ASM_OP ".text"
795:
796: /* Output before writable data. */
797:
798: #define DATA_SECTION_ASM_OP ".data"
799:
800: /* How to refer to registers in assembler output.
801: This sequence is indexed by compiler's hard-register-number (see above). */
802:
803: #define REGISTER_NAMES \
804: {"r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", "r8", "r9", \
805: "r10", "r11", "r12", "r13", "r14", "r15", "r16", "r17", "r18", "r19", \
806: "r20", "r21", "r22", "r23", "r24", "r25", "r26", "r27", "r28", "r29", \
807: "r30", "r31", \
808: "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7", "f8", "f9", \
809: "f10", "f11", "f12", "f13", "f14" }
810:
811: /* How to renumber registers for dbx and gdb. */
812:
813: #define DBX_REGISTER_NUMBER(REGNO) (REGNO)
814:
815: /* This is how to output the definition of a user-level label named NAME,
816: such as the label on a static function or variable NAME. */
817:
818: #define ASM_OUTPUT_LABEL(FILE,NAME) \
819: do { assemble_name (FILE, NAME); fputs (":\n", FILE); } while (0)
820:
821: /* This is how to output a command to make the user-level label named NAME
822: defined for reference from other files. */
823:
824: #define ASM_GLOBALIZE_LABEL(FILE,NAME) \
825: do { fputs (".globl ", FILE); assemble_name (FILE, NAME); fputs ("\n", FILE);} while (0)
826:
827: /* This is how to output a reference to a user-level label named NAME.
828: `assemble_name' uses this. */
829:
830: #define ASM_OUTPUT_LABELREF(FILE,NAME) \
831: fprintf (FILE, "_%s", NAME)
832:
833: /* This is how to output an internal numbered label where
834: PREFIX is the class of label and NUM is the number within the class. */
835:
836: #define ASM_OUTPUT_INTERNAL_LABEL(FILE,PREFIX,NUM) \
837: fprintf (FILE, "%s%d:\n", PREFIX, NUM)
838:
839: /* This is how to store into the string LABEL
840: the symbol_ref name of an internal numbered label where
841: PREFIX is the class of label and NUM is the number within the class.
842: This is suitable for output with `assemble_name'. */
843:
844: #define ASM_GENERATE_INTERNAL_LABEL(LABEL,PREFIX,NUM) \
845: sprintf (LABEL, "*%s%d", PREFIX, NUM)
846:
847: /* This is how to output an assembler line defining a `double' constant. */
848:
849: #define ASM_OUTPUT_DOUBLE(FILE,VALUE) \
850: fprintf (FILE, "\t.double %.20e\n", (VALUE))
851:
852: /* This is how to output an assembler line defining a `float' constant. */
853:
854: #define ASM_OUTPUT_FLOAT(FILE,VALUE) \
855: fprintf (FILE, "\t.single %.12e\n", (VALUE))
856:
857: /* This is how to output an assembler line defining an `int' constant. */
858:
859: #define ASM_OUTPUT_INT(FILE,VALUE) \
860: ( fprintf (FILE, "\t.long "), \
861: output_addr_const (FILE, (VALUE)), \
862: fprintf (FILE, "\n"))
863:
864: /* Likewise for `char' and `short' constants. */
865:
866: #define ASM_OUTPUT_SHORT(FILE,VALUE) \
867: ( fprintf (FILE, "\t.word "), \
868: output_addr_const (FILE, (VALUE)), \
869: fprintf (FILE, "\n"))
870:
871: #define ASM_OUTPUT_CHAR(FILE,VALUE) \
872: ( fprintf (FILE, "\t.byte "), \
873: output_addr_const (FILE, (VALUE)), \
874: fprintf (FILE, "\n"))
875:
876: /* This is how to output an assembler line for a numeric constant byte. */
877:
878: #define ASM_OUTPUT_BYTE(FILE,VALUE) \
879: fprintf (FILE, "\t.byte 0x%x\n", (VALUE))
880:
881: /* This is how to output an element of a case-vector that is absolute. */
882:
883: #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \
884: fprintf (FILE, "\t.long L%d\n", VALUE)
885:
886: /* This is how to output an element of a case-vector that is relative.
887: (SPUR does not use such vectors,
888: but we must define this macro anyway.) */
889:
890: #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, VALUE, REL) \
891: fprintf (FILE, "\t.word L%d-L%d\n", VALUE, REL)
892:
893: /* This is how to output an assembler line
894: that says to advance the location counter
895: to a multiple of 2**LOG bytes. */
896:
897: #define ASM_OUTPUT_ALIGN(FILE,LOG) \
898: if ((LOG) != 0) \
899: fprintf (FILE, "\t.align %d\n", (LOG))
900:
901: #define ASM_OUTPUT_SKIP(FILE,SIZE) \
902: fprintf (FILE, "\t.space %d\n", (SIZE))
903:
904: /* This says how to output an assembler line
905: to define a global common symbol. */
906:
907: #define ASM_OUTPUT_COMMON(FILE, NAME, SIZE) \
908: ( fputs (".comm ", (FILE)), \
909: assemble_name ((FILE), (NAME)), \
910: fprintf ((FILE), ",%d\n", (SIZE)))
911:
912: /* This says how to output an assembler line
913: to define a local common symbol. */
914:
915: #define ASM_OUTPUT_LOCAL(FILE, NAME, SIZE) \
916: ( fputs (".lcomm ", (FILE)), \
917: assemble_name ((FILE), (NAME)), \
918: fprintf ((FILE), ",%d\n", (SIZE)))
919:
920: /* Store in OUTPUT a string (made with alloca) containing
921: an assembler-name for a local static variable named NAME.
922: LABELNO is an integer which is different for each call. */
923:
924: #define ASM_FORMAT_PRIVATE_NAME(OUTPUT, NAME, LABELNO) \
925: ( (OUTPUT) = (char *) alloca (strlen ((NAME)) + 10), \
926: sprintf ((OUTPUT), "%s.%d", (NAME), (LABELNO)))
927:
928: /* Define the parentheses used to group arithmetic operations
929: in assembler code. */
930:
931: #define ASM_OPEN_PAREN "("
932: #define ASM_CLOSE_PAREN ")"
933:
934: /* Define results of standard character escape sequences. */
935: #define TARGET_BELL 007
936: #define TARGET_BS 010
937: #define TARGET_TAB 011
938: #define TARGET_NEWLINE 012
939: #define TARGET_VT 013
940: #define TARGET_FF 014
941: #define TARGET_CR 015
942:
943: /* Print operand X (an rtx) in assembler syntax to file FILE.
944: CODE is a letter or dot (`z' in `%z0') or 0 if no letter was specified.
945: For `%' followed by punctuation, CODE is the punctuation and X is null.
946:
947: On SPUR, the CODE can be `r', meaning this is a register-only operand
948: and an immediate zero should be represented as `r0'. */
949:
950: #define PRINT_OPERAND(FILE, X, CODE) \
951: { if (GET_CODE (X) == REG) \
952: fprintf (FILE, "%s", reg_name [REGNO (X)]); \
953: else if (GET_CODE (X) == MEM) \
954: output_address (XEXP (X, 0)); \
955: else if (GET_CODE (X) == CONST_DOUBLE) \
956: abort (); \
957: else if ((CODE) == 'r' && (X) == const0_rtx) \
958: fprintf (FILE, "r0"); \
959: else { putc ('$', FILE); output_addr_const (FILE, X); }}
960:
961: /* Print a memory address as an operand to reference that memory location. */
962:
963: #define PRINT_OPERAND_ADDRESS(FILE, ADDR) \
964: { register rtx base, index = 0; \
965: int offset = 0; \
966: register rtx addr = ADDR; \
967: if (GET_CODE (addr) == REG) \
968: { \
969: fprintf (FILE, "%s,$0", reg_name [REGNO (addr)]); \
970: } \
971: else if (GET_CODE (addr) == PLUS) \
972: { \
973: if (GET_CODE (XEXP (addr, 0)) == CONST_INT) \
974: offset = INTVAL (XEXP (addr, 0)), base = XEXP (addr, 1);\
975: else if (GET_CODE (XEXP (addr, 1)) == CONST_INT) \
976: offset = INTVAL (XEXP (addr, 1)), base = XEXP (addr, 0);\
977: else \
978: base = XEXP (addr, 0), index = XEXP (addr, 1); \
979: fprintf (FILE, "%s,", reg_name [REGNO (base)]); \
980: if (index == 0) \
981: fprintf (FILE, "$%d", offset); \
982: else \
983: fprintf (FILE, "%s,", reg_name [REGNO (index)]); \
984: } \
985: else \
986: { \
987: fprintf (FILE, "r24,$("); \
988: output_addr_const (FILE, addr); \
989: fprintf (FILE, "-0b)"); \
990: } \
991: }
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