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1.1 root 1: .pa 1
2: .he '3/15/72''FPTRAP (III)'
3: .ti 0
4: NAME fptrap -- PDP-11/45 floating point simulator
5: .sp
6: .ti 0
7: .nf
8: SYNOPSIS .globl fptrap
9: .br
10: sys ilgins; fptrap
11: .fi
12: .sp
13: .ti 0
14: DESCRIPTION fptrap______
15: is a package which picks up instructions which are illegal
16: for the PDP-11/20, and if they correspond to 11/45 floating
17: point instructions, simulates their operation.
18: The following instructions are supported:
19:
20: cfcc
21: setf
22: seti
23: setd
24: setl
25: . ldfps src (not in assembler)
26: . stfps dst (not in assembler)
27: clrf fdst
28: tstf fsrc
29: absf fdst
30: negf fdst
31: mulf fsrc,fr
32: modf fsrc,fr
33: addf fsrc,fr
34: movf fsrc,fr (=ldf)
35: movf fr,fdst (=stf)
36: subf fsrc,fr
37: cmpf fsrc,fr
38: divf fsrc,fr
39: .nf
40: . movei fr,dst (=stexp) (not in assembler)
41: . movie src,fr (=ldexp) (not in assembler)
42: movfi fr,dst (=stcfi)
43: movif src,fr (=ldcif)
44: movfo fr,fdst (=stcxy)
45: movof fsrc,fr (=ldcyx)
46: .fi
47:
48: Here src___ and dst___ stand for source and destination, fsrc____
49: and fdst____ for floating source and destination, and fr__ for
50: floating register.
51: Notice that the names of several of the opcodes have changed.
52: The only strange instruction
53: is movf____, which turns into stf___ if its source
54: operand is a floating register, and into ldf___ if not.
55: .sp
56: The simulator sets the floating condition codes
57: on both ldf___ and stf___.
58: The 11/45 hardware does not set
59: the fcc on stf.
60:
61: Short and long format for both floating point numbers
62: and integers is supported. Truncation mode is always in effect.
63: Traps for overflow and other arithmetic errors are not supported.
64: Illegal instructions or addresses cause a simulated trap
65: so that a core image is produced.
66:
67: The condition code bits are maintained correctly.
68:
69: For floating-point source operands, immediate mode ((pc)+) is
70: not supported, since the PDP-11/45
71: handbook is not clear on what to do about it.
72:
73: After an arithmetic error the result is generally
74: meaningless.
75:
76: The arithmetic is always done in double-precision, so exact
77: but unrounded results are to be expected in single-precision
78: mode. Double precision results are probably less correct
79: than the hardware will be.
80:
81: The lower parts of the floating registers become meaningless
82: during single-precision operations.
83: .sp
84: .ti 0
85: FILES kept in /usr/lib/liba.a
86: .sp
87: .ti 0
88: SEE ALSO PDP-11/45 handbook, ilgins(II)
89: .sp
90: .ti 0
91: DIAGNOSTICS trap, c-bit, v-bit
92: .sp
93: .ti 0
94: BUGS see above
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