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Annotation of researchv10dc/lsys/sys/clock.h, revision 1.1.1.1

1.1       root        1: /*
                      2:  * VAX clock registers
                      3:  */
                      4: 
                      5: #define        ICCS_RUN        0x00000001
                      6: #define        ICCS_TRANS      0x00000010
                      7: #define        ICCS_SS         0x00000020
                      8: #define        ICCS_IE         0x00000040
                      9: #define        ICCS_INT        0x00000080
                     10: #define        ICCS_ERR        0x80000000
                     11:        
                     12: #define        SECDAY          ((unsigned)(24*60*60))          /* seconds per day */
                     13: #define        SECYR           ((unsigned)(365*SECDAY))        /* per common year */
                     14: /*
                     15:  * TODRZERO is the what the TODR should contain when the ``year'' begins.
                     16:  * The TODR should always contain a number between 0 and SECYR+SECDAY.
                     17:  */
                     18: #define        TODRZERO        ((unsigned)(1<<28))
                     19: 
                     20: #define        YRREF           1970
                     21: #define        LEAPYEAR(year)  ((year)%4==0)   /* good till time becomes negative */
                     22: 
                     23: /*
                     24:  * Start a 60 HZ clock.
                     25:  */
                     26: 
                     27: #define        CLK60HZ (-16667)        /* 16.667 ms */
                     28: 
                     29: #define        clkstart() {\
                     30:        mtpr(NICR, CLK60HZ);\
                     31:        mtpr(ICCS, ICCS_RUN+ICCS_IE+ICCS_TRANS+ICCS_INT+ICCS_ERR);\
                     32: }
                     33: #define        clkreld()       mtpr(ICCS, ICCS_RUN|ICCS_IE|ICCS_INT|ICCS_ERR)
                     34: 
                     35: #define        CLKBIAS 100             /* when adjusting clock, do so .1ms at a time */
                     36: 
                     37: /*
                     38:  * Software clock is software interrupt level 8
                     39:  */
                     40: #define        setsoftclock()  mtpr(SIRR, 0x8)

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