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1.1 root 1: /*
2: * error bits in the VAX MASSBUS status register
3: * common to error checking in MASSBUS device drivers
4: *
5: * some of these bits can probably go away
6: */
7:
8: #define MBSR_DTBUSY 0x80000000 /* data transfer busy */
9: #define MBSR_NRCONF 0x40000000 /* no response confirmation */
10: #define MBSR_CRD 0x20000000 /* corrected read data */
11: #define MBSR_CBHUNG 0x00800000 /* control bus hung */
12: #define MBSR_PGE 0x00080000 /* programming error */
13: #define MBSR_NED 0x00040000 /* non-existant drive */
14: #define MBSR_MCPE 0x00020000 /* massbus control parity error */
15: #define MBSR_ATTN 0x00010000 /* attention from massbus */
16: #define MBSR_SPE 0x00004000 /* silo parity error */
17: #define MBSR_DTCMP 0x00002000 /* data transfer completed */
18: #define MBSR_DTABT 0x00001000 /* data transfer aborted */
19: #define MBSR_DLT 0x00000800 /* data late */
20: #define MBSR_WCKUP 0x00000400 /* write check upper */
21: #define MBSR_WCKLWR 0x00000200 /* write check lower */
22: #define MBSR_MXF 0x00000100 /* miss transfer error */
23: #define MBSR_MBEXC 0x00000080 /* massbus exception */
24: #define MBSR_MDPE 0x00000040 /* massbus data parity error */
25: #define MBSR_MAPPE 0x00000020 /* page frame map parity error */
26: #define MBSR_INVMAP 0x00000010 /* invalid map */
27: #define MBSR_ERRCONF 0x00000008 /* error confirmation */
28: #define MBSR_RDS 0x00000004 /* read data substitute */
29: #define MBSR_ISTIMO 0x00000002 /* interface sequence timeout */
30: #define MBSR_RDTIMO 0x00000001 /* read data timeout */
31:
32: #define MBSR_HARD (MBSR_PGE|MBSR_ERRCONF|MBSR_ISTIMO|MBSR_RDTIMO)
33: #define MBSR_EBITS (~(MBSR_DTBUSY|MBSR_CRD|MBSR_ATTN|MBSR_DTCMP))
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