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Annotation of researchv10dc/man/manb/pins.1g, revision 1.1.1.1

1.1       root        1: .so CDL
                      2: .TH PINS 1G
                      3: .SH NAME
                      4: pins \- look up pin names
                      5: .SH SYNOPSIS
                      6: .B pins
                      7: .I pattern ...
                      8: .SH DESCRIPTION
                      9: .I pins
                     10: prints the description of
                     11: the chip type
                     12: .I pattern
                     13: from the file
                     14: .BR /usr/lib/cda/lib/pins .
                     15: .I pattern 
                     16: is in a form suitable for
                     17: .IR grep (I).
                     18: If the name matched is a synonym for another part,
                     19: both type names will be printed.
                     20: The pin names and pin numbers are used by the
                     21: circuit macro expander
                     22: .IR cdm .
                     23: .sp.5
                     24: .SS
                     25: Naming Conventions
                     26: .PP
                     27: A set of pin naming conventions is used,
                     28: based on the traditional naming found 
                     29: in, for example, the Texas Instruments TTL Data Book.
                     30: Function inputs and outputs are usually
                     31: given as a single capital letter.
                     32: Special inputs and outputs are given a 
                     33: short mnemonic name, such as \fBCLR\fP for clear.
                     34: Lowercase letters are used where a subscript might
                     35: normally be used.
                     36: Where multiple gates exist within a single package,
                     37: they are distinguished by appending a zero based numeric index.
                     38: Pins which are active when low are indicated by
                     39: adding a minus sign as the last character of the name.
                     40: .LP
                     41: General inputs are labeled with a single letter starting
                     42: with the letter 
                     43: .BR A .
                     44: Functions with single inputs use the letter 
                     45: .B D 
                     46: with indices,
                     47: as well as memories and flip-flops.
                     48: When the outputs of logic elements are
                     49: not synchronous
                     50: with respect to another input
                     51: they are named
                     52: .BR Y .
                     53: Synchronous outputs, such as with flip-flops are called 
                     54: .BR Q .
                     55: Clock lines are called 
                     56: .BR CK ,
                     57: clear lines are called 
                     58: .BR CLR ,
                     59: preset lines are called 
                     60: .BR PR .
                     61: Select lines for multiplexors and data selectors
                     62: are called 
                     63: .BR S .
                     64: The letter 
                     65: .B G 
                     66: is used for 
                     67: enable, chip enable, chip select, and output enable.
                     68: The use of 
                     69: .B OE 
                     70: for output enable is used for 
                     71: tri-state devices where there is a separate enabling
                     72: of the chip and its outputs (such as 74S373).
                     73: Memories use the letter 
                     74: .B A
                     75: for address lines,
                     76: .B WE 
                     77: for write enable
                     78: and 
                     79: .B Y 
                     80: for outputs.
                     81: \*(SA

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