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researchv10 Dan Cross

.so CDL
.TH PINS 1G
.SH NAME
pins \- look up pin names
.SH SYNOPSIS
.B pins
.I pattern ...
.SH DESCRIPTION
.I pins
prints the description of
the chip type
.I pattern
from the file
.BR /usr/lib/cda/lib/pins .
.I pattern 
is in a form suitable for
.IR grep (I).
If the name matched is a synonym for another part,
both type names will be printed.
The pin names and pin numbers are used by the
circuit macro expander
.IR cdm .
.sp.5
.SS
Naming Conventions
.PP
A set of pin naming conventions is used,
based on the traditional naming found 
in, for example, the Texas Instruments TTL Data Book.
Function inputs and outputs are usually
given as a single capital letter.
Special inputs and outputs are given a 
short mnemonic name, such as \fBCLR\fP for clear.
Lowercase letters are used where a subscript might
normally be used.
Where multiple gates exist within a single package,
they are distinguished by appending a zero based numeric index.
Pins which are active when low are indicated by
adding a minus sign as the last character of the name.
.LP
General inputs are labeled with a single letter starting
with the letter 
.BR A .
Functions with single inputs use the letter 
.B D 
with indices,
as well as memories and flip-flops.
When the outputs of logic elements are
not synchronous
with respect to another input
they are named
.BR Y .
Synchronous outputs, such as with flip-flops are called 
.BR Q .
Clock lines are called 
.BR CK ,
clear lines are called 
.BR CLR ,
preset lines are called 
.BR PR .
Select lines for multiplexors and data selectors
are called 
.BR S .
The letter 
.B G 
is used for 
enable, chip enable, chip select, and output enable.
The use of 
.B OE 
for output enable is used for 
tri-state devices where there is a separate enabling
of the chip and its outputs (such as 74S373).
Memories use the letter 
.B A
for address lines,
.B WE 
for write enable
and 
.B Y 
for outputs.
\*(SA

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