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Annotation of researchv10dc/vol2/Ucds/macro, revision 1.1.1.1

1.1       root        1: .NH
                      2: Signal Bundles and Macros.
                      3: .LP
                      4: Consider this buffer between two 8-bit busses:
                      5: .PS <fig1.pic
                      6: It illustrates several
                      7: .I jraw
                      8: conventions.  The
                      9: .I chip
                     10: is indicated by a box; its
                     11: .I name
                     12: is
                     13: .CW buffer ;
                     14: its
                     15: .I type
                     16: is
                     17: .CW 74F244 .
                     18: These are simply unattached text strings that appear stacked inside the
                     19: box.
                     20: .I "Pin names"
                     21: (e.g.,
                     22: .CW D0 )
                     23: are strings that appear on the inside edge of the box.
                     24: .I Nets
                     25: are lines that end on a pin.
                     26: .I "Net names"
                     27: are strings that are placed on nets.  A trailing
                     28: .CW "-"
                     29: conventionally indicates an active-low signal.
                     30: .LP
                     31: Even this trivial example involves repeated patterns.
                     32: A much more succint equivalent is:
                     33: .PS <fig2.pic
                     34: The
                     35: .I generator
                     36: .CW "x<0:7>"
                     37: expands into the ordered list
                     38: .CW x0 ,
                     39: .CW x1 ,...
                     40: .CW x7 .
                     41: The
                     42: .I pattern
                     43: .CW "D?\&"
                     44: matches two-character pin names that begin with
                     45: .CW D .
                     46: (The space of possible names comes from the
                     47: .CW .pins
                     48: file entry for the chip type.)
                     49: The names that match the pattern are
                     50: .I "sorted alphabetically"
                     51: and put into correspondance with the nets.
                     52: .LP
                     53: If connected sets of nets and pins do not have the same cardinality,
                     54: the smaller set is reused until the larger is exhausted.  Thus in the
                     55: example, the
                     56: .CW drive-
                     57: net gets connected to both
                     58: .CW OE0-
                     59: and
                     60: .CW OE1- ,
                     61: as desired.
                     62: .LP
                     63: Frequently one has a group of chips that will be used or replicated as
                     64: a unit.  In such a case it makes sense to define a
                     65: .I macro
                     66: that may be instantiated as required.  A macro lives in its own file.
                     67: Here is an example,
                     68: .CW opm.j :
                     69: .PS <opm.pic
                     70: The dotted box (produced by selecting
                     71: .CW macro
                     72: in
                     73: .I jraw ")"
                     74: identifies the circuit as a macro.  Strings outside of this box
                     75: (conventionally in upper case) are ``pin names'' visible to the
                     76: outside world.  Most names inside the box will be made local to
                     77: each instantiation.  Net names beginning with
                     78: .CW "/"
                     79: are ``globals,'' i.e., they represent the same signal throughout
                     80: the design.
                     81: .CW "/VCC"
                     82: and
                     83: .CW "/GND"
                     84: are the most common global signals.
                     85: .LP
                     86: Now we use generators to make several instances of
                     87: .CW opm.j :
                     88: .PS <opmcall.pic
                     89: Sixteen copies of the
                     90: .CW opm
                     91: circuit are made.  The pattern
                     92: .CW "D?\&"
                     93: is at a lower, i.e., ``faster running,'' level than
                     94: .CW "opm<00:15>" ,
                     95: with the effect that all the
                     96: .CW D0 "'s"
                     97: are connected to
                     98: .CW "bd0" ,
                     99: all the
                    100: .CW D1 "'s"
                    101: are connected to
                    102: .CW "bd1" ,
                    103: etc; similarly, all the
                    104: .CW A0 "'s"
                    105: are connected to
                    106: .CW ba0 .
                    107: On the other hand, all the
                    108: .CW "CS-" "'s"
                    109: are separate:
                    110: .CW "opm00/CS-"
                    111: (the instance of
                    112: .CW CS-
                    113: in
                    114: .CW opm00 )
                    115: is connected to
                    116: .CW "ops00-" ,
                    117: .CW "opm01/CS-"
                    118: is connected to
                    119: .CW "ops01-" ,
                    120: etc.  The manual entries for
                    121: .I cdm
                    122: and
                    123: .I cdmglob
                    124: should be consulted for all the details.

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