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1.1 root 1: Circuit Design System g
2: Methodology s
3: Using jraw s
4: Signal Bundles and Macros s
5: chip type
6: logical part s
7: physical part s
8: net name s
9: pin name s
10: pin number s
11: text string s
12: .brd s
13: .e s
14: .fx s
15: .j file s
16: .p s
17: .pins s
18: .pkg s
19: .pos s
20: .t lines s
21: .w s
22: .wr s
23: .wx s
24: /GND s
25: /VCC s
26: PAL equations
27: lde format s
28: package type s
29: special-signal nets s
30: pin holes s
31: special-signal pins s
32: jraw s
33: lde s
34: Mkpins s
35: Cdmglob s
36: fizz cvt s
37: fizz place s
38: rework s
39: jraw s
40: cdm s
41: cdmglob s
42: package type s
43: Circuit Design Language
44: CDL s
45: I/O connector s
46: wire-wrap g
47: multiwire g
48: chips g
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