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Annotation of researchv10no/cmd/sml/src/mips/mipscoder.sig, revision 1.1.1.1

1.1       root        1: (* Copyright 1989 by AT&T Bell Laboratories *)
                      2: signature MIPSCODER = sig
                      3: 
                      4: (* Assembler for the MIPS chip *)
                      5: 
                      6: eqtype Label
                      7: datatype Register = Reg of int
                      8:     (* Registers 1 and 31 are reserved for use by this assembler *)
                      9: datatype EA = Direct of Register | Immed of int | Immedlab of Label
                     10:                                 (* effective address *)
                     11: 
                     12: structure M : sig
                     13: 
                     14:     (* Emit various constants into the code *)
                     15: 
                     16:     val emitstring : string -> unit     (* put a literal string into the
                     17:                                            code (null-terminated?) and
                     18:                                            extend with nulls to 4-byte 
                     19:                                            boundary. Just chars, no 
                     20:                                            descriptor or length *)
                     21:     val realconst : string -> unit      (* emit a floating pt literal *)
                     22:                                                 (* NOT RIGHT YET *)
                     23:     val emitlong : int -> unit          (* emit a 4-byte integer literal *)
                     24: 
                     25: 
                     26:     (* Label bindings and emissions *)
                     27: 
                     28:     val newlabel : unit -> Label        (* new, unbound label *)
                     29:     val define : Label -> unit          (* cause the label to be bound to
                     30:                                            the code about to be generated *)
                     31:     val emitlab : int * Label -> unit   (* L3: emitlab(k,L2) is equivalent to
                     32:                                            L3: emitlong(k+L2-L3) *)
                     33: 
                     34:     (* Control flow instructions *)
                     35: 
                     36:     val slt : Register * EA * Register -> unit
                     37:                 (* (operand1, operand2, result) *)
                     38:                                         (* set less than family *)
                     39:     val beq : bool * Register * Register * Label -> unit
                     40:                 (* (beq or bne, operand1, operand2, branch address) *)
                     41:                                         (* branch equal/not equal family *)
                     42:     
                     43:     val jump : Register -> unit         (* jump register instruction *)
                     44: 
                     45:     val slt_double : Register * Register -> unit
                     46:                                        (* floating pt set less than *)
                     47:     val seq_double : Register * Register -> unit
                     48:                                        (* floating pt set equal *)
                     49:     val bcop1 : bool * Label -> unit    (* floating pt conditional branch *)
                     50: 
                     51: 
                     52:     (* Arithmetic instructions *)
                     53:             (* arguments are (operand1, operand2, result) *)
                     54: 
                     55:     val add : Register * EA * Register -> unit
                     56:     val and' : Register * EA * Register -> unit
                     57:     val or : Register * EA * Register -> unit
                     58:     val xor : Register * EA * Register -> unit
                     59:     val sub : Register * Register * Register -> unit
                     60:     val div : Register * Register * Register -> unit
                     61:     val mult : Register * Register * Register -> unit
                     62:     val mfhi : Register -> unit                (* high word of 64-bit multiply *)
                     63:     
                     64:     (* Floating point arithmetic *)
                     65: 
                     66:     val neg_double : Register * Register -> unit
                     67:     val mul_double : Register * Register * Register -> unit
                     68:     val div_double : Register * Register * Register -> unit
                     69:     val add_double : Register * Register * Register -> unit
                     70:     val sub_double : Register * Register * Register -> unit
                     71: 
                     72:     (* Move pseudo-instruction :  move(src,dest) *)
                     73: 
                     74:     val move : EA * Register -> unit
                     75: 
                     76:     (* Load and store instructions *)
                     77:             (* arguments are (destination, source address, offset) *)
                     78:  
                     79:     val lbu  : Register * EA * int -> unit (* bytes *)
                     80:     val sb  : Register * EA * int -> unit
                     81:     val lw  : Register * EA * int -> unit  (* words *)
                     82:     val sw  : Register * EA * int -> unit
                     83:     val lwc1: Register * EA * int -> unit  (* floating point coprocessor *)
                     84:     val swc1: Register * EA * int -> unit
                     85:     val lui : Register * int -> unit
                     86: 
                     87:     (* Shift instructions *)
                     88:             (* arguments are (shamt, operand, result) *)
                     89:             (* shamt as Immedlab _ is senseless *)
                     90: 
                     91:     val sll : EA * Register * Register -> unit
                     92:     val sra : EA * Register * Register -> unit
                     93:     
                     94: 
                     95:     (* Miscellany *)
                     96: 
                     97:     val align : unit -> unit            (* cause next data to be emitted on
                     98:                                            a 4-byte boundary *)
                     99:     val mark : unit -> unit             (* emit a back pointer, 
                    100:                                            also called mark *)
                    101: 
                    102:     val comment : string -> unit
                    103: 
                    104:   end (* signature of structure M *)
                    105: 
                    106:   val codegen : (int * int -> unit) * (int -> string -> unit) 
                    107:                        * (string -> unit) -> unit
                    108: 
                    109:   val codestats : outstream -> unit    (* write statistics on stream *)
                    110: 
                    111: end (* signature MIPSCODER *)

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