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Annotation of researchv10no/sys/ml/trapdw780.s, revision 1.1

1.1     ! root        1: #
        !             2: # trap code specific to DW780 --
        !             3: # SBI UNIBUS adapter
        !             4: #
        !             5: # pull the appropriate vector register out of the air
        !             6: # if the high bit is set or the number is 0, call the driver
        !             7: # else call the proper interrupt routine
        !             8: #
        !             9: # must supply an entry point for each unibus adapter,
        !            10: # by hand; never mind why, for now.
        !            11: #
        !            12: 
        !            13:        .set    PSIZE,2         # sizeof(pushl $SAVREG)
        !            14:        .set    LOCREG,0x7      # registers needed locally -- r0 r1 r2
        !            15: 
        !            16: #
        !            17: # entry points; up to 3 DWs for now
        !            18: #
        !            19:        .globl  Xuba30
        !            20:        .globl  Xuba20
        !            21:        .globl  Xuba10
        !            22:        .globl  Xuba00
        !            23:        .align  2
        !            24: Xuba30:        pushr   $SAVREG
        !            25:        movl    $3,r0
        !            26:        brb     ubint
        !            27:        .align  2
        !            28: Xuba20:        pushr   $SAVREG
        !            29:        movl    $2,r0
        !            30:        brb     ubint
        !            31:        .align  2
        !            32: Xuba10:        pushr   $SAVREG
        !            33:        movl    $1,r0
        !            34:        brb     ubint
        !            35:        .align  2
        !            36: Xuba00:        pushr   $SAVREG
        !            37:        clrl    r0
        !            38: # fall in ...
        !            39: ubint:
        !            40:        movl    _ubavreg[r0],r1 # pick up address of BRRVRs
        !            41:        beql    2f
        !            42:        mfpr    $IPL,r2
        !            43:        extzv   $0,$2,r2,r2
        !            44:        movl    (r1)[r2],r1     # grab the appropriate BRRVR
        !            45:        bleq    1f              # br if adapter intr
        !            46: 0:     addl3   $scb,_ubavoff[r0],r0    # addr of first vector for this adapter
        !            47:        addl2   r1,r0           # addr of addr of interrupt routine
        !            48:        bicl3   $3,(r0),r0      # pick up addr, clear stack bits
        !            49:        jmp     PSIZE(r0)       # skip initial pushr and go there
        !            50: 
        !            51: #
        !            52: # here for an adapter interrupt
        !            53: #
        !            54: 1:     pushr   $LOCREG
        !            55:        movq    r0,-(sp)        # pushl r1; pushl r0
        !            56:        calls   $2,_uba0int     # service interrupt
        !            57:        popr    $LOCREG
        !            58:        bbcc    $31,r1,2f       # clear `need service' bit
        !            59: 2:     tstl    r1              # anything left?
        !            60:        bgtr    0b              # yes, go do intr
        !            61: 8:     popr    $SAVREG
        !            62:        rei
        !            63: 
        !            64: #
        !            65: # here if the adapter hasn't been initialized,
        !            66: # but interrupted anyway
        !            67: # perhaps a disaster -- will it just keep interrupting?
        !            68: #
        !            69: ubstray:
        !            70:        mfpr    $IPL,-(sp)
        !            71:        pushl   r0
        !            72:        pushab  9f
        !            73:        calls   $3,_printf
        !            74:        brb     8b
        !            75: 
        !            76: 9:     .asciz  "ub%d: intr without init, ipl%x\n"

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