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1.1 root 1: /*
2: * Interlan Ethernet Communications Controller interface
3: */
4: struct ildevice {
5: short il_csr; /* Command and Status Register */
6: short il_bar; /* Buffer Address Register */
7: short il_bcr; /* Byte Count Register */
8: };
9:
10: /*
11: * Command and status bits
12: */
13: #define IL_EUA 0xc000 /* Extended Unibus Address */
14: #define IL_CMD 0x3f00 /* Command Function Code */
15: #define IL_CDONE 0x0080 /* Command Done */
16: #define IL_CIE 0x0040 /* Command Interrupt Enable */
17: #define IL_RDONE 0x0020 /* Receive DMA Done */
18: #define IL_RIE 0x0010 /* Receive Interrupt Enable */
19: #define IL_STATUS 0x000f /* Command Status Code */
20:
21: #define IL_BITS "\20\10CDONE\7CIE\6RDONE\5RIE"
22:
23: /* command definitions */
24: #define ILC_MLPBAK 0x0100 /* Set Module Interface Loopback Mode */
25: #define ILC_ILPBAK 0x0200 /* Set Internal Loopback Mode */
26: #define ILC_CLPBAK 0x0300 /* Clear Loopback Mode */
27: #define ILC_PRMSC 0x0400 /* Set Promiscuous Receive Mode */
28: #define ILC_CLPRMSC 0x0500 /* Clear Promiscuous Receive Mode */
29: #define ILC_RCVERR 0x0600 /* Set Receive-On-Error Bit */
30: #define ILC_CRCVERR 0x0700 /* Clear Receive-On-Error Bit */
31: #define ILC_OFFLINE 0x0800 /* Go Offline */
32: #define ILC_ONLINE 0x0900 /* Go Online */
33: #define ILC_DIAG 0x0a00 /* Run On-board Diagnostics */
34: #define ILC_ISA 0x0d00 /* Set Insert Source Address Mode */
35: #define ILC_CISA 0x0e00 /* Clear Insert Source Address Mode */
36: #define ILC_DEFPA 0x0f00 /* Set Physical Address to Default */
37: #define ILC_ALLMC 0x1000 /* Set Receive All Multicast Packets */
38: #define ILC_CALLMC 0x1100 /* Clear Receive All Multicast */
39: #define ILC_STAT 0x1800 /* Report and Reset Statistics */
40: #define ILC_DELAYS 0x1900 /* Report Collision Delay Times */
41: #define ILC_RCV 0x2000 /* Supply Receive Buffer */
42: #define ILC_LDXMIT 0x2800 /* Load Transmit Data */
43: #define ILC_XMIT 0x2900 /* Load Transmit Data and Send */
44: #define ILC_LDGRPS 0x2a00 /* Load Group Addresses */
45: #define ILC_RMGRPS 0x2b00 /* Delete Group Addresses */
46: #define ILC_LDPA 0x2c00 /* Load Physical Address */
47: #define ILC_FLUSH 0x3000 /* Flush Receive BAR/BCR Queue */
48: #define ILC_RESET 0x3f00 /* Reset */
49:
50: /*
51: * Error codes found in the status bits of the csr.
52: */
53: #define ILERR_SUCCESS 0 /* command successful */
54: #define ILERR_RETRIES 1 /* " " with retries */
55: #define ILERR_BADCMD 2 /* illegal command */
56: #define ILERR_INVCMD 3 /* invalid command */
57: #define ILERR_RECVERR 4 /* receiver error */
58: #define ILERR_BUFSIZ 5 /* buffer size too big */
59: #define ILERR_FRAMESIZ 6 /* frame size too small */
60: #define ILERR_COLLISIONS 8 /* excessive collisions */
61: #define ILERR_BUFALIGNMENT 10 /* buffer not word aligned */
62: #define ILERR_NXM 15 /* non-existent memory */
63:
64: #define NILERRS 16
65: #ifdef ILERRS
66: char *ilerrs[NILERRS] = {
67: "success", /* 0 */
68: "success with retries", /* 1 */
69: "illegal command", /* 2 */
70: "inappropriate command", /* 3 */
71: "failure", /* 4 */
72: "buffer size exceeded", /* 5 */
73: "frame too small", /* 6 */
74: 0, /* 7 */
75: "excessive collisions", /* 8 */
76: 0, /* 9 */
77: "buffer alignment error", /* 10 */
78: 0, /* 11 */
79: 0, /* 12 */
80: 0, /* 13 */
81: 0, /* 14 */
82: "non-existent memory" /* 15 */
83: };
84: #endif
85:
86: /*
87: * Diagnostics codes.
88: */
89: #define ILDIAG_SUCCESS 0 /* no problems */
90: #define ILDIAG_CHKSUMERR 1 /* ROM/RAM checksum error */
91: #define ILDIAG_DMAERR 2 /* DMA not working */
92: #define ILDIAG_XMITERR 3 /* xmit circuitry failure */
93: #define ILDIAG_RECVERR 4 /* rcvr circuitry failure */
94: #define ILDIAG_LOOPBACK 5 /* loopback test failed */
95:
96: #define NILDIAGS 6
97: #ifdef ILDIAGS
98: char *ildiag[NILDIAGS] = {
99: "success", /* 0 */
100: "checksum error", /* 1 */
101: "NM10 dma error", /* 2 */
102: "transmitter error", /* 3 */
103: "receiver error", /* 4 */
104: "loopback failure", /* 5 */
105: };
106: #endif
107:
108: /*
109: * Frame status bits, returned in frame status byte
110: * at the top of each received packet.
111: */
112: #define ILFSTAT_C 0x1 /* CRC error */
113: #define ILFSTAT_A 0x2 /* alignment error */
114: #define ILFSTAT_L 0x4 /* 1+ frames lost just before */
115:
116: /*
117: * Structure of an Ethernet header -- receive format
118: */
119: struct il_rheader {
120: u_char ilr_status; /* Frame Status */
121: u_char ilr_fill1;
122: u_short ilr_length; /* Frame Length */
123: u_char ilr_dhost[6]; /* Destination Host */
124: u_char ilr_shost[6]; /* Source Host */
125: u_short ilr_type; /* Type of packet */
126: };
127:
128: /*
129: * Structure of statistics record
130: */
131: struct il_stats {
132: u_short ils_fill1;
133: u_short ils_length; /* Length (should be 62) */
134: u_char ils_addr[6]; /* Ethernet Address */
135: u_short ils_frames; /* Number of Frames Received */
136: u_short ils_rfifo; /* Number of Frames in Receive FIFO */
137: u_short ils_xmit; /* Number of Frames Transmitted */
138: u_short ils_xcollis; /* Number of Excess Collisions */
139: u_short ils_frag; /* Number of Fragments Received */
140: u_short ils_lost; /* Number of Times Frames Lost */
141: u_short ils_multi; /* Number of Multicasts Accepted */
142: u_short ils_rmulti; /* Number of Multicasts Rejected */
143: u_short ils_crc; /* Number of CRC Errors */
144: u_short ils_align; /* Number of Alignment Errors */
145: u_short ils_collis; /* Number of Collisions */
146: u_short ils_owcollis; /* Number of Out-of-window Collisions */
147: u_short ils_fill2[8];
148: char ils_module[8]; /* Module ID */
149: char ils_firmware[8]; /* Firmware ID */
150: };
151:
152: /*
153: * Structure of Collision Delay Time Record
154: */
155: struct il_collis {
156: u_short ilc_fill1;
157: u_short ilc_length; /* Length (should be 0-32) */
158: u_short ilc_delay[16]; /* Delay Times */
159: };
160:
161: #define ETHERMTU 1500
162: #define ETHERMIN (60-40)
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