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1.1 root 1: #ifndef lint
2: static char sccsid[] = "@(#)inst.c 1.1 86/02/03 Copyr 1985 Sun Micro";
3: #endif
4:
5: /*
6: * Copyright (c) 1985 by Sun Microsystems, Inc.
7: */
8:
9:
10: #include "as.h"
11: #include "c2.h"
12:
13: #if AS
14: extern int no_op(), stop(), one_op(), ctrl_op(), move_op(), two_op(), jbrnch(),
15: cbrnch(), branch(), brnchs(), regmem(), shift_op(), reg_op(), postinc(),
16: bit_op(), memreg(), regbrnch(), exg_op(), addr_op(), link_op(),
17: movem_op(), movep_op(), moveq(), trap(), rts(), movec_op(), moves_op();
18: #endif
19:
20: #define I( a, b, c, d, e, f, g, h ) {a, b, c, d, e, f, g, h },
21: #define P( a, b, c, d, e ) {a, b, e, d, c },
22:
23: #define A_ONE( a ) { a }
24: #define A_TWO( a, b ) { a, b }
25: #define A_TH3( a, b, c ) { a, b, c }
26: #define A_4R( a, b, c, d ) { a, b, c, d }
27: #define A_5V( a, b, c, d, e ) { a, b, c, d, e }
28: #define A_6X( a, b, c, d, e, f ) { a, b, c, d, e, f }
29: #define A_8T( a, b, c, d, e, f, g, h ) { a, b, c, d, e, f, g, h }
30:
31: #define T_X 0
32: #define T_ONE(a) (a)
33: #define T_TWO(a,b) (((b)<<TOUCHWIDTH)|(a))
34: #define T_THREE(a,b,c) (((((c)<<TOUCHWIDTH)|(b))<<TOUCHWIDTH)|(a))
35:
36: /* List of 68000 op codes */
37: struct ins_bkt op_codes[] = {
38:
39: # include "characteristics"
40:
41: 0 };
42:
43: d_ins()
44: {
45: register struct ins_bkt *insp;
46: register struct ins_ptr *ipp;
47: register int save;
48: char *calloc();
49:
50: inst = (struct ins_ptr *) calloc( sizeof op_codes / sizeof op_codes[0], sizeof *inst);
51: if (inst == NULL) sys_error("could not allocate instruction symbol space ");
52: for ( ipp = &inst[0], insp = &op_codes[0]; insp->text_i; ipp++, insp++){
53: ipp->this_p = insp;
54: ipp->name_p = insp->text_i;
55: ipp->next_p = ins_hash_tab[save = hash(ipp->name_p)];
56: ins_hash_tab[save] = ipp;
57: }
58: }
59:
60: struct regdef{ char * name_r ; short regno_r; } defregs[] = {
61: { "d0", D0REG+0 },
62: { "d1", D0REG+1 },
63: { "d2", D0REG+2 },
64: { "d3", D0REG+3 },
65: { "d4", D0REG+4 },
66: { "d5", D0REG+5 },
67: { "d6", D0REG+6 },
68: { "d7", D0REG+7 },
69: { "a0", A0REG+0 },
70: { "a1", A0REG+1 },
71: { "a2", A0REG+2 },
72: { "a3", A0REG+3 },
73: { "a4", A0REG+4 },
74: { "a5", A0REG+5 },
75: { "a6", A6REG },
76: { "a7", A7REG },
77: { "sp", A7REG },
78: { "fp0", FP0REG+0 },
79: { "fp1", FP0REG+1 },
80: { "fp2", FP0REG+2 },
81: { "fp3", FP0REG+3 },
82: { "fp4", FP0REG+4 },
83: { "fp5", FP0REG+5 },
84: { "fp6", FP0REG+6 },
85: { "fp7", FP0REG+7 },
86: { "cc", CCREG },
87: /* fpcc */
88: { "pc", PCREG },
89: { "sr", SRREG },
90: { "usp", USPREG+0 },
91: { "sfc", USPREG+1 },
92: { "dfc", USPREG+2 },
93: { "vbr", USPREG+3 },
94: { "cacr",USPREG+4 },
95: { "caar",USPREG+5 },
96: { "msp", USPREG+6 },
97: { "isp", USPREG+7 },
98: { "fpc", FPCREG },
99: { "fps", FPSREG },
100: { "fpi", FPIREG },
101: 0, 0
102: };
103:
104: unsigned reg_access[] = {
105: /* d0 d1 d2 d3 d4 d5 d6 d7 */
106: AM_DREG, AM_DREG, AM_DREG, AM_DREG, AM_DREG, AM_DREG, AM_DREG, AM_DREG,
107: /* a0 a1 a2 a3 a4 a5 a6 a7 */
108: AM_AREG, AM_AREG, AM_AREG, AM_AREG, AM_AREG, AM_AREG, AM_AREG, AM_AREG,
109: /* fp0 fp1 fp2 fp3 fp4 fp5 fp6 fp7 */
110: AM_FREG, AM_FREG, AM_FREG, AM_FREG, AM_FREG, AM_FREG, AM_FREG, AM_FREG,
111: /* fpcc */
112: 0,
113: /* cc pc sr usp */
114: AM_CCREG,AM_PCREG,AM_CCREG,AM_USPREG|AM_CTRLREG,
115: /* src dfc vbr cacr */
116: AM_CTRLREG, AM_CTRLREG, AM_CTRLREG, AM_CTRLREG,
117: /* caar msp isp */
118: AM_CTRLREG, AM_CTRLREG, AM_CTRLREG,
119: /* fpc fps fpi */
120: AM_FCTRLREG, AM_FCTRLREG, AM_FCTRLREG,
121: };
122:
123: init_regs()
124: { register struct sym_bkt *sbp;
125: register struct regdef *p = defregs;
126: register i;
127:
128: i = 0;
129: while (p->name_r) {
130: sbp = lookup(p->name_r); /* Make a sym_bkt for it */
131: sbp->value_s = p->regno_r; /* Load the sym_bkt */
132: sbp->csect_s = C_UNDEF;
133: sbp->attr_s = S_DEC | S_DEF | S_REG;
134: p++;
135: i++;
136: }
137: }
138:
139: #if C2
140: struct def_builtin { char *bname; short ruse[4]; } def_builtins[] = {
141: "lmult", LR+LW, LR+LW, 0, 0,
142: "ulmult", LR+LW, LR+LW, 0, 0,
143: "ldivt", LR+LW, LR+LW, 0, 0,
144: "lmodt", LR+LW, LR+LW, 0, 0,
145: "uldivt", LR+LW, LR+LW, 0, 0,
146: "ulmodt", LR+LW, LR+LW, 0, 0,
147: "mcount", 0, 0, LR, 0,
148: /* floating-point, too */
149: "Faddd", LR+LW, LR+LW, LR+LW, LW, /* fvaddi */
150: "Fsubd", LR+LW, LR+LW, LR+LW, LW, /* fvsubi */
151: "Fmuld", LR+LW, LR+LW, LR+LW, LW, /* fvmuli */
152: "Fdivd", LR+LW, LR+LW, LR+LW, LW, /* fvdivi */
153: "Fcmpd", LR+LW, LR+LW, LR+LW, LW, /* fvcmpi */
154: "Fadds", LR+LW, LR+LW, LW, LW, /* fvaddis */
155: "Fsubs", LR+LW, LR+LW, LW, LW, /* fvsubis */
156: "Fmuls", LR+LW, LR+LW, LW, LW, /* fvmulis */
157: "Fdivs", LR+LW, LR+LW, LW, LW, /* fvdivis */
158: "Fcmps", LR+LW, LR+LW, LW, LW, /* fvcmpis */
159: "Ffltd", LR+LW, LW, LW, LW, /* fvflti */
160: "Fflts", LR+LW, LW, LW, LW, /* fvfltis */
161: "Fintd", LR+LW, LR+LW, LW, LW, /* fvfixi */
162: "Fints", LR+LW, LW, LW, LW, /* fvfixis */
163: "Fstod", LR+LW, LW, LW, LW, /* fvdoublei */
164: "Fdtos", LR+LW, LR+LW, LW, LW, /* fvsinglei */
165: /* fortrash */
166: "Fcosd", LR+LW, LR+LW, LW, LW, /* fvcosi */
167: "Fsind", LR+LW, LR+LW, LW, LW, /* fvsini */
168: "Ftand", LR+LW, LR+LW, LW, LW, /* fvtani */
169: "Facosd", LR+LW, LR+LW, LW, LW, /* fvacosi */
170: "Fasind", LR+LW, LR+LW, LW, LW, /* fvasini */
171: "Fatand", LR+LW, LR+LW, LW, LW, /* fvatani */
172: "Fcoshd", LR+LW, LR+LW, LW, LW, /* fvcoshi */
173: "Fsinhd", LR+LW, LR+LW, LW, LW, /* fvsinhi */
174: "Ftanhd", LR+LW, LR+LW, LW, LW, /* fvtanhi */
175: "Fexpd", LR+LW, LR+LW, LW, LW, /* fvexpi */
176: "Fpow10d", LR+LW, LR+LW, LW, LW, /* fv10toxi */
177: "Fpow2d", LR+LW, LR+LW, LW, LW, /* fv2toxi */
178: "Flogd", LR+LW, LR+LW, LW, LW, /* fvlogi */
179: "Flog10d", LR+LW, LR+LW, LW, LW, /* fvlog10i */
180: "Flog2d", LR+LW, LR+LW, LW, LW, /* fvlog2i */
181: "Fsqrd", LR+LW, LR+LW, LW, LW, /* fvsqri */
182: "Fsqrtd", LR+LW, LR+LW, LW, LW, /* fvsqrti */
183: "Faintd", LR+LW, LR+LW, LW, LW, /* fvainti */
184: "Fanintd", LR+LW, LR+LW, LW, LW, /* fvaninti */
185: "Fnintd", LR+LW, LR+LW, LW, LW, /* fvninti */
186: "Fcoss", LR+LW, LW, LW, LW, /* fvcosis */
187: "Fsins", LR+LW, LW, LW, LW, /* fvsinis */
188: "Ftans", LR+LW, LW, LW, LW, /* fvtanis */
189: "Facoss", LR+LW, LW, LW, LW, /* fvacosis */
190: "Fasins", LR+LW, LW, LW, LW, /* fvasinis */
191: "Fatans", LR+LW, LW, LW, LW, /* fvatanis */
192: "Fcoshs", LR+LW, LW, LW, LW, /* fvcoshis */
193: "Fsinhs", LR+LW, LW, LW, LW, /* fvsinhis */
194: "Ftanhs", LR+LW, LW, LW, LW, /* fvtanhis */
195: "Fexps", LR+LW, LW, LW, LW, /* fvexpis */
196: "Fpow10s", LR+LW, LW, LW, LW, /* fv10toxis */
197: "Fpow2s", LR+LW, LW, LW, LW, /* fv2toxis */
198: "Flogs", LR+LW, LW, LW, LW, /* fvlogis */
199: "Flog10s", LR+LW, LW, LW, LW, /* fvlog10is */
200: "Flog2s", LR+LW, LW, LW, LW, /* fvlog2is */
201: "Fsqrs", LR+LW, LW, LW, LW, /* fvsqris */
202: "Fsqrts", LR+LW, LW, LW, LW, /* fvsqrtis */
203: "Faints", LR+LW, LW, LW, LW, /* fvaintis */
204: "Fanints", LR+LW, LW, LW, LW, /* fvanintis */
205: "Fnints", LR+LW, LW, LW, LW, /* fvnintis */
206: 0
207: };
208:
209: static void
210: add_builtin(d)
211: register struct def_builtin * d;
212: {
213: register i;
214: register struct sym_bkt *s;
215:
216: s = lookup(d->bname);
217: s->csect_s = C_UNDEF;
218: s->attr_s = S_DEC | S_CRT;
219: for (i=0; i < sizeof d->ruse / sizeof d->ruse[0] ; i++){
220: s->builtin_s[i] = d->ruse[i];
221: }
222: }
223:
224: void
225: init_builtins()
226: {
227: register struct def_builtin * d;
228:
229: for (d = def_builtins; d->bname != NULL; d++){
230: if (d->bname[0] == 'F') {
231: /* must make a copy for each flavor of floating point. BLEAGH! */
232: add_builtin(d);
233: d->bname[0] = 'V'; /* vectored */
234: add_builtin(d);
235: d->bname[0] = 'S'; /* sky */
236: add_builtin(d);
237: d->bname[0] = 'M'; /* motorola */
238: add_builtin(d);
239: d->bname[0] = 'W'; /* Weitek */
240: add_builtin(d);
241: } else {
242: add_builtin(d);
243: }
244: }
245: }
246: #endif
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