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1.1 root 1: # include "cpass2.h"
2: #ifndef lint
3: static char sccsid[] = "@(#)table.c 1.1 86/02/03 Copyr 1985 Sun Micro";
4: #endif
5:
6: /*
7: * Copyright (c) 1985 by Sun Microsystems, Inc.
8: */
9:
10: # define ANYSIGNED TPOINT|TINT|TLONG|TSHORT|TCHAR
11: # define ANYUSIGNED TUNSIGNED|TULONG|TUSHORT|TUCHAR
12: # define ANYFIXED ANYSIGNED|ANYUSIGNED
13: # define TWORD TINT|TUNSIGNED|TPOINT|TLONG|TULONG
14: # define TSCALAR TCHAR|TUCHAR|TSHORT|TUSHORT|TINT|TUNSIGNED|TPOINT
15:
16: # define EA SNAME|SOREG|SCON|STARREG|STARNM|SAREG|SBREG
17: # define EAA SNAME|SOREG|SCON|STARREG|STARNM|SAREG
18: # define EB SBREG
19: # define ED SNAME|SOREG|SCON|SAREG /* for addressability of DOUBLEs */
20: # define ES SNAME|SOREG|STARREG|STARNM|SAREG|SBREG
21: # define EM SNAME|SOREG|STARREG|STARNM|SCON
22:
23: struct optab table[] = {
24:
25: /*
26: * special-case constant assignments
27: */
28:
29: ASSIGN, INAREG|FOREFF|FORCC,
30: (EAA)&~SAREG, TSCALAR|TFLOAT,
31: SZERO, TANY,
32: 0, RLEFT|RRIGHT|RESCC,
33: " clrZB AL\n",
34:
35: ASSIGN, INAREG|FOREFF|FORCC,
36: SAREG|STAREG, TSCALAR,
37: SCCON, TSCALAR,
38: 0, RLEFT|RRIGHT|RESCC,
39: " moveq AR,AL\n",
40:
41: /*- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - */
42:
43: /*
44: * two's complement assignments, to anything but the address registers
45: */
46: ASSIGN, INAREG|FOREFF|FORCC,
47: EAA, TSCALAR,
48: EA, TSCALAR,
49: 0, RLEFT|RRIGHT|RESCC,
50: " movZB AR,AL\n",
51:
52: /*
53: * two's complement assignments, to the address registers
54: */
55: ASSIGN, INBREG|FOREFF,
56: SBREG|STBREG, TWORD|TSHORT,
57: EA, TWORD|TSHORT,
58: 0, RLEFT|RRIGHT,
59: " movZB AR,AL\n",
60:
61: /*- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - */
62:
63: /*
64: * Floating assignments to anything but the address registers
65: * Note that the condition codes are not left in a valid state.
66: */
67: ASSIGN, INAREG|FOREFF,
68: EAA, TFLOAT,
69: EA, TFLOAT,
70: 0, RLEFT|RRIGHT,
71: " movZB AR,AL\n",
72:
73: /*
74: * Floating assignments to the address registers.
75: * Note that the condition codes are not left in a valid state.
76: */
77: ASSIGN, INBREG|FOREFF,
78: SBREG|STBREG, TFLOAT,
79: EA, TFLOAT,
80: 0, RLEFT|RRIGHT,
81: " movZB AR,AL\n",
82:
83: ASSIGN|OP68881, INBREG|FOREFF,
84: SBREG|STBREG, TFLOAT,
85: SCREG|STCREG, TFLOAT,
86: NAREG, RLEFT|RRIGHT|RESC1,
87: " fmoves AR,A1\n movl A1,AL\n",
88:
89: /*
90: * assignments from temp aregs to anything but the a-registers
91: */
92: ASSIGN, INTAREG|FOREFF,
93: EAA, TSCALAR|TFLOAT,
94: STAREG, TSCALAR|TFLOAT,
95: 0, RRIGHT,
96: " movZB AR,AL\n",
97:
98: /*- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - */
99:
100: /*
101: * Floating assignments to the fp-registers, if we have them.
102: */
103:
104: ASSIGN|OP68881, INCREG|FOREFF|FORCC,
105: SCREG|STCREG, TFLOAT|TDOUBLE,
106: SFLOAT_SRCE, TFLOAT|TDOUBLE,
107: 0, RLEFT|RRIGHT|RESFCC,
108: " fmoveZF ZK,AL\n",
109:
110: ASSIGN|OP68881, INCREG|FOREFF|FORCC,
111: SCREG|STCREG, TFLOAT|TDOUBLE,
112: SCREG|STCREG, TFLOAT|TDOUBLE,
113: 0, RLEFT|RRIGHT|RESFCC,
114: " fmovex AR,AL\n",
115:
116: ASSIGN|OP68881, INCREG|FOREFF|FORCC,
117: SCREG|STCREG, TFLOAT|TDOUBLE,
118: SAREG|STAREG, TDOUBLE,
119: 0, RLEFT|RRIGHT|RESFCC,
120: " movl UR,sp@-\n\
121: movl AR,sp@-\n\
122: fmoved sp@+,AL\n",
123:
124: /*- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - */
125:
126: /*
127: * Floating stores from the fp-registers, if we have them.
128: * Note: these do not affect the condition codes on either processor.
129: */
130:
131: ASSIGN|OP68881, INCREG|FOREFF,
132: EM, TFLOAT|TDOUBLE,
133: SCREG|STCREG, TFLOAT|TDOUBLE,
134: 0, RLEFT|RRIGHT,
135: " fmoveZG AR,AL\n",
136:
137: ASSIGN|OP68881, INCREG|FOREFF,
138: SAREG|STAREG, TFLOAT,
139: SCREG|STCREG, TFLOAT|TDOUBLE,
140: 0, RLEFT|RRIGHT,
141: " fmoveZG AR,AL\n",
142:
143: ASSIGN|OP68881, INCREG|FOREFF,
144: SAREG|STAREG, TDOUBLE,
145: SCREG|STCREG, TFLOAT|TDOUBLE,
146: 0, RLEFT|RRIGHT,
147: " fmoved AR,sp@-\n\
148: movl sp@+,AL\n\
149: movl sp@+,UL\n",
150:
151: /*- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - */
152:
153: /*
154: * Other floating-point assignments
155: */
156:
157: ASSIGN, INAREG|FOREFF,
158: ED, TDOUBLE,
159: ED, TDOUBLE,
160: 0, RLEFT|RRIGHT,
161: " movl AR,AL\n movl UR,UL\n",
162:
163: ASSIGN|NO68881, INAREG|FOREFF,
164: EAA, TFLOAT,
165: ED, TDOUBLE,
166: 0, RLEFT|RRIGHT,
167: "Zg",
168:
169: ASSIGN, INAREG|FOREFF,
170: EAA, TDOUBLE,
171: SAREG, TDOUBLE,
172: 0, RLEFT|RRIGHT,
173: "ZD",
174:
175: ASSIGN, INAREG|FOREFF,
176: SAREG, TDOUBLE,
177: EAA, TDOUBLE,
178: 0, RLEFT|RRIGHT,
179: "ZD",
180:
181: /*- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - */
182:
183: /* new, fun field ops */
184: ASSIGN, INAREG|FOREFF,
185: SPEC_FLD, TANY,
186: SAREG|STAREG, TANY,
187: NAREG, RRIGHT,
188: "Za\n", /* ie: do the whole show by hand */
189:
190: ASSIGN, INAREG|FOREFF,
191: SPEC_FLD, TANY,
192: SCON, TANY,
193: NAREG, RRIGHT,
194: "Za\n", /* ie: do the whole show by hand */
195:
196: /*- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - */
197:
198: /* put this here so UNARY MUL nodes match OPLTYPE when appropriate */
199: UNARY MUL, INTAREG|INAREG|FORCC,
200: SBREG, TSCALAR,
201: SANY, TANY,
202: NAREG|NASR, RESC1|RESCC,
203: " movZB AL@,A1\n",
204:
205: /*- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - */
206:
207: #ifdef FORT
208: GOTO, FOREFF,
209: SCON, TANY,
210: SANY, TANY,
211: 0, RNOP,
212: " jra CL\n",
213:
214: GOTO, FOREFF,
215: SBREG|STBREG, TANY,
216: SANY, TANY,
217: 0, RNOP,
218: " jmp AL@\n",
219: #endif
220:
221: /*- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - */
222:
223: /* leaf node for effect -- evaluate and discard */
224:
225: OPLTYPE, FOREFF,
226: SANY, TANY,
227: EA, TANY,
228: 0, RRIGHT,
229: "Z ", /* note that the "leaf" may have side effects!!*/
230:
231: /*- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - */
232:
233: /*
234: * tests to set condition codes, integral operands
235: */
236:
237: OPLTYPE|OP68020, FORCC,
238: SANY, TANY,
239: (EA)&~SCON, TWORD|TSHORT|TUSHORT,
240: 0, RESCC,
241: " tstZB AR\n",
242:
243: OPLTYPE, FORCC,
244: SANY, TANY,
245: (EAA)&~SCON, TSCALAR,
246: 0, RESCC,
247: " tstZB AR\n",
248:
249: OPLTYPE, FORCC,
250: SANY, TANY,
251: EB, TWORD|TSHORT|TUSHORT,
252: 0, RESCC,
253: " cmpw #0,AR\n",
254:
255: /*- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - */
256:
257: /*
258: * (68881) tests to set coprocessor condition codes, floating point operands
259: */
260:
261: OPLTYPE|OP68881, FORCC,
262: SANY, TANY,
263: SFLOAT_SRCE, TFLOAT|TDOUBLE,
264: 0, RESFCC,
265: " ftestZF ZK\n",
266:
267: /*- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - */
268:
269: /*
270: * (no 68881) tests to set condtion codes, floating point operands
271: */
272: OPLTYPE|NO68881, FORCC,
273: SANY, TANY,
274: EA, TFLOAT,
275: 0, RESCC,
276: "Zf",
277:
278: OPLTYPE|NO68881, FORCC,
279: SANY, TANY,
280: ED, TDOUBLE,
281: 0, RESCC,
282: "Zf",
283:
284: /*- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - */
285:
286: /*
287: * special-case loads, constant integral operands
288: */
289: OPLTYPE, INTAREG|INAREG|FORCC,
290: SANY, TANY,
291: SZERO, TSCALAR,
292: NAREG|NASR, RESC1|RESCC,
293: " moveq #0,A1\n",
294:
295: OPLTYPE, INTAREG|INAREG|FORCC,
296: SANY, TANY,
297: SCCON, TSCALAR,
298: NAREG|NASR, RESC1|RESCC,
299: " moveq AR,A1\n",
300:
301: /*- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - */
302:
303: /*
304: * load scalar into temp d-register
305: */
306: OPLTYPE, INTAREG|INAREG|FORCC,
307: SANY, TANY&~TSTRUCT,
308: EA, TSCALAR,
309: NAREG|NASR, RESC1|RESCC,
310: " movZB AR,A1\n",
311:
312: /*- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - */
313:
314: /*
315: * special-case loads, float and double operands
316: */
317: OPLTYPE, INTAREG|INAREG,
318: SANY, TANY,
319: EAA, TDOUBLE,
320: NAREG, RESC1,
321: "ZD",
322:
323: OPLTYPE, INTAREG|INAREG,
324: SANY, TANY,
325: SOREG, TDOUBLE,
326: NAREG|NASL|NBREG|NBSL, RESC1,
327: "ZE",
328:
329: OPLTYPE, INTAREG|INAREG,
330: SANY, TANY,
331: EA, TFLOAT,
332: NAREG|NASR, RESC1,
333: " movl AR,A1\n",
334:
335: /*- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - */
336:
337: /*
338: * (68881) loads from various places into coprocessor registers
339: */
340:
341: OPLTYPE|OP68881, INTCREG|INCREG,
342: SANY, TANY,
343: SFLOAT_SRCE, TFLOAT|TDOUBLE,
344: NCREG, RESC1,
345: " fmoveZF ZK,A1\n",
346:
347: OPLTYPE|OP68881, INTCREG|INCREG,
348: SANY, TANY,
349: SAREG|STAREG, TDOUBLE,
350: NCREG, RESC1,
351: " movl UR,sp@-\n\
352: movl AR,sp@-\n\
353: fmoved sp@+,A1\n",
354:
355: /*- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - */
356:
357: /*
358: * (68881) loads from coprocessor registers into data registers
359: */
360:
361: OPLTYPE|OP68881, INTAREG|INAREG,
362: SANY, TANY,
363: SCREG|STCREG, TFLOAT,
364: NAREG, RESC1,
365: " fmoves AR,A1\n",
366:
367: OPLTYPE|OP68881, INTAREG|INAREG,
368: SANY, TANY,
369: SCREG|STCREG, TDOUBLE,
370: NAREG, RESC1,
371: " fmoved AR,sp@-\n\
372: movl sp@+,A1\n\
373: movl sp@+,U1\n",
374:
375: /*- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - */
376:
377: /*
378: * loads into address-registers
379: */
380: OPLTYPE, INTBREG|INBREG,
381: SANY, TANY,
382: SCON, TSCALAR,
383: NBREG|NBSR, RESC1,
384: " lea CR,A1\n",
385:
386: OPLTYPE, INTBREG|INBREG,
387: SANY, TANY,
388: EA, TWORD|TSHORT,
389: NBREG|NBSR, RESC1,
390: " movZB AR,A1\n",
391:
392: /*- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - */
393:
394: /*
395: * stores into temp stack locations
396: */
397: OPLTYPE, INTEMP|FORCC,
398: SANY, TANY,
399: EA, TSCALAR,
400: NTEMP, RESC1|RESCC,
401: " movZB AR,A1\n",
402:
403: OPLTYPE, INTEMP,
404: SANY, TANY,
405: EA, TFLOAT,
406: NTEMP, RESC1,
407: " movZB AR,A1\n",
408:
409: OPLTYPE, INTEMP,
410: SANY, TANY,
411: ED, TDOUBLE,
412: 2*NTEMP, RESC1,
413: " movl AR,A1\n movl UR,U1\n",
414:
415: OPLTYPE|OP68881, INTEMP,
416: SANY, TANY,
417: SCREG|STCREG, TFLOAT,
418: NTEMP, RESC1,
419: " fmoves AR,A1\n",
420:
421: OPLTYPE|OP68881, INTEMP,
422: SANY, TANY,
423: SCREG|STCREG, TDOUBLE,
424: 2*NTEMP, RESC1,
425: " fmoved AR,A1\n",
426:
427: /*- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - */
428:
429: /*
430: * argument passing, integral types
431: */
432:
433: OPLTYPE, FORARG,
434: SANY, TANY,
435: SBREG, TINT|TUNSIGNED|TPOINT,
436: 0, RNULL,
437: " pea AR@\nZP",
438:
439: OPLTYPE, FORARG,
440: SANY, TANY,
441: SCON, TSCALAR,
442: 0, RNULL,
443: " pea CR\nZP",
444:
445: OPLTYPE, FORARG,
446: SANY, TANY,
447: EA, TINT|TUNSIGNED|TPOINT,
448: 0, RNULL,
449: " movl AR,Z-\n",
450:
451: OPLTYPE, FORARG,
452: SANY, TANY,
453: EA, TSHORT,
454: NBREG|NBSR, RNULL,
455: " movw AR,A1\n movl A1,Z-\n",
456:
457: OPLTYPE, FORARG,
458: SANY, TANY,
459: EA, TUSHORT,
460: NAREG, RNULL,
461: " clrl A1\n movw AR,A1\n movl A1,Z-\n",
462:
463: OPLTYPE|NO68020, FORARG,
464: SANY, TANY,
465: EA, TCHAR,
466: NAREG|NASR, RNULL,
467: " movb AR,A1\n extw A1\n extl A1\n movl A1,Z-\n",
468:
469: OPLTYPE|OP68020, FORARG,
470: SANY, TANY,
471: EA, TCHAR,
472: NAREG|NASR, RNULL,
473: " movb AR,A1\n extbl A1\n movl A1,Z-\n",
474:
475: OPLTYPE, FORARG,
476: SANY, TANY,
477: EA, TUCHAR,
478: NAREG, RNULL,
479: " clrl A1\n movb AR,A1\n movl A1,Z-\n",
480:
481: /*- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - */
482:
483: /*
484: * argument passing, floating types
485: */
486:
487: OPLTYPE|OP68881, FORARG,
488: SANY, TANY,
489: SCREG|STCREG, TFLOAT,
490: 0, RNULL,
491: "Zf", /* can't tell from here whether to convert */
492:
493: OPLTYPE|OP68881, FORARG,
494: SANY, TANY,
495: SCREG|STCREG, TDOUBLE,
496: 0, RNULL,
497: " fmoved AR,Z-\n",
498:
499: OPLTYPE, FORARG,
500: SANY, TANY,
501: EA, TFLOAT,
502: 0, RNULL,
503: "Zf", /* can't tell from here whether to convert */
504:
505: OPLTYPE, FORARG,
506: SANY, TANY,
507: ED, TDOUBLE,
508: 0, RNULL,
509: " movl UR,Z-\n movl AR,Z-\n",
510:
511: /*- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - */
512:
513: /*
514: * field extraction, for value or condition codes
515: */
516: FLD, INAREG|INTAREG|FORCC,
517: SANY, TANY,
518: SPEC_FLD, TSCALAR,
519: NAREG, RESC1|RESCC,
520: "Zb\n",
521:
522: /*- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - */
523:
524: /*
525: * compare integral operands, for flow control
526: */
527:
528: OPLOG, FORCC,
529: SAREG|STAREG|SBREG|STBREG, TSCALAR,
530: EA, TSCALAR,
531: 0, RESCC,
532: " cmpZL AR,AL\nZI",
533:
534: OPLOG, FORCC,
535: (EA)&~SCON, TSCALAR,
536: SCON, TSCALAR,
537: 0, RESCC,
538: " cmpZL AR,AL\nZI",
539:
540: OPLOG, FORCC,
541: SAUTOINC, TSCALAR,
542: SAUTOINC, TSCALAR,
543: 0, RESCC,
544: " cmpmZL AR,AL\nZI",
545:
546: /*- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - */
547:
548: /*
549: * (68881) compare floating operands, for flow control.
550: * Note that the 68881 has a separate condition code register and
551: * requires a different set of branch instructions.
552: */
553:
554: OPLOG|OP68881, FORCC,
555: SFLOAT_SRCE, TFLOAT|TDOUBLE,
556: SFZERO, TFLOAT|TDOUBLE,
557: 0, RESFCC,
558: " ftestZG AL\nZH",
559:
560: OPLOG|OP68881, FORCC,
561: SCREG|STCREG, TFLOAT|TDOUBLE,
562: SFLOAT_SRCE, TFLOAT|TDOUBLE,
563: 0, RESFCC,
564: " fcmpZF ZK,AL\nZH",
565:
566: OPLOG|OP68881, FORCC,
567: SCREG|STCREG, TFLOAT|TDOUBLE,
568: SCREG|STCREG, TFLOAT|TDOUBLE,
569: 0, RESFCC,
570: " fcmpx AR,AL\nZH",
571:
572: OPLOG|OP68881, FORCC,
573: SCREG|STCREG, TFLOAT|TDOUBLE,
574: SAREG|STAREG, TDOUBLE,
575: 0, RESFCC,
576: " movl UR,Z-\n\
577: movl AR,Z-\n\
578: fcmpd sp@+,AL\nZH",
579:
580: /*- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - */
581:
582: /*
583: * (no 68881) compare floating operands, for flow control.
584: */
585: OPLOG|NO68881, FORCC,
586: SPEC_FLT, TFLOAT,
587: SPEC_FLT, TFLOAT,
588: 0, RESCC,
589: "ZfZI",
590:
591: OPLOG|NO68881, FORCC,
592: SPEC_FLT, TDOUBLE,
593: SPEC_DFLT, TDOUBLE,
594: NBREG, RESCC,
595: "ZfZI",
596:
597: /*- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - */
598:
599: /*
600: * compare constant to field, for flow control
601: */
602: OPLOG, FORCC,
603: SPEC_FLD, TSCALAR,
604: SCON, TSCALAR,
605: NAREG, RESCC,
606: "Zc\nZI", /* let ME do it */
607:
608: /*- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - */
609:
610: /*
611: * compare integral operands for boolean result
612: */
613:
614: OPLOG, INTAREG,
615: SAREG|STAREG|SBREG|STBREG, TSCALAR,
616: EA, TSCALAR,
617: NAREG, RESC1,
618: " moveq #0,A1\n cmpZL AR,AL\n sI. A1\n negb A1\n",
619:
620: OPLOG, INTAREG,
621: (EA)&~SCON, TSCALAR,
622: SCON, TSCALAR,
623: NAREG, RESC1,
624: " moveq #0,A1\n cmpZL AR,AL\n sI. A1\n negb A1\n",
625:
626: /*- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - */
627:
628: /*
629: * (68881) compare floating operands for boolean result
630: */
631:
632: OPLOG|OP68881, INTAREG,
633: SFLOAT_SRCE, TFLOAT|TDOUBLE,
634: SFZERO, TFLOAT|TDOUBLE,
635: NAREG, RESC1,
636: " moveq #0,A1\n\
637: ftestZG AL\n\
638: fsI. A1\n\
639: negb A1\n",
640:
641: OPLOG|OP68881, INTAREG,
642: SCREG|STCREG, TFLOAT|TDOUBLE,
643: SFLOAT_SRCE, TFLOAT|TDOUBLE,
644: NAREG, RESC1,
645: " moveq #0,A1\n\
646: fcmpZF ZK,AL\n\
647: fsI. A1\n\
648: negb A1\n",
649:
650: OPLOG|OP68881, INTAREG,
651: SCREG|STCREG, TFLOAT|TDOUBLE,
652: SCREG|STCREG, TFLOAT|TDOUBLE,
653: NAREG, RESC1,
654: " moveq #0,A1\n\
655: fcmpx AR,AL\n\
656: fsI. A1\n\
657: negb A1\n",
658:
659: OPLOG|OP68881, INTAREG,
660: SCREG|STCREG, TFLOAT|TDOUBLE,
661: SAREG|STAREG, TDOUBLE,
662: NAREG, RESC1,
663: " moveq #0,A1\n\
664: movl UR,sp@-\n\
665: movl AR,sp@-\n\
666: fcmpd sp@+,AL\n\
667: fsI. A1\n\
668: negb A1\n",
669:
670: /*- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - */
671:
672: /*
673: * (no 68881) compare floating operands for boolean result
674: */
675: OPLOG|NO68881, INTAREG,
676: SPEC_FLT, TFLOAT,
677: SPEC_FLT, TFLOAT,
678: NAREG, RESC1,
679: " moveq #0,A1\nZf sfI. A1\n negb A1\n",
680:
681: OPLOG|NO68881, INTAREG,
682: SPEC_FLT, TDOUBLE,
683: SPEC_DFLT, TDOUBLE,
684: NBREG+NAREG, RESC1,
685: " moveq #0,A1\nZf sfI. A1\n negb A1\n",
686:
687: /*- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - */
688:
689: /*
690: * compare constant to field, for boolean result
691: */
692: OPLOG, INTAREG,
693: SPEC_FLD, TSCALAR,
694: SCON, TSCALAR,
695: 2*NAREG, RESC2,
696: " moveq #0,A2\nZc\n sI. A2\n negb A2\n",
697:
698: /*- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - */
699:
700: /*
701: * convert floating point condition codes into boolean result
702: */
703: FCCODES|OP68881, INTAREG|INAREG,
704: SANY, TANY,
705: SANY, TANY,
706: NAREG, RESC1,
707: " moveq #1,A1\nZN",
708:
709: /*
710: * convert integer condition codes into boolean result
711: */
712: CCODES, INTAREG|INAREG,
713: SANY, TANY,
714: SANY, TANY,
715: NAREG, RESC1,
716: " moveq #1,A1\nZN",
717:
718: /*- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - */
719:
720: /*
721: * negate scalar in temp register
722: */
723: UNARY MINUS, INAREG|INTAREG,
724: STAREG, TSCALAR,
725: SANY, TANY,
726: 0, RLEFT,
727: " negZB AL\n",
728:
729: /*
730: * negate floating operand in temp data register.
731: */
732: UNARY MINUS, INAREG|INTAREG,
733: STAREG, TFLOAT|TDOUBLE,
734: SANY, TANY,
735: 0, RLEFT,
736: "Zf",
737:
738: UNARY MINUS, INAREG|INTAREG,
739: EA&~STAREG, TFLOAT,
740: SANY, TANY,
741: NAREG|NASL, RESC1,
742: " movl AL,A1\n bchg #31,A1\n",
743:
744: UNARY MINUS, INAREG|INTAREG,
745: EA&~STAREG, TDOUBLE,
746: SANY, TANY,
747: NAREG|NASL, RESC1,
748: " movl AL,A1\n movl UL,U1\n bchg #31,A1\n",
749:
750: /*
751: * negate floating operand in floating point register
752: */
753: (UNARY MINUS)|OP68881, INCREG|INTCREG,
754: SFLOAT_SRCE, TFLOAT|TDOUBLE,
755: SANY, TANY,
756: NCREG|NCSL, RESC1,
757: " fnegZF ZK,A1\n",
758:
759: /*- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - */
760:
761: /*
762: * absolute value in temp data register
763: */
764: FABS, INAREG|INTAREG,
765: STAREG, TFLOAT|TDOUBLE,
766: SANY, TANY,
767: 0, RLEFT,
768: " bclr #31,AL\n",
769:
770: FABS, INAREG|INTAREG,
771: EA&~STAREG, TFLOAT,
772: SANY, TANY,
773: NAREG|NASL, RESC1,
774: " movl AL,A1\n bclr #31,A1\n",
775:
776: FABS, INAREG|INTAREG,
777: EA&~STAREG, TDOUBLE,
778: SANY, TANY,
779: NAREG|NASL, RESC1,
780: " movl AL,A1\n movl UL,U1\n bclr #31,A1\n",
781:
782: /*
783: * floating=>integer conversion -- at present, these are
784: * only generated by FORTRAN and Pascal -- but see also
785: * SCONV below.
786: */
787: FNINT|OP68881, INAREG|INTAREG,
788: STCREG, TFLOAT|TDOUBLE,
789: SANY, TSCALAR,
790: NAREG, RESC1,
791: "Zf",
792:
793: FNINT|NO68881, INAREG|INTAREG,
794: STAREG, TFLOAT|TDOUBLE,
795: SANY, TSCALAR,
796: 0, RLEFT,
797: "Zf",
798:
799: /*
800: * floating point intrinsics (sin, cos, exp, log, ...)
801: */
802: OPINTR|OP68881, INCREG|INTCREG,
803: SFLOAT_SRCE, TFLOAT|TDOUBLE,
804: SANY, TANY,
805: NCREG|NCSL, RESC1,
806: "Zf",
807:
808: OPINTR|OP68881, INCREG|INTCREG,
809: SAREG|STAREG, TDOUBLE,
810: SANY, TANY,
811: NCREG|NCSL, RESC1,
812: "Zf",
813:
814: OPINTR|NO68881, INAREG|INTAREG,
815: STAREG, TFLOAT|TDOUBLE,
816: SANY, TANY,
817: 0, RLEFT,
818: "Zf",
819:
820: /*- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - */
821:
822: /*
823: * one's complement of temp d-register
824: */
825: COMPL, INTAREG|FORCC,
826: STAREG, TSCALAR,
827: SANY, TANY,
828: 0, RLEFT|RESCC,
829: " notZB AL\n",
830:
831: /*- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - */
832:
833: /*
834: * increment/decrement operators
835: */
836:
837: INCR, INTAREG|INAREG|FOREFF,
838: EAA, TSCALAR,
839: S8CON, TSCALAR,
840: NAREG, RESC1,
841: "F movZB AL,A1\n addqZB AR,AL\nZv",
842:
843: DECR, INTAREG|INAREG|FOREFF,
844: EAA, TSCALAR,
845: S8CON, TSCALAR,
846: NAREG, RESC1,
847: "F movZB AL,A1\n subqZB AR,AL\nZv",
848:
849: INCR, INTAREG|INAREG|FOREFF,
850: EAA, TSCALAR,
851: SCON, TSCALAR,
852: NAREG, RESC1,
853: "F movZB AL,A1\n addZB AR,AL\nZv",
854:
855: DECR, INTAREG|INAREG|FOREFF,
856: EAA, TSCALAR,
857: SCON, TSCALAR,
858: NAREG, RESC1,
859: "F movZB AL,A1\n subZB AR,AL\nZv",
860:
861: INCR, INTBREG|INBREG|FOREFF,
862: EB, TSCALAR,
863: S8CON, TSCALAR,
864: NBREG, RESC1,
865: "F movZB AL,A1\n addqZB AR,AL\n",
866:
867: DECR, INTBREG|INBREG|FOREFF,
868: EB, TSCALAR,
869: S8CON, TSCALAR,
870: NBREG, RESC1,
871: "F movZB AL,A1\n subqZB AR,AL\n",
872:
873: INCR, INTBREG|INBREG|FOREFF,
874: EB, TSCALAR,
875: SCON, TSCALAR,
876: NBREG, RESC1,
877: "F movZB AL,A1\n addZB AR,AL\n",
878:
879: DECR, INTBREG|INBREG|FOREFF,
880: EB, TSCALAR,
881: SCON, TSCALAR,
882: NBREG, RESC1,
883: "F movZB AL,A1\n subZB AR,AL\n",
884:
885: /*- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - */
886:
887: /*
888: * address expressions ( base + offset [+ index] )
889: */
890: PLUS, INBREG|INTBREG,
891: SBREG, TPOINT,
892: SSCON, TANY,
893: NBREG|NBSL, RESC1,
894: " lea AL@(ZO),A1\n",
895:
896: PLUS, INBREG|INTBREG,
897: SBREG, TPOINT,
898: SAREG|SBREG, TWORD|TSHORT,
899: NBREG|NBSL, RESC1,
900: "Zl",
901:
902: PLUS, INBREG|INTBREG,
903: SBASE, TPOINT,
904: SXREG, TWORD|TSHORT,
905: NBREG|NBSL, RESC1,
906: " lea ZX,A1\n",
907:
908: PLUS, FORARG,
909: SBREG, TPOINT,
910: SSCON, TANY,
911: 0, RNULL,
912: " pea AL@(ZO)\nZP",
913:
914: PLUS, FORARG,
915: SBREG, TPOINT,
916: SAREG, TWORD|TSHORT,
917: 0, RNULL,
918: " pea AL@(0,AR:ZR)\nZP",
919:
920: PLUS, FORARG,
921: SBASE, TPOINT,
922: SXREG, TWORD|TSHORT,
923: 0, RNULL,
924: " pea ZX\nZP",
925:
926: /*- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - */
927:
928: MINUS, INBREG|INTBREG,
929: SBREG, TPOINT,
930: SSCON, TANY,
931: NBREG|NBSL, RESC1,
932: " lea AL@(ZM),A1\n",
933:
934: MINUS, FORARG,
935: SBREG, TPOINT,
936: SSCON, TANY,
937: 0, RNULL,
938: " pea AL@(ZM)\nZP",
939:
940: /*- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - */
941:
942: ASG PLUS, INAREG|FORCC,
943: EAA, TSCALAR,
944: S8CON, TSCALAR,
945: 0, RLEFT|RESCC,
946: " addqZB AR,AL\nZv",
947:
948: ASG PLUS, INBREG,
949: EB, TSCALAR,
950: S8CON, TSCALAR,
951: 0, RLEFT|RESCC,
952: " addqw AR,AL\n",
953:
954: ASG PLUS, INAREG|FORCC,
955: SAREG|STAREG, TSCALAR,
956: EAA, TSCALAR,
957: 0, RLEFT|RESCC,
958: " addZB AR,AL\nZv",
959:
960: ASG PLUS, INAREG|FORCC,
961: SAREG|STAREG, TWORD|TSHORT,
962: EB, TWORD|TSHORT,
963: 0, RLEFT|RESCC,
964: " addZB AR,AL\nZv",
965:
966: ASG PLUS, INBREG,
967: SBREG|STBREG, TSCALAR,
968: SICON, TANY,
969: 0, RLEFT,
970: " lea AL@(CR),AL\n",
971:
972: ASG PLUS, INBREG,
973: SBREG|STBREG, TSCALAR,
974: EA, TWORD|TSHORT,
975: 0, RLEFT,
976: " addZR AR,AL\n",
977:
978: ASG PLUS, INAREG|FORCC,
979: EAA, TSCALAR,
980: SAREG|STAREG, TSCALAR,
981: 0, RLEFT|RESCC,
982: " addZB AR,AL\nZv",
983:
984: /*- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - */
985:
986: ASG MINUS, INAREG|FORCC,
987: EAA, TSCALAR,
988: S8CON, TSCALAR,
989: 0, RLEFT|RESCC,
990: " subqZB AR,AL\nZv",
991:
992: ASG MINUS, INBREG,
993: EB, TSCALAR,
994: S8CON, TSCALAR,
995: 0, RLEFT|RESCC,
996: " subqw AR,AL\n",
997:
998: ASG MINUS, INBREG,
999: SBREG|STBREG, TSCALAR,
1000: SICON, TANY,
1001: 0, RLEFT,
1002: " lea AL@(ZM),AL\n",
1003:
1004: ASG MINUS, INAREG|FORCC,
1005: SAREG|STAREG, TSCALAR,
1006: EAA, TSCALAR,
1007: 0, RLEFT|RESCC,
1008: " subZB AR,AL\nZv",
1009:
1010: ASG MINUS, INAREG|FORCC,
1011: SAREG|STAREG, TWORD|TSHORT,
1012: EB, TWORD|TSHORT,
1013: 0, RLEFT|RESCC,
1014: " subZB AR,AL\nZv",
1015:
1016: ASG MINUS, INBREG,
1017: SBREG|STBREG, TSCALAR,
1018: EA, TWORD|TSHORT,
1019: 0, RLEFT,
1020: " subZR AR,AL\n",
1021:
1022: ASG MINUS, INAREG|FORCC,
1023: EAA, TSCALAR,
1024: SAREG|STAREG, TSCALAR,
1025: 0, RLEFT|RESCC,
1026: " subZB AR,AL\nZv",
1027:
1028: /*- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - */
1029:
1030: ASG ER, INAREG|FORCC,
1031: EAA, TSCALAR,
1032: SCON, TSCALAR,
1033: 0, RLEFT|RESCC,
1034: " eorZB AR,AL\n",
1035:
1036: ASG ER, INAREG|FORCC,
1037: EAA, TSCALAR,
1038: SAREG|STAREG, TSCALAR,
1039: 0, RLEFT|RESCC,
1040: " eorZB AR,AL\nZv",
1041:
1042: /*- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - */
1043:
1044: ASG OPSIMP, INAREG|FORCC,
1045: SAREG|STAREG, TSCALAR,
1046: EAA, TSCALAR,
1047: 0, RLEFT|RESCC,
1048: " OIZB AR,AL\nZv",
1049:
1050: ASG OPSIMP, INAREG|FORCC,
1051: EAA, TSCALAR,
1052: SCON, TSCALAR,
1053: 0, RLEFT|RESCC,
1054: " OIZB AR,AL\nZv",
1055:
1056: ASG OPSIMP, INAREG|FORCC,
1057: EAA, TSCALAR,
1058: SAREG|STAREG, TSCALAR,
1059: 0, RLEFT|RESCC,
1060: " OIZB AR,AL\nZv",
1061:
1062: /*- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - */
1063:
1064: /*
1065: * floating ASG binary operators
1066: */
1067:
1068: (ASG OPFLOAT)|OP68881, INCREG|INTCREG|FOREFF,
1069: SCREG|STCREG, TFLOAT|TDOUBLE,
1070: SFLOAT_SRCE, TFLOAT|TDOUBLE,
1071: 0, RLEFT,
1072: " OFZF ZK,AL\n",
1073:
1074: (ASG OPFLOAT)|OP68881, INCREG|INTCREG|FOREFF,
1075: SCREG|STCREG, TFLOAT|TDOUBLE,
1076: SCREG|STCREG, TFLOAT|TDOUBLE,
1077: 0, RLEFT,
1078: " OFx AR,AL\n",
1079:
1080: (ASG OPFLOAT)|NO68881, INAREG|INTAREG|FOREFF,
1081: SPEC_FLT, TFLOAT,
1082: SPEC_FLT, TFLOAT,
1083: 0, RLEFT,
1084: "Zf",
1085:
1086: (ASG OPFLOAT)|NO68881, INAREG|INTAREG|FOREFF,
1087: SPEC_FLT, TDOUBLE,
1088: SPEC_DFLT, TDOUBLE,
1089: NBREG, RLEFT,
1090: "Zf",
1091:
1092: (ASG PLUS)|NO68881, INAREG|INTAREG|FOREFF,
1093: SPEC_FLT, TFLOAT,
1094: SPEC_PVT, TFLOAT,
1095: 0, RLEFT,
1096: "Zf",
1097:
1098: (ASG PLUS)|NO68881, INAREG|INTAREG|FOREFF,
1099: SPEC_FLT, TDOUBLE,
1100: SPEC_PVT, TDOUBLE,
1101: NBREG, RLEFT,
1102: "Zf",
1103:
1104: /*- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - */
1105:
1106: /*
1107: * floating binary operators
1108: */
1109:
1110: OPFLOAT|NO68881, INAREG|INTAREG,
1111: SPEC_FLT, TFLOAT,
1112: SPEC_FLT, TFLOAT,
1113: NAREG|NASL|NASR, RESC1,
1114: "Zf",
1115:
1116: OPFLOAT|NO68881, INAREG|INTAREG,
1117: SPEC_FLT, TDOUBLE,
1118: SPEC_DFLT, TDOUBLE,
1119: NAREG|NBREG|NASL|NASR, RESC1,
1120: "Zf",
1121:
1122: PLUS|NO68881, INAREG|INTAREG,
1123: SPEC_FLT, TFLOAT,
1124: SPEC_PVT, TFLOAT,
1125: NAREG|NASL|NASR, RESC1,
1126: "Zf",
1127:
1128: PLUS|NO68881, INAREG|INTAREG,
1129: SPEC_FLT, TDOUBLE,
1130: SPEC_PVT, TDOUBLE,
1131: NAREG|NBREG|NASL|NASR, RESC1,
1132: "Zf",
1133:
1134: /*- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - */
1135:
1136: ASG MUL, INAREG|INTAREG|FOREFF,
1137: SAREG|STAREG, TCHAR,
1138: SCON, TANY,
1139: NAREG, RLEFT,
1140: " extw AL\nZm",
1141:
1142: ASG MUL, INAREG|INTAREG|FOREFF,
1143: SAREG|STAREG, TUCHAR,
1144: SCON, TANY,
1145: NAREG, RLEFT,
1146: " andw #255,AL\nZm",
1147:
1148: ASG MUL, INAREG|INTAREG|FOREFF,
1149: SAREG|STAREG, TWORD|TSHORT|TUSHORT,
1150: SCON, TANY,
1151: NAREG, RLEFT,
1152: "Zm",
1153:
1154: ASG MUL, INAREG|FORCC|FOREFF,
1155: SAREG|STAREG, TSHORT,
1156: EAA, TSHORT,
1157: 0, RLEFT|RESCC,
1158: " muls AR,AL\n",
1159:
1160: ASG MUL, INAREG|FORCC|FOREFF,
1161: SAREG|STAREG, TUSHORT,
1162: EAA, TUSHORT|TSHORT,
1163: 0, RLEFT|RESCC,
1164: " mulu AR,AL\n",
1165:
1166: ASG MUL, INAREG|FORCC|FOREFF,
1167: SAREG|STAREG, TSHORT,
1168: EAA, TUSHORT,
1169: 0, RLEFT|RESCC,
1170: " mulu AR,AL\n",
1171:
1172: ASG MUL, INAREG|INTAREG|FOREFF,
1173: SAREG|STAREG, TCHAR,
1174: EAA, TCHAR,
1175: NAREG, RLEFT,
1176: "\textw AL\n\tmovb AR,A1\n\textw A1\n\tmuls A1,AL\n",
1177:
1178: ASG MUL, INAREG|INTAREG|FOREFF,
1179: SAREG|STAREG, TUCHAR,
1180: EAA, TUCHAR|TCHAR,
1181: NAREG, RLEFT,
1182: "\tandw #255,AL\n\tclrw A1\n\tmovb AR,A1\n\tmuls A1,AL\n",
1183:
1184: (ASG MUL)|NO68020, INTAREG|FOREFF,
1185: STAREG, TPOINT|TLONG|TINT,
1186: STAREG, TPOINT|TLONG|TINT,
1187: 0, RLEFT,
1188: " jsr lmult\nZv",
1189:
1190: (ASG MUL)|NO68020, INTAREG|FOREFF,
1191: STAREG, TWORD,
1192: STAREG, TWORD,
1193: 0, RLEFT,
1194: " jsr ulmult\nZv",
1195:
1196: (ASG MUL)|OP68020, INAREG|INTAREG|FOREFF,
1197: SAREG|STAREG, TPOINT|TLONG|TINT,
1198: EAA, TPOINT|TLONG|TINT,
1199: 0, RLEFT,
1200: " mulsl AR,AL\nZv",
1201:
1202: (ASG MUL)|OP68020, INAREG|INTAREG|FOREFF,
1203: SAREG|STAREG, TWORD,
1204: EAA, TWORD,
1205: 0, RLEFT,
1206: " mulul AR,AL\nZv",
1207:
1208: (ASG MUL)|NO68881, INAREG|FOREFF,
1209: STAREG, TFLOAT,
1210: STAREG, TFLOAT,
1211: 0, RLEFT,
1212: "Zf",
1213:
1214: /*- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - */
1215:
1216: ASG DIV, INAREG|INTAREG|FOREFF,
1217: SAREG|STAREG, ANYSIGNED,
1218: SCON, TANY,
1219: 0, RLEFT|RNULL,
1220: "Zd",
1221:
1222: ASG DIV, INAREG|INTAREG|FORCC|FOREFF,
1223: SAREG|STAREG, TSHORT,
1224: EAA, TSHORT,
1225: 0, RLEFT|RESCC,
1226: " extl AL\n divs AR,AL\n",
1227:
1228: ASG DIV, INAREG|INTAREG|FORCC|FOREFF,
1229: SAREG|STAREG, TUSHORT,
1230: EAA, TUSHORT|TSHORT,
1231: 0, RLEFT|RESCC,
1232: " andl #0xffff,AL\n divu AR,AL\n",
1233:
1234: ASG DIV, INAREG|INTAREG|FORCC|FOREFF,
1235: SAREG|STAREG, TSHORT,
1236: EAA, TUSHORT,
1237: 0, RLEFT|RESCC,
1238: " andl #0xffff,AL\n divu AR,AL\n",
1239:
1240: (ASG DIV)|NO68020, INTAREG|INAREG|FOREFF,
1241: SAREG|STAREG, TCHAR,
1242: EAA, TCHAR,
1243: NAREG, RLEFT,
1244: " extw AL\n\
1245: extl AL\n\
1246: movb AR,A1\n\
1247: extw A1\n\
1248: divs A1,AL\n",
1249:
1250: (ASG DIV)|OP68020, INTAREG|INAREG|FOREFF,
1251: SAREG|STAREG, TCHAR,
1252: EAA, TCHAR,
1253: NAREG, RLEFT,
1254: " extbl AL\n\
1255: movb AR,A1\n\
1256: extw A1\n\
1257: divs A1,AL\n",
1258:
1259: ASG DIV, INTAREG|INAREG|FOREFF,
1260: SAREG|STAREG, TUCHAR,
1261: EAA, TUCHAR|TCHAR,
1262: NAREG, RLEFT,
1263: "\tandw #255,AL\n\tclrw A1\n\tmovb AR,A1\n\tdivs A1,AL\n",
1264:
1265: (ASG DIV)|NO68020, INTAREG|FOREFF,
1266: STAREG, ANYSIGNED,
1267: STAREG, ANYSIGNED,
1268: 0, RLEFT,
1269: " jsr ldivt\n",
1270:
1271: (ASG DIV)|NO68020, INTAREG|FOREFF,
1272: STAREG, TWORD,
1273: STAREG, TWORD,
1274: 0, RLEFT,
1275: " jsr uldivt\n",
1276:
1277: (ASG DIV)|OP68020, INAREG|INTAREG|FOREFF,
1278: SAREG|STAREG, ANYSIGNED,
1279: EAA, ANYSIGNED,
1280: 0, RLEFT,
1281: " divsl AR,AL\n",
1282:
1283: (ASG DIV)|OP68020, INAREG|INTAREG|FOREFF,
1284: SAREG|STAREG, TWORD,
1285: EAA, TWORD,
1286: 0, RLEFT,
1287: " divul AR,AL\n",
1288:
1289: /*- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - */
1290:
1291: /*
1292: * <areg> %= <constant, not a power of 2>.
1293: * This case has two templates before the "Zr" case, so that we can
1294: * generate a div.ll instruction with the remainder returned in RESC1
1295: * instead of RLEFT, thus saving a register-register move. whoop-te-doo
1296: */
1297:
1298: (ASG MOD)|OP68020, INAREG|INTAREG,
1299: STAREG, TINT|TLONG,
1300: SNONPOW2, TANY,
1301: NAREG, RESC1,
1302: " divsll AR,A1:AL\n",
1303:
1304: (ASG MOD)|OP68020, INAREG|INTAREG,
1305: STAREG, TUNSIGNED|TULONG,
1306: SNONPOW2, TANY,
1307: NAREG, RESC1,
1308: " divull AR,A1:AL\n",
1309:
1310: ASG MOD, INAREG|INTAREG|FOREFF,
1311: SAREG|STAREG, ANYFIXED,
1312: SCON, TANY,
1313: NAREG, RLEFT|RNULL,
1314: "Zr",
1315:
1316: ASG MOD, INTAREG|INAREG|FOREFF,
1317: SAREG|STAREG, TSHORT,
1318: EAA, TSHORT,
1319: 0, RLEFT,
1320: " extl AL\n divs AR,AL\n swap AL\n",
1321:
1322: ASG MOD, INTAREG|INAREG|FOREFF,
1323: SAREG|STAREG, TUSHORT,
1324: EAA, TUSHORT|TSHORT,
1325: 0, RLEFT,
1326: " andl #65535,AL\n divu AR,AL\n swap AL\n",
1327:
1328: ASG MOD, INTAREG|INAREG|FOREFF,
1329: SAREG|STAREG, TSHORT,
1330: EAA, TUSHORT,
1331: 0, RLEFT,
1332: " andl #65535,AL\n divu AR,AL\n swap AL\n",
1333:
1334: ASG MOD, INTAREG|INAREG|FOREFF,
1335: SAREG|STAREG, TCHAR,
1336: EAA, TCHAR,
1337: NAREG, RLEFT,
1338: " extw AL\n\
1339: movb AR,A1\n\
1340: extw A1\n\
1341: divs A1,AL\n\
1342: swap AL\n",
1343:
1344: ASG MOD, INTAREG|INAREG|FOREFF,
1345: SAREG|STAREG, TUCHAR,
1346: EAA, TUCHAR|TCHAR,
1347: NAREG, RLEFT,
1348: "\tandw #255,AL\n\tclrw A1\n\tmovb AR,A1\n\tdivs A1,AL\n swap AL\n",
1349:
1350: (ASG MOD)|NO68020, INTAREG|FOREFF,
1351: STAREG, ANYSIGNED,
1352: STAREG, ANYSIGNED,
1353: 0, RLEFT,
1354: " jsr lmodt\n",
1355:
1356: (ASG MOD)|NO68020, INTAREG|FOREFF,
1357: STAREG, TWORD,
1358: STAREG, TWORD,
1359: 0, RLEFT,
1360: " jsr ulmodt\n",
1361:
1362: (ASG MOD)|OP68020, INAREG|INTAREG,
1363: STAREG, ANYSIGNED,
1364: EAA, ANYSIGNED,
1365: NAREG|NASR, RESC1,
1366: " divsll AR,A1:AL\n",
1367:
1368: (ASG MOD)|OP68020, INAREG|INTAREG|FOREFF,
1369: SAREG|STAREG, ANYSIGNED,
1370: EAA, ANYSIGNED,
1371: NAREG|NASR, RLEFT,
1372: " divsll AR,A1:AL\n movl A1,AL\n",
1373:
1374: (ASG MOD)|OP68020, INAREG|INTAREG,
1375: STAREG, TWORD,
1376: EAA, TWORD,
1377: NAREG|NASR, RESC1,
1378: " divull AR,A1:AL\n",
1379:
1380: (ASG MOD)|OP68020, INAREG|INTAREG|FOREFF,
1381: SAREG|STAREG, TWORD,
1382: EAA, TWORD,
1383: NAREG|NASR, RLEFT,
1384: " divull AR,A1:AL\n movl A1,AL\n",
1385:
1386: /*- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - */
1387:
1388: ASG OPSHFT, FOREFF,
1389: SNAME|SOREG|STARREG, TSHORT,
1390: SONE, TSCALAR,
1391: 0, RLEFT,
1392: " aOIw AL\n",
1393:
1394: ASG OPSHFT, INAREG|FOREFF,
1395: SAREG, TINT|TSHORT|TCHAR,
1396: S8CON, TSCALAR,
1397: 0, RLEFT,
1398: " aOIZB AR,AL\n",
1399:
1400: ASG OPSHFT, INAREG|FOREFF,
1401: SAREG, TINT|TSHORT|TCHAR,
1402: SAREG, TSCALAR,
1403: 0, RLEFT,
1404: " aOIZB AR,AL\n",
1405:
1406: /* ASG OPSHFT, INAREG|FOREFF, */
1407: ASG OPSHFT, FOREFF,
1408: SNAME|SOREG|STARREG, TUSHORT,
1409: SONE, TSCALAR,
1410: 0, RLEFT,
1411: " lOIw AL\n",
1412:
1413: ASG OPSHFT, INAREG|FOREFF,
1414: SAREG, TUNSIGNED|TUSHORT|TUCHAR,
1415: S8CON, TSCALAR,
1416: 0, RLEFT,
1417: " lOIZB AR,AL\n",
1418:
1419: ASG OPSHFT, INAREG|FOREFF,
1420: SAREG, TUNSIGNED|TUSHORT|TUCHAR,
1421: SAREG, TSCALAR,
1422: 0, RLEFT,
1423: " lOIZB AR,AL\n",
1424:
1425: /*- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - */
1426:
1427: UNARY CALL, INTAREG,
1428: SBREG|SNAME|SOREG|SCON|SAREG, TANY,
1429: SANY, TANY,
1430: NAREG|NASL, RESC1, /* should be register 0 */
1431: "ZC\n",
1432:
1433: CHK, INAREG,
1434: SAREG, TSHORT|TWORD,
1435: SZEROLB, TANY,
1436: 0, RLEFT,
1437: "ZV",
1438:
1439: CHK, INTAREG,
1440: STAREG, TSCALAR,
1441: SANY, TANY,
1442: 0, RLEFT,
1443: "ZV",
1444:
1445: /*- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - */
1446:
1447: /*
1448: * conversions, from and to integer types
1449: */
1450: SCONV, INTAREG,
1451: STAREG, TINT|TUNSIGNED|TPOINT,
1452: SANY, TINT|TUNSIGNED|TPOINT,
1453: 0, RLEFT,
1454: "",
1455:
1456: SCONV, INAREG|INTAREG,
1457: STAREG, TINT|TUNSIGNED|TPOINT,
1458: SANY, TSHORT|TCHAR|TUSHORT|TUCHAR,
1459: 0, RLEFT,
1460: "",
1461:
1462: SCONV, INAREG|INTAREG,
1463: SAREG, TINT|TUNSIGNED|TPOINT,
1464: SANY, TSHORT|TCHAR|TUSHORT|TUCHAR,
1465: NAREG|NASL, RESC1,
1466: " movZB AL,A1\n",
1467:
1468: SCONV, INAREG|INTAREG,
1469: STAREG, TCHAR,
1470: SANY, TSHORT|TUSHORT,
1471: 0, RLEFT,
1472: " extw AL\n",
1473:
1474: (SCONV)|NO68020, INAREG|INTAREG,
1475: STAREG, TCHAR,
1476: SANY, TINT|TUNSIGNED|TPOINT,
1477: 0, RLEFT,
1478: " extw AL\n extl AL\n",
1479:
1480: (SCONV)|OP68020, INAREG|INTAREG,
1481: STAREG, TCHAR,
1482: SANY, TINT|TUNSIGNED|TPOINT,
1483: 0, RLEFT,
1484: " extbl AL\n",
1485:
1486: SCONV, INAREG|INTAREG,
1487: STAREG, TSHORT,
1488: SANY, TINT|TUNSIGNED|TPOINT,
1489: 0, RLEFT,
1490: " extl AL\n",
1491:
1492: SCONV, INAREG|INTAREG,
1493: ES, TUCHAR,
1494: SANY, TSCALAR,
1495: NAREG|NASL, RESC1,
1496: "Zt",
1497:
1498: SCONV, INAREG|INTAREG,
1499: ES, TUSHORT,
1500: SANY, TWORD,
1501: NAREG|NASL, RESC1,
1502: "Zt",
1503:
1504: /* icky conversions into B registers -- for immediate use as a pointer */
1505: SCONV, INBREG|INTBREG,
1506: STAREG, TSHORT,
1507: SANY, TWORD,
1508: NBREG, RESC1,
1509: " movw AL,A1\n",
1510:
1511: SCONV, INBREG|INTBREG,
1512: STAREG, TUSHORT,
1513: SANY, TWORD,
1514: NBREG, RESC1,
1515: " andl #0xffff,AL\n movl AL,A1\n",
1516:
1517: SCONV, INBREG|INTBREG,
1518: STAREG, TCHAR,
1519: SANY, TWORD,
1520: NBREG, RESC1,
1521: " extw AL\n movw AL,A1\n",
1522:
1523: SCONV, INBREG|INTBREG,
1524: STAREG, TUCHAR,
1525: SANY, TWORD,
1526: NBREG, RESC1,
1527: " andl #0xff,AL\n movl AL,A1\n",
1528: /* end icky */
1529:
1530: SCONV, INAREG|INTAREG,
1531: SNAME|SOREG|SAREG, TINT|TUNSIGNED|TPOINT|TSHORT|TUSHORT,
1532: SANY, TSHORT|TUSHORT|TCHAR|TUCHAR,
1533: 0, RLEFT,
1534: "ZT",
1535:
1536: SCONV, INAREG|INTAREG,
1537: SBREG, TINT|TUNSIGNED|TPOINT|TSHORT|TUSHORT,
1538: SANY, TSHORT|TUSHORT,
1539: 0, RLEFT,
1540: "ZT",
1541:
1542: /*- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - */
1543:
1544: /*
1545: * floating point conversions
1546: */
1547:
1548: SCONV|OP68881, INCREG|INTCREG,
1549: EAA, ANYSIGNED|TFLOAT,
1550: SANY, TFLOAT|TDOUBLE,
1551: NCREG, RESC1,
1552: " fmoveZG AL,A1\n",
1553:
1554: SCONV|OP68881, INCREG|INTCREG,
1555: SCREG|STCREG, TFLOAT|TDOUBLE,
1556: SANY, TDOUBLE,
1557: 0, RLEFT,
1558: "",
1559:
1560: /* conversions into the d-registers, for function results etc */
1561:
1562: SCONV|OP68881, INTAREG|INTAREG,
1563: SCREG|STCREG, TFLOAT|TDOUBLE,
1564: SANY, TFLOAT,
1565: NAREG, RESC1,
1566: " fmoveZ. AL,A1\n",
1567:
1568: SCONV|OP68881, INTAREG|INTAREG,
1569: SCREG|STCREG, TFLOAT,
1570: SANY, TDOUBLE,
1571: NAREG, RESC1,
1572: " fmoveZ. AL,sp@-\n\
1573: movl sp@+,A1\n\
1574: movl sp@+,U1\n",
1575:
1576: /*
1577: * conversion from float|double to integer
1578: */
1579: SCONV|OP68881, INTAREG,
1580: STCREG, TDOUBLE|TFLOAT,
1581: SANY, TSCALAR,
1582: NAREG, RESC1,
1583: " fintrzx AL,AL\n\
1584: fmovel AL,A1\n",
1585:
1586: SCONV|NO68881, INAREG|INTAREG,
1587: STAREG, TDOUBLE,
1588: SANY, TFLOAT,
1589: NAREG|NASL, RESC1,
1590: "Zg",
1591:
1592: SCONV|NO68881, INTAREG|INTAREG,
1593: STAREG,TFLOAT,
1594: SANY, TDOUBLE,
1595: NAREG|NASL, RESC1,
1596: "Zg",
1597:
1598: SCONV|NO68881, INTAREG,
1599: STAREG, TDOUBLE|TFLOAT,
1600: SANY, TSCALAR,
1601: NAREG|NASL, RESC1,
1602: "Zg",
1603:
1604: SCONV|NO68881, INTAREG,
1605: STAREG, TSCALAR,
1606: SANY, TDOUBLE|TFLOAT,
1607: NAREG|NASL, RESC1,
1608: "Zg",
1609:
1610: SCONV, INAREG,
1611: STAREG|SAREG, TDOUBLE,
1612: SANY, TDOUBLE,
1613: 0, RLEFT,
1614: "",
1615:
1616: SCONV, INAREG,
1617: STAREG|SAREG, TFLOAT,
1618: SANY, TFLOAT,
1619: 0, RLEFT,
1620: "",
1621:
1622: /*- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - */
1623:
1624: /*
1625: * structure assignments
1626: */
1627:
1628: STASG, FOREFF,
1629: STBREG, TANY,
1630: STBREG, TANY,
1631: NAREG, RNULL,
1632: "ZS",
1633:
1634: STASG, INBREG|INTBREG|FOREFF,
1635: SNAME|SOREG|SBREG|STBREG, TANY,
1636: STBREG, TANY,
1637: NAREG|NBREG|NBSL, RRIGHT,
1638: "ZS",
1639:
1640: /* never needs a temp register on the left */
1641: STASG, INBREG|INTBREG|FOREFF,
1642: STBREG, TANY,
1643: SBREG|STBREG, TANY,
1644: NAREG|NBREG|NBSR, RRIGHT,
1645: "ZS",
1646:
1647: /* last resort -- uses more registers */
1648: STASG, INBREG|INTBREG|FOREFF,
1649: SNAME|SOREG|SBREG|STBREG, TANY,
1650: SBREG|STBREG, TANY,
1651: NAREG|2*NBREG|NBSR, RRIGHT,
1652: "ZS",
1653:
1654: /*- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - */
1655:
1656: /*
1657: * structure arguments
1658: */
1659:
1660: STARG, FORARG,
1661: STBREG, TPOINT,
1662: SANY, TANY,
1663: NAREG|NBREG, RNULL,
1664: "ZS",
1665:
1666: STARG, FORARG,
1667: SNAME|SOREG, TSTRUCT,
1668: SANY, TANY,
1669: NAREG|2*NBREG, RNULL,
1670: "ZS",
1671:
1672: STARG, FORARG,
1673: SBREG|STBREG, TPOINT,
1674: SANY, TANY,
1675: NAREG|2*NBREG, RNULL,
1676: "ZS",
1677:
1678: /*- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - */
1679:
1680: /*
1681: * initializations - constants only
1682: */
1683: INIT, FOREFF,
1684: SCON, TANY,
1685: SANY, TINT|TLONG|TUNSIGNED|TULONG|TPOINT,
1686: 0, RNOP,
1687: " .long CL\n",
1688:
1689: INIT, FOREFF,
1690: SCON, TANY,
1691: SANY, TSHORT|TUSHORT,
1692: 0, RNOP,
1693: " .word CL\n",
1694:
1695: INIT, FOREFF,
1696: SCON, TANY,
1697: SANY, TCHAR|TUCHAR,
1698: 0, RNOP,
1699: " .byte CL\n",
1700:
1701: INIT, FOREFF,
1702: SCON, TANY,
1703: SANY, TFLOAT|TDOUBLE,
1704: 0, RNOP,
1705: " .long CL\n",
1706:
1707: /*- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - */
1708:
1709: /* Default actions for hard trees ... */
1710:
1711: # define DF(x) FORREW,SANY,TANY,SANY,TANY,REWRITE,x,""
1712:
1713: UNARY MUL, DF( UNARY MUL ),
1714:
1715: INCR, DF(INCR),
1716:
1717: DECR, DF(INCR),
1718:
1719: ASSIGN, DF(ASSIGN),
1720:
1721: STASG, DF(STASG),
1722:
1723: OPLEAF, DF(NAME),
1724:
1725: OPLOG, FORCC,
1726: SANY, TANY,
1727: SANY, TANY,
1728: REWRITE, BITYPE,
1729: "",
1730:
1731: /*OPLOG, DF(NOT),*/
1732: OPLOG, DF(BITYPE),
1733: COMOP, DF(COMOP),
1734: INIT, DF(INIT),
1735: FLD, DF(FLD),
1736: GOTO,DF(GOTO),
1737: SCONV, DF(SCONV),
1738: OPUNARY, DF(UNARY MINUS),
1739: ASG OPANY, DF(ASG PLUS),
1740: OPANY, DF(BITYPE),
1741: FREE, FREE, FREE, FREE, FREE, FREE, FREE, FREE, "help; I'm in trouble\n" };
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