|
|
1.1 ! root 1: /* ! 2: * DSC System 200 via DSC dma11 ! 3: * registers and bits ! 4: */ ! 5: ! 6: struct dsdevice { ! 7: /* dma registers */ ! 8: short dmablr; /* block length */ ! 9: u_short dmasax; /* starting address extension */ ! 10: u_short dmasar; /* starting address */ ! 11: u_short dmacsr; /* command status */ ! 12: short dmawc; /* word count */ ! 13: u_short dmaacx; /* address count extension */ ! 14: u_short dmaac; /* address count */ ! 15: u_short dmadr; /* data */ ! 16: u_short dmaiva; /* interrupt vector */ ! 17: u_short dmacls; /* clear status */ ! 18: u_short dmaclr; /* clear device */ ! 19: u_short unused1; ! 20: ! 21: /* asc registers */ ! 22: u_short ascdis; /* display register */ ! 23: u_short asccsr; /* command status register */ ! 24: u_short ascsrt; /* sample rate register */ ! 25: u_short ascrst; /* reset */ ! 26: u_short ascseq[16]; /* sequence rams */ ! 27: ! 28: /* converter registers */ ! 29: u_short adc[8]; /* analog to digital converters */ ! 30: u_short dac[8]; /* digital to analog converters */ ! 31: }; ! 32: ! 33: # define bit(x) ((1) << (x)) ! 34: ! 35: /* ! 36: * ASC csr bits ! 37: */ ! 38: # define ASC_RUN bit(0) /* run conversion */ ! 39: # define ASC_HZ04 (0) /* filter, 4kHz */ ! 40: # define ASC_HZ08 bit(1) /* filter, 8kHz */ ! 41: # define ASC_BYPASS bit(2) /* external filter */ ! 42: # define ASC_RECORD bit(3) /* a/d */ ! 43: # define ASC_PLAY bit(4) /* d/a */ ! 44: # define ASC_BRD bit(5) /* broadcast */ ! 45: # define ASC_MON bit(6) /* monitor */ ! 46: # define ASC_IE bit(7) /* interrupt enable */ ! 47: # define ASC_BA bit(8) /* bus abort */ ! 48: # define ASC_DCN bit(9) /* dc not ok */ ! 49: # define ASC_DNP bit(12) /* device not present */ ! 50: # define ASC_DER bit(13) /* device error */ ! 51: # define ASC_DLT bit(14) /* data late */ ! 52: # define ASC_ERR bit(15) /* error */ ! 53: ! 54: # define ASC_HZMSK (bit(1)|bit(2)) /* to turn off all filter bits */ ! 55: # define ASC_HZSHIFT 1 ! 56: ! 57: # define ASC_BITS "\10\01RUN\02HZ10\03BYPASS\04RECORD\05PLAY\06BRD\07MON\10IE\11BA\12DCN\15DNP\16DER\17DLT\20ERR" ! 58: ! 59: /* ! 60: * DMA csr bits ! 61: */ ! 62: # define DMA_DRF bit(0) /* data register full */ ! 63: # define DMA_AMPS bit(1) /* memory port select */ ! 64: # define DMA_AMPE bit(2) /* memory parity error */ ! 65: # define DMA_XBA bit(3) /* external buss abort */ ! 66: # define DMA_W2M bit(4) /* write to memory */ ! 67: # define DMA_CHN bit(5) /* chain */ ! 68: # define DMA_IE bit(6) /* interrupt enable */ ! 69: # define DMA_BSY bit(7) /* busy */ ! 70: # define DMA_SFL bit(9) /* starting address register full */ ! 71: # define DMA_OFL bit(10) /* offline */ ! 72: # define DMA_XIN bit(11) /* external interrupt */ ! 73: # define DMA_IIN bit(12) /* internal interrrupt */ ! 74: # define DMA_XER bit(13) /* external error */ ! 75: # define DMA_UBA bit(14) /* unibus abort */ ! 76: # define DMA_ERR bit(15) /* error */ ! 77: ! 78: # define DMA_BITS "\10\01DRF\02AMPS\03AMPE\04XBA\05W2M\06CHN\07IE\10BSY\12SFL\13OFL\14XIN\15IIN\16XER\17UBA\20ERR"
This archive runs on limited infrastructure. Preserving old code on modern bandwidth. Automated agents are requested to crawl responsibly.