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1.1 root 1: struct hpdevice
2: {
3: int hpcs1; /* control and status register 1 */
4: int hpds; /* drive status */
5: int hper1; /* error register 1 */
6: int hpmr; /* maintenance */
7: int hpas; /* attention summary */
8: int hpda; /* desired address register */
9: int hpdt; /* drive type */
10: int hpla; /* look ahead */
11: int hpsn; /* serial number */
12: int hpof; /* offset register */
13: int hpdc; /* desired cylinder address register */
14: int hpcc; /* current cylinder */
15: /* on an rp drive, mr2 is called er2 and er2 is called er3 */
16: /* we use rm terminology here */
17: int hpmr2; /* maintenance register 2 */
18: int hper2; /* error register 2 */
19: int hpec1; /* burst error bit position */
20: int hpec2; /* burst error bit pattern */
21: };
22:
23: /* hpcs1 */
24: #define HP_SC 0100000 /* special condition */
25: #define HP_TRE 0040000 /* transfer error */
26: #define HP_DVA 0004000 /* drive available */
27: #define HP_RDY 0000200 /* controller ready */
28: #define HP_IE 0000100 /* interrupt enable */
29: /* bits 5-1 are the command */
30: #define HP_GO 0000001
31:
32: /* commands */
33: #define HP_NOP 000 /* no operation */
34: #define HP_UNLOAD 002 /* offline drive */
35: #define HP_SEEK 004 /* seek */
36: #define HP_RECAL 006 /* recalibrate */
37: #define HP_DCLR 010 /* drive clear */
38: #define HP_RELEASE 012 /* release */
39: #define HP_OFFSET 014 /* offset */
40: #define HP_RTC 016 /* return to centerline */
41: #define HP_PRESET 020 /* read-in preset */
42: #define HP_PACK 022 /* pack acknowledge */
43: #define HP_SEARCH 030 /* search */
44: #define HP_DIAGNOSE 034 /* diagnose drive */
45: #define HP_WCDATA 050 /* write check data */
46: #define HP_WCHDR 052 /* write check header and data */
47: #define HP_WCOM 060 /* write data */
48: #define HP_WHDR 062 /* write header */
49: #define HP_WTRACKD 064 /* write track descriptor */
50: #define HP_RCOM 070 /* read data */
51: #define HP_RHDR 072 /* read header and data */
52: #define HP_RTRACKD 074 /* read track descriptor */
53:
54: /* hpds */
55: #define HPDS_ATA 0100000 /* attention active */
56: #define HPDS_ERR 0040000 /* composite drive error */
57: #define HPDS_PIP 0020000 /* positioning in progress */
58: #define HPDS_MOL 0010000 /* medium on line */
59: #define HPDS_WRL 0004000 /* write locked */
60: #define HPDS_LST 0002000 /* last sector transferred */
61: #define HPDS_PGM 0001000 /* programmable */
62: #define HPDS_DPR 0000400 /* drive present */
63: #define HPDS_DRY 0000200 /* drive ready */
64: #define HPDS_VV 0000100 /* volume valid */
65: /* bits 1-5 are spare */
66: #define HPDS_OM 0000001 /* offset mode */
67:
68: #define HPDS_DREADY (HPDS_DPR|HPDS_DRY|HPDS_MOL|HPDS_VV)
69: #define HPDS_BITS \
70: "\10\20ATA\17ERR\16PIP\15MOL\14WRL\13LST\12PGM\11DPR\10DRY\7VV\1OM"
71:
72: /* hper1 */
73: #define HPER1_DCK 0100000 /* data check */
74: #define HPER1_UNS 0040000 /* drive unsafe */
75: #define HPER1_OPI 0020000 /* operation incomplete */
76: #define HPER1_DTE 0010000 /* drive timing error */
77: #define HPER1_WLE 0004000 /* write lock error */
78: #define HPER1_IAE 0002000 /* invalid address error */
79: #define HPER1_AOE 0001000 /* address overflow error */
80: #define HPER1_HCRC 0000400 /* header crc error */
81: #define HPER1_HCE 0000200 /* header compare error */
82: #define HPER1_ECH 0000100 /* ecc hard error */
83: #define HPER1_WCF 0000040 /* write clock fail */
84: #define HPER1_FER 0000020 /* format error */
85: #define HPER1_PAR 0000010 /* parity error */
86: #define HPER1_RMR 0000004 /* register modification refused */
87: #define HPER1_ILR 0000002 /* illegal register */
88: #define HPER1_ILF 0000001 /* illegal function */
89:
90: #define HPER1_BITS \
91: "\10\20DCK\17UNS\16OPI\15DTE\14WLE\13IAE\12AOE\11HCRC\10HCE\
92: \7ECH\6WCF\5FER\4PAR\3RMR\2ILR\1ILF"
93: #define HPER1_HARD \
94: (HPER1_WLE|HPER1_IAE|HPER1_AOE|\
95: HPER1_FER|HPER1_RMR|HPER1_ILR|HPER1_ILF)
96:
97: /* hper2 */
98: #define HPER2_BSE 0100000 /* bad sector error */
99: #define HPER2_SKI 0040000 /* seek incomplete */
100: #define HPER2_OPE 0020000 /* operator plug error */
101: #define HPER2_IVC 0010000 /* invalid command */
102: #define HPER2_LSC 0004000 /* loss of system clock */
103: #define HPER2_LBC 0002000 /* loss of bit check */
104: #define HPER2_DVC 0000200 /* device check */
105: #define HPER2_SSE 0000040 /* skip sector error (rm80) */
106: #define HPER2_DPE 0000010 /* data parity error */
107:
108: #define HPER2_BITS \
109: "\10\20BSE\17SKI\16OPE\15IVC\14LSC\13LBC\10DVC\5SSE\4DPE"
110: #ifdef EAG48
111: #define HPER2_HARD HPER2_OPE
112: #else
113: #define HPER2_HARD (HPER2_BSE|HPER2_OPE)
114: #endif EAG48
115:
116: /* hpof */
117: #define HPOF_CMO 0100000 /* command modifier */
118: #define HPOF_MTD 0040000 /* move track descriptor */
119: #define HPOF_FMT22 0010000 /* 16 bit format */
120: #define HPOF_ECI 0004000 /* ecc inhibit */
121: #define HPOF_HCI 0002000 /* header compare inhibit */
122: #define HPOF_SSEI 0001000 /* skip sector inhibit */
123:
124: #define HPOF_P400 020 /* +400 uinches */
125: #define HPOF_M400 0220 /* -400 uinches */
126: #define HPOF_P800 040 /* +800 uinches */
127: #define HPOF_M800 0240 /* -800 uinches */
128: #define HPOF_P1200 060 /* +1200 uinches */
129: #define HPOF_M1200 0260 /* -1200 uinches */
130:
131: /* hpmr */
132: #define HPMR_SZ 0174000 /* ML11 system size */
133: #define HPMR_ARRTYP 0002000 /* ML11 array type */
134: #define HPMR_TRT 0001400 /* ML11 transfer rate */
135:
136: /*
137: * the emulex sc750 massbus controller refers to hpcc as hphr
138: * (holding register), and uses it to divine the size of the
139: * disk connected to the controller
140: */
141: #define hphr hpcc
142: #define HPHR_MAXCYL 0x8017
143: #define HPHR_MAXTRK 0x8018
144: #define HPHR_MAXSECT 0x8019
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