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1.1 ! root 1: /* ! 2: * VAX UNIBUS adapter registers ! 3: */ ! 4: #ifndef LOCORE ! 5: /* ! 6: * UBA hardware registers ! 7: */ ! 8: struct uba_regs ! 9: { ! 10: int uba_cnfgr; /* configuration register */ ! 11: int uba_cr; /* control register */ ! 12: int uba_sr; /* status register */ ! 13: int uba_dcr; /* diagnostic control register */ ! 14: int uba_fmer; /* failed map entry register */ ! 15: int uba_fubar; /* failed UNIBUS address register */ ! 16: int pad1[2]; ! 17: int uba_brsvr[4]; ! 18: int uba_brrvr[4]; /* receive vector registers */ ! 19: int uba_dpr[16]; /* buffered data path register */ ! 20: int pad2[480]; ! 21: struct pte uba_map[496]; /* unibus map register */ ! 22: int pad3[16]; /* no maps for device address space */ ! 23: }; ! 24: ! 25: /* ! 26: * MicroVAX-II local registers ! 27: */ ! 28: struct qb_regs ! 29: { ! 30: u_short qb_bdr; /* boot and diag register */ ! 31: u_short qb_pad1; ! 32: u_long qb_mser; /* memory system error register */ ! 33: u_long qb_caer; /* cpu error address */ ! 34: u_long qb_daer; /* dma error address */ ! 35: u_long qb_pad2[7676]; ! 36: union { ! 37: struct { ! 38: int qb_pad[512]; ! 39: struct pte qb_map[8192];/* q-bus map registers */ ! 40: } qba; ! 41: struct uba_regs uba; ! 42: } qb_uba; ! 43: u_long qb_pad3[40960]; ! 44: /* time of year clock base address 200b 8000 */ ! 45: u_short qb_toysecs; /* seconds */ ! 46: u_short qb_toysecs_alarm; /* not used */ ! 47: u_short qb_toymins; /* minutes */ ! 48: u_short qb_toymins_alarm; /* not used */ ! 49: u_short qb_toyhours; /* hours */ ! 50: u_short qb_toyhours_alarm; /* not used */ ! 51: u_short qb_toyday_week; /* not used */ ! 52: u_short qb_toyday; /* day of month */ ! 53: u_short qb_toymonth; /* month */ ! 54: u_short qb_toyyear; /* year */ ! 55: u_short qb_toycsra; /* csr */ ! 56: u_short qb_toycsrb; /* csr */ ! 57: u_short qb_toycsrc; /* csr */ ! 58: u_short qb_toycsrd; /* csr */ ! 59: u_short qb_cpmbx; /* console program mailbox */ ! 60: u_short qb_toyram[49]; /* toy ram */ ! 61: }; ! 62: #endif ! 63: ! 64: #ifdef MVAX ! 65: /* qb_mser */ ! 66: #define QBM_CD 0x300 /* memory error code */ ! 67: #define QBM_NXM 0x80 /* nonexistant memory */ ! 68: #define QBM_LPE 0x40 /* local memory parity */ ! 69: #define QBM_QPE 0x20 /* q-bus parity error */ ! 70: #define QBM_DMAQPE 0x10 /* dma q-bus parity */ ! 71: #define QBM_LEB 0x8 /* lost error bit */ ! 72: #define QBM_WRW 0x2 /* write wrong parity */ ! 73: #define QBM_PENB 0x1 /* parity enable */ ! 74: #define QBM_EMASK 0xf8 /* mask to isolate cause*/ ! 75: ! 76: /* toy csr */ ! 77: #define QBT_UIP 0x80 /* update in progress */ ! 78: #define QBT_SETA 0x20 /* set up divider */ ! 79: #define QBT_SETUP 0x80 /* stop */ ! 80: #define QBT_SETB 0x6 /* binary and 24 hour */ ! 81: ! 82: /* ! 83: * Flags,boot options for MicroVAX-II console program ! 84: */ ! 85: #define RB_RESTART 0x21 /* Restart, english */ ! 86: #define RB_REBOOT 0x22 /* Reboot, english */ ! 87: #define RB_HALTMD 0x23 /* Halt, english */ ! 88: ! 89: #endif MVAX ! 90: ! 91: #if VAX780 ! 92: /* uba_cnfgr */ ! 93: #define UBACNFGR_UBINIT 0x00040000 /* unibus init asserted */ ! 94: #define UBACNFGR_UBPDN 0x00020000 /* unibus power down */ ! 95: #define UBACNFGR_UBIC 0x00010000 /* unibus init complete */ ! 96: ! 97: /* uba_cr */ ! 98: #define UBACR_MRD16 0x40000000 /* map reg disable bit 4 */ ! 99: #define UBACR_MRD8 0x20000000 /* map reg disable bit 3 */ ! 100: #define UBACR_MRD4 0x10000000 /* map reg disable bit 2 */ ! 101: #define UBACR_MRD2 0x08000000 /* map reg disable bit 1 */ ! 102: #define UBACR_MRD1 0x04000000 /* map reg disable bit 0 */ ! 103: #define UBACR_IFS 0x00000040 /* interrupt field switch */ ! 104: #define UBACR_BRIE 0x00000020 /* BR interrupt enable */ ! 105: #define UBACR_USEFIE 0x00000010 /* UNIBUS to SBI error field IE */ ! 106: #define UBACR_SUEFIE 0x00000008 /* SBI to UNIBUS error field IE */ ! 107: #define UBACR_CNFIE 0x00000004 /* configuration IE */ ! 108: #define UBACR_UPF 0x00000002 /* UNIBUS power fail */ ! 109: #define UBACR_ADINIT 0x00000001 /* adapter init */ ! 110: ! 111: /* uba_sr */ ! 112: #define UBASR_BR7FULL 0x08000000 /* BR7 receive vector reg full */ ! 113: #define UBASR_BR6FULL 0x04000000 /* BR6 receive vector reg full */ ! 114: #define UBASR_BR5FULL 0x02000000 /* BR5 receive vector reg full */ ! 115: #define UBASR_BR4FULL 0x01000000 /* BR4 receive vector reg full */ ! 116: #define UBASR_RDTO 0x00000400 /* UNIBUS to SBI read data timeout */ ! 117: #define UBASR_RDS 0x00000200 /* read data substitute */ ! 118: #define UBASR_CRD 0x00000100 /* corrected read data */ ! 119: #define UBASR_CXTER 0x00000080 /* command transmit error */ ! 120: #define UBASR_CXTMO 0x00000040 /* command transmit timeout */ ! 121: #define UBASR_DPPE 0x00000020 /* data path parity error */ ! 122: #define UBASR_IVMR 0x00000010 /* invalid map register */ ! 123: #define UBASR_MRPF 0x00000008 /* map register parity failure */ ! 124: #define UBASR_LEB 0x00000004 /* lost error */ ! 125: #define UBASR_UBSTO 0x00000002 /* UNIBUS select timeout */ ! 126: #define UBASR_UBSSYNTO 0x00000001 /* UNIBUS slave sync timeout */ ! 127: ! 128: #define UBASR_BITS \ ! 129: "\20\13RDTO\12RDS\11CRD\10CXTER\7CXTMO\6DPPE\5IVMR\4MRPF\3LEB\2UBSTO\1UBSSYNTO" ! 130: ! 131: /* uba_brrvr[] */ ! 132: #define UBABRRVR_AIRI 0x80000000 /* adapter interrupt request */ ! 133: #define UBABRRVR_DIV 0x0000ffff /* device interrupt vector field */ ! 134: #endif VAX780 ! 135: ! 136: /* uba_dpr */ ! 137: #if VAX780 ! 138: #define UBADPR_BNE 0x80000000 /* buffer not empty - purge */ ! 139: #define UBADPR_BTE 0x40000000 /* buffer transfer error */ ! 140: #define UBADPR_DPF 0x20000000 /* DP function (RO) */ ! 141: #define UBADPR_BS 0x007f0000 /* buffer state field */ ! 142: #define UBADPR_BUBA 0x0000ffff /* buffered UNIBUS address */ ! 143: #define UBA_PURGE780(uba, bdp) \ ! 144: ((uba)->uba_dpr[bdp] |= UBADPR_BNE) ! 145: #endif VAX780 ! 146: #if VAX750 ! 147: #define UBADPR_ERROR 0x80000000 /* error occurred */ ! 148: #define UBADPR_NXM 0x40000000 /* nxm from memory */ ! 149: #define UBADPR_UCE 0x20000000 /* uncorrectable error */ ! 150: #define UBADPR_PURGE 0x00000001 /* purge bdp */ ! 151: #define UBA_PURGE750(uba, bdp) \ ! 152: ((uba)->uba_dpr[bdp] |= (UBADPR_PURGE|UBADPR_NXM|UBADPR_UCE)) ! 153: #endif VAX750 ! 154: ! 155: /* ! 156: * Macros for fast buffered data path purging in time-critical routines. ! 157: * ! 158: * Too bad C pre-processor doesn't have the power of LISP in macro ! 159: * expansion... ! 160: */ ! 161: #if defined(VAX780) && defined(VAX750) ! 162: #define UBAPURGE(uba, bdp) { \ ! 163: switch (cpu) { \ ! 164: case VAX_780: UBA_PURGE780((uba), (bdp)); break; \ ! 165: case VAX_750: UBA_PURGE750((uba), (bdp)); break; \ ! 166: } \ ! 167: } ! 168: #endif ! 169: #if defined(VAX780) && !defined(VAX750) ! 170: #define UBAPURGE(uba, bdp) { \ ! 171: if (cpu==VAX_780) { \ ! 172: UBA_PURGE780((uba), (bdp)); \ ! 173: } \ ! 174: } ! 175: #endif ! 176: #if !defined(VAX780) && defined(VAX750) ! 177: #define UBAPURGE(uba, bdp) { \ ! 178: if (cpu==VAX_750) { \ ! 179: UBA_PURGE750((uba), (bdp)); break; \ ! 180: } \ ! 181: } ! 182: #endif ! 183: #if !defined(VAX780) && !defined(VAX750) ! 184: #define IF_UBAPURGE(uba, bdp) ! 185: #endif ! 186: ! 187: /* uba_mr[] */ ! 188: #define UBAMR_MRV 0x80000000 /* map register valid */ ! 189: #define UBAMR_BO 0x02000000 /* byte offset bit */ ! 190: #define UBAMR_DPDB 0x01e00000 /* data path designator field */ ! 191: #define UBAMR_SBIPFN 0x000fffff /* SBI page address field */ ! 192: ! 193: #define UBAMR_DPSHIFT 21 /* shift to data path designator */ ! 194: ! 195: /* ! 196: * Number of UNIBUS map registers. We can't use the last 8k of UNIBUS ! 197: * address space for i/o transfers since it is used by the devices, ! 198: * hence have slightly less than 256K of UNIBUS address space. ! 199: * There are 8192 Q-BUS map registers. We use only NUBMREG because the ! 200: * device drivers are based on 18-bit unibus addresses. ! 201: */ ! 202: #define NUBMREG 496 ! 203: ! 204: /* All systems now have an 8k csr space. If this changes, put into percpu */ ! 205: #define DEVSPACESIZE 8192 ! 206: ! 207: /* ! 208: * Number of unibus buffered data paths and possible uba's per cpu type. ! 209: */ ! 210: #define NBDP780 15 ! 211: #define NBDP750 3 ! 212: #define NBDP7ZZ 0 ! 213: #define NBDPMVAX 0 ! 214: #define MAXNBDP 15 ! 215: ! 216: #define NUBA780 4 ! 217: #define NUBA750 1 ! 218: #define NUBA7ZZ 1 ! 219: #define NUBAMVAX 1 ! 220: #if VAX780 ! 221: #define MAXNUBA 4 ! 222: #else ! 223: #define MAXNUBA 1 ! 224: #endif ! 225: ! 226: /* ! 227: * Formulas for locations of the last 8k of UNIBUS memory ! 228: * for each possible uba. ! 229: */ ! 230: #if VAX7ZZ ! 231: #define UMEM7ZZ ((u_short *)(0xffe000)) ! 232: #endif ! 233: #if VAX750 ! 234: #define UMEM750(i) ((u_short *)(0xffe000-(i)*0x40000)) ! 235: #endif ! 236: #if VAX780 ! 237: #define UMEM780(i) ((u_short *)(0x2013e000+(i)*0x40000)) ! 238: #endif ! 239: #define UMEMSIZE 512 * MAXNNEXUS ! 240: ! 241: #if MVAX ! 242: /* MicroVAX-II adapters have noncontiguous memory and device csr space ! 243: * QMEMMVAX is the adapter memory space ! 244: * QIOMVAX is the adapter i/o space ! 245: */ ! 246: #define QMEMMVAX ((char *)(0x30000000)) ! 247: #define QMEMSIZE (512*8192) /* 4 meg plus space for the csr's */ ! 248: #define QIOMVAX ((u_short *)(0x20000000)) ! 249: #endif
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