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1.1 root 1: /* @(#)cpu.map.h 1.3 85/03/01 SMI */
2:
3: /*
4: * Copyright (c) 1985 by Sun Microsystems, Inc.
5: */
6:
7: /*
8: * Memory Mapping and Paging on the Sun-3
9: *
10: * This file is used for both standalone code (ROM Monitor,
11: * Diagnostics, boot programs, etc) and for the Unix kernel. IF YOU HAVE
12: * TO CHANGE IT to fit your application, MOVE THE CHANGE BACK TO THE PUBLIC
13: * COPY, and make sure the change is upward-compatible. The last thing we
14: * need is seventeen different copies of this file, like we have with the
15: * Sun-1 header files.
16: */
17:
18: #ifndef ADRSPC_SIZE
19:
20: /*
21: * The address space available to a single process is 256 Megabytes.
22: */
23: #define ADRSPC_SIZE 0x10000000
24:
25: /*
26: * The context register selects among 8 different address spaces. Each
27: * address space typically corresponds to a process and is 256 megabytes.
28: * Each memory access is translated thru the address space indicated by
29: * the context register.
30: *
31: * The context register occupies a byte in control space, although only
32: * the low 3 bits are relevant. The high-order bits are ignored on writes,
33: * and return garbage on reads. You can mask with CONTEXTMASK.
34: */
35: typedef unsigned char context_t;
36:
37: #define NUMCONTEXTS 8
38: #define CONTEXTMASK (NUMCONTEXTS-1) /* Relevant bits on read of cx reg */
39:
40: /*
41: * The segment map determines which large pieces of the 256MB address space
42: * are actually in use. Each chunk of address space is mapped to a set of
43: * PGSPERSEG page map entries. Chunks which are not in use should all be
44: * mapped to a single set of page map entries, which should prohibit
45: * all accesses.
46: *
47: * There are SEGSPERCONTEXT segment map entries in each logical context.
48: * There are NUMPMEGS total page map entry groups (pmegs) in the physical
49: * page map. Each segment map entry references a pmeg which contains
50: * the PGSPERSEG pages defining that segment.
51: *
52: * Note that there is much more virtual address space (256M) as there
53: * is physical space mappable at one time (8M). You can't map in 256 megs
54: * at once even if you have that much physical memory, since the page map
55: * is the bottleneck here. The solution is to "page" the page map entries
56: * in and out of the physical pmegs on demand.
57: */
58: typedef unsigned char segnum_t; /* Segment number */
59:
60: #define SEGSPERCONTEXT 2048
61: #define NUMPMEGS 256
62: #define PGSPERSEG 16
63:
64: /*
65: * The following are valid in the pm_type field of the page map.
66: */
67: enum pm_types {
68: VPM_MEMORY = 0, /* Page is in main memory */
69: VPM_IO = 1, /* Page is onboard I/O */
70: VPM_VME16 = 2, /* Page is on VMEbus, accessing 16-bit dev */
71: VPM_VME32 = 3, /* Page is on VMEbus, accessing 32-bit dev */
72: VPM_MEMORY_NOCACHE = 4, /* Page is in main memory, but not cacheable */
73: };
74:
75:
76: /*
77: * The following are valid in the pm_permissions field.
78: */
79: enum pm_perm {
80: PMP_RO = 0, /* Page is read-only by all */
81: PMP_RO_SUP = 1, /* Page is read-only by supervisor */
82: PMP_ALL = 2, /* Page is read-write by all */
83: PMP_SUP = 3, /* Page is read-write by supervisor */
84: };
85:
86:
87: /*
88: * The page map gives fine-grain control over memory allocation. Each page
89: * map entry controls BYTESPERPG (a page) of memory. Each page can be mapped
90: * to memory, I/O, or a global bus (eg, VMEbus), or can be inaccessible.
91: * Each page can be protected against user access and can be made readable
92: * or read/write. If access is denied, the
93: * page referenced and modified bits will not be changed, nor will the page
94: * number or type fields be used; so they can be used by software.
95: */
96: #define BYTESPERPG 8192
97: #define BYTES_PG_SHIFT 13
98:
99: struct pgmapent {
100: unsigned pm_valid :1; /* This entry is valid */
101: enum pm_perm pm_permissions :2; /* Access privileges */
102: enum pm_types pm_type :3; /* Type of page+don't cache */
103: unsigned pm_accessed :1; /* Page has been read */
104: unsigned pm_modified :1; /* Page has been written */
105: unsigned :5; /* Reserved */
106: unsigned pm_page :19; /* Page # in physical memory */
107: };
108:
109: #define PMREALBITS 0xFF07FFFF /* Which are actually implemented */
110: #define PMREALBITS_M25 0xFF0007FF /* Which for M25 */
111:
112: /*
113: * When the page type is PM_IO, the page number field selects
114: * which of the main I/O device chips is being selected. Low-order (non-
115: * mapped) address bits connect to the address lines of the device and
116: * determine which facility of the device is being accessed.
117: */
118: #define VIOPG_KBM 0x00 /* Dual serial Z8530 SCC for keyboard&mouse */
119: #define VIOPG_SERIAL0 0x10 /* Dual serial Z8530 SCC */
120: #define VIOPG_EEPROM 0x20 /* Non-volatile memory */
121: #define VIOPG_CLOCK 0x30 /* Intersil 7170 time-of-day clock */
122: #define VIOPG_MEMORY_ERR 0x40 /* Uncorrectable Memory Error registers */
123: #define VIOPG_INTERRUPT 0x50 /* Interrupt control register */
124: #define VIOPG_ETHER 0x60 /* Intel 82586 Ethernet interface */
125: #define VIOPG_COLORMAP 0x70 /* Color Map for onboard video someday */
126: #define VIOPG_PROM 0x80 /* Bootstrap proms */
127: #define VIOPG_AMD_ETHER 0x90 /* AMD Ethernet interface */
128: #define VIOPG_SCSI 0xA0 /* Onboard SCSI interface */
129: /* 0xB0 /* Reserved */
130: /* 0xC0 /* Reserved */
131: /* 0xD0 /* Reserved */
132: #define VIOPG_DES 0xE0 /* AMD 8068 data ciphering processor */
133: #define VIOPG_ECC_CTRL 0xF0 /* ECC Control Register access */
134:
135:
136: /*
137: * Other special page numbers.
138: */
139: #define MEMPG_VIDEO (0xFF000000 >> BYTES_PG_SHIFT) /* Frame buffer */
140: #define MEMPG_M25VIDEO (0x00100000 >> BYTES_PG_SHIFT) /* FB in main mem */
141: #define VMEPG_24ADDR (0xFF000000 >> BYTES_PG_SHIFT) /* 24-bit addr VME */
142: #define VMEPG_16ADDR (0xFFFF0000 >> BYTES_PG_SHIFT) /* 16-bit addr VME */
143: #define VME_COLOR_PHYS 0xFF400000 /* Base addr (not pg#) of VME color */
144: #define VPM_VME_COLOR VPM_VME16 /* Page type for VME color */
145: #define VMEPG_COLOR (VME_COLOR_PHYS >> BYTES_PG_SHIFT)
146:
147:
148: /*
149: * The maps are accessed from supervisor state by using the "movs" (Move
150: * Spacey) instruction. This moves a byte, word, or longword to/from a
151: * register and a location in another address space. The Sun-3 hardware
152: * defines one of these address spaces (defined by function code values)
153: * as the "control address space", including various control registers
154: * as well as the maps. The particular map accessed is determined
155: * by the high-order 4 bits of the address used. The particular entry accessed
156: * is determined by the middle-order bits of the address used --
157: * we access the entry that controls that page. Which particular byte(s) of
158: * the map entry are accessed is controlled by the low-order bits of the
159: * address used, as usual.
160: *
161: * The following defines the encodings for the various address spaces used
162: * by "movs".
163: */
164: #define FC_UD 1 /* User Data */
165: #define FC_UP 2 /* User Program */
166: #define FC_MAP 3 /* Sun-3 Memory Maps */
167: #define FC_SD 5 /* Supervisor Data */
168: #define FC_SP 6 /* Supervisor Program */
169: #define FC_CPU 7 /* CPU Space (Int Ack, Co-processors, ...) */
170:
171: #define SEGMAPADR(addr) (char *)(((int)addr&MAPADDRMASK)+SMAPOFF)
172: #define PAGEMAPADR(addr)(long *)(((int)addr&MAPADDRMASK)+PMAPOFF)
173:
174: #define IDPROMOFF 0x00000000 /* ID Prom */
175: #define PMAPOFF 0x10000000 /* Page map offset within maps */
176: #define SMAPOFF 0x20000000 /* Segment map offset within maps */
177: #define CONTEXTOFF 0x30000000 /* Context registers */
178: #define ENABLEOFF 0x40000000 /* System Enable Reg -- turns me on */
179: #define UDMAENABLEOFF 0x50000000 /* User DVMA Enable Reg */
180: #define BUSERROFF 0x60000000 /* Bus Error Register - tells why */
181: #define LEDOFF 0x70000000 /* LED's for diagnostics -- 0=lit */
182: #define SERIALOFF 0xF0000000 /* Serial port bypass for diagnostics */
183:
184: #define MAPADDRMASK 0x0FFFE000 /* Keeps bits relevant to map entry */
185:
186:
187: /*
188: * The following subroutines accept any address in the mappable range
189: * (256 megs). They access the map for the current context. They
190: * assume that we are currently running in supervisor state.
191: *
192: * We can't declare getpgmap() as returning a struct, because our C compiler
193: * is brain damaged and returns a pointer to a static area if you return a
194: * struct. We therefore return an int and require the caller to set up
195: * unions and other assorted random hacks because the language
196: * implementation doesn't support structures returned from reentrant routines.
197: */
198:
199: extern /*struct pgmapent*/ getpgmap(); /* (addr) */
200: extern setpgmap(); /* (addr, entry) */
201: extern segnum_t getsegmap(); /* (addr) */
202: extern setsegmap(); /* (addr, entry) */
203: extern context_t getsupcontext(); /* () */
204: extern setsupcontext(); /* (entry) */
205: extern context_t getusercontext(); /* () */
206: extern setusercontext(); /* (entry) */
207:
208: #endif ADRSPC_SIZE
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