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1.1 ! root 1: /* @(#)buserr.h 1.1 86/02/03 SMI */ ! 2: ! 3: /* ! 4: * Copyright (c) 1985 by Sun Microsystems, Inc. ! 5: */ ! 6: ! 7: /* ! 8: * Definitions and structures related to 68020 bus error handling for Sun-3. ! 9: */ ! 10: ! 11: #ifndef _BUSERR_ ! 12: #define _BUSERR_ ! 13: #ifndef LOCORE ! 14: /* ! 15: * Auxiliary information stacked by hardware on Bus Error or Address Error. ! 16: */ ! 17: ! 18: /* ! 19: * 68010/68020 "type 0" normal four word stack. ! 20: */ ! 21: #define SF_NORMAL 0x0 ! 22: ! 23: /* ! 24: * 68020 "type 1" throwaway four word stack. ! 25: */ ! 26: #define SF_THROWAWAY 0x1 ! 27: ! 28: /* ! 29: * 68020 "type 2" normal six word stack frame. ! 30: */ ! 31: #define SF_NORMAL6 0x2 ! 32: struct bei_normal6 { ! 33: int bei_pc; /* pc where error occurred */ ! 34: }; ! 35: ! 36: /* ! 37: * 68020 "type 9" co-processor mid-instruction exception stack frame. ! 38: */ ! 39: #define SF_COPROC 0x9 ! 40: struct bei_coproc { ! 41: int bei_pc; /* pc where error occured */ ! 42: int bei_internal; /* an internal register */ ! 43: int bei_eea; /* evaluated effective address */ ! 44: }; ! 45: ! 46: /* ! 47: * 68020 "type A" medium bus cycle fault stack frame. ! 48: */ ! 49: #define SF_MEDIUM 0xA ! 50: struct bei_medium { ! 51: short bei_internal; /* an internal register */ ! 52: u_int bei_faultc: 1; /* fault on stage c of instruction pipe */ ! 53: u_int bei_faultb: 1; /* fault on stage b of instruction pipe */ ! 54: u_int bei_rerunc: 1; /* rerun stage c */ ! 55: u_int bei_rerunb: 1; /* rerun stage b */ ! 56: u_int : 3; ! 57: u_int bei_dfault: 1; /* fault/rerun on data */ ! 58: u_int bei_rmw : 1; /* read/modify/write */ ! 59: u_int bei_rw : 1; /* read=1,write=0 */ ! 60: u_int bei_size : 2; /* size code for data cycle */ ! 61: u_int : 1; ! 62: u_int bei_fcode : 3; /* function code */ ! 63: short bei_ipsc; /* instruction pipe stage c */ ! 64: short bei_ipsb; /* instruction pipe stage b */ ! 65: int bei_fault; /* fault address */ ! 66: int bei_internal2; /* another internal register */ ! 67: int bei_dob; /* data output buffer */ ! 68: int bei_internal3; /* yet another internal register */ ! 69: }; ! 70: ! 71: /* ! 72: * 68020 "type B" long bus cycle fault stack frame. ! 73: */ ! 74: #define SF_LONGB 0xB ! 75: struct bei_longb { ! 76: short bei_internal; /* an internal register */ ! 77: u_int bei_faultc: 1; /* fault on stage c of instruction pipe */ ! 78: u_int bei_faultb: 1; /* fault on stage b of instruction pipe */ ! 79: u_int bei_rerunc: 1; /* rerun stage c */ ! 80: u_int bei_rerunb: 1; /* rerun stage b */ ! 81: u_int : 3; ! 82: u_int bei_dfault: 1; /* fault/rerun on data */ ! 83: u_int bei_rmw : 1; /* read/modify/write */ ! 84: u_int bei_rw : 1; /* read=1,write=0 */ ! 85: u_int bei_size : 2; /* size code for data cycle */ ! 86: u_int : 1; ! 87: u_int bei_fcode : 3; /* function code */ ! 88: short bei_ipsc; /* instruction pipe stage c */ ! 89: short bei_ipsb; /* instruction pipe stage b */ ! 90: int bei_fault; /* fault address */ ! 91: int bei_internal2; /* another internal register */ ! 92: int bei_dob; /* data output buffer */ ! 93: int bei_internal3; /* yet another internal register */ ! 94: int bei_internal4; /* yet another internal register */ ! 95: int bei_stageb; /* stage B address */ ! 96: int bei_internal5; /* yet another internal register */ ! 97: int bei_dib; /* data input buffer */ ! 98: int bei_internal6[11];/* more internal registers */ ! 99: }; ! 100: #endif !LOCORE ! 101: ! 102: /* ! 103: * The System Bus Error Register captures the state of the ! 104: * system as of the last bus error. The Bus Error Register ! 105: * always latches the cause of the most recent bus error. ! 106: * Thus, in the case of stacked bus errors, the information ! 107: * relating to the earlier bus errors is lost. The Bus Error ! 108: * register is read-only and is addressed in FC_MAP space. ! 109: * The Bus Error Register is clocked for bus errors for CPU Cycles ! 110: * line. The Bus Error Register is not clocked for DVMA cycles ! 111: * or for CPU accesses to the floating point chip with the ! 112: * chip not enabled. ! 113: * ! 114: * The be_proterr bit is set only if the valid bit was set AND the ! 115: * page protection does not allow the kind of operation attempted. ! 116: * The rest of the bits are 1 if they caused the error. ! 117: */ ! 118: #ifndef LOCORE ! 119: struct buserrorreg { ! 120: u_int be_invalid :1; /* Page map Valid bit was off */ ! 121: u_int be_proterr :1; /* Protection error */ ! 122: u_int be_timeout :1; /* Bus access timed out */ ! 123: u_int be_vmeberr :1; /* VMEbus bus error */ ! 124: u_int be_fpaberr :1; /* FPA bus error */ ! 125: u_int be_fpaena :1; /* FPA enable error */ ! 126: u_int :1; ! 127: u_int be_watchdog :1; /* Watchdog reset */ ! 128: }; ! 129: #endif !LOCORE ! 130: ! 131: /* ! 132: * Equivalent bits. ! 133: */ ! 134: #define BE_INVALID 0x80 /* page map was invalid */ ! 135: #define BE_PROTERR 0x40 /* protection error */ ! 136: #define BE_TIMEOUT 0x20 /* bus access timed out */ ! 137: #define BE_VMEBERR 0x10 /* VMEbus bus error */ ! 138: #define BE_FPABERR 0x08 /* FPA bus error */ ! 139: #define BE_FPAENA 0x04 /* FPA enable error */ ! 140: #define BE_WATCHDOG 0x01 /* Watchdog reset */ ! 141: ! 142: #define BUSERRREG 0x60000000 /* addr of buserr reg in FC_MAP space */ ! 143: ! 144: #define BUSERR_BITS "\20\10INVALID\7PROTERR\6TIMEOUT\5VMEBERR\4FPABERR\3FPAENA\1WATCHDOG" ! 145: #endif !_BUSERR_
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