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Annotation of researchv9/sys/sun3/clock.h, revision 1.1

1.1     ! root        1: /*      @(#)clock.h 1.1 86/02/03 SMI      */
        !             2: 
        !             3: /*
        !             4:  * Copyright (c) 1985 by Sun Microsystems, Inc.
        !             5:  */
        !             6: 
        !             7: /*
        !             8:  * Definitions for the Intersil 7170 real-time clock.  This chip
        !             9:  * is used as the timer chip in addition to being the battery
        !            10:  * backed up time-of-day device.  This clock is run by UNIX in
        !            11:  * the 100 hz periodic mode giving interrupts 100 times/second.
        !            12:  * The low level code dismisses every other interrupt, thus
        !            13:  * creating an effective 50 hz rate for hardclock().
        !            14:  *
        !            15:  * Reading clk_hsec latches the the time in all the other bytes
        !            16:  * so you get a consistent value.  To see any byte change, you
        !            17:  * have to read clk_hsec in between (e.g. you can't loop waiting
        !            18:  * for clk_sec to reach a certain value without reading clk_hsec
        !            19:  * each time).
        !            20:  */
        !            21: 
        !            22: #define        SECDAY  ((unsigned)(24*60*60))          /* seconds per day */
        !            23: #define        SECYR   ((unsigned)(365*SECDAY))        /* seconds per common year */
        !            24: 
        !            25: /*
        !            26:  * The 7170 uses year % 4 to figure out if
        !            27:  * we have a leap year, we do the same here.
        !            28:  */
        !            29: #define        SECYEAR(yr)     ((((unsigned)(yr) % 4) == 0)? SECYR + SECDAY : SECYR)
        !            30: 
        !            31: /*
        !            32:  * The year register counts from 0 to 99.
        !            33:  * Unix time is the number of seconds
        !            34:  * since the year YRREF.  The 2 digit year
        !            35:  * value stored in the chip represents the 
        !            36:  * the number of years beyond YRBASE.
        !            37:  * Note that YRBASE must be < YRREF and
        !            38:  * (YRBASE % 4) == 0 to do leap years correct.
        !            39:  * Note that we can only keep time up to the year 2068.
        !            40:  */
        !            41: #define        YRREF           70      /* 1970 - where UNIX time begins */
        !            42: #define        YRBASE          68      /* 1968 - what year 0 in chip represents */
        !            43: 
        !            44: #define        OBIO_CLKADDR    0x60000 /* address of clock in obio space */
        !            45: 
        !            46: #ifdef LOCORE
        !            47: #define        CLKADDR 0x0FFE2000      /* virtual address we map clock to be at */
        !            48: #else
        !            49: struct intersil7170 {
        !            50:        u_char  clk_hsec;       /* counter - hundredths of seconds 0-99 */
        !            51:        u_char  clk_hour;       /* counter - hours 0-23 (24hr) 1-12 (12hr) */
        !            52:        u_char  clk_min;        /* counter - minutes 0-59 */
        !            53:        u_char  clk_sec;        /* counter - seconds 0-59 */
        !            54:        u_char  clk_mon;        /* counter - month 1-12 */
        !            55:        u_char  clk_day;        /* counter - day 1-31 */
        !            56:        u_char  clk_year;       /* counter - year 0-99 */
        !            57:        u_char  clk_weekday;    /* counter - week day 0-6 */
        !            58:        u_char  clk_rhsec;      /* RAM - hundredths of seconds 0-99 */
        !            59:        u_char  clk_rhour;      /* RAM - hours 0-23 (24hr) 1-12 (12hr) */
        !            60:        u_char  clk_rmin;       /* RAM - minutes 0-59 */
        !            61:        u_char  clk_rsec;       /* RAM - seconds 0-59 */
        !            62:        u_char  clk_rmon;       /* RAM - month 1-12 */
        !            63:        u_char  clk_rday;       /* RAM - day 1-31 */
        !            64:        u_char  clk_ryear;      /* RAM - year 0-99 */
        !            65:        u_char  clk_rweekday;   /* RAM - week day 0-6 */
        !            66:        u_char  clk_intrreg;    /* interrupt status and mask register */
        !            67:        u_char  clk_cmd;        /* command register */
        !            68:        u_char  clk_unused[14];
        !            69: };
        !            70: #define        CLKADDR ((struct intersil7170 *)(0x0FFE2000))
        !            71: #endif
        !            72: 
        !            73: /* offsets into structure */
        !            74: #define        CLK_HSEC        0
        !            75: #define        CLK_HOUR        1
        !            76: #define        CLK_MIN         2
        !            77: #define        CLK_SEC         3
        !            78: #define        CLK_MON         4
        !            79: #define        CLK_DAY         5
        !            80: #define        CLK_YEAR        6
        !            81: #define        CLK_WEEKDAY     7
        !            82: #define        CLK_RHSEC       8
        !            83: #define        CLK_RHOUR       9
        !            84: #define        CLK_RMIN        10
        !            85: #define        CLK_RSEC        11
        !            86: #define        CLK_RMON        12
        !            87: #define        CLK_RDAY        13
        !            88: #define        CLK_RYEAR       14
        !            89: #define        CLK_RWEEKDAY    15
        !            90: #define        CLK_INTRREG     16
        !            91: #define        CLK_CMD         17
        !            92: 
        !            93: /*
        !            94:  * In `alarm' mode the 7170 interrupts when the current
        !            95:  * counter matches the RAM values.  However, if the ignore
        !            96:  * bit is on in the RAM counter, that register is not
        !            97:  * used in the comparision.  Unfortunately, the clk_rhour
        !            98:  * register uses a different mask bit (because of 12 hour
        !            99:  * mode) and thus the 2 different defines.
        !           100:  */
        !           101: #define        CLK_IGNORE      0x80    /* rmsec, rmin, rsec, rmon, rday, ryear, rdow */
        !           102: #define        CLK_HOUR_IGNORE 0x40    /* ignore bit for clk_rhour only */
        !           103: 
        !           104: /*
        !           105:  * Interrupt status and mask register defines,
        !           106:  * reading this register tells what caused an interrupt
        !           107:  * and then clears the state.  These can occur
        !           108:  * concurrently including te RAM compare interrupts.
        !           109:  */
        !           110: #define        CLK_INT_INTR    0x80    /* r/o pending interrrupt */
        !           111: #define        CLK_INT_DAY     0x40    /* r/w periodic day interrupt */
        !           112: #define        CLK_INT_HOUR    0x20    /* r/w periodic hour interrupt */
        !           113: #define        CLK_INT_MIN     0x10    /* r/w periodic minute interrupt */
        !           114: #define        CLK_INT_SEC     0x08    /* r/w periodic second interrupt */
        !           115: #define        CLK_INT_TSEC    0x04    /* r/w periodic 1/10 second interrupt */
        !           116: #define        CLK_INT_HSEC    0x02    /* r/w periodic 1/100 second interrupt */
        !           117: #define        CLK_INT_ALARM   0x01    /* r/w alarm mode - interrupt on time match */
        !           118: 
        !           119: /* Command register defines */
        !           120: #define        CLK_CMD_TEST    0x20    /* w/o test mode (vs. normal mode) */
        !           121: #define        CLK_CMD_INTRENA 0x10    /* w/o interrupt enable (vs. disabled) */
        !           122: #define        CLK_CMD_RUN     0x08    /* w/o run bit (vs. stop) */
        !           123: #define        CLK_CMD_24FMT   0x04    /* w/o 24 hour format (vs. 12 hour format) */
        !           124: #define        CLK_CMD_F4M     0x03    /* w/o using 4.194304MHz crystal frequency */
        !           125: #define        CLK_CMD_F2M     0x02    /* w/o using 2.097152MHz crystal frequency */
        !           126: #define        CLK_CMD_F1M     0x01    /* w/o using 1.048576MHz crystal frequency */
        !           127: #define        CLK_CMD_F32K    0x00    /* w/o using  32.768KHz  crystal frequency */
        !           128: 
        !           129: #define        CLK_CMD_NORMAL  (CLK_CMD_INTRENA|CLK_CMD_RUN|CLK_CMD_24FMT|CLK_CMD_F32K)

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