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Annotation of researchv9/sys/sun3/interreg.h, revision 1.1

1.1     ! root        1: /*      @(#)interreg.h 1.1 86/02/03 SMI      */
        !             2: 
        !             3: /*
        !             4:  * Copyright (c) 1985 by Sun Microsystems, Inc.
        !             5:  */
        !             6: 
        !             7: /*
        !             8:  * The interrupt register provides for the generation of software
        !             9:  * interrupts and controls the video and clock hardware interrupts.
        !            10:  */
        !            11: #define        OBIO_INTERREG 0xA0000   /* address of interreg in obio space */
        !            12: 
        !            13: #ifdef LOCORE
        !            14: #define        INTERREG 0x0FFE6000     /* virtual address we map interreg to be at */
        !            15: #else
        !            16: #define        INTERREG ((u_char *)(0x0FFE6000))
        !            17: #endif
        !            18: 
        !            19: /*
        !            20:  * Bits of the interrupt register.
        !            21:  */
        !            22: #define        IR_ENA_CLK7     0x80    /* r/w - enable clock level 7 interrupt */
        !            23: #define        IR_ENA_CLK5     0x20    /* r/w - enable clock level 5 interrupt */
        !            24: #define        IR_ENA_VID4     0x10    /* r/w - enable video level 4 interrupt */
        !            25: #define        IR_SOFT_INT3    0x08    /* r/w - cause software level 3 interrupt */
        !            26: #define        IR_SOFT_INT2    0x04    /* r/w - cause software level 2 interrupt */
        !            27: #define        IR_SOFT_INT1    0x02    /* r/w - cause software level 1 interrupt */
        !            28: #define        IR_ENA_INT      0x01    /* r/w - enable (all) interrupts */

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