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1.1 root 1: /* @(#)mbvar.h 1.1 86/02/03 SMI */
2:
3: /*
4: * Copyright (c) 1985 by Sun Microsystems, Inc.
5: */
6:
7: /*
8: * This file contains definitions related to the kernel structures
9: * for dealing with the Mainbus.
10: *
11: * The Mainbus has an mb_hd structure.
12: * Each Mainbus controller which is not a device has an mb_ctlr structure.
13: * Each Mainbus device has an mb_device structure.
14: */
15:
16: #ifndef LOCORE
17: /*
18: * The Mainbus structure.
19: *
20: * At boot time we determine the devices attached to the Mainbus.
21: *
22: * During normal operation, resources are allocated and returned
23: * to the structures here.
24: *
25: * When Mainbus resources are needed and not available, or if a device
26: * which can tolerate no other Mainbus activity gets on the bus,
27: * then device drivers may have to wait to get to the bus and are
28: * queued here.
29: */
30: struct mb_hd {
31: struct mb_ctlr *mh_actf; /* head of queue to transfer */
32: struct mb_ctlr *mh_actl; /* tail of queue to transfer */
33: struct mb_driver *mh_intr[8]; /* linked list of interrupt routines */
34: struct map *mh_map; /* DVMA resource map */
35: short mh_users; /* transient use count */
36: short mh_xclu; /* a bus hog is using the Mainbus */
37: char mh_mrwant; /* someone is waiting for map reg */
38: };
39:
40: /*
41: * Per-controller structure.
42: * (E.g. one for each disk and tape controller)
43: *
44: * If a controller has devices attached, then there are
45: * cross-referenced mb_device structures.
46: * This structure is the one which is queued in Mainbus resource wait,
47: * and saves the information about Mainbus resources which are used.
48: * The queue of devices waiting to transfer is also attached here.
49: */
50: struct mb_ctlr {
51: struct mb_driver *mc_driver;
52: short mc_ctlr; /* controller index in driver */
53: short mc_alive; /* controller exists */
54: caddr_t mc_addr; /* address of device in i/o space */
55: int mc_intpri; /* interrupt priority level */
56: struct vec *mc_intr; /* if vectored interrupts used */
57: u_int mc_space; /* encode bits for addr device space */
58: struct mb_hd *mc_mh;
59: int mc_mbinfo; /* Mainbus resource allocation info */
60: char mc_rw; /* READ or WRITE */
61: struct buf mc_tab; /* queue of devices for this controller */
62: struct mb_ctlr *mc_forw; /* link in transfer queue */
63: };
64:
65: /*
66: * Per ``device'' structure.
67: * (A controller has devices or uses and releases Mainbus memory).
68: * (Everything else is a ``device''.)
69: *
70: * If a controller has many drives attached, then there will
71: * be several mb_device structures associated with a single mb_ctlr
72: * structure.
73: *
74: * This structure contains all the information necessary to run a Mainbus
75: * device such as a serial line interface. It also contains information
76: * for slaves of Mainbus controllers as to which device on the slave
77: * this is. A flags field here can also be given in the system specification
78: * and is used to tell which mux lines are hard wired or other device
79: * specific parameters.
80: */
81: struct mb_device {
82: struct mb_driver *md_driver;
83: short md_unit; /* unit number on the system */
84: short md_ctlr; /* mass ctlr number; -1 if none */
85: short md_slave; /* slave on controller */
86: caddr_t md_addr; /* address of device in i/o space */
87: int md_intpri; /* interrupt priority */
88: short md_dk; /* if init 1 set to number for iostat */
89: int md_flags; /* parameter from system specification */
90: struct vec *md_intr; /* if vectored interrupts used */
91: u_int md_space; /* encode bits for addr device space */
92: short md_alive; /* device exists */
93: short md_type; /* driver specific type information */
94: /* if the device is connected to a controller, this is the controller */
95: struct mb_ctlr *md_mc;
96: struct mb_hd *md_hd;
97: };
98:
99: /*
100: * Per-driver structure.
101: *
102: * Each Mainbus driver defines entries for a set of routines
103: * as well as an array of types which are acceptable to it.
104: * These are used at boot time by the configuration program.
105: */
106: struct mb_driver {
107: int (*mdr_probe)(); /* see if a driver is really there */
108: int (*mdr_slave)(); /* see if a slave is there */
109: int (*mdr_attach)(); /* setup driver for a slave */
110: int (*mdr_go)(); /* routine to start transfer */
111: int (*mdr_done)(); /* routine to finish transfer */
112: int (*mdr_intr)(); /* polling interrupt routine */
113: int mdr_size; /* amount of memory space needed */
114: char *mdr_dname; /* name of a device */
115: struct mb_device **mdr_dinfo; /* backpointers to mbdinit structs */
116: char *mdr_cname; /* name of a controller */
117: struct mb_ctlr **mdr_cinfo; /* backpointers to mbcinit structs */
118: short mdr_flags; /* want exclusive use of Mainbus */
119: struct mb_driver *mdr_link; /* interrupt routine linked list */
120: };
121:
122: /* Driver flags */
123: #define MDR_XCLU 01 /* needs exclusive use of bus */
124: #define MDR_BIODMA 02 /* block device does Mainbus DMA */
125: #define MDR_SWAB 04 /* Mainbus buffer must be swabbed */
126: #define MDR_OBIO 010 /* device in on-board I/O space */
127:
128:
129: /* Flags to mbsetup */
130: #define MB_CANTWAIT 01 /* don't block me */
131:
132: /*
133: * If mbcookie.mbi_mapreg < dvmasize, then mbi_mapreg is the
134: * starting map register within DVMA space which is mapped
135: * in mbsetup() and unmapped in mbrelse(). Otherwise
136: * mbi_mapreg is the starting page of contigously mapped
137: * region within an external "mainbus" mapping region
138: * (e.g. Multibus Memory or VMEbus) as checked and
139: * approved by buscheck().
140: */
141: struct mbcookie {
142: unsigned int
143: mbi_mapreg:(32-PGSHIFT),/* starting map register (page) */
144: mbi_offset:PGSHIFT; /* byte offset */
145: };
146:
147: /*
148: * Macros to bust return word from map allocation routines.
149: */
150: #define MBI_MR(i) ((int)((unsigned)(i)>>PGSHIFT))
151: #define MBI_ADDR(i) ((int)(i))
152:
153: struct vec {
154: int (*v_func)(); /* interrupt function to call */
155: int v_vec; /* vector number (64-255) */
156: int *v_vptr; /* pointer to value passed */
157: };
158:
159: #endif !LOCORE
160:
161: /* Convert interrupt prio to SR */
162: #define pritospl(n) (SR_SMODE|((n)<<8))
163:
164: /* Maximum interrupt priority used by Mainbus DMA */
165: #define SPLMB 4
166:
167: #ifndef LOCORE
168: #ifdef KERNEL
169: /*
170: * Mainbus related kernel variables
171: */
172: extern struct mb_hd mb_hd;
173:
174: /*
175: * Mbcinit and mbdinit initialize the mass storage controller and
176: * device tables specifying possible devices.
177: */
178: extern struct mb_ctlr mbcinit[];
179: extern struct mb_device mbdinit[];
180:
181: #ifdef sun2
182: extern char mbio[]; /* mb device addr space */
183: #endif
184:
185: struct map *iopbmap;
186: #define IOPBMEM (0x2000/NBPG) /* 8k's worth of pages for IOPB crud */
187: #define IOPBMAPSIZE 64
188:
189: #define DVMAMAPSIZE 25
190: extern char DVMA[];
191:
192: #endif KERNEL
193: #endif !LOCORE
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