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1.1 ! root 1: /* @(#)mmu.h 1.1 86/02/03 SMI */ ! 2: ! 3: /* ! 4: * Copyright (c) 1985 by Sun Microsystems, Inc. ! 5: */ ! 6: ! 7: /* ! 8: * Sun-3 memory management. ! 9: */ ! 10: #define KCONTEXT 0 /* Kernel context (no valid user pages) */ ! 11: #define NCONTEXT 8 /* Number of contexts */ ! 12: #define CONTEXTMASK (NCONTEXT-1) ! 13: ! 14: /* ! 15: * Hardware segment and page registers and constants. ! 16: */ ! 17: #define NSEGMAP 2048 /* # of segments per context */ ! 18: #define SEGINV (NPMEG-1) /* invalid pmeg - no access */ ! 19: #define NPAGSEG 16 /* # of pages per segment */ ! 20: #define NPME 4096 /* number of hardware page map entries */ ! 21: #define NPMEG (NPME/NPAGSEG) /* # of pme groups (segment allocation) */ ! 22: ! 23: /* ! 24: * Function code register values. ! 25: */ ! 26: #define FC_UD 1 /* user data */ ! 27: #define FC_UP 2 /* user program */ ! 28: #define FC_MAP 3 /* Sun-3 memory maps */ ! 29: #define FC_SD 5 /* supervisor data */ ! 30: #define FC_SP 6 /* supervisor program */ ! 31: #define FC_CPU 7 /* cpu space */ ! 32: ! 33: /* ! 34: * FC_MAP base addresses ! 35: */ ! 36: #define IDPROMBASE 0x00000000 /* id prom base */ ! 37: #define PAGEBASE 0x10000000 /* page map base */ ! 38: #define SEGMENTBASE 0x20000000 /* segment map base */ ! 39: #define CONTEXTBASE 0x30000000 /* context map base */ ! 40: ! 41: #define IDPROMSIZE 0x20 /* size of id prom in bytes */ ! 42: ! 43: /* ! 44: * Masks for relevant bits of virtual address ! 45: * when accessing control space devices ! 46: */ ! 47: #define PAGEADDRBITS 0x0FFFE000 /* page map virtual address mask */ ! 48: #define SEGMENTADDRBITS 0x0FFE0000 /* segment map virtual address mask */ ! 49: ! 50: /* ! 51: * 68020 Cache Control Register ! 52: */ ! 53: #define CACHE_ENABLE 0x1 /* enable the cache */ ! 54: #define CACHE_FREEZE 0x2 /* freeze the cache */ ! 55: #define CACHE_CLRENTRY 0x4 /* clear entry specified by cache addr reg */ ! 56: #define CACHE_CLEAR 0x8 /* clear entire cache */
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