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Annotation of researchv9/sys/sundev/screg.h, revision 1.1

1.1     ! root        1: /*     @(#)screg.h 1.1 86/02/03 SMI    */
        !             2: 
        !             3: /*
        !             4:  * Copyright (c) 1983 by Sun Microsystems, Inc.
        !             5:  */
        !             6: 
        !             7: #define        HOST_ADDR       0x00    /* 0x80 is right but Sysgen violates spec */
        !             8: #define        WAIT_COUNT      250000
        !             9: 
        !            10: /* 
        !            11:  * SCSI Sun host adapter control registers.
        !            12:  */
        !            13: 
        !            14: struct scsi_ha_reg {           /* host adapter (I/O space) registers */
        !            15:        u_char  data;           /* data register */
        !            16:        u_char  unused;
        !            17:        u_char  cmd_stat;       /* command/status register */
        !            18:        u_char  unused2;
        !            19:        u_short icr;            /* interface control register */
        !            20:        u_short unused3;
        !            21:        u_long  dma_addr;       /* dma base address */
        !            22:        u_short dma_count;      /* dma count register */
        !            23:        u_char  unused4;
        !            24:        u_char  intvec;         /* interrupt vector for VMEbus versions */
        !            25: };
        !            26: 
        !            27: /*
        !            28:  * bits in the interface control register 
        !            29:  */
        !            30: #define        ICR_PARITY_ERROR        0x8000
        !            31: #define        ICR_BUS_ERROR           0x4000
        !            32: #define        ICR_ODD_LENGTH          0x2000
        !            33: #define        ICR_INTERRUPT_REQUEST   0x1000
        !            34: #define        ICR_REQUEST             0x0800
        !            35: #define        ICR_MESSAGE             0x0400
        !            36: #define        ICR_COMMAND_DATA        0x0200  /* command=1, data=0 */
        !            37: #define        ICR_INPUT_OUTPUT        0x0100  /* input=1, output=0 */
        !            38: #define        ICR_PARITY              0x0080
        !            39: #define        ICR_BUSY                0x0040
        !            40: /* Only the following bits may usefully be set by the CPU */
        !            41: #define        ICR_SELECT              0x0020
        !            42: #define        ICR_RESET               0x0010
        !            43: #define        ICR_PARITY_ENABLE       0x0008
        !            44: #define        ICR_WORD_MODE           0x0004
        !            45: #define        ICR_DMA_ENABLE          0x0002
        !            46: #define        ICR_INTERRUPT_ENABLE    0x0001
        !            47: 
        !            48: /*
        !            49:  * Compound conditions of icr bits message, command/data and input/output.
        !            50:  */
        !            51: #define        ICR_COMMAND     (ICR_COMMAND_DATA)
        !            52: #define        ICR_STATUS      (ICR_COMMAND_DATA | ICR_INPUT_OUTPUT)
        !            53: #define        ICR_MESSAGE_IN  (ICR_MESSAGE | ICR_COMMAND_DATA | ICR_INPUT_OUTPUT)
        !            54: #define        ICR_BITS        (ICR_MESSAGE | ICR_COMMAND_DATA | ICR_INPUT_OUTPUT)

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