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1.1 root 1: .data
2: .asciz "@(#)zs_asm.s 1.1 86/02/03 Copyr 1985 Sun Micro"
3: .even
4: .text
5: /*
6: * Copyright (c) 1985 by Sun Microsystems, Inc.
7: */
8: #include "assym.s"
9: #include "../machine/asm_linkage.h"
10: #include "../machine/mmu.h"
11: #include "../sundev/zsreg.h"
12:
13: /*
14: * We come here for auto-vectored interrupts
15: * (All Sun-2s and the Sun-3 Model 25)
16: * We assume that the most recently interrupting
17: * chip is interrupting again and read the vector out of the
18: * chip and branch to the right routine. The "special receive"
19: * interrupt routine gets control if the assumption was wrong
20: * and performs the longer task of figuring out who is really interrupting
21: * and why.
22: */
23: .globl zslevel6, _zscurr
24: zslevel6:
25: movl a1,sp@- | save a1
26: movl a0,sp@- | save a0
27: movl _zscurr,a0 | get most active channel desc
28: movl a0@(ZS_ADDR),a1 | get hardware channel addr
29: movb #2,a1@ | read from reg 2 in channel B
30: /* we need at least 1.6 usec recovery time between here ... */
31: movl d1,sp@- | recovery time - save d1, d0
32: movl d0,sp@- | recovery time - save d1, d0
33: #ifdef sun3
34: nop; nop; nop; nop; nop; nop | additional recovery time
35: #endif sun3
36: /* ... and here */
37: movb a1@,d0
38: btst #3,d0 | channel A?
39: beq 1f | no, skip
40: subw #ZSSIZE,a0 | point to channel A
41: 1: andw #6,d0 | get vector bits
42: addw d0,d0 | get multiple of 4
43: pea a0@ | push argument
44: movl a0@(0,d0:w),a0 | get routine address
45: jsr a0@ | call routine
46: movl sp@+,a0 | pop argument
47: movl a0@(ZS_ADDR),a1 | get hardware channel addr
48: movb #ZSWR0_CLR_INTR,a1@ | reset interrupt
49: moveml sp@+,#0x0303 | restore all saved regs
50: addql #1,_cnt+V_INTR | increment io interrupt count
51: rte | and return!
52:
53: #ifdef sun3
54: /*
55: * Vector stubs for SCCs
56: * Each SCC requires 8 vectors - 4 for each channel, channel B before channel A
57: */
58: .globl _zscom
59: #define ZSSTUB(chip,chan,src) \
60: zsv/**/chip/**/chan/**/src: \
61: zs/**/chip/**/chan/**/src = ZSSIZE*(chip*2+chan); \
62: zv/**/chip/**/chan/**/src = ZSSIZE*(chip*2+chan)+(4*src); \
63: moveml #0xC0C0,sp@-; \
64: pea _zscom+zs/**/chip/**/chan/**/src; \
65: movl _zscom+zv/**/chip/**/chan/**/src,a0; \
66: jsr a0@; \
67: addql #4,sp; \
68: movl _zscom+zs/**/chip/**/chan/**/src+ZS_ADDR,a1; \
69: movb #ZSWR0_CLR_INTR,a1@; \
70: moveml sp@+,#0x0303; \
71: rte; \
72: .data; \
73: .long zsv/**/chip/**/chan/**/src; \
74: .text
75:
76: .data
77: .globl _zsvectab
78: _zsvectab:
79: .text
80: #include "zs.h"
81: #if NZS > 0
82: ZSSTUB(0,1,0); ZSSTUB(0,1,1); ZSSTUB(0,1,2); ZSSTUB(0,1,3);
83: ZSSTUB(0,0,0); ZSSTUB(0,0,1); ZSSTUB(0,0,2); ZSSTUB(0,0,3);
84: #endif
85: #if NZS > 1
86: ZSSTUB(1,1,0); ZSSTUB(1,1,1); ZSSTUB(1,1,2); ZSSTUB(1,1,3);
87: ZSSTUB(1,0,0); ZSSTUB(1,0,1); ZSSTUB(1,0,2); ZSSTUB(1,0,3);
88: #endif
89: #if NZS > 2
90: ZSSTUB(2,1,0); ZSSTUB(2,1,1); ZSSTUB(2,1,2); ZSSTUB(2,1,3);
91: ZSSTUB(2,0,0); ZSSTUB(2,0,1); ZSSTUB(2,0,2); ZSSTUB(2,0,3);
92: #endif
93: #if NZS > 3
94: ERROR - too many ZSs
95: #endif
96: #endif sun3
97:
98: #ifdef sun3
99: #include "../sun3/interreg.h"
100: /*
101: * Turn on a zs soft interrupt - Sun-3
102: */
103: ENTRY(setzssoft)
104: bset #IR_SOFT_INT3_BIT,INTERREG
105: rts
106:
107: /*
108: * Test and clear a zs soft interrupt - Sun-3
109: */
110: ENTRY(clrzssoft)
111: movl #0,d0
112: bclr #IR_SOFT_INT3_BIT,INTERREG
113: jeq 1f
114: movl #1,d0
115: 1: rts
116: #endif sun3
117:
118: #ifdef sun2
119: #include "../sun2/enable.h"
120: ZSSOFTMASK = ENA_SOFT_INT_3
121: /*
122: * Turn on a zs soft interrupt - Sun-2
123: */
124: ENTRY(setzssoft)
125: movc dfc,a1
126: movl #FC_MAP,d0 | set to address FC_MAP space
127: movc d0,dfc
128: 1:
129: movl #ZSSOFTMASK,d0
130: orw d0,enablereg | enable the interrupt
131: movw enablereg,d0 | get it in a reg
132: movsw d0,ENABLEREG | put enable register back
133: cmpw enablereg,d0 | see if someone higher changed it
134: bne 1b | if so, try again
135: movc a1,dfc | restore dfc
136: rts
137:
138: /*
139: * Test and clear a zs soft interrupt - Sun-2
140: */
141: ENTRY(clrzssoft)
142: movw enablereg,d0
143: andl #ZSSOFTMASK,d0 | clear d0 if no intr
144: beq 2f
145: movc dfc,a1
146: movl #FC_MAP,d0 | set to address FC_MAP space
147: movc d0,dfc
148: 1:
149: movl #~ZSSOFTMASK,d0
150: andw d0,enablereg | enable the interrupt
151: movw enablereg,d0 | get it in a reg
152: movsw d0,ENABLEREG | put enable register back
153: cmpw enablereg,d0 | see if someone higher changed it
154: bne 1b | if so, try again
155: movc a1,dfc | restore dfc
156: movl #1,d0 | return true
157: 2:
158: rts
159: #endif sun2
160:
161: /*
162: * Read a control register in the chip
163: */
164: ENTRY(zszread)
165: movl sp@(4),a1 | chip address
166: movb sp@(0xb),a1@ | write register number
167: #ifdef sun3
168: moveq #20,d0 | DELAY(2)
169: movl _cpudelay,d1
170: asrl d1,d0
171: 1: subql #1,d0
172: bgts 1b
173: #else
174: /* need 1.6 usec recovery here */
175: clrl d0
176: nop; nop; nop
177: /* that was actually 1.8 */
178: #endif sun3
179: movb a1@,d0 | get returned register
180: rts
181:
182: /*
183: * Write a control register in the chip
184: */
185: ENTRY(zszwrite)
186: movl sp@(4),a1 | chip address
187: movb sp@(0xb),a1@ | write register number
188: #ifdef sun3
189: moveq #20,d0 | DELAY(2)
190: movl _cpudelay,d1
191: asrl d1,d0
192: 1: subql #1,d0
193: bgts 1b
194: #else
195: /* 1.6 usec recovery plus slop for buffered video writes */
196: nop; nop; nop; nop; nop
197: #endif sun3
198: movb sp@(0xf),a1@ | write data
199: rts
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