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1.1 ! root 1: /* automatically generated by bus-device-auto.sh, do not edit! */ ! 2: _TME_RCSID("$Id: bus-device-auto.sh,v 1.1 2004/03/28 23:38:28 fredette Exp $"); ! 3: ! 4: /* this indexes an initiator bus router array for a device with a port size ! 5: of 8 * (2 ^ siz_lg2) bits: */ ! 6: #define TME_BUS_ROUTER_INIT_INDEX(siz_lg2, cycle_size, address) \ ! 7: ((( \ ! 8: /* by the maximum cycle size: */ \ ! 9: ((cycle_size) - 1) \ ! 10: \ ! 11: /* by the address alignment: */ \ ! 12: << siz_lg2) \ ! 13: + ((address) & ((1 << (siz_lg2)) - 1))) \ ! 14: \ ! 15: /* factor in the size of the generic bus router array: */ \ ! 16: * TME_BUS_ROUTER_SIZE(siz_lg2)) ! 17: ! 18: /* this gives the number of entries that must be in a generic bus ! 19: router array for a device with a bus size of 8 * (2 ^ siz_lg2) ! 20: bits: */ ! 21: #define TME_BUS_ROUTER_INIT_SIZE(siz_lg2) \ ! 22: TME_BUS_ROUTER_INIT_INDEX(siz_lg2, (1 << (siz_lg2)) + 1, 0) ! 23: ! 24: ! 25: /* the 16-bit big-endian bus master bus router: */ ! 26: const tme_bus_lane_t tme_bus_device_router_16eb[TME_BUS_ROUTER_INIT_SIZE(TME_BUS16_LOG2)] = { ! 27: ! 28: /* initiator maximum cycle size: 8 bits ! 29: initiator address offset: 0 bits ! 30: responder bus port size: 8 bits ! 31: responder port least lane: D7-D0: */ ! 32: /* D7-D0 */ TME_BUS_LANE_UNDEF, ! 33: /* D15-D8 */ TME_BUS_LANE_ROUTE(0) | TME_BUS_LANE_WARN, ! 34: ! 35: /* initiator maximum cycle size: 8 bits ! 36: initiator address offset: 0 bits ! 37: responder bus port size: 8 bits ! 38: responder port least lane: D15-D8: */ ! 39: /* D7-D0 */ TME_BUS_LANE_UNDEF, ! 40: /* D15-D8 */ TME_BUS_LANE_ROUTE(0), ! 41: ! 42: /* initiator maximum cycle size: 8 bits ! 43: initiator address offset: 0 bits ! 44: responder bus port size: 16 bits ! 45: responder port least lane: D7-D0: */ ! 46: /* D7-D0 */ TME_BUS_LANE_UNDEF, ! 47: /* D15-D8 */ TME_BUS_LANE_ROUTE(0), ! 48: ! 49: /* initiator maximum cycle size: 8 bits ! 50: initiator address offset: 0 bits ! 51: responder bus port size: 16 bits ! 52: responder port least lane: D15-D8 ! 53: (responder port not correctly positioned for this initiator): */ ! 54: /* D7-D0 */ TME_BUS_LANE_UNDEF, ! 55: /* D15-D8 */ TME_BUS_LANE_ROUTE(0), ! 56: ! 57: /* initiator maximum cycle size: 8 bits ! 58: initiator address offset: 8 bits ! 59: responder bus port size: 8 bits ! 60: responder port least lane: D7-D0: */ ! 61: /* D7-D0 */ TME_BUS_LANE_ROUTE(0), ! 62: /* D15-D8 */ TME_BUS_LANE_UNDEF, ! 63: ! 64: /* initiator maximum cycle size: 8 bits ! 65: initiator address offset: 8 bits ! 66: responder bus port size: 8 bits ! 67: responder port least lane: D15-D8: */ ! 68: /* D7-D0 */ TME_BUS_LANE_ROUTE(0) | TME_BUS_LANE_WARN, ! 69: /* D15-D8 */ TME_BUS_LANE_UNDEF, ! 70: ! 71: /* initiator maximum cycle size: 8 bits ! 72: initiator address offset: 8 bits ! 73: responder bus port size: 16 bits ! 74: responder port least lane: D7-D0: */ ! 75: /* D7-D0 */ TME_BUS_LANE_ROUTE(0), ! 76: /* D15-D8 */ TME_BUS_LANE_UNDEF, ! 77: ! 78: /* initiator maximum cycle size: 8 bits ! 79: initiator address offset: 8 bits ! 80: responder bus port size: 16 bits ! 81: responder port least lane: D15-D8 ! 82: (responder port not correctly positioned for this initiator): */ ! 83: /* D7-D0 */ TME_BUS_LANE_ROUTE(0) | TME_BUS_LANE_WARN, ! 84: /* D15-D8 */ TME_BUS_LANE_UNDEF, ! 85: ! 86: /* initiator maximum cycle size: 16 bits ! 87: initiator address offset: 0 bits ! 88: responder bus port size: 8 bits ! 89: responder port least lane: D7-D0: */ ! 90: /* D7-D0 */ TME_BUS_LANE_ROUTE(1), ! 91: /* D15-D8 */ TME_BUS_LANE_ROUTE(0) | TME_BUS_LANE_WARN, ! 92: ! 93: /* initiator maximum cycle size: 16 bits ! 94: initiator address offset: 0 bits ! 95: responder bus port size: 8 bits ! 96: responder port least lane: D15-D8: */ ! 97: /* D7-D0 */ TME_BUS_LANE_ROUTE(1) | TME_BUS_LANE_WARN, ! 98: /* D15-D8 */ TME_BUS_LANE_ROUTE(0), ! 99: ! 100: /* initiator maximum cycle size: 16 bits ! 101: initiator address offset: 0 bits ! 102: responder bus port size: 16 bits ! 103: responder port least lane: D7-D0: */ ! 104: /* D7-D0 */ TME_BUS_LANE_ROUTE(1), ! 105: /* D15-D8 */ TME_BUS_LANE_ROUTE(0), ! 106: ! 107: /* initiator maximum cycle size: 16 bits ! 108: initiator address offset: 0 bits ! 109: responder bus port size: 16 bits ! 110: responder port least lane: D15-D8 ! 111: (responder port not correctly positioned for this initiator): */ ! 112: /* D7-D0 */ TME_BUS_LANE_ROUTE(1) | TME_BUS_LANE_WARN, ! 113: /* D15-D8 */ TME_BUS_LANE_ROUTE(0), ! 114: ! 115: /* initiator maximum cycle size: 16 bits ! 116: initiator address offset: 8 bits ! 117: (a 16-bit initiator cannot request 16 bits at an 8-bit offset - this is an array placeholder) ! 118: responder bus port size: 8 bits ! 119: responder port least lane: D7-D0: */ ! 120: /* D7-D0 */ TME_BUS_LANE_ABORT, ! 121: /* D15-D8 */ TME_BUS_LANE_ABORT, ! 122: ! 123: /* initiator maximum cycle size: 16 bits ! 124: initiator address offset: 8 bits ! 125: (a 16-bit initiator cannot request 16 bits at an 8-bit offset - this is an array placeholder) ! 126: responder bus port size: 8 bits ! 127: responder port least lane: D15-D8: */ ! 128: /* D7-D0 */ TME_BUS_LANE_ABORT, ! 129: /* D15-D8 */ TME_BUS_LANE_ABORT, ! 130: ! 131: /* initiator maximum cycle size: 16 bits ! 132: initiator address offset: 8 bits ! 133: (a 16-bit initiator cannot request 16 bits at an 8-bit offset - this is an array placeholder) ! 134: responder bus port size: 16 bits ! 135: responder port least lane: D7-D0: */ ! 136: /* D7-D0 */ TME_BUS_LANE_ABORT, ! 137: /* D15-D8 */ TME_BUS_LANE_ABORT, ! 138: ! 139: /* initiator maximum cycle size: 16 bits ! 140: initiator address offset: 8 bits ! 141: (a 16-bit initiator cannot request 16 bits at an 8-bit offset - this is an array placeholder) ! 142: responder bus port size: 16 bits ! 143: responder port least lane: D15-D8 ! 144: (responder port not correctly positioned for this initiator): */ ! 145: /* D7-D0 */ TME_BUS_LANE_ABORT, ! 146: /* D15-D8 */ TME_BUS_LANE_ABORT, ! 147: }; ! 148: ! 149: /* the 16-bit little-endian bus master bus router: */ ! 150: const tme_bus_lane_t tme_bus_device_router_16el[TME_BUS_ROUTER_INIT_SIZE(TME_BUS16_LOG2)] = { ! 151: ! 152: /* initiator maximum cycle size: 8 bits ! 153: initiator address offset: 0 bits ! 154: responder bus port size: 8 bits ! 155: responder port least lane: D7-D0: */ ! 156: /* D7-D0 */ TME_BUS_LANE_ROUTE(0), ! 157: /* D15-D8 */ TME_BUS_LANE_UNDEF, ! 158: ! 159: /* initiator maximum cycle size: 8 bits ! 160: initiator address offset: 0 bits ! 161: responder bus port size: 8 bits ! 162: responder port least lane: D15-D8: */ ! 163: /* D7-D0 */ TME_BUS_LANE_ROUTE(0) | TME_BUS_LANE_WARN, ! 164: /* D15-D8 */ TME_BUS_LANE_UNDEF, ! 165: ! 166: /* initiator maximum cycle size: 8 bits ! 167: initiator address offset: 0 bits ! 168: responder bus port size: 16 bits ! 169: responder port least lane: D7-D0: */ ! 170: /* D7-D0 */ TME_BUS_LANE_ROUTE(0), ! 171: /* D15-D8 */ TME_BUS_LANE_UNDEF, ! 172: ! 173: /* initiator maximum cycle size: 8 bits ! 174: initiator address offset: 0 bits ! 175: responder bus port size: 16 bits ! 176: responder port least lane: D15-D8 ! 177: (responder port not correctly positioned for this initiator): */ ! 178: /* D7-D0 */ TME_BUS_LANE_ROUTE(0) | TME_BUS_LANE_WARN, ! 179: /* D15-D8 */ TME_BUS_LANE_UNDEF, ! 180: ! 181: /* initiator maximum cycle size: 8 bits ! 182: initiator address offset: 8 bits ! 183: responder bus port size: 8 bits ! 184: responder port least lane: D7-D0: */ ! 185: /* D7-D0 */ TME_BUS_LANE_UNDEF, ! 186: /* D15-D8 */ TME_BUS_LANE_ROUTE(0) | TME_BUS_LANE_WARN, ! 187: ! 188: /* initiator maximum cycle size: 8 bits ! 189: initiator address offset: 8 bits ! 190: responder bus port size: 8 bits ! 191: responder port least lane: D15-D8: */ ! 192: /* D7-D0 */ TME_BUS_LANE_UNDEF, ! 193: /* D15-D8 */ TME_BUS_LANE_ROUTE(0), ! 194: ! 195: /* initiator maximum cycle size: 8 bits ! 196: initiator address offset: 8 bits ! 197: responder bus port size: 16 bits ! 198: responder port least lane: D7-D0: */ ! 199: /* D7-D0 */ TME_BUS_LANE_UNDEF, ! 200: /* D15-D8 */ TME_BUS_LANE_ROUTE(0), ! 201: ! 202: /* initiator maximum cycle size: 8 bits ! 203: initiator address offset: 8 bits ! 204: responder bus port size: 16 bits ! 205: responder port least lane: D15-D8 ! 206: (responder port not correctly positioned for this initiator): */ ! 207: /* D7-D0 */ TME_BUS_LANE_UNDEF, ! 208: /* D15-D8 */ TME_BUS_LANE_ROUTE(0), ! 209: ! 210: /* initiator maximum cycle size: 16 bits ! 211: initiator address offset: 0 bits ! 212: responder bus port size: 8 bits ! 213: responder port least lane: D7-D0: */ ! 214: /* D7-D0 */ TME_BUS_LANE_ROUTE(0), ! 215: /* D15-D8 */ TME_BUS_LANE_ROUTE(1) | TME_BUS_LANE_WARN, ! 216: ! 217: /* initiator maximum cycle size: 16 bits ! 218: initiator address offset: 0 bits ! 219: responder bus port size: 8 bits ! 220: responder port least lane: D15-D8: */ ! 221: /* D7-D0 */ TME_BUS_LANE_ROUTE(0) | TME_BUS_LANE_WARN, ! 222: /* D15-D8 */ TME_BUS_LANE_ROUTE(1), ! 223: ! 224: /* initiator maximum cycle size: 16 bits ! 225: initiator address offset: 0 bits ! 226: responder bus port size: 16 bits ! 227: responder port least lane: D7-D0: */ ! 228: /* D7-D0 */ TME_BUS_LANE_ROUTE(0), ! 229: /* D15-D8 */ TME_BUS_LANE_ROUTE(1), ! 230: ! 231: /* initiator maximum cycle size: 16 bits ! 232: initiator address offset: 0 bits ! 233: responder bus port size: 16 bits ! 234: responder port least lane: D15-D8 ! 235: (responder port not correctly positioned for this initiator): */ ! 236: /* D7-D0 */ TME_BUS_LANE_ROUTE(0) | TME_BUS_LANE_WARN, ! 237: /* D15-D8 */ TME_BUS_LANE_ROUTE(1), ! 238: ! 239: /* initiator maximum cycle size: 16 bits ! 240: initiator address offset: 8 bits ! 241: (a 16-bit initiator cannot request 16 bits at an 8-bit offset - this is an array placeholder) ! 242: responder bus port size: 8 bits ! 243: responder port least lane: D7-D0: */ ! 244: /* D7-D0 */ TME_BUS_LANE_ABORT, ! 245: /* D15-D8 */ TME_BUS_LANE_ABORT, ! 246: ! 247: /* initiator maximum cycle size: 16 bits ! 248: initiator address offset: 8 bits ! 249: (a 16-bit initiator cannot request 16 bits at an 8-bit offset - this is an array placeholder) ! 250: responder bus port size: 8 bits ! 251: responder port least lane: D15-D8: */ ! 252: /* D7-D0 */ TME_BUS_LANE_ABORT, ! 253: /* D15-D8 */ TME_BUS_LANE_ABORT, ! 254: ! 255: /* initiator maximum cycle size: 16 bits ! 256: initiator address offset: 8 bits ! 257: (a 16-bit initiator cannot request 16 bits at an 8-bit offset - this is an array placeholder) ! 258: responder bus port size: 16 bits ! 259: responder port least lane: D7-D0: */ ! 260: /* D7-D0 */ TME_BUS_LANE_ABORT, ! 261: /* D15-D8 */ TME_BUS_LANE_ABORT, ! 262: ! 263: /* initiator maximum cycle size: 16 bits ! 264: initiator address offset: 8 bits ! 265: (a 16-bit initiator cannot request 16 bits at an 8-bit offset - this is an array placeholder) ! 266: responder bus port size: 16 bits ! 267: responder port least lane: D15-D8 ! 268: (responder port not correctly positioned for this initiator): */ ! 269: /* D7-D0 */ TME_BUS_LANE_ABORT, ! 270: /* D15-D8 */ TME_BUS_LANE_ABORT, ! 271: }; ! 272: ! 273: /* the 16-bit bus master DMA read function: */ ! 274: int ! 275: tme_bus_device_dma_read_16(struct tme_bus_device *bus_device, ! 276: tme_bus_addr_t address_init, ! 277: tme_bus_addr_t size, ! 278: tme_uint8_t *buffer, ! 279: unsigned int locks) ! 280: { ! 281: struct tme_bus_tlb *tlb, tlb_local; ! 282: struct tme_bus_connection *conn_bus; ! 283: tme_bus_addr_t count_minus_one, count; ! 284: struct tme_bus_cycle cycle; ! 285: tme_bus_addr_t address_resp; ! 286: tme_bus_addr_t tlb_addr_last; ! 287: int shift; ! 288: int err; ! 289: ! 290: /* assume no error: */ ! 291: err = TME_OK; ! 292: ! 293: /* loop while we have more bytes to read: */ ! 294: for (; err == TME_OK && size > 0; ) { ! 295: ! 296: /* hash this address into a TLB entry: */ ! 297: tlb = (*bus_device->tme_bus_device_tlb_hash) ! 298: (bus_device, ! 299: address_init, ! 300: TME_BUS_CYCLE_READ); ! 301: ! 302: /* if this TLB entry doesn't cover this address, or if it doesn't ! 303: allow reading, reload it: */ ! 304: tlb_addr_last = TME_ATOMIC_READ(tme_bus_addr_t, tlb->tme_bus_tlb_addr_last); ! 305: if (address_init < TME_ATOMIC_READ(tme_bus_addr_t, tlb->tme_bus_tlb_addr_first) ! 306: || address_init > tlb_addr_last ! 307: || (tlb->tme_bus_tlb_emulator_off_read == TME_EMULATOR_OFF_UNDEF ! 308: && !(tlb->tme_bus_tlb_cycles_ok & TME_BUS_CYCLE_READ))) { ! 309: ! 310: /* reserve this TLB entry: */ ! 311: tme_bus_tlb_reserve(tlb, &tlb_local); ! 312: tlb = &tlb_local; ! 313: ! 314: /* get our bus connection: */ ! 315: conn_bus = TME_ATOMIC_READ(struct tme_bus_connection *, ! 316: bus_device->tme_bus_device_connection); ! 317: ! 318: /* unlock the device: */ ! 319: (*bus_device->tme_bus_device_unlock)(bus_device, locks); ! 320: ! 321: /* reload the TLB entry: */ ! 322: err = (*conn_bus->tme_bus_tlb_fill) ! 323: (conn_bus, ! 324: tlb, ! 325: address_init, ! 326: TME_BUS_CYCLE_READ); ! 327: ! 328: /* lock the device: */ ! 329: (*bus_device->tme_bus_device_lock)(bus_device, locks); ! 330: ! 331: /* return if we couldn't fill the TLB entry: */ ! 332: if (err != TME_OK) { ! 333: return (err); ! 334: } ! 335: ! 336: /* the TLB entry must cover this address and allow reading: */ ! 337: tlb_addr_last = TME_ATOMIC_READ(tme_bus_addr_t, tlb->tme_bus_tlb_addr_last); ! 338: assert (address_init >= TME_ATOMIC_READ(tme_bus_addr_t, tlb->tme_bus_tlb_addr_first) ! 339: && address_init <= tlb_addr_last ! 340: && (tlb->tme_bus_tlb_emulator_off_read != TME_EMULATOR_OFF_UNDEF ! 341: || (tlb->tme_bus_tlb_cycles_ok & TME_BUS_CYCLE_READ))); ! 342: ! 343: /* store the TLB entry: */ ! 344: tme_bus_tlb_back(tlb); ! 345: } ! 346: ! 347: /* if this TLB entry allows fast reading: */ ! 348: if (tlb->tme_bus_tlb_emulator_off_read != TME_EMULATOR_OFF_UNDEF) { ! 349: ! 350: /* see how many bytes we can fast read from this TLB entry, ! 351: starting at this address: */ ! 352: count_minus_one = (tlb_addr_last - address_init); ! 353: ! 354: /* read that many bytes or size bytes, whichever is smaller: */ ! 355: count_minus_one = TME_MIN(count_minus_one, ! 356: (size - 1)); ! 357: count = count_minus_one + 1; ! 358: assert (count != 0); ! 359: ! 360: /* do the fast read: */ ! 361: tme_memory_sequence_rdlock(tlb->tme_bus_tlb_rwlock); ! 362: memcpy(buffer, ! 363: (tlb->tme_bus_tlb_emulator_off_read + address_init), ! 364: count); ! 365: tme_memory_sequence_unlock(tlb->tme_bus_tlb_rwlock); ! 366: } ! 367: ! 368: /* otherwise, we have to do a slow read: */ ! 369: else { ! 370: ! 371: /* get the size of this bus cycle: */ ! 372: count = (1 << TME_BUS16_LOG2); ! 373: count -= (address_init & (count - 1)); ! 374: count = TME_MIN(count, size); ! 375: ! 376: /* fill the cycle structure: */ ! 377: cycle.tme_bus_cycle_type = TME_BUS_CYCLE_READ; ! 378: cycle.tme_bus_cycle_size = count; ! 379: cycle.tme_bus_cycle_buffer = (tme_uint8_t *) buffer; /* XXX this breaks const */ ! 380: cycle.tme_bus_cycle_buffer_increment = 1; ! 381: cycle.tme_bus_cycle_lane_routing ! 382: = (bus_device->tme_bus_device_router ! 383: + TME_BUS_ROUTER_INIT_INDEX(TME_BUS16_LOG2, count, address_init)); ! 384: ! 385: /* XXX this should come from a socket configuration: */ ! 386: cycle.tme_bus_cycle_port = TME_BUS_CYCLE_PORT(0, TME_BUS16_LOG2); ! 387: ! 388: /* form the physical address for the bus cycle handler: */ ! 389: address_resp = tlb->tme_bus_tlb_addr_offset + address_init; ! 390: shift = tlb->tme_bus_tlb_addr_shift; ! 391: if (shift < 0) { ! 392: address_resp <<= (0 - shift); ! 393: } ! 394: else if (shift > 0) { ! 395: address_resp >>= shift; ! 396: } ! 397: cycle.tme_bus_cycle_address = address_resp; ! 398: ! 399: /* unlock the device: */ ! 400: (*bus_device->tme_bus_device_unlock)(bus_device, locks); ! 401: ! 402: /* run the bus cycle: */ ! 403: err = (*tlb->tme_bus_tlb_cycle) ! 404: (tlb->tme_bus_tlb_cycle_private, &cycle); ! 405: ! 406: /* we don't support deadlocking: */ ! 407: if (err == TME_EDEADLK) { ! 408: abort(); ! 409: } ! 410: ! 411: /* otherwise, any other error might be a bus error: */ ! 412: else if (err != TME_OK) { ! 413: err = tme_bus_tlb_fault(tlb, &cycle, err); ! 414: assert (err != TME_OK); ! 415: } ! 416: ! 417: /* lock the device: */ ! 418: (*bus_device->tme_bus_device_lock)(bus_device, locks); ! 419: } ! 420: ! 421: /* update the address, buffer, and size and continue: */ ! 422: address_init += count; ! 423: buffer += count; ! 424: size -= count; ! 425: } ! 426: ! 427: return (err); ! 428: } ! 429: ! 430: /* the 16-bit bus master DMA write function: */ ! 431: int ! 432: tme_bus_device_dma_write_16(struct tme_bus_device *bus_device, ! 433: tme_bus_addr_t address_init, ! 434: tme_bus_addr_t size, ! 435: const tme_uint8_t *buffer, ! 436: unsigned int locks) ! 437: { ! 438: struct tme_bus_tlb *tlb, tlb_local; ! 439: struct tme_bus_connection *conn_bus; ! 440: tme_bus_addr_t count_minus_one, count; ! 441: struct tme_bus_cycle cycle; ! 442: tme_bus_addr_t address_resp; ! 443: tme_bus_addr_t tlb_addr_last; ! 444: int shift; ! 445: int err; ! 446: ! 447: /* assume no error: */ ! 448: err = TME_OK; ! 449: ! 450: /* loop while we have more bytes to write: */ ! 451: for (; err == TME_OK && size > 0; ) { ! 452: ! 453: /* hash this address into a TLB entry: */ ! 454: tlb = (*bus_device->tme_bus_device_tlb_hash) ! 455: (bus_device, ! 456: address_init, ! 457: TME_BUS_CYCLE_WRITE); ! 458: ! 459: /* if this TLB entry doesn't cover this address, or if it doesn't ! 460: allow writing, reload it: */ ! 461: tlb_addr_last = TME_ATOMIC_READ(tme_bus_addr_t, tlb->tme_bus_tlb_addr_last); ! 462: if (address_init < TME_ATOMIC_READ(tme_bus_addr_t, tlb->tme_bus_tlb_addr_first) ! 463: || address_init > tlb_addr_last ! 464: || (tlb->tme_bus_tlb_emulator_off_write == TME_EMULATOR_OFF_UNDEF ! 465: && !(tlb->tme_bus_tlb_cycles_ok & TME_BUS_CYCLE_WRITE))) { ! 466: ! 467: /* reserve this TLB entry: */ ! 468: tme_bus_tlb_reserve(tlb, &tlb_local); ! 469: tlb = &tlb_local; ! 470: ! 471: /* get our bus connection: */ ! 472: conn_bus = TME_ATOMIC_READ(struct tme_bus_connection *, ! 473: bus_device->tme_bus_device_connection); ! 474: ! 475: /* unlock the device: */ ! 476: (*bus_device->tme_bus_device_unlock)(bus_device, locks); ! 477: ! 478: /* reload the TLB entry: */ ! 479: err = (*conn_bus->tme_bus_tlb_fill) ! 480: (conn_bus, ! 481: tlb, ! 482: address_init, ! 483: TME_BUS_CYCLE_WRITE); ! 484: ! 485: /* lock the device: */ ! 486: (*bus_device->tme_bus_device_lock)(bus_device, locks); ! 487: ! 488: /* return if we couldn't fill the TLB entry: */ ! 489: if (err != TME_OK) { ! 490: return (err); ! 491: } ! 492: ! 493: /* the TLB entry must cover this address and allow writing: */ ! 494: tlb_addr_last = TME_ATOMIC_READ(tme_bus_addr_t, tlb->tme_bus_tlb_addr_last); ! 495: assert (address_init >= TME_ATOMIC_READ(tme_bus_addr_t, tlb->tme_bus_tlb_addr_first) ! 496: && address_init <= tlb_addr_last ! 497: && (tlb->tme_bus_tlb_emulator_off_write != TME_EMULATOR_OFF_UNDEF ! 498: || (tlb->tme_bus_tlb_cycles_ok & TME_BUS_CYCLE_WRITE))); ! 499: ! 500: /* store the TLB entry: */ ! 501: tme_bus_tlb_back(tlb); ! 502: } ! 503: ! 504: /* if this TLB entry allows fast writing: */ ! 505: if (tlb->tme_bus_tlb_emulator_off_write != TME_EMULATOR_OFF_UNDEF) { ! 506: ! 507: /* see how many bytes we can fast write to this TLB entry, ! 508: starting at this address: */ ! 509: count_minus_one = (tlb_addr_last - address_init); ! 510: ! 511: /* write that many bytes or size bytes, whichever is smaller: */ ! 512: count_minus_one = TME_MIN(count_minus_one, ! 513: (size - 1)); ! 514: count = count_minus_one + 1; ! 515: assert (count != 0); ! 516: ! 517: /* do the fast write: */ ! 518: tme_memory_sequence_wrlock(tlb->tme_bus_tlb_rwlock); ! 519: memcpy((tlb->tme_bus_tlb_emulator_off_write + address_init), ! 520: buffer, ! 521: count); ! 522: tme_memory_sequence_unlock(tlb->tme_bus_tlb_rwlock); ! 523: } ! 524: ! 525: /* otherwise, we have to do a slow write: */ ! 526: else { ! 527: ! 528: /* get the size of this bus cycle: */ ! 529: count = (1 << TME_BUS16_LOG2); ! 530: count -= (address_init & (count - 1)); ! 531: count = TME_MIN(count, size); ! 532: ! 533: /* fill the cycle structure: */ ! 534: cycle.tme_bus_cycle_type = TME_BUS_CYCLE_WRITE; ! 535: cycle.tme_bus_cycle_size = count; ! 536: cycle.tme_bus_cycle_buffer = (tme_uint8_t *) buffer; /* XXX this breaks const */ ! 537: cycle.tme_bus_cycle_buffer_increment = 1; ! 538: cycle.tme_bus_cycle_lane_routing ! 539: = (bus_device->tme_bus_device_router ! 540: + TME_BUS_ROUTER_INIT_INDEX(TME_BUS16_LOG2, count, address_init)); ! 541: ! 542: /* XXX this should come from a socket configuration: */ ! 543: cycle.tme_bus_cycle_port = TME_BUS_CYCLE_PORT(0, TME_BUS16_LOG2); ! 544: ! 545: /* form the physical address for the bus cycle handler: */ ! 546: address_resp = tlb->tme_bus_tlb_addr_offset + address_init; ! 547: shift = tlb->tme_bus_tlb_addr_shift; ! 548: if (shift < 0) { ! 549: address_resp <<= (0 - shift); ! 550: } ! 551: else if (shift > 0) { ! 552: address_resp >>= shift; ! 553: } ! 554: cycle.tme_bus_cycle_address = address_resp; ! 555: ! 556: /* unlock the device: */ ! 557: (*bus_device->tme_bus_device_unlock)(bus_device, locks); ! 558: ! 559: /* run the bus cycle: */ ! 560: err = (*tlb->tme_bus_tlb_cycle) ! 561: (tlb->tme_bus_tlb_cycle_private, &cycle); ! 562: ! 563: /* we don't support deadlocking: */ ! 564: if (err == TME_EDEADLK) { ! 565: abort(); ! 566: } ! 567: ! 568: /* otherwise, any other error might be a bus error: */ ! 569: else if (err != TME_OK) { ! 570: err = tme_bus_tlb_fault(tlb, &cycle, err); ! 571: assert (err != TME_OK); ! 572: } ! 573: ! 574: /* lock the device: */ ! 575: (*bus_device->tme_bus_device_lock)(bus_device, locks); ! 576: } ! 577: ! 578: /* update the address, buffer, and size and continue: */ ! 579: address_init += count; ! 580: buffer += count; ! 581: size -= count; ! 582: } ! 583: ! 584: return (err); ! 585: } ! 586: ! 587: /* the 32-bit big-endian bus master bus router: */ ! 588: const tme_bus_lane_t tme_bus_device_router_32eb[TME_BUS_ROUTER_INIT_SIZE(TME_BUS32_LOG2)] = { ! 589: ! 590: /* initiator maximum cycle size: 8 bits ! 591: initiator address offset: 0 bits ! 592: responder bus port size: 8 bits ! 593: responder port least lane: D7-D0: */ ! 594: /* D7-D0 */ TME_BUS_LANE_UNDEF, ! 595: /* D15-D8 */ TME_BUS_LANE_UNDEF, ! 596: /* D23-D16 */ TME_BUS_LANE_UNDEF, ! 597: /* D31-D24 */ TME_BUS_LANE_ROUTE(0) | TME_BUS_LANE_WARN, ! 598: ! 599: /* initiator maximum cycle size: 8 bits ! 600: initiator address offset: 0 bits ! 601: responder bus port size: 8 bits ! 602: responder port least lane: D15-D8: */ ! 603: /* D7-D0 */ TME_BUS_LANE_UNDEF, ! 604: /* D15-D8 */ TME_BUS_LANE_UNDEF, ! 605: /* D23-D16 */ TME_BUS_LANE_UNDEF, ! 606: /* D31-D24 */ TME_BUS_LANE_ROUTE(0) | TME_BUS_LANE_WARN, ! 607: ! 608: /* initiator maximum cycle size: 8 bits ! 609: initiator address offset: 0 bits ! 610: responder bus port size: 8 bits ! 611: responder port least lane: D23-D16: */ ! 612: /* D7-D0 */ TME_BUS_LANE_UNDEF, ! 613: /* D15-D8 */ TME_BUS_LANE_UNDEF, ! 614: /* D23-D16 */ TME_BUS_LANE_UNDEF, ! 615: /* D31-D24 */ TME_BUS_LANE_ROUTE(0) | TME_BUS_LANE_WARN, ! 616: ! 617: /* initiator maximum cycle size: 8 bits ! 618: initiator address offset: 0 bits ! 619: responder bus port size: 8 bits ! 620: responder port least lane: D31-D24: */ ! 621: /* D7-D0 */ TME_BUS_LANE_UNDEF, ! 622: /* D15-D8 */ TME_BUS_LANE_UNDEF, ! 623: /* D23-D16 */ TME_BUS_LANE_UNDEF, ! 624: /* D31-D24 */ TME_BUS_LANE_ROUTE(0), ! 625: ! 626: /* initiator maximum cycle size: 8 bits ! 627: initiator address offset: 0 bits ! 628: responder bus port size: 16 bits ! 629: responder port least lane: D7-D0: */ ! 630: /* D7-D0 */ TME_BUS_LANE_UNDEF, ! 631: /* D15-D8 */ TME_BUS_LANE_UNDEF, ! 632: /* D23-D16 */ TME_BUS_LANE_UNDEF, ! 633: /* D31-D24 */ TME_BUS_LANE_ROUTE(0) | TME_BUS_LANE_WARN, ! 634: ! 635: /* initiator maximum cycle size: 8 bits ! 636: initiator address offset: 0 bits ! 637: responder bus port size: 16 bits ! 638: responder port least lane: D15-D8: */ ! 639: /* D7-D0 */ TME_BUS_LANE_UNDEF, ! 640: /* D15-D8 */ TME_BUS_LANE_UNDEF, ! 641: /* D23-D16 */ TME_BUS_LANE_UNDEF, ! 642: /* D31-D24 */ TME_BUS_LANE_ROUTE(0) | TME_BUS_LANE_WARN, ! 643: ! 644: /* initiator maximum cycle size: 8 bits ! 645: initiator address offset: 0 bits ! 646: responder bus port size: 16 bits ! 647: responder port least lane: D23-D16: */ ! 648: /* D7-D0 */ TME_BUS_LANE_UNDEF, ! 649: /* D15-D8 */ TME_BUS_LANE_UNDEF, ! 650: /* D23-D16 */ TME_BUS_LANE_UNDEF, ! 651: /* D31-D24 */ TME_BUS_LANE_ROUTE(0), ! 652: ! 653: /* initiator maximum cycle size: 8 bits ! 654: initiator address offset: 0 bits ! 655: responder bus port size: 16 bits ! 656: responder port least lane: D31-D24 ! 657: (responder port not correctly positioned for this initiator): */ ! 658: /* D7-D0 */ TME_BUS_LANE_UNDEF, ! 659: /* D15-D8 */ TME_BUS_LANE_UNDEF, ! 660: /* D23-D16 */ TME_BUS_LANE_UNDEF, ! 661: /* D31-D24 */ TME_BUS_LANE_ROUTE(0), ! 662: ! 663: /* initiator maximum cycle size: 8 bits ! 664: initiator address offset: 0 bits ! 665: responder bus port size: 32 bits ! 666: responder port least lane: D7-D0: */ ! 667: /* D7-D0 */ TME_BUS_LANE_UNDEF, ! 668: /* D15-D8 */ TME_BUS_LANE_UNDEF, ! 669: /* D23-D16 */ TME_BUS_LANE_UNDEF, ! 670: /* D31-D24 */ TME_BUS_LANE_ROUTE(0), ! 671: ! 672: /* initiator maximum cycle size: 8 bits ! 673: initiator address offset: 0 bits ! 674: responder bus port size: 32 bits ! 675: responder port least lane: D15-D8 ! 676: (responder port not correctly positioned for this initiator): */ ! 677: /* D7-D0 */ TME_BUS_LANE_UNDEF, ! 678: /* D15-D8 */ TME_BUS_LANE_UNDEF, ! 679: /* D23-D16 */ TME_BUS_LANE_UNDEF, ! 680: /* D31-D24 */ TME_BUS_LANE_ROUTE(0), ! 681: ! 682: /* initiator maximum cycle size: 8 bits ! 683: initiator address offset: 0 bits ! 684: responder bus port size: 32 bits ! 685: responder port least lane: D23-D16 ! 686: (responder port not correctly positioned for this initiator): */ ! 687: /* D7-D0 */ TME_BUS_LANE_UNDEF, ! 688: /* D15-D8 */ TME_BUS_LANE_UNDEF, ! 689: /* D23-D16 */ TME_BUS_LANE_UNDEF, ! 690: /* D31-D24 */ TME_BUS_LANE_ROUTE(0), ! 691: ! 692: /* initiator maximum cycle size: 8 bits ! 693: initiator address offset: 0 bits ! 694: responder bus port size: 32 bits ! 695: responder port least lane: D31-D24 ! 696: (responder port not correctly positioned for this initiator): */ ! 697: /* D7-D0 */ TME_BUS_LANE_UNDEF, ! 698: /* D15-D8 */ TME_BUS_LANE_UNDEF, ! 699: /* D23-D16 */ TME_BUS_LANE_UNDEF, ! 700: /* D31-D24 */ TME_BUS_LANE_ROUTE(0), ! 701: ! 702: /* initiator maximum cycle size: 8 bits ! 703: initiator address offset: 8 bits ! 704: responder bus port size: 8 bits ! 705: responder port least lane: D7-D0: */ ! 706: /* D7-D0 */ TME_BUS_LANE_UNDEF, ! 707: /* D15-D8 */ TME_BUS_LANE_UNDEF, ! 708: /* D23-D16 */ TME_BUS_LANE_ROUTE(0) | TME_BUS_LANE_WARN, ! 709: /* D31-D24 */ TME_BUS_LANE_UNDEF, ! 710: ! 711: /* initiator maximum cycle size: 8 bits ! 712: initiator address offset: 8 bits ! 713: responder bus port size: 8 bits ! 714: responder port least lane: D15-D8: */ ! 715: /* D7-D0 */ TME_BUS_LANE_UNDEF, ! 716: /* D15-D8 */ TME_BUS_LANE_UNDEF, ! 717: /* D23-D16 */ TME_BUS_LANE_ROUTE(0) | TME_BUS_LANE_WARN, ! 718: /* D31-D24 */ TME_BUS_LANE_UNDEF, ! 719: ! 720: /* initiator maximum cycle size: 8 bits ! 721: initiator address offset: 8 bits ! 722: responder bus port size: 8 bits ! 723: responder port least lane: D23-D16: */ ! 724: /* D7-D0 */ TME_BUS_LANE_UNDEF, ! 725: /* D15-D8 */ TME_BUS_LANE_UNDEF, ! 726: /* D23-D16 */ TME_BUS_LANE_ROUTE(0), ! 727: /* D31-D24 */ TME_BUS_LANE_UNDEF, ! 728: ! 729: /* initiator maximum cycle size: 8 bits ! 730: initiator address offset: 8 bits ! 731: responder bus port size: 8 bits ! 732: responder port least lane: D31-D24: */ ! 733: /* D7-D0 */ TME_BUS_LANE_UNDEF, ! 734: /* D15-D8 */ TME_BUS_LANE_UNDEF, ! 735: /* D23-D16 */ TME_BUS_LANE_ROUTE(0) | TME_BUS_LANE_WARN, ! 736: /* D31-D24 */ TME_BUS_LANE_UNDEF, ! 737: ! 738: /* initiator maximum cycle size: 8 bits ! 739: initiator address offset: 8 bits ! 740: responder bus port size: 16 bits ! 741: responder port least lane: D7-D0: */ ! 742: /* D7-D0 */ TME_BUS_LANE_UNDEF, ! 743: /* D15-D8 */ TME_BUS_LANE_UNDEF, ! 744: /* D23-D16 */ TME_BUS_LANE_ROUTE(0) | TME_BUS_LANE_WARN, ! 745: /* D31-D24 */ TME_BUS_LANE_UNDEF, ! 746: ! 747: /* initiator maximum cycle size: 8 bits ! 748: initiator address offset: 8 bits ! 749: responder bus port size: 16 bits ! 750: responder port least lane: D15-D8: */ ! 751: /* D7-D0 */ TME_BUS_LANE_UNDEF, ! 752: /* D15-D8 */ TME_BUS_LANE_UNDEF, ! 753: /* D23-D16 */ TME_BUS_LANE_ROUTE(0), ! 754: /* D31-D24 */ TME_BUS_LANE_UNDEF, ! 755: ! 756: /* initiator maximum cycle size: 8 bits ! 757: initiator address offset: 8 bits ! 758: responder bus port size: 16 bits ! 759: responder port least lane: D23-D16: */ ! 760: /* D7-D0 */ TME_BUS_LANE_UNDEF, ! 761: /* D15-D8 */ TME_BUS_LANE_UNDEF, ! 762: /* D23-D16 */ TME_BUS_LANE_ROUTE(0), ! 763: /* D31-D24 */ TME_BUS_LANE_UNDEF, ! 764: ! 765: /* initiator maximum cycle size: 8 bits ! 766: initiator address offset: 8 bits ! 767: responder bus port size: 16 bits ! 768: responder port least lane: D31-D24 ! 769: (responder port not correctly positioned for this initiator): */ ! 770: /* D7-D0 */ TME_BUS_LANE_UNDEF, ! 771: /* D15-D8 */ TME_BUS_LANE_UNDEF, ! 772: /* D23-D16 */ TME_BUS_LANE_ROUTE(0) | TME_BUS_LANE_WARN, ! 773: /* D31-D24 */ TME_BUS_LANE_UNDEF, ! 774: ! 775: /* initiator maximum cycle size: 8 bits ! 776: initiator address offset: 8 bits ! 777: responder bus port size: 32 bits ! 778: responder port least lane: D7-D0: */ ! 779: /* D7-D0 */ TME_BUS_LANE_UNDEF, ! 780: /* D15-D8 */ TME_BUS_LANE_UNDEF, ! 781: /* D23-D16 */ TME_BUS_LANE_ROUTE(0), ! 782: /* D31-D24 */ TME_BUS_LANE_UNDEF, ! 783: ! 784: /* initiator maximum cycle size: 8 bits ! 785: initiator address offset: 8 bits ! 786: responder bus port size: 32 bits ! 787: responder port least lane: D15-D8 ! 788: (responder port not correctly positioned for this initiator): */ ! 789: /* D7-D0 */ TME_BUS_LANE_UNDEF, ! 790: /* D15-D8 */ TME_BUS_LANE_UNDEF, ! 791: /* D23-D16 */ TME_BUS_LANE_ROUTE(0), ! 792: /* D31-D24 */ TME_BUS_LANE_UNDEF, ! 793: ! 794: /* initiator maximum cycle size: 8 bits ! 795: initiator address offset: 8 bits ! 796: responder bus port size: 32 bits ! 797: responder port least lane: D23-D16 ! 798: (responder port not correctly positioned for this initiator): */ ! 799: /* D7-D0 */ TME_BUS_LANE_UNDEF, ! 800: /* D15-D8 */ TME_BUS_LANE_UNDEF, ! 801: /* D23-D16 */ TME_BUS_LANE_ROUTE(0), ! 802: /* D31-D24 */ TME_BUS_LANE_UNDEF, ! 803: ! 804: /* initiator maximum cycle size: 8 bits ! 805: initiator address offset: 8 bits ! 806: responder bus port size: 32 bits ! 807: responder port least lane: D31-D24 ! 808: (responder port not correctly positioned for this initiator): */ ! 809: /* D7-D0 */ TME_BUS_LANE_UNDEF, ! 810: /* D15-D8 */ TME_BUS_LANE_UNDEF, ! 811: /* D23-D16 */ TME_BUS_LANE_ROUTE(0) | TME_BUS_LANE_WARN, ! 812: /* D31-D24 */ TME_BUS_LANE_UNDEF, ! 813: ! 814: /* initiator maximum cycle size: 8 bits ! 815: initiator address offset: 16 bits ! 816: responder bus port size: 8 bits ! 817: responder port least lane: D7-D0: */ ! 818: /* D7-D0 */ TME_BUS_LANE_UNDEF, ! 819: /* D15-D8 */ TME_BUS_LANE_ROUTE(0) | TME_BUS_LANE_WARN, ! 820: /* D23-D16 */ TME_BUS_LANE_UNDEF, ! 821: /* D31-D24 */ TME_BUS_LANE_UNDEF, ! 822: ! 823: /* initiator maximum cycle size: 8 bits ! 824: initiator address offset: 16 bits ! 825: responder bus port size: 8 bits ! 826: responder port least lane: D15-D8: */ ! 827: /* D7-D0 */ TME_BUS_LANE_UNDEF, ! 828: /* D15-D8 */ TME_BUS_LANE_ROUTE(0), ! 829: /* D23-D16 */ TME_BUS_LANE_UNDEF, ! 830: /* D31-D24 */ TME_BUS_LANE_UNDEF, ! 831: ! 832: /* initiator maximum cycle size: 8 bits ! 833: initiator address offset: 16 bits ! 834: responder bus port size: 8 bits ! 835: responder port least lane: D23-D16: */ ! 836: /* D7-D0 */ TME_BUS_LANE_UNDEF, ! 837: /* D15-D8 */ TME_BUS_LANE_ROUTE(0) | TME_BUS_LANE_WARN, ! 838: /* D23-D16 */ TME_BUS_LANE_UNDEF, ! 839: /* D31-D24 */ TME_BUS_LANE_UNDEF, ! 840: ! 841: /* initiator maximum cycle size: 8 bits ! 842: initiator address offset: 16 bits ! 843: responder bus port size: 8 bits ! 844: responder port least lane: D31-D24: */ ! 845: /* D7-D0 */ TME_BUS_LANE_UNDEF, ! 846: /* D15-D8 */ TME_BUS_LANE_ROUTE(0) | TME_BUS_LANE_WARN, ! 847: /* D23-D16 */ TME_BUS_LANE_UNDEF, ! 848: /* D31-D24 */ TME_BUS_LANE_UNDEF, ! 849: ! 850: /* initiator maximum cycle size: 8 bits ! 851: initiator address offset: 16 bits ! 852: responder bus port size: 16 bits ! 853: responder port least lane: D7-D0: */ ! 854: /* D7-D0 */ TME_BUS_LANE_UNDEF, ! 855: /* D15-D8 */ TME_BUS_LANE_ROUTE(0), ! 856: /* D23-D16 */ TME_BUS_LANE_UNDEF, ! 857: /* D31-D24 */ TME_BUS_LANE_UNDEF, ! 858: ! 859: /* initiator maximum cycle size: 8 bits ! 860: initiator address offset: 16 bits ! 861: responder bus port size: 16 bits ! 862: responder port least lane: D15-D8: */ ! 863: /* D7-D0 */ TME_BUS_LANE_UNDEF, ! 864: /* D15-D8 */ TME_BUS_LANE_ROUTE(0), ! 865: /* D23-D16 */ TME_BUS_LANE_UNDEF, ! 866: /* D31-D24 */ TME_BUS_LANE_UNDEF, ! 867: ! 868: /* initiator maximum cycle size: 8 bits ! 869: initiator address offset: 16 bits ! 870: responder bus port size: 16 bits ! 871: responder port least lane: D23-D16: */ ! 872: /* D7-D0 */ TME_BUS_LANE_UNDEF, ! 873: /* D15-D8 */ TME_BUS_LANE_ROUTE(0) | TME_BUS_LANE_WARN, ! 874: /* D23-D16 */ TME_BUS_LANE_UNDEF, ! 875: /* D31-D24 */ TME_BUS_LANE_UNDEF, ! 876: ! 877: /* initiator maximum cycle size: 8 bits ! 878: initiator address offset: 16 bits ! 879: responder bus port size: 16 bits ! 880: responder port least lane: D31-D24 ! 881: (responder port not correctly positioned for this initiator): */ ! 882: /* D7-D0 */ TME_BUS_LANE_UNDEF, ! 883: /* D15-D8 */ TME_BUS_LANE_ROUTE(0) | TME_BUS_LANE_WARN, ! 884: /* D23-D16 */ TME_BUS_LANE_UNDEF, ! 885: /* D31-D24 */ TME_BUS_LANE_UNDEF, ! 886: ! 887: /* initiator maximum cycle size: 8 bits ! 888: initiator address offset: 16 bits ! 889: responder bus port size: 32 bits ! 890: responder port least lane: D7-D0: */ ! 891: /* D7-D0 */ TME_BUS_LANE_UNDEF, ! 892: /* D15-D8 */ TME_BUS_LANE_ROUTE(0), ! 893: /* D23-D16 */ TME_BUS_LANE_UNDEF, ! 894: /* D31-D24 */ TME_BUS_LANE_UNDEF, ! 895: ! 896: /* initiator maximum cycle size: 8 bits ! 897: initiator address offset: 16 bits ! 898: responder bus port size: 32 bits ! 899: responder port least lane: D15-D8 ! 900: (responder port not correctly positioned for this initiator): */ ! 901: /* D7-D0 */ TME_BUS_LANE_UNDEF, ! 902: /* D15-D8 */ TME_BUS_LANE_ROUTE(0), ! 903: /* D23-D16 */ TME_BUS_LANE_UNDEF, ! 904: /* D31-D24 */ TME_BUS_LANE_UNDEF, ! 905: ! 906: /* initiator maximum cycle size: 8 bits ! 907: initiator address offset: 16 bits ! 908: responder bus port size: 32 bits ! 909: responder port least lane: D23-D16 ! 910: (responder port not correctly positioned for this initiator): */ ! 911: /* D7-D0 */ TME_BUS_LANE_UNDEF, ! 912: /* D15-D8 */ TME_BUS_LANE_ROUTE(0) | TME_BUS_LANE_WARN, ! 913: /* D23-D16 */ TME_BUS_LANE_UNDEF, ! 914: /* D31-D24 */ TME_BUS_LANE_UNDEF, ! 915: ! 916: /* initiator maximum cycle size: 8 bits ! 917: initiator address offset: 16 bits ! 918: responder bus port size: 32 bits ! 919: responder port least lane: D31-D24 ! 920: (responder port not correctly positioned for this initiator): */ ! 921: /* D7-D0 */ TME_BUS_LANE_UNDEF, ! 922: /* D15-D8 */ TME_BUS_LANE_ROUTE(0) | TME_BUS_LANE_WARN, ! 923: /* D23-D16 */ TME_BUS_LANE_UNDEF, ! 924: /* D31-D24 */ TME_BUS_LANE_UNDEF, ! 925: ! 926: /* initiator maximum cycle size: 8 bits ! 927: initiator address offset: 24 bits ! 928: responder bus port size: 8 bits ! 929: responder port least lane: D7-D0: */ ! 930: /* D7-D0 */ TME_BUS_LANE_ROUTE(0), ! 931: /* D15-D8 */ TME_BUS_LANE_UNDEF, ! 932: /* D23-D16 */ TME_BUS_LANE_UNDEF, ! 933: /* D31-D24 */ TME_BUS_LANE_UNDEF, ! 934: ! 935: /* initiator maximum cycle size: 8 bits ! 936: initiator address offset: 24 bits ! 937: responder bus port size: 8 bits ! 938: responder port least lane: D15-D8: */ ! 939: /* D7-D0 */ TME_BUS_LANE_ROUTE(0) | TME_BUS_LANE_WARN, ! 940: /* D15-D8 */ TME_BUS_LANE_UNDEF, ! 941: /* D23-D16 */ TME_BUS_LANE_UNDEF, ! 942: /* D31-D24 */ TME_BUS_LANE_UNDEF, ! 943: ! 944: /* initiator maximum cycle size: 8 bits ! 945: initiator address offset: 24 bits ! 946: responder bus port size: 8 bits ! 947: responder port least lane: D23-D16: */ ! 948: /* D7-D0 */ TME_BUS_LANE_ROUTE(0) | TME_BUS_LANE_WARN, ! 949: /* D15-D8 */ TME_BUS_LANE_UNDEF, ! 950: /* D23-D16 */ TME_BUS_LANE_UNDEF, ! 951: /* D31-D24 */ TME_BUS_LANE_UNDEF, ! 952: ! 953: /* initiator maximum cycle size: 8 bits ! 954: initiator address offset: 24 bits ! 955: responder bus port size: 8 bits ! 956: responder port least lane: D31-D24: */ ! 957: /* D7-D0 */ TME_BUS_LANE_ROUTE(0) | TME_BUS_LANE_WARN, ! 958: /* D15-D8 */ TME_BUS_LANE_UNDEF, ! 959: /* D23-D16 */ TME_BUS_LANE_UNDEF, ! 960: /* D31-D24 */ TME_BUS_LANE_UNDEF, ! 961: ! 962: /* initiator maximum cycle size: 8 bits ! 963: initiator address offset: 24 bits ! 964: responder bus port size: 16 bits ! 965: responder port least lane: D7-D0: */ ! 966: /* D7-D0 */ TME_BUS_LANE_ROUTE(0), ! 967: /* D15-D8 */ TME_BUS_LANE_UNDEF, ! 968: /* D23-D16 */ TME_BUS_LANE_UNDEF, ! 969: /* D31-D24 */ TME_BUS_LANE_UNDEF, ! 970: ! 971: /* initiator maximum cycle size: 8 bits ! 972: initiator address offset: 24 bits ! 973: responder bus port size: 16 bits ! 974: responder port least lane: D15-D8: */ ! 975: /* D7-D0 */ TME_BUS_LANE_ROUTE(0) | TME_BUS_LANE_WARN, ! 976: /* D15-D8 */ TME_BUS_LANE_UNDEF, ! 977: /* D23-D16 */ TME_BUS_LANE_UNDEF, ! 978: /* D31-D24 */ TME_BUS_LANE_UNDEF, ! 979: ! 980: /* initiator maximum cycle size: 8 bits ! 981: initiator address offset: 24 bits ! 982: responder bus port size: 16 bits ! 983: responder port least lane: D23-D16: */ ! 984: /* D7-D0 */ TME_BUS_LANE_ROUTE(0) | TME_BUS_LANE_WARN, ! 985: /* D15-D8 */ TME_BUS_LANE_UNDEF, ! 986: /* D23-D16 */ TME_BUS_LANE_UNDEF, ! 987: /* D31-D24 */ TME_BUS_LANE_UNDEF, ! 988: ! 989: /* initiator maximum cycle size: 8 bits ! 990: initiator address offset: 24 bits ! 991: responder bus port size: 16 bits ! 992: responder port least lane: D31-D24 ! 993: (responder port not correctly positioned for this initiator): */ ! 994: /* D7-D0 */ TME_BUS_LANE_ROUTE(0) | TME_BUS_LANE_WARN, ! 995: /* D15-D8 */ TME_BUS_LANE_UNDEF, ! 996: /* D23-D16 */ TME_BUS_LANE_UNDEF, ! 997: /* D31-D24 */ TME_BUS_LANE_UNDEF, ! 998: ! 999: /* initiator maximum cycle size: 8 bits ! 1000: initiator address offset: 24 bits ! 1001: responder bus port size: 32 bits ! 1002: responder port least lane: D7-D0: */ ! 1003: /* D7-D0 */ TME_BUS_LANE_ROUTE(0), ! 1004: /* D15-D8 */ TME_BUS_LANE_UNDEF, ! 1005: /* D23-D16 */ TME_BUS_LANE_UNDEF, ! 1006: /* D31-D24 */ TME_BUS_LANE_UNDEF, ! 1007: ! 1008: /* initiator maximum cycle size: 8 bits ! 1009: initiator address offset: 24 bits ! 1010: responder bus port size: 32 bits ! 1011: responder port least lane: D15-D8 ! 1012: (responder port not correctly positioned for this initiator): */ ! 1013: /* D7-D0 */ TME_BUS_LANE_ROUTE(0) | TME_BUS_LANE_WARN, ! 1014: /* D15-D8 */ TME_BUS_LANE_UNDEF, ! 1015: /* D23-D16 */ TME_BUS_LANE_UNDEF, ! 1016: /* D31-D24 */ TME_BUS_LANE_UNDEF, ! 1017: ! 1018: /* initiator maximum cycle size: 8 bits ! 1019: initiator address offset: 24 bits ! 1020: responder bus port size: 32 bits ! 1021: responder port least lane: D23-D16 ! 1022: (responder port not correctly positioned for this initiator): */ ! 1023: /* D7-D0 */ TME_BUS_LANE_ROUTE(0) | TME_BUS_LANE_WARN, ! 1024: /* D15-D8 */ TME_BUS_LANE_UNDEF, ! 1025: /* D23-D16 */ TME_BUS_LANE_UNDEF, ! 1026: /* D31-D24 */ TME_BUS_LANE_UNDEF, ! 1027: ! 1028: /* initiator maximum cycle size: 8 bits ! 1029: initiator address offset: 24 bits ! 1030: responder bus port size: 32 bits ! 1031: responder port least lane: D31-D24 ! 1032: (responder port not correctly positioned for this initiator): */ ! 1033: /* D7-D0 */ TME_BUS_LANE_ROUTE(0) | TME_BUS_LANE_WARN, ! 1034: /* D15-D8 */ TME_BUS_LANE_UNDEF, ! 1035: /* D23-D16 */ TME_BUS_LANE_UNDEF, ! 1036: /* D31-D24 */ TME_BUS_LANE_UNDEF, ! 1037: ! 1038: /* initiator maximum cycle size: 16 bits ! 1039: initiator address offset: 0 bits ! 1040: responder bus port size: 8 bits ! 1041: responder port least lane: D7-D0: */ ! 1042: /* D7-D0 */ TME_BUS_LANE_UNDEF, ! 1043: /* D15-D8 */ TME_BUS_LANE_UNDEF, ! 1044: /* D23-D16 */ TME_BUS_LANE_ROUTE(1) | TME_BUS_LANE_WARN, ! 1045: /* D31-D24 */ TME_BUS_LANE_ROUTE(0) | TME_BUS_LANE_WARN, ! 1046: ! 1047: /* initiator maximum cycle size: 16 bits ! 1048: initiator address offset: 0 bits ! 1049: responder bus port size: 8 bits ! 1050: responder port least lane: D15-D8: */ ! 1051: /* D7-D0 */ TME_BUS_LANE_UNDEF, ! 1052: /* D15-D8 */ TME_BUS_LANE_UNDEF, ! 1053: /* D23-D16 */ TME_BUS_LANE_ROUTE(1) | TME_BUS_LANE_WARN, ! 1054: /* D31-D24 */ TME_BUS_LANE_ROUTE(0) | TME_BUS_LANE_WARN, ! 1055: ! 1056: /* initiator maximum cycle size: 16 bits ! 1057: initiator address offset: 0 bits ! 1058: responder bus port size: 8 bits ! 1059: responder port least lane: D23-D16: */ ! 1060: /* D7-D0 */ TME_BUS_LANE_UNDEF, ! 1061: /* D15-D8 */ TME_BUS_LANE_UNDEF, ! 1062: /* D23-D16 */ TME_BUS_LANE_ROUTE(1), ! 1063: /* D31-D24 */ TME_BUS_LANE_ROUTE(0) | TME_BUS_LANE_WARN, ! 1064: ! 1065: /* initiator maximum cycle size: 16 bits ! 1066: initiator address offset: 0 bits ! 1067: responder bus port size: 8 bits ! 1068: responder port least lane: D31-D24: */ ! 1069: /* D7-D0 */ TME_BUS_LANE_UNDEF, ! 1070: /* D15-D8 */ TME_BUS_LANE_UNDEF, ! 1071: /* D23-D16 */ TME_BUS_LANE_ROUTE(1) | TME_BUS_LANE_WARN, ! 1072: /* D31-D24 */ TME_BUS_LANE_ROUTE(0), ! 1073: ! 1074: /* initiator maximum cycle size: 16 bits ! 1075: initiator address offset: 0 bits ! 1076: responder bus port size: 16 bits ! 1077: responder port least lane: D7-D0: */ ! 1078: /* D7-D0 */ TME_BUS_LANE_UNDEF, ! 1079: /* D15-D8 */ TME_BUS_LANE_UNDEF, ! 1080: /* D23-D16 */ TME_BUS_LANE_ROUTE(1) | TME_BUS_LANE_WARN, ! 1081: /* D31-D24 */ TME_BUS_LANE_ROUTE(0) | TME_BUS_LANE_WARN, ! 1082: ! 1083: /* initiator maximum cycle size: 16 bits ! 1084: initiator address offset: 0 bits ! 1085: responder bus port size: 16 bits ! 1086: responder port least lane: D15-D8: */ ! 1087: /* D7-D0 */ TME_BUS_LANE_UNDEF, ! 1088: /* D15-D8 */ TME_BUS_LANE_UNDEF, ! 1089: /* D23-D16 */ TME_BUS_LANE_ROUTE(1), ! 1090: /* D31-D24 */ TME_BUS_LANE_ROUTE(0) | TME_BUS_LANE_WARN, ! 1091: ! 1092: /* initiator maximum cycle size: 16 bits ! 1093: initiator address offset: 0 bits ! 1094: responder bus port size: 16 bits ! 1095: responder port least lane: D23-D16: */ ! 1096: /* D7-D0 */ TME_BUS_LANE_UNDEF, ! 1097: /* D15-D8 */ TME_BUS_LANE_UNDEF, ! 1098: /* D23-D16 */ TME_BUS_LANE_ROUTE(1), ! 1099: /* D31-D24 */ TME_BUS_LANE_ROUTE(0), ! 1100: ! 1101: /* initiator maximum cycle size: 16 bits ! 1102: initiator address offset: 0 bits ! 1103: responder bus port size: 16 bits ! 1104: responder port least lane: D31-D24 ! 1105: (responder port not correctly positioned for this initiator): */ ! 1106: /* D7-D0 */ TME_BUS_LANE_UNDEF, ! 1107: /* D15-D8 */ TME_BUS_LANE_UNDEF, ! 1108: /* D23-D16 */ TME_BUS_LANE_ROUTE(1) | TME_BUS_LANE_WARN, ! 1109: /* D31-D24 */ TME_BUS_LANE_ROUTE(0), ! 1110: ! 1111: /* initiator maximum cycle size: 16 bits ! 1112: initiator address offset: 0 bits ! 1113: responder bus port size: 32 bits ! 1114: responder port least lane: D7-D0: */ ! 1115: /* D7-D0 */ TME_BUS_LANE_UNDEF, ! 1116: /* D15-D8 */ TME_BUS_LANE_UNDEF, ! 1117: /* D23-D16 */ TME_BUS_LANE_ROUTE(1), ! 1118: /* D31-D24 */ TME_BUS_LANE_ROUTE(0), ! 1119: ! 1120: /* initiator maximum cycle size: 16 bits ! 1121: initiator address offset: 0 bits ! 1122: responder bus port size: 32 bits ! 1123: responder port least lane: D15-D8 ! 1124: (responder port not correctly positioned for this initiator): */ ! 1125: /* D7-D0 */ TME_BUS_LANE_UNDEF, ! 1126: /* D15-D8 */ TME_BUS_LANE_UNDEF, ! 1127: /* D23-D16 */ TME_BUS_LANE_ROUTE(1), ! 1128: /* D31-D24 */ TME_BUS_LANE_ROUTE(0), ! 1129: ! 1130: /* initiator maximum cycle size: 16 bits ! 1131: initiator address offset: 0 bits ! 1132: responder bus port size: 32 bits ! 1133: responder port least lane: D23-D16 ! 1134: (responder port not correctly positioned for this initiator): */ ! 1135: /* D7-D0 */ TME_BUS_LANE_UNDEF, ! 1136: /* D15-D8 */ TME_BUS_LANE_UNDEF, ! 1137: /* D23-D16 */ TME_BUS_LANE_ROUTE(1), ! 1138: /* D31-D24 */ TME_BUS_LANE_ROUTE(0), ! 1139: ! 1140: /* initiator maximum cycle size: 16 bits ! 1141: initiator address offset: 0 bits ! 1142: responder bus port size: 32 bits ! 1143: responder port least lane: D31-D24 ! 1144: (responder port not correctly positioned for this initiator): */ ! 1145: /* D7-D0 */ TME_BUS_LANE_UNDEF, ! 1146: /* D15-D8 */ TME_BUS_LANE_UNDEF, ! 1147: /* D23-D16 */ TME_BUS_LANE_ROUTE(1) | TME_BUS_LANE_WARN, ! 1148: /* D31-D24 */ TME_BUS_LANE_ROUTE(0), ! 1149: ! 1150: /* initiator maximum cycle size: 16 bits ! 1151: initiator address offset: 8 bits ! 1152: responder bus port size: 8 bits ! 1153: responder port least lane: D7-D0: */ ! 1154: /* D7-D0 */ TME_BUS_LANE_UNDEF, ! 1155: /* D15-D8 */ TME_BUS_LANE_ROUTE(1) | TME_BUS_LANE_WARN, ! 1156: /* D23-D16 */ TME_BUS_LANE_ROUTE(0) | TME_BUS_LANE_WARN, ! 1157: /* D31-D24 */ TME_BUS_LANE_UNDEF, ! 1158: ! 1159: /* initiator maximum cycle size: 16 bits ! 1160: initiator address offset: 8 bits ! 1161: responder bus port size: 8 bits ! 1162: responder port least lane: D15-D8: */ ! 1163: /* D7-D0 */ TME_BUS_LANE_UNDEF, ! 1164: /* D15-D8 */ TME_BUS_LANE_ROUTE(1), ! 1165: /* D23-D16 */ TME_BUS_LANE_ROUTE(0) | TME_BUS_LANE_WARN, ! 1166: /* D31-D24 */ TME_BUS_LANE_UNDEF, ! 1167: ! 1168: /* initiator maximum cycle size: 16 bits ! 1169: initiator address offset: 8 bits ! 1170: responder bus port size: 8 bits ! 1171: responder port least lane: D23-D16: */ ! 1172: /* D7-D0 */ TME_BUS_LANE_UNDEF, ! 1173: /* D15-D8 */ TME_BUS_LANE_ROUTE(1) | TME_BUS_LANE_WARN, ! 1174: /* D23-D16 */ TME_BUS_LANE_ROUTE(0), ! 1175: /* D31-D24 */ TME_BUS_LANE_UNDEF, ! 1176: ! 1177: /* initiator maximum cycle size: 16 bits ! 1178: initiator address offset: 8 bits ! 1179: responder bus port size: 8 bits ! 1180: responder port least lane: D31-D24: */ ! 1181: /* D7-D0 */ TME_BUS_LANE_UNDEF, ! 1182: /* D15-D8 */ TME_BUS_LANE_ROUTE(1) | TME_BUS_LANE_WARN, ! 1183: /* D23-D16 */ TME_BUS_LANE_ROUTE(0) | TME_BUS_LANE_WARN, ! 1184: /* D31-D24 */ TME_BUS_LANE_UNDEF, ! 1185: ! 1186: /* initiator maximum cycle size: 16 bits ! 1187: initiator address offset: 8 bits ! 1188: responder bus port size: 16 bits ! 1189: responder port least lane: D7-D0: */ ! 1190: /* D7-D0 */ TME_BUS_LANE_UNDEF, ! 1191: /* D15-D8 */ TME_BUS_LANE_ROUTE(1), ! 1192: /* D23-D16 */ TME_BUS_LANE_ROUTE(0) | TME_BUS_LANE_WARN, ! 1193: /* D31-D24 */ TME_BUS_LANE_UNDEF, ! 1194: ! 1195: /* initiator maximum cycle size: 16 bits ! 1196: initiator address offset: 8 bits ! 1197: responder bus port size: 16 bits ! 1198: responder port least lane: D15-D8: */ ! 1199: /* D7-D0 */ TME_BUS_LANE_UNDEF, ! 1200: /* D15-D8 */ TME_BUS_LANE_ROUTE(1), ! 1201: /* D23-D16 */ TME_BUS_LANE_ROUTE(0), ! 1202: /* D31-D24 */ TME_BUS_LANE_UNDEF, ! 1203: ! 1204: /* initiator maximum cycle size: 16 bits ! 1205: initiator address offset: 8 bits ! 1206: responder bus port size: 16 bits ! 1207: responder port least lane: D23-D16: */ ! 1208: /* D7-D0 */ TME_BUS_LANE_UNDEF, ! 1209: /* D15-D8 */ TME_BUS_LANE_ROUTE(1) | TME_BUS_LANE_WARN, ! 1210: /* D23-D16 */ TME_BUS_LANE_ROUTE(0), ! 1211: /* D31-D24 */ TME_BUS_LANE_UNDEF, ! 1212: ! 1213: /* initiator maximum cycle size: 16 bits ! 1214: initiator address offset: 8 bits ! 1215: responder bus port size: 16 bits ! 1216: responder port least lane: D31-D24 ! 1217: (responder port not correctly positioned for this initiator): */ ! 1218: /* D7-D0 */ TME_BUS_LANE_UNDEF, ! 1219: /* D15-D8 */ TME_BUS_LANE_ROUTE(1) | TME_BUS_LANE_WARN, ! 1220: /* D23-D16 */ TME_BUS_LANE_ROUTE(0) | TME_BUS_LANE_WARN, ! 1221: /* D31-D24 */ TME_BUS_LANE_UNDEF, ! 1222: ! 1223: /* initiator maximum cycle size: 16 bits ! 1224: initiator address offset: 8 bits ! 1225: responder bus port size: 32 bits ! 1226: responder port least lane: D7-D0: */ ! 1227: /* D7-D0 */ TME_BUS_LANE_UNDEF, ! 1228: /* D15-D8 */ TME_BUS_LANE_ROUTE(1), ! 1229: /* D23-D16 */ TME_BUS_LANE_ROUTE(0), ! 1230: /* D31-D24 */ TME_BUS_LANE_UNDEF, ! 1231: ! 1232: /* initiator maximum cycle size: 16 bits ! 1233: initiator address offset: 8 bits ! 1234: responder bus port size: 32 bits ! 1235: responder port least lane: D15-D8 ! 1236: (responder port not correctly positioned for this initiator): */ ! 1237: /* D7-D0 */ TME_BUS_LANE_UNDEF, ! 1238: /* D15-D8 */ TME_BUS_LANE_ROUTE(1), ! 1239: /* D23-D16 */ TME_BUS_LANE_ROUTE(0), ! 1240: /* D31-D24 */ TME_BUS_LANE_UNDEF, ! 1241: ! 1242: /* initiator maximum cycle size: 16 bits ! 1243: initiator address offset: 8 bits ! 1244: responder bus port size: 32 bits ! 1245: responder port least lane: D23-D16 ! 1246: (responder port not correctly positioned for this initiator): */ ! 1247: /* D7-D0 */ TME_BUS_LANE_UNDEF, ! 1248: /* D15-D8 */ TME_BUS_LANE_ROUTE(1) | TME_BUS_LANE_WARN, ! 1249: /* D23-D16 */ TME_BUS_LANE_ROUTE(0), ! 1250: /* D31-D24 */ TME_BUS_LANE_UNDEF, ! 1251: ! 1252: /* initiator maximum cycle size: 16 bits ! 1253: initiator address offset: 8 bits ! 1254: responder bus port size: 32 bits ! 1255: responder port least lane: D31-D24 ! 1256: (responder port not correctly positioned for this initiator): */ ! 1257: /* D7-D0 */ TME_BUS_LANE_UNDEF, ! 1258: /* D15-D8 */ TME_BUS_LANE_ROUTE(1) | TME_BUS_LANE_WARN, ! 1259: /* D23-D16 */ TME_BUS_LANE_ROUTE(0) | TME_BUS_LANE_WARN, ! 1260: /* D31-D24 */ TME_BUS_LANE_UNDEF, ! 1261: ! 1262: /* initiator maximum cycle size: 16 bits ! 1263: initiator address offset: 16 bits ! 1264: responder bus port size: 8 bits ! 1265: responder port least lane: D7-D0: */ ! 1266: /* D7-D0 */ TME_BUS_LANE_ROUTE(1), ! 1267: /* D15-D8 */ TME_BUS_LANE_ROUTE(0) | TME_BUS_LANE_WARN, ! 1268: /* D23-D16 */ TME_BUS_LANE_UNDEF, ! 1269: /* D31-D24 */ TME_BUS_LANE_UNDEF, ! 1270: ! 1271: /* initiator maximum cycle size: 16 bits ! 1272: initiator address offset: 16 bits ! 1273: responder bus port size: 8 bits ! 1274: responder port least lane: D15-D8: */ ! 1275: /* D7-D0 */ TME_BUS_LANE_ROUTE(1) | TME_BUS_LANE_WARN, ! 1276: /* D15-D8 */ TME_BUS_LANE_ROUTE(0), ! 1277: /* D23-D16 */ TME_BUS_LANE_UNDEF, ! 1278: /* D31-D24 */ TME_BUS_LANE_UNDEF, ! 1279: ! 1280: /* initiator maximum cycle size: 16 bits ! 1281: initiator address offset: 16 bits ! 1282: responder bus port size: 8 bits ! 1283: responder port least lane: D23-D16: */ ! 1284: /* D7-D0 */ TME_BUS_LANE_ROUTE(1) | TME_BUS_LANE_WARN, ! 1285: /* D15-D8 */ TME_BUS_LANE_ROUTE(0) | TME_BUS_LANE_WARN, ! 1286: /* D23-D16 */ TME_BUS_LANE_UNDEF, ! 1287: /* D31-D24 */ TME_BUS_LANE_UNDEF, ! 1288: ! 1289: /* initiator maximum cycle size: 16 bits ! 1290: initiator address offset: 16 bits ! 1291: responder bus port size: 8 bits ! 1292: responder port least lane: D31-D24: */ ! 1293: /* D7-D0 */ TME_BUS_LANE_ROUTE(1) | TME_BUS_LANE_WARN, ! 1294: /* D15-D8 */ TME_BUS_LANE_ROUTE(0) | TME_BUS_LANE_WARN, ! 1295: /* D23-D16 */ TME_BUS_LANE_UNDEF, ! 1296: /* D31-D24 */ TME_BUS_LANE_UNDEF, ! 1297: ! 1298: /* initiator maximum cycle size: 16 bits ! 1299: initiator address offset: 16 bits ! 1300: responder bus port size: 16 bits ! 1301: responder port least lane: D7-D0: */ ! 1302: /* D7-D0 */ TME_BUS_LANE_ROUTE(1), ! 1303: /* D15-D8 */ TME_BUS_LANE_ROUTE(0), ! 1304: /* D23-D16 */ TME_BUS_LANE_UNDEF, ! 1305: /* D31-D24 */ TME_BUS_LANE_UNDEF, ! 1306: ! 1307: /* initiator maximum cycle size: 16 bits ! 1308: initiator address offset: 16 bits ! 1309: responder bus port size: 16 bits ! 1310: responder port least lane: D15-D8: */ ! 1311: /* D7-D0 */ TME_BUS_LANE_ROUTE(1) | TME_BUS_LANE_WARN, ! 1312: /* D15-D8 */ TME_BUS_LANE_ROUTE(0), ! 1313: /* D23-D16 */ TME_BUS_LANE_UNDEF, ! 1314: /* D31-D24 */ TME_BUS_LANE_UNDEF, ! 1315: ! 1316: /* initiator maximum cycle size: 16 bits ! 1317: initiator address offset: 16 bits ! 1318: responder bus port size: 16 bits ! 1319: responder port least lane: D23-D16: */ ! 1320: /* D7-D0 */ TME_BUS_LANE_ROUTE(1) | TME_BUS_LANE_WARN, ! 1321: /* D15-D8 */ TME_BUS_LANE_ROUTE(0) | TME_BUS_LANE_WARN, ! 1322: /* D23-D16 */ TME_BUS_LANE_UNDEF, ! 1323: /* D31-D24 */ TME_BUS_LANE_UNDEF, ! 1324: ! 1325: /* initiator maximum cycle size: 16 bits ! 1326: initiator address offset: 16 bits ! 1327: responder bus port size: 16 bits ! 1328: responder port least lane: D31-D24 ! 1329: (responder port not correctly positioned for this initiator): */ ! 1330: /* D7-D0 */ TME_BUS_LANE_ROUTE(1) | TME_BUS_LANE_WARN, ! 1331: /* D15-D8 */ TME_BUS_LANE_ROUTE(0) | TME_BUS_LANE_WARN, ! 1332: /* D23-D16 */ TME_BUS_LANE_UNDEF, ! 1333: /* D31-D24 */ TME_BUS_LANE_UNDEF, ! 1334: ! 1335: /* initiator maximum cycle size: 16 bits ! 1336: initiator address offset: 16 bits ! 1337: responder bus port size: 32 bits ! 1338: responder port least lane: D7-D0: */ ! 1339: /* D7-D0 */ TME_BUS_LANE_ROUTE(1), ! 1340: /* D15-D8 */ TME_BUS_LANE_ROUTE(0), ! 1341: /* D23-D16 */ TME_BUS_LANE_UNDEF, ! 1342: /* D31-D24 */ TME_BUS_LANE_UNDEF, ! 1343: ! 1344: /* initiator maximum cycle size: 16 bits ! 1345: initiator address offset: 16 bits ! 1346: responder bus port size: 32 bits ! 1347: responder port least lane: D15-D8 ! 1348: (responder port not correctly positioned for this initiator): */ ! 1349: /* D7-D0 */ TME_BUS_LANE_ROUTE(1) | TME_BUS_LANE_WARN, ! 1350: /* D15-D8 */ TME_BUS_LANE_ROUTE(0), ! 1351: /* D23-D16 */ TME_BUS_LANE_UNDEF, ! 1352: /* D31-D24 */ TME_BUS_LANE_UNDEF, ! 1353: ! 1354: /* initiator maximum cycle size: 16 bits ! 1355: initiator address offset: 16 bits ! 1356: responder bus port size: 32 bits ! 1357: responder port least lane: D23-D16 ! 1358: (responder port not correctly positioned for this initiator): */ ! 1359: /* D7-D0 */ TME_BUS_LANE_ROUTE(1) | TME_BUS_LANE_WARN, ! 1360: /* D15-D8 */ TME_BUS_LANE_ROUTE(0) | TME_BUS_LANE_WARN, ! 1361: /* D23-D16 */ TME_BUS_LANE_UNDEF, ! 1362: /* D31-D24 */ TME_BUS_LANE_UNDEF, ! 1363: ! 1364: /* initiator maximum cycle size: 16 bits ! 1365: initiator address offset: 16 bits ! 1366: responder bus port size: 32 bits ! 1367: responder port least lane: D31-D24 ! 1368: (responder port not correctly positioned for this initiator): */ ! 1369: /* D7-D0 */ TME_BUS_LANE_ROUTE(1) | TME_BUS_LANE_WARN, ! 1370: /* D15-D8 */ TME_BUS_LANE_ROUTE(0) | TME_BUS_LANE_WARN, ! 1371: /* D23-D16 */ TME_BUS_LANE_UNDEF, ! 1372: /* D31-D24 */ TME_BUS_LANE_UNDEF, ! 1373: ! 1374: /* initiator maximum cycle size: 16 bits ! 1375: initiator address offset: 24 bits ! 1376: (a 32-bit initiator cannot request 16 bits at an 24-bit offset - this is an array placeholder) ! 1377: responder bus port size: 8 bits ! 1378: responder port least lane: D7-D0: */ ! 1379: /* D7-D0 */ TME_BUS_LANE_ABORT, ! 1380: /* D15-D8 */ TME_BUS_LANE_ABORT, ! 1381: /* D23-D16 */ TME_BUS_LANE_ABORT, ! 1382: /* D31-D24 */ TME_BUS_LANE_ABORT, ! 1383: ! 1384: /* initiator maximum cycle size: 16 bits ! 1385: initiator address offset: 24 bits ! 1386: (a 32-bit initiator cannot request 16 bits at an 24-bit offset - this is an array placeholder) ! 1387: responder bus port size: 8 bits ! 1388: responder port least lane: D15-D8: */ ! 1389: /* D7-D0 */ TME_BUS_LANE_ABORT, ! 1390: /* D15-D8 */ TME_BUS_LANE_ABORT, ! 1391: /* D23-D16 */ TME_BUS_LANE_ABORT, ! 1392: /* D31-D24 */ TME_BUS_LANE_ABORT, ! 1393: ! 1394: /* initiator maximum cycle size: 16 bits ! 1395: initiator address offset: 24 bits ! 1396: (a 32-bit initiator cannot request 16 bits at an 24-bit offset - this is an array placeholder) ! 1397: responder bus port size: 8 bits ! 1398: responder port least lane: D23-D16: */ ! 1399: /* D7-D0 */ TME_BUS_LANE_ABORT, ! 1400: /* D15-D8 */ TME_BUS_LANE_ABORT, ! 1401: /* D23-D16 */ TME_BUS_LANE_ABORT, ! 1402: /* D31-D24 */ TME_BUS_LANE_ABORT, ! 1403: ! 1404: /* initiator maximum cycle size: 16 bits ! 1405: initiator address offset: 24 bits ! 1406: (a 32-bit initiator cannot request 16 bits at an 24-bit offset - this is an array placeholder) ! 1407: responder bus port size: 8 bits ! 1408: responder port least lane: D31-D24: */ ! 1409: /* D7-D0 */ TME_BUS_LANE_ABORT, ! 1410: /* D15-D8 */ TME_BUS_LANE_ABORT, ! 1411: /* D23-D16 */ TME_BUS_LANE_ABORT, ! 1412: /* D31-D24 */ TME_BUS_LANE_ABORT, ! 1413: ! 1414: /* initiator maximum cycle size: 16 bits ! 1415: initiator address offset: 24 bits ! 1416: (a 32-bit initiator cannot request 16 bits at an 24-bit offset - this is an array placeholder) ! 1417: responder bus port size: 16 bits ! 1418: responder port least lane: D7-D0: */ ! 1419: /* D7-D0 */ TME_BUS_LANE_ABORT, ! 1420: /* D15-D8 */ TME_BUS_LANE_ABORT, ! 1421: /* D23-D16 */ TME_BUS_LANE_ABORT, ! 1422: /* D31-D24 */ TME_BUS_LANE_ABORT, ! 1423: ! 1424: /* initiator maximum cycle size: 16 bits ! 1425: initiator address offset: 24 bits ! 1426: (a 32-bit initiator cannot request 16 bits at an 24-bit offset - this is an array placeholder) ! 1427: responder bus port size: 16 bits ! 1428: responder port least lane: D15-D8: */ ! 1429: /* D7-D0 */ TME_BUS_LANE_ABORT, ! 1430: /* D15-D8 */ TME_BUS_LANE_ABORT, ! 1431: /* D23-D16 */ TME_BUS_LANE_ABORT, ! 1432: /* D31-D24 */ TME_BUS_LANE_ABORT, ! 1433: ! 1434: /* initiator maximum cycle size: 16 bits ! 1435: initiator address offset: 24 bits ! 1436: (a 32-bit initiator cannot request 16 bits at an 24-bit offset - this is an array placeholder) ! 1437: responder bus port size: 16 bits ! 1438: responder port least lane: D23-D16: */ ! 1439: /* D7-D0 */ TME_BUS_LANE_ABORT, ! 1440: /* D15-D8 */ TME_BUS_LANE_ABORT, ! 1441: /* D23-D16 */ TME_BUS_LANE_ABORT, ! 1442: /* D31-D24 */ TME_BUS_LANE_ABORT, ! 1443: ! 1444: /* initiator maximum cycle size: 16 bits ! 1445: initiator address offset: 24 bits ! 1446: (a 32-bit initiator cannot request 16 bits at an 24-bit offset - this is an array placeholder) ! 1447: responder bus port size: 16 bits ! 1448: responder port least lane: D31-D24 ! 1449: (responder port not correctly positioned for this initiator): */ ! 1450: /* D7-D0 */ TME_BUS_LANE_ABORT, ! 1451: /* D15-D8 */ TME_BUS_LANE_ABORT, ! 1452: /* D23-D16 */ TME_BUS_LANE_ABORT, ! 1453: /* D31-D24 */ TME_BUS_LANE_ABORT, ! 1454: ! 1455: /* initiator maximum cycle size: 16 bits ! 1456: initiator address offset: 24 bits ! 1457: (a 32-bit initiator cannot request 16 bits at an 24-bit offset - this is an array placeholder) ! 1458: responder bus port size: 32 bits ! 1459: responder port least lane: D7-D0: */ ! 1460: /* D7-D0 */ TME_BUS_LANE_ABORT, ! 1461: /* D15-D8 */ TME_BUS_LANE_ABORT, ! 1462: /* D23-D16 */ TME_BUS_LANE_ABORT, ! 1463: /* D31-D24 */ TME_BUS_LANE_ABORT, ! 1464: ! 1465: /* initiator maximum cycle size: 16 bits ! 1466: initiator address offset: 24 bits ! 1467: (a 32-bit initiator cannot request 16 bits at an 24-bit offset - this is an array placeholder) ! 1468: responder bus port size: 32 bits ! 1469: responder port least lane: D15-D8 ! 1470: (responder port not correctly positioned for this initiator): */ ! 1471: /* D7-D0 */ TME_BUS_LANE_ABORT, ! 1472: /* D15-D8 */ TME_BUS_LANE_ABORT, ! 1473: /* D23-D16 */ TME_BUS_LANE_ABORT, ! 1474: /* D31-D24 */ TME_BUS_LANE_ABORT, ! 1475: ! 1476: /* initiator maximum cycle size: 16 bits ! 1477: initiator address offset: 24 bits ! 1478: (a 32-bit initiator cannot request 16 bits at an 24-bit offset - this is an array placeholder) ! 1479: responder bus port size: 32 bits ! 1480: responder port least lane: D23-D16 ! 1481: (responder port not correctly positioned for this initiator): */ ! 1482: /* D7-D0 */ TME_BUS_LANE_ABORT, ! 1483: /* D15-D8 */ TME_BUS_LANE_ABORT, ! 1484: /* D23-D16 */ TME_BUS_LANE_ABORT, ! 1485: /* D31-D24 */ TME_BUS_LANE_ABORT, ! 1486: ! 1487: /* initiator maximum cycle size: 16 bits ! 1488: initiator address offset: 24 bits ! 1489: (a 32-bit initiator cannot request 16 bits at an 24-bit offset - this is an array placeholder) ! 1490: responder bus port size: 32 bits ! 1491: responder port least lane: D31-D24 ! 1492: (responder port not correctly positioned for this initiator): */ ! 1493: /* D7-D0 */ TME_BUS_LANE_ABORT, ! 1494: /* D15-D8 */ TME_BUS_LANE_ABORT, ! 1495: /* D23-D16 */ TME_BUS_LANE_ABORT, ! 1496: /* D31-D24 */ TME_BUS_LANE_ABORT, ! 1497: ! 1498: /* initiator maximum cycle size: 24 bits ! 1499: initiator address offset: 0 bits ! 1500: responder bus port size: 8 bits ! 1501: responder port least lane: D7-D0: */ ! 1502: /* D7-D0 */ TME_BUS_LANE_UNDEF, ! 1503: /* D15-D8 */ TME_BUS_LANE_ROUTE(2) | TME_BUS_LANE_WARN, ! 1504: /* D23-D16 */ TME_BUS_LANE_ROUTE(1) | TME_BUS_LANE_WARN, ! 1505: /* D31-D24 */ TME_BUS_LANE_ROUTE(0) | TME_BUS_LANE_WARN, ! 1506: ! 1507: /* initiator maximum cycle size: 24 bits ! 1508: initiator address offset: 0 bits ! 1509: responder bus port size: 8 bits ! 1510: responder port least lane: D15-D8: */ ! 1511: /* D7-D0 */ TME_BUS_LANE_UNDEF, ! 1512: /* D15-D8 */ TME_BUS_LANE_ROUTE(2), ! 1513: /* D23-D16 */ TME_BUS_LANE_ROUTE(1) | TME_BUS_LANE_WARN, ! 1514: /* D31-D24 */ TME_BUS_LANE_ROUTE(0) | TME_BUS_LANE_WARN, ! 1515: ! 1516: /* initiator maximum cycle size: 24 bits ! 1517: initiator address offset: 0 bits ! 1518: responder bus port size: 8 bits ! 1519: responder port least lane: D23-D16: */ ! 1520: /* D7-D0 */ TME_BUS_LANE_UNDEF, ! 1521: /* D15-D8 */ TME_BUS_LANE_ROUTE(2) | TME_BUS_LANE_WARN, ! 1522: /* D23-D16 */ TME_BUS_LANE_ROUTE(1), ! 1523: /* D31-D24 */ TME_BUS_LANE_ROUTE(0) | TME_BUS_LANE_WARN, ! 1524: ! 1525: /* initiator maximum cycle size: 24 bits ! 1526: initiator address offset: 0 bits ! 1527: responder bus port size: 8 bits ! 1528: responder port least lane: D31-D24: */ ! 1529: /* D7-D0 */ TME_BUS_LANE_UNDEF, ! 1530: /* D15-D8 */ TME_BUS_LANE_ROUTE(2) | TME_BUS_LANE_WARN, ! 1531: /* D23-D16 */ TME_BUS_LANE_ROUTE(1) | TME_BUS_LANE_WARN, ! 1532: /* D31-D24 */ TME_BUS_LANE_ROUTE(0), ! 1533: ! 1534: /* initiator maximum cycle size: 24 bits ! 1535: initiator address offset: 0 bits ! 1536: responder bus port size: 16 bits ! 1537: responder port least lane: D7-D0: */ ! 1538: /* D7-D0 */ TME_BUS_LANE_UNDEF, ! 1539: /* D15-D8 */ TME_BUS_LANE_ROUTE(2), ! 1540: /* D23-D16 */ TME_BUS_LANE_ROUTE(1) | TME_BUS_LANE_WARN, ! 1541: /* D31-D24 */ TME_BUS_LANE_ROUTE(0) | TME_BUS_LANE_WARN, ! 1542: ! 1543: /* initiator maximum cycle size: 24 bits ! 1544: initiator address offset: 0 bits ! 1545: responder bus port size: 16 bits ! 1546: responder port least lane: D15-D8: */ ! 1547: /* D7-D0 */ TME_BUS_LANE_UNDEF, ! 1548: /* D15-D8 */ TME_BUS_LANE_ROUTE(2), ! 1549: /* D23-D16 */ TME_BUS_LANE_ROUTE(1), ! 1550: /* D31-D24 */ TME_BUS_LANE_ROUTE(0) | TME_BUS_LANE_WARN, ! 1551: ! 1552: /* initiator maximum cycle size: 24 bits ! 1553: initiator address offset: 0 bits ! 1554: responder bus port size: 16 bits ! 1555: responder port least lane: D23-D16: */ ! 1556: /* D7-D0 */ TME_BUS_LANE_UNDEF, ! 1557: /* D15-D8 */ TME_BUS_LANE_ROUTE(2) | TME_BUS_LANE_WARN, ! 1558: /* D23-D16 */ TME_BUS_LANE_ROUTE(1), ! 1559: /* D31-D24 */ TME_BUS_LANE_ROUTE(0), ! 1560: ! 1561: /* initiator maximum cycle size: 24 bits ! 1562: initiator address offset: 0 bits ! 1563: responder bus port size: 16 bits ! 1564: responder port least lane: D31-D24 ! 1565: (responder port not correctly positioned for this initiator): */ ! 1566: /* D7-D0 */ TME_BUS_LANE_UNDEF, ! 1567: /* D15-D8 */ TME_BUS_LANE_ROUTE(2) | TME_BUS_LANE_WARN, ! 1568: /* D23-D16 */ TME_BUS_LANE_ROUTE(1) | TME_BUS_LANE_WARN, ! 1569: /* D31-D24 */ TME_BUS_LANE_ROUTE(0), ! 1570: ! 1571: /* initiator maximum cycle size: 24 bits ! 1572: initiator address offset: 0 bits ! 1573: responder bus port size: 32 bits ! 1574: responder port least lane: D7-D0: */ ! 1575: /* D7-D0 */ TME_BUS_LANE_UNDEF, ! 1576: /* D15-D8 */ TME_BUS_LANE_ROUTE(2), ! 1577: /* D23-D16 */ TME_BUS_LANE_ROUTE(1), ! 1578: /* D31-D24 */ TME_BUS_LANE_ROUTE(0), ! 1579: ! 1580: /* initiator maximum cycle size: 24 bits ! 1581: initiator address offset: 0 bits ! 1582: responder bus port size: 32 bits ! 1583: responder port least lane: D15-D8 ! 1584: (responder port not correctly positioned for this initiator): */ ! 1585: /* D7-D0 */ TME_BUS_LANE_UNDEF, ! 1586: /* D15-D8 */ TME_BUS_LANE_ROUTE(2), ! 1587: /* D23-D16 */ TME_BUS_LANE_ROUTE(1), ! 1588: /* D31-D24 */ TME_BUS_LANE_ROUTE(0), ! 1589: ! 1590: /* initiator maximum cycle size: 24 bits ! 1591: initiator address offset: 0 bits ! 1592: responder bus port size: 32 bits ! 1593: responder port least lane: D23-D16 ! 1594: (responder port not correctly positioned for this initiator): */ ! 1595: /* D7-D0 */ TME_BUS_LANE_UNDEF, ! 1596: /* D15-D8 */ TME_BUS_LANE_ROUTE(2) | TME_BUS_LANE_WARN, ! 1597: /* D23-D16 */ TME_BUS_LANE_ROUTE(1), ! 1598: /* D31-D24 */ TME_BUS_LANE_ROUTE(0), ! 1599: ! 1600: /* initiator maximum cycle size: 24 bits ! 1601: initiator address offset: 0 bits ! 1602: responder bus port size: 32 bits ! 1603: responder port least lane: D31-D24 ! 1604: (responder port not correctly positioned for this initiator): */ ! 1605: /* D7-D0 */ TME_BUS_LANE_UNDEF, ! 1606: /* D15-D8 */ TME_BUS_LANE_ROUTE(2) | TME_BUS_LANE_WARN, ! 1607: /* D23-D16 */ TME_BUS_LANE_ROUTE(1) | TME_BUS_LANE_WARN, ! 1608: /* D31-D24 */ TME_BUS_LANE_ROUTE(0), ! 1609: ! 1610: /* initiator maximum cycle size: 24 bits ! 1611: initiator address offset: 8 bits ! 1612: responder bus port size: 8 bits ! 1613: responder port least lane: D7-D0: */ ! 1614: /* D7-D0 */ TME_BUS_LANE_ROUTE(2), ! 1615: /* D15-D8 */ TME_BUS_LANE_ROUTE(1) | TME_BUS_LANE_WARN, ! 1616: /* D23-D16 */ TME_BUS_LANE_ROUTE(0) | TME_BUS_LANE_WARN, ! 1617: /* D31-D24 */ TME_BUS_LANE_UNDEF, ! 1618: ! 1619: /* initiator maximum cycle size: 24 bits ! 1620: initiator address offset: 8 bits ! 1621: responder bus port size: 8 bits ! 1622: responder port least lane: D15-D8: */ ! 1623: /* D7-D0 */ TME_BUS_LANE_ROUTE(2) | TME_BUS_LANE_WARN, ! 1624: /* D15-D8 */ TME_BUS_LANE_ROUTE(1), ! 1625: /* D23-D16 */ TME_BUS_LANE_ROUTE(0) | TME_BUS_LANE_WARN, ! 1626: /* D31-D24 */ TME_BUS_LANE_UNDEF, ! 1627: ! 1628: /* initiator maximum cycle size: 24 bits ! 1629: initiator address offset: 8 bits ! 1630: responder bus port size: 8 bits ! 1631: responder port least lane: D23-D16: */ ! 1632: /* D7-D0 */ TME_BUS_LANE_ROUTE(2) | TME_BUS_LANE_WARN, ! 1633: /* D15-D8 */ TME_BUS_LANE_ROUTE(1) | TME_BUS_LANE_WARN, ! 1634: /* D23-D16 */ TME_BUS_LANE_ROUTE(0), ! 1635: /* D31-D24 */ TME_BUS_LANE_UNDEF, ! 1636: ! 1637: /* initiator maximum cycle size: 24 bits ! 1638: initiator address offset: 8 bits ! 1639: responder bus port size: 8 bits ! 1640: responder port least lane: D31-D24: */ ! 1641: /* D7-D0 */ TME_BUS_LANE_ROUTE(2) | TME_BUS_LANE_WARN, ! 1642: /* D15-D8 */ TME_BUS_LANE_ROUTE(1) | TME_BUS_LANE_WARN, ! 1643: /* D23-D16 */ TME_BUS_LANE_ROUTE(0) | TME_BUS_LANE_WARN, ! 1644: /* D31-D24 */ TME_BUS_LANE_UNDEF, ! 1645: ! 1646: /* initiator maximum cycle size: 24 bits ! 1647: initiator address offset: 8 bits ! 1648: responder bus port size: 16 bits ! 1649: responder port least lane: D7-D0: */ ! 1650: /* D7-D0 */ TME_BUS_LANE_ROUTE(2), ! 1651: /* D15-D8 */ TME_BUS_LANE_ROUTE(1), ! 1652: /* D23-D16 */ TME_BUS_LANE_ROUTE(0) | TME_BUS_LANE_WARN, ! 1653: /* D31-D24 */ TME_BUS_LANE_UNDEF, ! 1654: ! 1655: /* initiator maximum cycle size: 24 bits ! 1656: initiator address offset: 8 bits ! 1657: responder bus port size: 16 bits ! 1658: responder port least lane: D15-D8: */ ! 1659: /* D7-D0 */ TME_BUS_LANE_ROUTE(2) | TME_BUS_LANE_WARN, ! 1660: /* D15-D8 */ TME_BUS_LANE_ROUTE(1), ! 1661: /* D23-D16 */ TME_BUS_LANE_ROUTE(0), ! 1662: /* D31-D24 */ TME_BUS_LANE_UNDEF, ! 1663: ! 1664: /* initiator maximum cycle size: 24 bits ! 1665: initiator address offset: 8 bits ! 1666: responder bus port size: 16 bits ! 1667: responder port least lane: D23-D16: */ ! 1668: /* D7-D0 */ TME_BUS_LANE_ROUTE(2) | TME_BUS_LANE_WARN, ! 1669: /* D15-D8 */ TME_BUS_LANE_ROUTE(1) | TME_BUS_LANE_WARN, ! 1670: /* D23-D16 */ TME_BUS_LANE_ROUTE(0), ! 1671: /* D31-D24 */ TME_BUS_LANE_UNDEF, ! 1672: ! 1673: /* initiator maximum cycle size: 24 bits ! 1674: initiator address offset: 8 bits ! 1675: responder bus port size: 16 bits ! 1676: responder port least lane: D31-D24 ! 1677: (responder port not correctly positioned for this initiator): */ ! 1678: /* D7-D0 */ TME_BUS_LANE_ROUTE(2) | TME_BUS_LANE_WARN, ! 1679: /* D15-D8 */ TME_BUS_LANE_ROUTE(1) | TME_BUS_LANE_WARN, ! 1680: /* D23-D16 */ TME_BUS_LANE_ROUTE(0) | TME_BUS_LANE_WARN, ! 1681: /* D31-D24 */ TME_BUS_LANE_UNDEF, ! 1682: ! 1683: /* initiator maximum cycle size: 24 bits ! 1684: initiator address offset: 8 bits ! 1685: responder bus port size: 32 bits ! 1686: responder port least lane: D7-D0: */ ! 1687: /* D7-D0 */ TME_BUS_LANE_ROUTE(2), ! 1688: /* D15-D8 */ TME_BUS_LANE_ROUTE(1), ! 1689: /* D23-D16 */ TME_BUS_LANE_ROUTE(0), ! 1690: /* D31-D24 */ TME_BUS_LANE_UNDEF, ! 1691: ! 1692: /* initiator maximum cycle size: 24 bits ! 1693: initiator address offset: 8 bits ! 1694: responder bus port size: 32 bits ! 1695: responder port least lane: D15-D8 ! 1696: (responder port not correctly positioned for this initiator): */ ! 1697: /* D7-D0 */ TME_BUS_LANE_ROUTE(2) | TME_BUS_LANE_WARN, ! 1698: /* D15-D8 */ TME_BUS_LANE_ROUTE(1), ! 1699: /* D23-D16 */ TME_BUS_LANE_ROUTE(0), ! 1700: /* D31-D24 */ TME_BUS_LANE_UNDEF, ! 1701: ! 1702: /* initiator maximum cycle size: 24 bits ! 1703: initiator address offset: 8 bits ! 1704: responder bus port size: 32 bits ! 1705: responder port least lane: D23-D16 ! 1706: (responder port not correctly positioned for this initiator): */ ! 1707: /* D7-D0 */ TME_BUS_LANE_ROUTE(2) | TME_BUS_LANE_WARN, ! 1708: /* D15-D8 */ TME_BUS_LANE_ROUTE(1) | TME_BUS_LANE_WARN, ! 1709: /* D23-D16 */ TME_BUS_LANE_ROUTE(0), ! 1710: /* D31-D24 */ TME_BUS_LANE_UNDEF, ! 1711: ! 1712: /* initiator maximum cycle size: 24 bits ! 1713: initiator address offset: 8 bits ! 1714: responder bus port size: 32 bits ! 1715: responder port least lane: D31-D24 ! 1716: (responder port not correctly positioned for this initiator): */ ! 1717: /* D7-D0 */ TME_BUS_LANE_ROUTE(2) | TME_BUS_LANE_WARN, ! 1718: /* D15-D8 */ TME_BUS_LANE_ROUTE(1) | TME_BUS_LANE_WARN, ! 1719: /* D23-D16 */ TME_BUS_LANE_ROUTE(0) | TME_BUS_LANE_WARN, ! 1720: /* D31-D24 */ TME_BUS_LANE_UNDEF, ! 1721: ! 1722: /* initiator maximum cycle size: 24 bits ! 1723: initiator address offset: 16 bits ! 1724: (a 32-bit initiator cannot request 24 bits at an 16-bit offset - this is an array placeholder) ! 1725: responder bus port size: 8 bits ! 1726: responder port least lane: D7-D0: */ ! 1727: /* D7-D0 */ TME_BUS_LANE_ABORT, ! 1728: /* D15-D8 */ TME_BUS_LANE_ABORT, ! 1729: /* D23-D16 */ TME_BUS_LANE_ABORT, ! 1730: /* D31-D24 */ TME_BUS_LANE_ABORT, ! 1731: ! 1732: /* initiator maximum cycle size: 24 bits ! 1733: initiator address offset: 16 bits ! 1734: (a 32-bit initiator cannot request 24 bits at an 16-bit offset - this is an array placeholder) ! 1735: responder bus port size: 8 bits ! 1736: responder port least lane: D15-D8: */ ! 1737: /* D7-D0 */ TME_BUS_LANE_ABORT, ! 1738: /* D15-D8 */ TME_BUS_LANE_ABORT, ! 1739: /* D23-D16 */ TME_BUS_LANE_ABORT, ! 1740: /* D31-D24 */ TME_BUS_LANE_ABORT, ! 1741: ! 1742: /* initiator maximum cycle size: 24 bits ! 1743: initiator address offset: 16 bits ! 1744: (a 32-bit initiator cannot request 24 bits at an 16-bit offset - this is an array placeholder) ! 1745: responder bus port size: 8 bits ! 1746: responder port least lane: D23-D16: */ ! 1747: /* D7-D0 */ TME_BUS_LANE_ABORT, ! 1748: /* D15-D8 */ TME_BUS_LANE_ABORT, ! 1749: /* D23-D16 */ TME_BUS_LANE_ABORT, ! 1750: /* D31-D24 */ TME_BUS_LANE_ABORT, ! 1751: ! 1752: /* initiator maximum cycle size: 24 bits ! 1753: initiator address offset: 16 bits ! 1754: (a 32-bit initiator cannot request 24 bits at an 16-bit offset - this is an array placeholder) ! 1755: responder bus port size: 8 bits ! 1756: responder port least lane: D31-D24: */ ! 1757: /* D7-D0 */ TME_BUS_LANE_ABORT, ! 1758: /* D15-D8 */ TME_BUS_LANE_ABORT, ! 1759: /* D23-D16 */ TME_BUS_LANE_ABORT, ! 1760: /* D31-D24 */ TME_BUS_LANE_ABORT, ! 1761: ! 1762: /* initiator maximum cycle size: 24 bits ! 1763: initiator address offset: 16 bits ! 1764: (a 32-bit initiator cannot request 24 bits at an 16-bit offset - this is an array placeholder) ! 1765: responder bus port size: 16 bits ! 1766: responder port least lane: D7-D0: */ ! 1767: /* D7-D0 */ TME_BUS_LANE_ABORT, ! 1768: /* D15-D8 */ TME_BUS_LANE_ABORT, ! 1769: /* D23-D16 */ TME_BUS_LANE_ABORT, ! 1770: /* D31-D24 */ TME_BUS_LANE_ABORT, ! 1771: ! 1772: /* initiator maximum cycle size: 24 bits ! 1773: initiator address offset: 16 bits ! 1774: (a 32-bit initiator cannot request 24 bits at an 16-bit offset - this is an array placeholder) ! 1775: responder bus port size: 16 bits ! 1776: responder port least lane: D15-D8: */ ! 1777: /* D7-D0 */ TME_BUS_LANE_ABORT, ! 1778: /* D15-D8 */ TME_BUS_LANE_ABORT, ! 1779: /* D23-D16 */ TME_BUS_LANE_ABORT, ! 1780: /* D31-D24 */ TME_BUS_LANE_ABORT, ! 1781: ! 1782: /* initiator maximum cycle size: 24 bits ! 1783: initiator address offset: 16 bits ! 1784: (a 32-bit initiator cannot request 24 bits at an 16-bit offset - this is an array placeholder) ! 1785: responder bus port size: 16 bits ! 1786: responder port least lane: D23-D16: */ ! 1787: /* D7-D0 */ TME_BUS_LANE_ABORT, ! 1788: /* D15-D8 */ TME_BUS_LANE_ABORT, ! 1789: /* D23-D16 */ TME_BUS_LANE_ABORT, ! 1790: /* D31-D24 */ TME_BUS_LANE_ABORT, ! 1791: ! 1792: /* initiator maximum cycle size: 24 bits ! 1793: initiator address offset: 16 bits ! 1794: (a 32-bit initiator cannot request 24 bits at an 16-bit offset - this is an array placeholder) ! 1795: responder bus port size: 16 bits ! 1796: responder port least lane: D31-D24 ! 1797: (responder port not correctly positioned for this initiator): */ ! 1798: /* D7-D0 */ TME_BUS_LANE_ABORT, ! 1799: /* D15-D8 */ TME_BUS_LANE_ABORT, ! 1800: /* D23-D16 */ TME_BUS_LANE_ABORT, ! 1801: /* D31-D24 */ TME_BUS_LANE_ABORT, ! 1802: ! 1803: /* initiator maximum cycle size: 24 bits ! 1804: initiator address offset: 16 bits ! 1805: (a 32-bit initiator cannot request 24 bits at an 16-bit offset - this is an array placeholder) ! 1806: responder bus port size: 32 bits ! 1807: responder port least lane: D7-D0: */ ! 1808: /* D7-D0 */ TME_BUS_LANE_ABORT, ! 1809: /* D15-D8 */ TME_BUS_LANE_ABORT, ! 1810: /* D23-D16 */ TME_BUS_LANE_ABORT, ! 1811: /* D31-D24 */ TME_BUS_LANE_ABORT, ! 1812: ! 1813: /* initiator maximum cycle size: 24 bits ! 1814: initiator address offset: 16 bits ! 1815: (a 32-bit initiator cannot request 24 bits at an 16-bit offset - this is an array placeholder) ! 1816: responder bus port size: 32 bits ! 1817: responder port least lane: D15-D8 ! 1818: (responder port not correctly positioned for this initiator): */ ! 1819: /* D7-D0 */ TME_BUS_LANE_ABORT, ! 1820: /* D15-D8 */ TME_BUS_LANE_ABORT, ! 1821: /* D23-D16 */ TME_BUS_LANE_ABORT, ! 1822: /* D31-D24 */ TME_BUS_LANE_ABORT, ! 1823: ! 1824: /* initiator maximum cycle size: 24 bits ! 1825: initiator address offset: 16 bits ! 1826: (a 32-bit initiator cannot request 24 bits at an 16-bit offset - this is an array placeholder) ! 1827: responder bus port size: 32 bits ! 1828: responder port least lane: D23-D16 ! 1829: (responder port not correctly positioned for this initiator): */ ! 1830: /* D7-D0 */ TME_BUS_LANE_ABORT, ! 1831: /* D15-D8 */ TME_BUS_LANE_ABORT, ! 1832: /* D23-D16 */ TME_BUS_LANE_ABORT, ! 1833: /* D31-D24 */ TME_BUS_LANE_ABORT, ! 1834: ! 1835: /* initiator maximum cycle size: 24 bits ! 1836: initiator address offset: 16 bits ! 1837: (a 32-bit initiator cannot request 24 bits at an 16-bit offset - this is an array placeholder) ! 1838: responder bus port size: 32 bits ! 1839: responder port least lane: D31-D24 ! 1840: (responder port not correctly positioned for this initiator): */ ! 1841: /* D7-D0 */ TME_BUS_LANE_ABORT, ! 1842: /* D15-D8 */ TME_BUS_LANE_ABORT, ! 1843: /* D23-D16 */ TME_BUS_LANE_ABORT, ! 1844: /* D31-D24 */ TME_BUS_LANE_ABORT, ! 1845: ! 1846: /* initiator maximum cycle size: 24 bits ! 1847: initiator address offset: 24 bits ! 1848: (a 32-bit initiator cannot request 24 bits at an 24-bit offset - this is an array placeholder) ! 1849: responder bus port size: 8 bits ! 1850: responder port least lane: D7-D0: */ ! 1851: /* D7-D0 */ TME_BUS_LANE_ABORT, ! 1852: /* D15-D8 */ TME_BUS_LANE_ABORT, ! 1853: /* D23-D16 */ TME_BUS_LANE_ABORT, ! 1854: /* D31-D24 */ TME_BUS_LANE_ABORT, ! 1855: ! 1856: /* initiator maximum cycle size: 24 bits ! 1857: initiator address offset: 24 bits ! 1858: (a 32-bit initiator cannot request 24 bits at an 24-bit offset - this is an array placeholder) ! 1859: responder bus port size: 8 bits ! 1860: responder port least lane: D15-D8: */ ! 1861: /* D7-D0 */ TME_BUS_LANE_ABORT, ! 1862: /* D15-D8 */ TME_BUS_LANE_ABORT, ! 1863: /* D23-D16 */ TME_BUS_LANE_ABORT, ! 1864: /* D31-D24 */ TME_BUS_LANE_ABORT, ! 1865: ! 1866: /* initiator maximum cycle size: 24 bits ! 1867: initiator address offset: 24 bits ! 1868: (a 32-bit initiator cannot request 24 bits at an 24-bit offset - this is an array placeholder) ! 1869: responder bus port size: 8 bits ! 1870: responder port least lane: D23-D16: */ ! 1871: /* D7-D0 */ TME_BUS_LANE_ABORT, ! 1872: /* D15-D8 */ TME_BUS_LANE_ABORT, ! 1873: /* D23-D16 */ TME_BUS_LANE_ABORT, ! 1874: /* D31-D24 */ TME_BUS_LANE_ABORT, ! 1875: ! 1876: /* initiator maximum cycle size: 24 bits ! 1877: initiator address offset: 24 bits ! 1878: (a 32-bit initiator cannot request 24 bits at an 24-bit offset - this is an array placeholder) ! 1879: responder bus port size: 8 bits ! 1880: responder port least lane: D31-D24: */ ! 1881: /* D7-D0 */ TME_BUS_LANE_ABORT, ! 1882: /* D15-D8 */ TME_BUS_LANE_ABORT, ! 1883: /* D23-D16 */ TME_BUS_LANE_ABORT, ! 1884: /* D31-D24 */ TME_BUS_LANE_ABORT, ! 1885: ! 1886: /* initiator maximum cycle size: 24 bits ! 1887: initiator address offset: 24 bits ! 1888: (a 32-bit initiator cannot request 24 bits at an 24-bit offset - this is an array placeholder) ! 1889: responder bus port size: 16 bits ! 1890: responder port least lane: D7-D0: */ ! 1891: /* D7-D0 */ TME_BUS_LANE_ABORT, ! 1892: /* D15-D8 */ TME_BUS_LANE_ABORT, ! 1893: /* D23-D16 */ TME_BUS_LANE_ABORT, ! 1894: /* D31-D24 */ TME_BUS_LANE_ABORT, ! 1895: ! 1896: /* initiator maximum cycle size: 24 bits ! 1897: initiator address offset: 24 bits ! 1898: (a 32-bit initiator cannot request 24 bits at an 24-bit offset - this is an array placeholder) ! 1899: responder bus port size: 16 bits ! 1900: responder port least lane: D15-D8: */ ! 1901: /* D7-D0 */ TME_BUS_LANE_ABORT, ! 1902: /* D15-D8 */ TME_BUS_LANE_ABORT, ! 1903: /* D23-D16 */ TME_BUS_LANE_ABORT, ! 1904: /* D31-D24 */ TME_BUS_LANE_ABORT, ! 1905: ! 1906: /* initiator maximum cycle size: 24 bits ! 1907: initiator address offset: 24 bits ! 1908: (a 32-bit initiator cannot request 24 bits at an 24-bit offset - this is an array placeholder) ! 1909: responder bus port size: 16 bits ! 1910: responder port least lane: D23-D16: */ ! 1911: /* D7-D0 */ TME_BUS_LANE_ABORT, ! 1912: /* D15-D8 */ TME_BUS_LANE_ABORT, ! 1913: /* D23-D16 */ TME_BUS_LANE_ABORT, ! 1914: /* D31-D24 */ TME_BUS_LANE_ABORT, ! 1915: ! 1916: /* initiator maximum cycle size: 24 bits ! 1917: initiator address offset: 24 bits ! 1918: (a 32-bit initiator cannot request 24 bits at an 24-bit offset - this is an array placeholder) ! 1919: responder bus port size: 16 bits ! 1920: responder port least lane: D31-D24 ! 1921: (responder port not correctly positioned for this initiator): */ ! 1922: /* D7-D0 */ TME_BUS_LANE_ABORT, ! 1923: /* D15-D8 */ TME_BUS_LANE_ABORT, ! 1924: /* D23-D16 */ TME_BUS_LANE_ABORT, ! 1925: /* D31-D24 */ TME_BUS_LANE_ABORT, ! 1926: ! 1927: /* initiator maximum cycle size: 24 bits ! 1928: initiator address offset: 24 bits ! 1929: (a 32-bit initiator cannot request 24 bits at an 24-bit offset - this is an array placeholder) ! 1930: responder bus port size: 32 bits ! 1931: responder port least lane: D7-D0: */ ! 1932: /* D7-D0 */ TME_BUS_LANE_ABORT, ! 1933: /* D15-D8 */ TME_BUS_LANE_ABORT, ! 1934: /* D23-D16 */ TME_BUS_LANE_ABORT, ! 1935: /* D31-D24 */ TME_BUS_LANE_ABORT, ! 1936: ! 1937: /* initiator maximum cycle size: 24 bits ! 1938: initiator address offset: 24 bits ! 1939: (a 32-bit initiator cannot request 24 bits at an 24-bit offset - this is an array placeholder) ! 1940: responder bus port size: 32 bits ! 1941: responder port least lane: D15-D8 ! 1942: (responder port not correctly positioned for this initiator): */ ! 1943: /* D7-D0 */ TME_BUS_LANE_ABORT, ! 1944: /* D15-D8 */ TME_BUS_LANE_ABORT, ! 1945: /* D23-D16 */ TME_BUS_LANE_ABORT, ! 1946: /* D31-D24 */ TME_BUS_LANE_ABORT, ! 1947: ! 1948: /* initiator maximum cycle size: 24 bits ! 1949: initiator address offset: 24 bits ! 1950: (a 32-bit initiator cannot request 24 bits at an 24-bit offset - this is an array placeholder) ! 1951: responder bus port size: 32 bits ! 1952: responder port least lane: D23-D16 ! 1953: (responder port not correctly positioned for this initiator): */ ! 1954: /* D7-D0 */ TME_BUS_LANE_ABORT, ! 1955: /* D15-D8 */ TME_BUS_LANE_ABORT, ! 1956: /* D23-D16 */ TME_BUS_LANE_ABORT, ! 1957: /* D31-D24 */ TME_BUS_LANE_ABORT, ! 1958: ! 1959: /* initiator maximum cycle size: 24 bits ! 1960: initiator address offset: 24 bits ! 1961: (a 32-bit initiator cannot request 24 bits at an 24-bit offset - this is an array placeholder) ! 1962: responder bus port size: 32 bits ! 1963: responder port least lane: D31-D24 ! 1964: (responder port not correctly positioned for this initiator): */ ! 1965: /* D7-D0 */ TME_BUS_LANE_ABORT, ! 1966: /* D15-D8 */ TME_BUS_LANE_ABORT, ! 1967: /* D23-D16 */ TME_BUS_LANE_ABORT, ! 1968: /* D31-D24 */ TME_BUS_LANE_ABORT, ! 1969: ! 1970: /* initiator maximum cycle size: 32 bits ! 1971: initiator address offset: 0 bits ! 1972: responder bus port size: 8 bits ! 1973: responder port least lane: D7-D0: */ ! 1974: /* D7-D0 */ TME_BUS_LANE_ROUTE(3), ! 1975: /* D15-D8 */ TME_BUS_LANE_ROUTE(2) | TME_BUS_LANE_WARN, ! 1976: /* D23-D16 */ TME_BUS_LANE_ROUTE(1) | TME_BUS_LANE_WARN, ! 1977: /* D31-D24 */ TME_BUS_LANE_ROUTE(0) | TME_BUS_LANE_WARN, ! 1978: ! 1979: /* initiator maximum cycle size: 32 bits ! 1980: initiator address offset: 0 bits ! 1981: responder bus port size: 8 bits ! 1982: responder port least lane: D15-D8: */ ! 1983: /* D7-D0 */ TME_BUS_LANE_ROUTE(3) | TME_BUS_LANE_WARN, ! 1984: /* D15-D8 */ TME_BUS_LANE_ROUTE(2), ! 1985: /* D23-D16 */ TME_BUS_LANE_ROUTE(1) | TME_BUS_LANE_WARN, ! 1986: /* D31-D24 */ TME_BUS_LANE_ROUTE(0) | TME_BUS_LANE_WARN, ! 1987: ! 1988: /* initiator maximum cycle size: 32 bits ! 1989: initiator address offset: 0 bits ! 1990: responder bus port size: 8 bits ! 1991: responder port least lane: D23-D16: */ ! 1992: /* D7-D0 */ TME_BUS_LANE_ROUTE(3) | TME_BUS_LANE_WARN, ! 1993: /* D15-D8 */ TME_BUS_LANE_ROUTE(2) | TME_BUS_LANE_WARN, ! 1994: /* D23-D16 */ TME_BUS_LANE_ROUTE(1), ! 1995: /* D31-D24 */ TME_BUS_LANE_ROUTE(0) | TME_BUS_LANE_WARN, ! 1996: ! 1997: /* initiator maximum cycle size: 32 bits ! 1998: initiator address offset: 0 bits ! 1999: responder bus port size: 8 bits ! 2000: responder port least lane: D31-D24: */ ! 2001: /* D7-D0 */ TME_BUS_LANE_ROUTE(3) | TME_BUS_LANE_WARN, ! 2002: /* D15-D8 */ TME_BUS_LANE_ROUTE(2) | TME_BUS_LANE_WARN, ! 2003: /* D23-D16 */ TME_BUS_LANE_ROUTE(1) | TME_BUS_LANE_WARN, ! 2004: /* D31-D24 */ TME_BUS_LANE_ROUTE(0), ! 2005: ! 2006: /* initiator maximum cycle size: 32 bits ! 2007: initiator address offset: 0 bits ! 2008: responder bus port size: 16 bits ! 2009: responder port least lane: D7-D0: */ ! 2010: /* D7-D0 */ TME_BUS_LANE_ROUTE(3), ! 2011: /* D15-D8 */ TME_BUS_LANE_ROUTE(2), ! 2012: /* D23-D16 */ TME_BUS_LANE_ROUTE(1) | TME_BUS_LANE_WARN, ! 2013: /* D31-D24 */ TME_BUS_LANE_ROUTE(0) | TME_BUS_LANE_WARN, ! 2014: ! 2015: /* initiator maximum cycle size: 32 bits ! 2016: initiator address offset: 0 bits ! 2017: responder bus port size: 16 bits ! 2018: responder port least lane: D15-D8: */ ! 2019: /* D7-D0 */ TME_BUS_LANE_ROUTE(3) | TME_BUS_LANE_WARN, ! 2020: /* D15-D8 */ TME_BUS_LANE_ROUTE(2), ! 2021: /* D23-D16 */ TME_BUS_LANE_ROUTE(1), ! 2022: /* D31-D24 */ TME_BUS_LANE_ROUTE(0) | TME_BUS_LANE_WARN, ! 2023: ! 2024: /* initiator maximum cycle size: 32 bits ! 2025: initiator address offset: 0 bits ! 2026: responder bus port size: 16 bits ! 2027: responder port least lane: D23-D16: */ ! 2028: /* D7-D0 */ TME_BUS_LANE_ROUTE(3) | TME_BUS_LANE_WARN, ! 2029: /* D15-D8 */ TME_BUS_LANE_ROUTE(2) | TME_BUS_LANE_WARN, ! 2030: /* D23-D16 */ TME_BUS_LANE_ROUTE(1), ! 2031: /* D31-D24 */ TME_BUS_LANE_ROUTE(0), ! 2032: ! 2033: /* initiator maximum cycle size: 32 bits ! 2034: initiator address offset: 0 bits ! 2035: responder bus port size: 16 bits ! 2036: responder port least lane: D31-D24 ! 2037: (responder port not correctly positioned for this initiator): */ ! 2038: /* D7-D0 */ TME_BUS_LANE_ROUTE(3) | TME_BUS_LANE_WARN, ! 2039: /* D15-D8 */ TME_BUS_LANE_ROUTE(2) | TME_BUS_LANE_WARN, ! 2040: /* D23-D16 */ TME_BUS_LANE_ROUTE(1) | TME_BUS_LANE_WARN, ! 2041: /* D31-D24 */ TME_BUS_LANE_ROUTE(0), ! 2042: ! 2043: /* initiator maximum cycle size: 32 bits ! 2044: initiator address offset: 0 bits ! 2045: responder bus port size: 32 bits ! 2046: responder port least lane: D7-D0: */ ! 2047: /* D7-D0 */ TME_BUS_LANE_ROUTE(3), ! 2048: /* D15-D8 */ TME_BUS_LANE_ROUTE(2), ! 2049: /* D23-D16 */ TME_BUS_LANE_ROUTE(1), ! 2050: /* D31-D24 */ TME_BUS_LANE_ROUTE(0), ! 2051: ! 2052: /* initiator maximum cycle size: 32 bits ! 2053: initiator address offset: 0 bits ! 2054: responder bus port size: 32 bits ! 2055: responder port least lane: D15-D8 ! 2056: (responder port not correctly positioned for this initiator): */ ! 2057: /* D7-D0 */ TME_BUS_LANE_ROUTE(3) | TME_BUS_LANE_WARN, ! 2058: /* D15-D8 */ TME_BUS_LANE_ROUTE(2), ! 2059: /* D23-D16 */ TME_BUS_LANE_ROUTE(1), ! 2060: /* D31-D24 */ TME_BUS_LANE_ROUTE(0), ! 2061: ! 2062: /* initiator maximum cycle size: 32 bits ! 2063: initiator address offset: 0 bits ! 2064: responder bus port size: 32 bits ! 2065: responder port least lane: D23-D16 ! 2066: (responder port not correctly positioned for this initiator): */ ! 2067: /* D7-D0 */ TME_BUS_LANE_ROUTE(3) | TME_BUS_LANE_WARN, ! 2068: /* D15-D8 */ TME_BUS_LANE_ROUTE(2) | TME_BUS_LANE_WARN, ! 2069: /* D23-D16 */ TME_BUS_LANE_ROUTE(1), ! 2070: /* D31-D24 */ TME_BUS_LANE_ROUTE(0), ! 2071: ! 2072: /* initiator maximum cycle size: 32 bits ! 2073: initiator address offset: 0 bits ! 2074: responder bus port size: 32 bits ! 2075: responder port least lane: D31-D24 ! 2076: (responder port not correctly positioned for this initiator): */ ! 2077: /* D7-D0 */ TME_BUS_LANE_ROUTE(3) | TME_BUS_LANE_WARN, ! 2078: /* D15-D8 */ TME_BUS_LANE_ROUTE(2) | TME_BUS_LANE_WARN, ! 2079: /* D23-D16 */ TME_BUS_LANE_ROUTE(1) | TME_BUS_LANE_WARN, ! 2080: /* D31-D24 */ TME_BUS_LANE_ROUTE(0), ! 2081: ! 2082: /* initiator maximum cycle size: 32 bits ! 2083: initiator address offset: 8 bits ! 2084: (a 32-bit initiator cannot request 32 bits at an 8-bit offset - this is an array placeholder) ! 2085: responder bus port size: 8 bits ! 2086: responder port least lane: D7-D0: */ ! 2087: /* D7-D0 */ TME_BUS_LANE_ABORT, ! 2088: /* D15-D8 */ TME_BUS_LANE_ABORT, ! 2089: /* D23-D16 */ TME_BUS_LANE_ABORT, ! 2090: /* D31-D24 */ TME_BUS_LANE_ABORT, ! 2091: ! 2092: /* initiator maximum cycle size: 32 bits ! 2093: initiator address offset: 8 bits ! 2094: (a 32-bit initiator cannot request 32 bits at an 8-bit offset - this is an array placeholder) ! 2095: responder bus port size: 8 bits ! 2096: responder port least lane: D15-D8: */ ! 2097: /* D7-D0 */ TME_BUS_LANE_ABORT, ! 2098: /* D15-D8 */ TME_BUS_LANE_ABORT, ! 2099: /* D23-D16 */ TME_BUS_LANE_ABORT, ! 2100: /* D31-D24 */ TME_BUS_LANE_ABORT, ! 2101: ! 2102: /* initiator maximum cycle size: 32 bits ! 2103: initiator address offset: 8 bits ! 2104: (a 32-bit initiator cannot request 32 bits at an 8-bit offset - this is an array placeholder) ! 2105: responder bus port size: 8 bits ! 2106: responder port least lane: D23-D16: */ ! 2107: /* D7-D0 */ TME_BUS_LANE_ABORT, ! 2108: /* D15-D8 */ TME_BUS_LANE_ABORT, ! 2109: /* D23-D16 */ TME_BUS_LANE_ABORT, ! 2110: /* D31-D24 */ TME_BUS_LANE_ABORT, ! 2111: ! 2112: /* initiator maximum cycle size: 32 bits ! 2113: initiator address offset: 8 bits ! 2114: (a 32-bit initiator cannot request 32 bits at an 8-bit offset - this is an array placeholder) ! 2115: responder bus port size: 8 bits ! 2116: responder port least lane: D31-D24: */ ! 2117: /* D7-D0 */ TME_BUS_LANE_ABORT, ! 2118: /* D15-D8 */ TME_BUS_LANE_ABORT, ! 2119: /* D23-D16 */ TME_BUS_LANE_ABORT, ! 2120: /* D31-D24 */ TME_BUS_LANE_ABORT, ! 2121: ! 2122: /* initiator maximum cycle size: 32 bits ! 2123: initiator address offset: 8 bits ! 2124: (a 32-bit initiator cannot request 32 bits at an 8-bit offset - this is an array placeholder) ! 2125: responder bus port size: 16 bits ! 2126: responder port least lane: D7-D0: */ ! 2127: /* D7-D0 */ TME_BUS_LANE_ABORT, ! 2128: /* D15-D8 */ TME_BUS_LANE_ABORT, ! 2129: /* D23-D16 */ TME_BUS_LANE_ABORT, ! 2130: /* D31-D24 */ TME_BUS_LANE_ABORT, ! 2131: ! 2132: /* initiator maximum cycle size: 32 bits ! 2133: initiator address offset: 8 bits ! 2134: (a 32-bit initiator cannot request 32 bits at an 8-bit offset - this is an array placeholder) ! 2135: responder bus port size: 16 bits ! 2136: responder port least lane: D15-D8: */ ! 2137: /* D7-D0 */ TME_BUS_LANE_ABORT, ! 2138: /* D15-D8 */ TME_BUS_LANE_ABORT, ! 2139: /* D23-D16 */ TME_BUS_LANE_ABORT, ! 2140: /* D31-D24 */ TME_BUS_LANE_ABORT, ! 2141: ! 2142: /* initiator maximum cycle size: 32 bits ! 2143: initiator address offset: 8 bits ! 2144: (a 32-bit initiator cannot request 32 bits at an 8-bit offset - this is an array placeholder) ! 2145: responder bus port size: 16 bits ! 2146: responder port least lane: D23-D16: */ ! 2147: /* D7-D0 */ TME_BUS_LANE_ABORT, ! 2148: /* D15-D8 */ TME_BUS_LANE_ABORT, ! 2149: /* D23-D16 */ TME_BUS_LANE_ABORT, ! 2150: /* D31-D24 */ TME_BUS_LANE_ABORT, ! 2151: ! 2152: /* initiator maximum cycle size: 32 bits ! 2153: initiator address offset: 8 bits ! 2154: (a 32-bit initiator cannot request 32 bits at an 8-bit offset - this is an array placeholder) ! 2155: responder bus port size: 16 bits ! 2156: responder port least lane: D31-D24 ! 2157: (responder port not correctly positioned for this initiator): */ ! 2158: /* D7-D0 */ TME_BUS_LANE_ABORT, ! 2159: /* D15-D8 */ TME_BUS_LANE_ABORT, ! 2160: /* D23-D16 */ TME_BUS_LANE_ABORT, ! 2161: /* D31-D24 */ TME_BUS_LANE_ABORT, ! 2162: ! 2163: /* initiator maximum cycle size: 32 bits ! 2164: initiator address offset: 8 bits ! 2165: (a 32-bit initiator cannot request 32 bits at an 8-bit offset - this is an array placeholder) ! 2166: responder bus port size: 32 bits ! 2167: responder port least lane: D7-D0: */ ! 2168: /* D7-D0 */ TME_BUS_LANE_ABORT, ! 2169: /* D15-D8 */ TME_BUS_LANE_ABORT, ! 2170: /* D23-D16 */ TME_BUS_LANE_ABORT, ! 2171: /* D31-D24 */ TME_BUS_LANE_ABORT, ! 2172: ! 2173: /* initiator maximum cycle size: 32 bits ! 2174: initiator address offset: 8 bits ! 2175: (a 32-bit initiator cannot request 32 bits at an 8-bit offset - this is an array placeholder) ! 2176: responder bus port size: 32 bits ! 2177: responder port least lane: D15-D8 ! 2178: (responder port not correctly positioned for this initiator): */ ! 2179: /* D7-D0 */ TME_BUS_LANE_ABORT, ! 2180: /* D15-D8 */ TME_BUS_LANE_ABORT, ! 2181: /* D23-D16 */ TME_BUS_LANE_ABORT, ! 2182: /* D31-D24 */ TME_BUS_LANE_ABORT, ! 2183: ! 2184: /* initiator maximum cycle size: 32 bits ! 2185: initiator address offset: 8 bits ! 2186: (a 32-bit initiator cannot request 32 bits at an 8-bit offset - this is an array placeholder) ! 2187: responder bus port size: 32 bits ! 2188: responder port least lane: D23-D16 ! 2189: (responder port not correctly positioned for this initiator): */ ! 2190: /* D7-D0 */ TME_BUS_LANE_ABORT, ! 2191: /* D15-D8 */ TME_BUS_LANE_ABORT, ! 2192: /* D23-D16 */ TME_BUS_LANE_ABORT, ! 2193: /* D31-D24 */ TME_BUS_LANE_ABORT, ! 2194: ! 2195: /* initiator maximum cycle size: 32 bits ! 2196: initiator address offset: 8 bits ! 2197: (a 32-bit initiator cannot request 32 bits at an 8-bit offset - this is an array placeholder) ! 2198: responder bus port size: 32 bits ! 2199: responder port least lane: D31-D24 ! 2200: (responder port not correctly positioned for this initiator): */ ! 2201: /* D7-D0 */ TME_BUS_LANE_ABORT, ! 2202: /* D15-D8 */ TME_BUS_LANE_ABORT, ! 2203: /* D23-D16 */ TME_BUS_LANE_ABORT, ! 2204: /* D31-D24 */ TME_BUS_LANE_ABORT, ! 2205: ! 2206: /* initiator maximum cycle size: 32 bits ! 2207: initiator address offset: 16 bits ! 2208: (a 32-bit initiator cannot request 32 bits at an 16-bit offset - this is an array placeholder) ! 2209: responder bus port size: 8 bits ! 2210: responder port least lane: D7-D0: */ ! 2211: /* D7-D0 */ TME_BUS_LANE_ABORT, ! 2212: /* D15-D8 */ TME_BUS_LANE_ABORT, ! 2213: /* D23-D16 */ TME_BUS_LANE_ABORT, ! 2214: /* D31-D24 */ TME_BUS_LANE_ABORT, ! 2215: ! 2216: /* initiator maximum cycle size: 32 bits ! 2217: initiator address offset: 16 bits ! 2218: (a 32-bit initiator cannot request 32 bits at an 16-bit offset - this is an array placeholder) ! 2219: responder bus port size: 8 bits ! 2220: responder port least lane: D15-D8: */ ! 2221: /* D7-D0 */ TME_BUS_LANE_ABORT, ! 2222: /* D15-D8 */ TME_BUS_LANE_ABORT, ! 2223: /* D23-D16 */ TME_BUS_LANE_ABORT, ! 2224: /* D31-D24 */ TME_BUS_LANE_ABORT, ! 2225: ! 2226: /* initiator maximum cycle size: 32 bits ! 2227: initiator address offset: 16 bits ! 2228: (a 32-bit initiator cannot request 32 bits at an 16-bit offset - this is an array placeholder) ! 2229: responder bus port size: 8 bits ! 2230: responder port least lane: D23-D16: */ ! 2231: /* D7-D0 */ TME_BUS_LANE_ABORT, ! 2232: /* D15-D8 */ TME_BUS_LANE_ABORT, ! 2233: /* D23-D16 */ TME_BUS_LANE_ABORT, ! 2234: /* D31-D24 */ TME_BUS_LANE_ABORT, ! 2235: ! 2236: /* initiator maximum cycle size: 32 bits ! 2237: initiator address offset: 16 bits ! 2238: (a 32-bit initiator cannot request 32 bits at an 16-bit offset - this is an array placeholder) ! 2239: responder bus port size: 8 bits ! 2240: responder port least lane: D31-D24: */ ! 2241: /* D7-D0 */ TME_BUS_LANE_ABORT, ! 2242: /* D15-D8 */ TME_BUS_LANE_ABORT, ! 2243: /* D23-D16 */ TME_BUS_LANE_ABORT, ! 2244: /* D31-D24 */ TME_BUS_LANE_ABORT, ! 2245: ! 2246: /* initiator maximum cycle size: 32 bits ! 2247: initiator address offset: 16 bits ! 2248: (a 32-bit initiator cannot request 32 bits at an 16-bit offset - this is an array placeholder) ! 2249: responder bus port size: 16 bits ! 2250: responder port least lane: D7-D0: */ ! 2251: /* D7-D0 */ TME_BUS_LANE_ABORT, ! 2252: /* D15-D8 */ TME_BUS_LANE_ABORT, ! 2253: /* D23-D16 */ TME_BUS_LANE_ABORT, ! 2254: /* D31-D24 */ TME_BUS_LANE_ABORT, ! 2255: ! 2256: /* initiator maximum cycle size: 32 bits ! 2257: initiator address offset: 16 bits ! 2258: (a 32-bit initiator cannot request 32 bits at an 16-bit offset - this is an array placeholder) ! 2259: responder bus port size: 16 bits ! 2260: responder port least lane: D15-D8: */ ! 2261: /* D7-D0 */ TME_BUS_LANE_ABORT, ! 2262: /* D15-D8 */ TME_BUS_LANE_ABORT, ! 2263: /* D23-D16 */ TME_BUS_LANE_ABORT, ! 2264: /* D31-D24 */ TME_BUS_LANE_ABORT, ! 2265: ! 2266: /* initiator maximum cycle size: 32 bits ! 2267: initiator address offset: 16 bits ! 2268: (a 32-bit initiator cannot request 32 bits at an 16-bit offset - this is an array placeholder) ! 2269: responder bus port size: 16 bits ! 2270: responder port least lane: D23-D16: */ ! 2271: /* D7-D0 */ TME_BUS_LANE_ABORT, ! 2272: /* D15-D8 */ TME_BUS_LANE_ABORT, ! 2273: /* D23-D16 */ TME_BUS_LANE_ABORT, ! 2274: /* D31-D24 */ TME_BUS_LANE_ABORT, ! 2275: ! 2276: /* initiator maximum cycle size: 32 bits ! 2277: initiator address offset: 16 bits ! 2278: (a 32-bit initiator cannot request 32 bits at an 16-bit offset - this is an array placeholder) ! 2279: responder bus port size: 16 bits ! 2280: responder port least lane: D31-D24 ! 2281: (responder port not correctly positioned for this initiator): */ ! 2282: /* D7-D0 */ TME_BUS_LANE_ABORT, ! 2283: /* D15-D8 */ TME_BUS_LANE_ABORT, ! 2284: /* D23-D16 */ TME_BUS_LANE_ABORT, ! 2285: /* D31-D24 */ TME_BUS_LANE_ABORT, ! 2286: ! 2287: /* initiator maximum cycle size: 32 bits ! 2288: initiator address offset: 16 bits ! 2289: (a 32-bit initiator cannot request 32 bits at an 16-bit offset - this is an array placeholder) ! 2290: responder bus port size: 32 bits ! 2291: responder port least lane: D7-D0: */ ! 2292: /* D7-D0 */ TME_BUS_LANE_ABORT, ! 2293: /* D15-D8 */ TME_BUS_LANE_ABORT, ! 2294: /* D23-D16 */ TME_BUS_LANE_ABORT, ! 2295: /* D31-D24 */ TME_BUS_LANE_ABORT, ! 2296: ! 2297: /* initiator maximum cycle size: 32 bits ! 2298: initiator address offset: 16 bits ! 2299: (a 32-bit initiator cannot request 32 bits at an 16-bit offset - this is an array placeholder) ! 2300: responder bus port size: 32 bits ! 2301: responder port least lane: D15-D8 ! 2302: (responder port not correctly positioned for this initiator): */ ! 2303: /* D7-D0 */ TME_BUS_LANE_ABORT, ! 2304: /* D15-D8 */ TME_BUS_LANE_ABORT, ! 2305: /* D23-D16 */ TME_BUS_LANE_ABORT, ! 2306: /* D31-D24 */ TME_BUS_LANE_ABORT, ! 2307: ! 2308: /* initiator maximum cycle size: 32 bits ! 2309: initiator address offset: 16 bits ! 2310: (a 32-bit initiator cannot request 32 bits at an 16-bit offset - this is an array placeholder) ! 2311: responder bus port size: 32 bits ! 2312: responder port least lane: D23-D16 ! 2313: (responder port not correctly positioned for this initiator): */ ! 2314: /* D7-D0 */ TME_BUS_LANE_ABORT, ! 2315: /* D15-D8 */ TME_BUS_LANE_ABORT, ! 2316: /* D23-D16 */ TME_BUS_LANE_ABORT, ! 2317: /* D31-D24 */ TME_BUS_LANE_ABORT, ! 2318: ! 2319: /* initiator maximum cycle size: 32 bits ! 2320: initiator address offset: 16 bits ! 2321: (a 32-bit initiator cannot request 32 bits at an 16-bit offset - this is an array placeholder) ! 2322: responder bus port size: 32 bits ! 2323: responder port least lane: D31-D24 ! 2324: (responder port not correctly positioned for this initiator): */ ! 2325: /* D7-D0 */ TME_BUS_LANE_ABORT, ! 2326: /* D15-D8 */ TME_BUS_LANE_ABORT, ! 2327: /* D23-D16 */ TME_BUS_LANE_ABORT, ! 2328: /* D31-D24 */ TME_BUS_LANE_ABORT, ! 2329: ! 2330: /* initiator maximum cycle size: 32 bits ! 2331: initiator address offset: 24 bits ! 2332: (a 32-bit initiator cannot request 32 bits at an 24-bit offset - this is an array placeholder) ! 2333: responder bus port size: 8 bits ! 2334: responder port least lane: D7-D0: */ ! 2335: /* D7-D0 */ TME_BUS_LANE_ABORT, ! 2336: /* D15-D8 */ TME_BUS_LANE_ABORT, ! 2337: /* D23-D16 */ TME_BUS_LANE_ABORT, ! 2338: /* D31-D24 */ TME_BUS_LANE_ABORT, ! 2339: ! 2340: /* initiator maximum cycle size: 32 bits ! 2341: initiator address offset: 24 bits ! 2342: (a 32-bit initiator cannot request 32 bits at an 24-bit offset - this is an array placeholder) ! 2343: responder bus port size: 8 bits ! 2344: responder port least lane: D15-D8: */ ! 2345: /* D7-D0 */ TME_BUS_LANE_ABORT, ! 2346: /* D15-D8 */ TME_BUS_LANE_ABORT, ! 2347: /* D23-D16 */ TME_BUS_LANE_ABORT, ! 2348: /* D31-D24 */ TME_BUS_LANE_ABORT, ! 2349: ! 2350: /* initiator maximum cycle size: 32 bits ! 2351: initiator address offset: 24 bits ! 2352: (a 32-bit initiator cannot request 32 bits at an 24-bit offset - this is an array placeholder) ! 2353: responder bus port size: 8 bits ! 2354: responder port least lane: D23-D16: */ ! 2355: /* D7-D0 */ TME_BUS_LANE_ABORT, ! 2356: /* D15-D8 */ TME_BUS_LANE_ABORT, ! 2357: /* D23-D16 */ TME_BUS_LANE_ABORT, ! 2358: /* D31-D24 */ TME_BUS_LANE_ABORT, ! 2359: ! 2360: /* initiator maximum cycle size: 32 bits ! 2361: initiator address offset: 24 bits ! 2362: (a 32-bit initiator cannot request 32 bits at an 24-bit offset - this is an array placeholder) ! 2363: responder bus port size: 8 bits ! 2364: responder port least lane: D31-D24: */ ! 2365: /* D7-D0 */ TME_BUS_LANE_ABORT, ! 2366: /* D15-D8 */ TME_BUS_LANE_ABORT, ! 2367: /* D23-D16 */ TME_BUS_LANE_ABORT, ! 2368: /* D31-D24 */ TME_BUS_LANE_ABORT, ! 2369: ! 2370: /* initiator maximum cycle size: 32 bits ! 2371: initiator address offset: 24 bits ! 2372: (a 32-bit initiator cannot request 32 bits at an 24-bit offset - this is an array placeholder) ! 2373: responder bus port size: 16 bits ! 2374: responder port least lane: D7-D0: */ ! 2375: /* D7-D0 */ TME_BUS_LANE_ABORT, ! 2376: /* D15-D8 */ TME_BUS_LANE_ABORT, ! 2377: /* D23-D16 */ TME_BUS_LANE_ABORT, ! 2378: /* D31-D24 */ TME_BUS_LANE_ABORT, ! 2379: ! 2380: /* initiator maximum cycle size: 32 bits ! 2381: initiator address offset: 24 bits ! 2382: (a 32-bit initiator cannot request 32 bits at an 24-bit offset - this is an array placeholder) ! 2383: responder bus port size: 16 bits ! 2384: responder port least lane: D15-D8: */ ! 2385: /* D7-D0 */ TME_BUS_LANE_ABORT, ! 2386: /* D15-D8 */ TME_BUS_LANE_ABORT, ! 2387: /* D23-D16 */ TME_BUS_LANE_ABORT, ! 2388: /* D31-D24 */ TME_BUS_LANE_ABORT, ! 2389: ! 2390: /* initiator maximum cycle size: 32 bits ! 2391: initiator address offset: 24 bits ! 2392: (a 32-bit initiator cannot request 32 bits at an 24-bit offset - this is an array placeholder) ! 2393: responder bus port size: 16 bits ! 2394: responder port least lane: D23-D16: */ ! 2395: /* D7-D0 */ TME_BUS_LANE_ABORT, ! 2396: /* D15-D8 */ TME_BUS_LANE_ABORT, ! 2397: /* D23-D16 */ TME_BUS_LANE_ABORT, ! 2398: /* D31-D24 */ TME_BUS_LANE_ABORT, ! 2399: ! 2400: /* initiator maximum cycle size: 32 bits ! 2401: initiator address offset: 24 bits ! 2402: (a 32-bit initiator cannot request 32 bits at an 24-bit offset - this is an array placeholder) ! 2403: responder bus port size: 16 bits ! 2404: responder port least lane: D31-D24 ! 2405: (responder port not correctly positioned for this initiator): */ ! 2406: /* D7-D0 */ TME_BUS_LANE_ABORT, ! 2407: /* D15-D8 */ TME_BUS_LANE_ABORT, ! 2408: /* D23-D16 */ TME_BUS_LANE_ABORT, ! 2409: /* D31-D24 */ TME_BUS_LANE_ABORT, ! 2410: ! 2411: /* initiator maximum cycle size: 32 bits ! 2412: initiator address offset: 24 bits ! 2413: (a 32-bit initiator cannot request 32 bits at an 24-bit offset - this is an array placeholder) ! 2414: responder bus port size: 32 bits ! 2415: responder port least lane: D7-D0: */ ! 2416: /* D7-D0 */ TME_BUS_LANE_ABORT, ! 2417: /* D15-D8 */ TME_BUS_LANE_ABORT, ! 2418: /* D23-D16 */ TME_BUS_LANE_ABORT, ! 2419: /* D31-D24 */ TME_BUS_LANE_ABORT, ! 2420: ! 2421: /* initiator maximum cycle size: 32 bits ! 2422: initiator address offset: 24 bits ! 2423: (a 32-bit initiator cannot request 32 bits at an 24-bit offset - this is an array placeholder) ! 2424: responder bus port size: 32 bits ! 2425: responder port least lane: D15-D8 ! 2426: (responder port not correctly positioned for this initiator): */ ! 2427: /* D7-D0 */ TME_BUS_LANE_ABORT, ! 2428: /* D15-D8 */ TME_BUS_LANE_ABORT, ! 2429: /* D23-D16 */ TME_BUS_LANE_ABORT, ! 2430: /* D31-D24 */ TME_BUS_LANE_ABORT, ! 2431: ! 2432: /* initiator maximum cycle size: 32 bits ! 2433: initiator address offset: 24 bits ! 2434: (a 32-bit initiator cannot request 32 bits at an 24-bit offset - this is an array placeholder) ! 2435: responder bus port size: 32 bits ! 2436: responder port least lane: D23-D16 ! 2437: (responder port not correctly positioned for this initiator): */ ! 2438: /* D7-D0 */ TME_BUS_LANE_ABORT, ! 2439: /* D15-D8 */ TME_BUS_LANE_ABORT, ! 2440: /* D23-D16 */ TME_BUS_LANE_ABORT, ! 2441: /* D31-D24 */ TME_BUS_LANE_ABORT, ! 2442: ! 2443: /* initiator maximum cycle size: 32 bits ! 2444: initiator address offset: 24 bits ! 2445: (a 32-bit initiator cannot request 32 bits at an 24-bit offset - this is an array placeholder) ! 2446: responder bus port size: 32 bits ! 2447: responder port least lane: D31-D24 ! 2448: (responder port not correctly positioned for this initiator): */ ! 2449: /* D7-D0 */ TME_BUS_LANE_ABORT, ! 2450: /* D15-D8 */ TME_BUS_LANE_ABORT, ! 2451: /* D23-D16 */ TME_BUS_LANE_ABORT, ! 2452: /* D31-D24 */ TME_BUS_LANE_ABORT, ! 2453: }; ! 2454: ! 2455: /* the 32-bit little-endian bus master bus router: */ ! 2456: const tme_bus_lane_t tme_bus_device_router_32el[TME_BUS_ROUTER_INIT_SIZE(TME_BUS32_LOG2)] = { ! 2457: ! 2458: /* initiator maximum cycle size: 8 bits ! 2459: initiator address offset: 0 bits ! 2460: responder bus port size: 8 bits ! 2461: responder port least lane: D7-D0: */ ! 2462: /* D7-D0 */ TME_BUS_LANE_ROUTE(0), ! 2463: /* D15-D8 */ TME_BUS_LANE_UNDEF, ! 2464: /* D23-D16 */ TME_BUS_LANE_UNDEF, ! 2465: /* D31-D24 */ TME_BUS_LANE_UNDEF, ! 2466: ! 2467: /* initiator maximum cycle size: 8 bits ! 2468: initiator address offset: 0 bits ! 2469: responder bus port size: 8 bits ! 2470: responder port least lane: D15-D8: */ ! 2471: /* D7-D0 */ TME_BUS_LANE_ROUTE(0) | TME_BUS_LANE_WARN, ! 2472: /* D15-D8 */ TME_BUS_LANE_UNDEF, ! 2473: /* D23-D16 */ TME_BUS_LANE_UNDEF, ! 2474: /* D31-D24 */ TME_BUS_LANE_UNDEF, ! 2475: ! 2476: /* initiator maximum cycle size: 8 bits ! 2477: initiator address offset: 0 bits ! 2478: responder bus port size: 8 bits ! 2479: responder port least lane: D23-D16: */ ! 2480: /* D7-D0 */ TME_BUS_LANE_ROUTE(0) | TME_BUS_LANE_WARN, ! 2481: /* D15-D8 */ TME_BUS_LANE_UNDEF, ! 2482: /* D23-D16 */ TME_BUS_LANE_UNDEF, ! 2483: /* D31-D24 */ TME_BUS_LANE_UNDEF, ! 2484: ! 2485: /* initiator maximum cycle size: 8 bits ! 2486: initiator address offset: 0 bits ! 2487: responder bus port size: 8 bits ! 2488: responder port least lane: D31-D24: */ ! 2489: /* D7-D0 */ TME_BUS_LANE_ROUTE(0) | TME_BUS_LANE_WARN, ! 2490: /* D15-D8 */ TME_BUS_LANE_UNDEF, ! 2491: /* D23-D16 */ TME_BUS_LANE_UNDEF, ! 2492: /* D31-D24 */ TME_BUS_LANE_UNDEF, ! 2493: ! 2494: /* initiator maximum cycle size: 8 bits ! 2495: initiator address offset: 0 bits ! 2496: responder bus port size: 16 bits ! 2497: responder port least lane: D7-D0: */ ! 2498: /* D7-D0 */ TME_BUS_LANE_ROUTE(0), ! 2499: /* D15-D8 */ TME_BUS_LANE_UNDEF, ! 2500: /* D23-D16 */ TME_BUS_LANE_UNDEF, ! 2501: /* D31-D24 */ TME_BUS_LANE_UNDEF, ! 2502: ! 2503: /* initiator maximum cycle size: 8 bits ! 2504: initiator address offset: 0 bits ! 2505: responder bus port size: 16 bits ! 2506: responder port least lane: D15-D8: */ ! 2507: /* D7-D0 */ TME_BUS_LANE_ROUTE(0) | TME_BUS_LANE_WARN, ! 2508: /* D15-D8 */ TME_BUS_LANE_UNDEF, ! 2509: /* D23-D16 */ TME_BUS_LANE_UNDEF, ! 2510: /* D31-D24 */ TME_BUS_LANE_UNDEF, ! 2511: ! 2512: /* initiator maximum cycle size: 8 bits ! 2513: initiator address offset: 0 bits ! 2514: responder bus port size: 16 bits ! 2515: responder port least lane: D23-D16: */ ! 2516: /* D7-D0 */ TME_BUS_LANE_ROUTE(0) | TME_BUS_LANE_WARN, ! 2517: /* D15-D8 */ TME_BUS_LANE_UNDEF, ! 2518: /* D23-D16 */ TME_BUS_LANE_UNDEF, ! 2519: /* D31-D24 */ TME_BUS_LANE_UNDEF, ! 2520: ! 2521: /* initiator maximum cycle size: 8 bits ! 2522: initiator address offset: 0 bits ! 2523: responder bus port size: 16 bits ! 2524: responder port least lane: D31-D24 ! 2525: (responder port not correctly positioned for this initiator): */ ! 2526: /* D7-D0 */ TME_BUS_LANE_ROUTE(0) | TME_BUS_LANE_WARN, ! 2527: /* D15-D8 */ TME_BUS_LANE_UNDEF, ! 2528: /* D23-D16 */ TME_BUS_LANE_UNDEF, ! 2529: /* D31-D24 */ TME_BUS_LANE_UNDEF, ! 2530: ! 2531: /* initiator maximum cycle size: 8 bits ! 2532: initiator address offset: 0 bits ! 2533: responder bus port size: 32 bits ! 2534: responder port least lane: D7-D0: */ ! 2535: /* D7-D0 */ TME_BUS_LANE_ROUTE(0), ! 2536: /* D15-D8 */ TME_BUS_LANE_UNDEF, ! 2537: /* D23-D16 */ TME_BUS_LANE_UNDEF, ! 2538: /* D31-D24 */ TME_BUS_LANE_UNDEF, ! 2539: ! 2540: /* initiator maximum cycle size: 8 bits ! 2541: initiator address offset: 0 bits ! 2542: responder bus port size: 32 bits ! 2543: responder port least lane: D15-D8 ! 2544: (responder port not correctly positioned for this initiator): */ ! 2545: /* D7-D0 */ TME_BUS_LANE_ROUTE(0) | TME_BUS_LANE_WARN, ! 2546: /* D15-D8 */ TME_BUS_LANE_UNDEF, ! 2547: /* D23-D16 */ TME_BUS_LANE_UNDEF, ! 2548: /* D31-D24 */ TME_BUS_LANE_UNDEF, ! 2549: ! 2550: /* initiator maximum cycle size: 8 bits ! 2551: initiator address offset: 0 bits ! 2552: responder bus port size: 32 bits ! 2553: responder port least lane: D23-D16 ! 2554: (responder port not correctly positioned for this initiator): */ ! 2555: /* D7-D0 */ TME_BUS_LANE_ROUTE(0) | TME_BUS_LANE_WARN, ! 2556: /* D15-D8 */ TME_BUS_LANE_UNDEF, ! 2557: /* D23-D16 */ TME_BUS_LANE_UNDEF, ! 2558: /* D31-D24 */ TME_BUS_LANE_UNDEF, ! 2559: ! 2560: /* initiator maximum cycle size: 8 bits ! 2561: initiator address offset: 0 bits ! 2562: responder bus port size: 32 bits ! 2563: responder port least lane: D31-D24 ! 2564: (responder port not correctly positioned for this initiator): */ ! 2565: /* D7-D0 */ TME_BUS_LANE_ROUTE(0) | TME_BUS_LANE_WARN, ! 2566: /* D15-D8 */ TME_BUS_LANE_UNDEF, ! 2567: /* D23-D16 */ TME_BUS_LANE_UNDEF, ! 2568: /* D31-D24 */ TME_BUS_LANE_UNDEF, ! 2569: ! 2570: /* initiator maximum cycle size: 8 bits ! 2571: initiator address offset: 8 bits ! 2572: responder bus port size: 8 bits ! 2573: responder port least lane: D7-D0: */ ! 2574: /* D7-D0 */ TME_BUS_LANE_UNDEF, ! 2575: /* D15-D8 */ TME_BUS_LANE_ROUTE(0) | TME_BUS_LANE_WARN, ! 2576: /* D23-D16 */ TME_BUS_LANE_UNDEF, ! 2577: /* D31-D24 */ TME_BUS_LANE_UNDEF, ! 2578: ! 2579: /* initiator maximum cycle size: 8 bits ! 2580: initiator address offset: 8 bits ! 2581: responder bus port size: 8 bits ! 2582: responder port least lane: D15-D8: */ ! 2583: /* D7-D0 */ TME_BUS_LANE_UNDEF, ! 2584: /* D15-D8 */ TME_BUS_LANE_ROUTE(0), ! 2585: /* D23-D16 */ TME_BUS_LANE_UNDEF, ! 2586: /* D31-D24 */ TME_BUS_LANE_UNDEF, ! 2587: ! 2588: /* initiator maximum cycle size: 8 bits ! 2589: initiator address offset: 8 bits ! 2590: responder bus port size: 8 bits ! 2591: responder port least lane: D23-D16: */ ! 2592: /* D7-D0 */ TME_BUS_LANE_UNDEF, ! 2593: /* D15-D8 */ TME_BUS_LANE_ROUTE(0) | TME_BUS_LANE_WARN, ! 2594: /* D23-D16 */ TME_BUS_LANE_UNDEF, ! 2595: /* D31-D24 */ TME_BUS_LANE_UNDEF, ! 2596: ! 2597: /* initiator maximum cycle size: 8 bits ! 2598: initiator address offset: 8 bits ! 2599: responder bus port size: 8 bits ! 2600: responder port least lane: D31-D24: */ ! 2601: /* D7-D0 */ TME_BUS_LANE_UNDEF, ! 2602: /* D15-D8 */ TME_BUS_LANE_ROUTE(0) | TME_BUS_LANE_WARN, ! 2603: /* D23-D16 */ TME_BUS_LANE_UNDEF, ! 2604: /* D31-D24 */ TME_BUS_LANE_UNDEF, ! 2605: ! 2606: /* initiator maximum cycle size: 8 bits ! 2607: initiator address offset: 8 bits ! 2608: responder bus port size: 16 bits ! 2609: responder port least lane: D7-D0: */ ! 2610: /* D7-D0 */ TME_BUS_LANE_UNDEF, ! 2611: /* D15-D8 */ TME_BUS_LANE_ROUTE(0), ! 2612: /* D23-D16 */ TME_BUS_LANE_UNDEF, ! 2613: /* D31-D24 */ TME_BUS_LANE_UNDEF, ! 2614: ! 2615: /* initiator maximum cycle size: 8 bits ! 2616: initiator address offset: 8 bits ! 2617: responder bus port size: 16 bits ! 2618: responder port least lane: D15-D8: */ ! 2619: /* D7-D0 */ TME_BUS_LANE_UNDEF, ! 2620: /* D15-D8 */ TME_BUS_LANE_ROUTE(0), ! 2621: /* D23-D16 */ TME_BUS_LANE_UNDEF, ! 2622: /* D31-D24 */ TME_BUS_LANE_UNDEF, ! 2623: ! 2624: /* initiator maximum cycle size: 8 bits ! 2625: initiator address offset: 8 bits ! 2626: responder bus port size: 16 bits ! 2627: responder port least lane: D23-D16: */ ! 2628: /* D7-D0 */ TME_BUS_LANE_UNDEF, ! 2629: /* D15-D8 */ TME_BUS_LANE_ROUTE(0) | TME_BUS_LANE_WARN, ! 2630: /* D23-D16 */ TME_BUS_LANE_UNDEF, ! 2631: /* D31-D24 */ TME_BUS_LANE_UNDEF, ! 2632: ! 2633: /* initiator maximum cycle size: 8 bits ! 2634: initiator address offset: 8 bits ! 2635: responder bus port size: 16 bits ! 2636: responder port least lane: D31-D24 ! 2637: (responder port not correctly positioned for this initiator): */ ! 2638: /* D7-D0 */ TME_BUS_LANE_UNDEF, ! 2639: /* D15-D8 */ TME_BUS_LANE_ROUTE(0) | TME_BUS_LANE_WARN, ! 2640: /* D23-D16 */ TME_BUS_LANE_UNDEF, ! 2641: /* D31-D24 */ TME_BUS_LANE_UNDEF, ! 2642: ! 2643: /* initiator maximum cycle size: 8 bits ! 2644: initiator address offset: 8 bits ! 2645: responder bus port size: 32 bits ! 2646: responder port least lane: D7-D0: */ ! 2647: /* D7-D0 */ TME_BUS_LANE_UNDEF, ! 2648: /* D15-D8 */ TME_BUS_LANE_ROUTE(0), ! 2649: /* D23-D16 */ TME_BUS_LANE_UNDEF, ! 2650: /* D31-D24 */ TME_BUS_LANE_UNDEF, ! 2651: ! 2652: /* initiator maximum cycle size: 8 bits ! 2653: initiator address offset: 8 bits ! 2654: responder bus port size: 32 bits ! 2655: responder port least lane: D15-D8 ! 2656: (responder port not correctly positioned for this initiator): */ ! 2657: /* D7-D0 */ TME_BUS_LANE_UNDEF, ! 2658: /* D15-D8 */ TME_BUS_LANE_ROUTE(0), ! 2659: /* D23-D16 */ TME_BUS_LANE_UNDEF, ! 2660: /* D31-D24 */ TME_BUS_LANE_UNDEF, ! 2661: ! 2662: /* initiator maximum cycle size: 8 bits ! 2663: initiator address offset: 8 bits ! 2664: responder bus port size: 32 bits ! 2665: responder port least lane: D23-D16 ! 2666: (responder port not correctly positioned for this initiator): */ ! 2667: /* D7-D0 */ TME_BUS_LANE_UNDEF, ! 2668: /* D15-D8 */ TME_BUS_LANE_ROUTE(0) | TME_BUS_LANE_WARN, ! 2669: /* D23-D16 */ TME_BUS_LANE_UNDEF, ! 2670: /* D31-D24 */ TME_BUS_LANE_UNDEF, ! 2671: ! 2672: /* initiator maximum cycle size: 8 bits ! 2673: initiator address offset: 8 bits ! 2674: responder bus port size: 32 bits ! 2675: responder port least lane: D31-D24 ! 2676: (responder port not correctly positioned for this initiator): */ ! 2677: /* D7-D0 */ TME_BUS_LANE_UNDEF, ! 2678: /* D15-D8 */ TME_BUS_LANE_ROUTE(0) | TME_BUS_LANE_WARN, ! 2679: /* D23-D16 */ TME_BUS_LANE_UNDEF, ! 2680: /* D31-D24 */ TME_BUS_LANE_UNDEF, ! 2681: ! 2682: /* initiator maximum cycle size: 8 bits ! 2683: initiator address offset: 16 bits ! 2684: responder bus port size: 8 bits ! 2685: responder port least lane: D7-D0: */ ! 2686: /* D7-D0 */ TME_BUS_LANE_UNDEF, ! 2687: /* D15-D8 */ TME_BUS_LANE_UNDEF, ! 2688: /* D23-D16 */ TME_BUS_LANE_ROUTE(0) | TME_BUS_LANE_WARN, ! 2689: /* D31-D24 */ TME_BUS_LANE_UNDEF, ! 2690: ! 2691: /* initiator maximum cycle size: 8 bits ! 2692: initiator address offset: 16 bits ! 2693: responder bus port size: 8 bits ! 2694: responder port least lane: D15-D8: */ ! 2695: /* D7-D0 */ TME_BUS_LANE_UNDEF, ! 2696: /* D15-D8 */ TME_BUS_LANE_UNDEF, ! 2697: /* D23-D16 */ TME_BUS_LANE_ROUTE(0) | TME_BUS_LANE_WARN, ! 2698: /* D31-D24 */ TME_BUS_LANE_UNDEF, ! 2699: ! 2700: /* initiator maximum cycle size: 8 bits ! 2701: initiator address offset: 16 bits ! 2702: responder bus port size: 8 bits ! 2703: responder port least lane: D23-D16: */ ! 2704: /* D7-D0 */ TME_BUS_LANE_UNDEF, ! 2705: /* D15-D8 */ TME_BUS_LANE_UNDEF, ! 2706: /* D23-D16 */ TME_BUS_LANE_ROUTE(0), ! 2707: /* D31-D24 */ TME_BUS_LANE_UNDEF, ! 2708: ! 2709: /* initiator maximum cycle size: 8 bits ! 2710: initiator address offset: 16 bits ! 2711: responder bus port size: 8 bits ! 2712: responder port least lane: D31-D24: */ ! 2713: /* D7-D0 */ TME_BUS_LANE_UNDEF, ! 2714: /* D15-D8 */ TME_BUS_LANE_UNDEF, ! 2715: /* D23-D16 */ TME_BUS_LANE_ROUTE(0) | TME_BUS_LANE_WARN, ! 2716: /* D31-D24 */ TME_BUS_LANE_UNDEF, ! 2717: ! 2718: /* initiator maximum cycle size: 8 bits ! 2719: initiator address offset: 16 bits ! 2720: responder bus port size: 16 bits ! 2721: responder port least lane: D7-D0: */ ! 2722: /* D7-D0 */ TME_BUS_LANE_UNDEF, ! 2723: /* D15-D8 */ TME_BUS_LANE_UNDEF, ! 2724: /* D23-D16 */ TME_BUS_LANE_ROUTE(0) | TME_BUS_LANE_WARN, ! 2725: /* D31-D24 */ TME_BUS_LANE_UNDEF, ! 2726: ! 2727: /* initiator maximum cycle size: 8 bits ! 2728: initiator address offset: 16 bits ! 2729: responder bus port size: 16 bits ! 2730: responder port least lane: D15-D8: */ ! 2731: /* D7-D0 */ TME_BUS_LANE_UNDEF, ! 2732: /* D15-D8 */ TME_BUS_LANE_UNDEF, ! 2733: /* D23-D16 */ TME_BUS_LANE_ROUTE(0), ! 2734: /* D31-D24 */ TME_BUS_LANE_UNDEF, ! 2735: ! 2736: /* initiator maximum cycle size: 8 bits ! 2737: initiator address offset: 16 bits ! 2738: responder bus port size: 16 bits ! 2739: responder port least lane: D23-D16: */ ! 2740: /* D7-D0 */ TME_BUS_LANE_UNDEF, ! 2741: /* D15-D8 */ TME_BUS_LANE_UNDEF, ! 2742: /* D23-D16 */ TME_BUS_LANE_ROUTE(0), ! 2743: /* D31-D24 */ TME_BUS_LANE_UNDEF, ! 2744: ! 2745: /* initiator maximum cycle size: 8 bits ! 2746: initiator address offset: 16 bits ! 2747: responder bus port size: 16 bits ! 2748: responder port least lane: D31-D24 ! 2749: (responder port not correctly positioned for this initiator): */ ! 2750: /* D7-D0 */ TME_BUS_LANE_UNDEF, ! 2751: /* D15-D8 */ TME_BUS_LANE_UNDEF, ! 2752: /* D23-D16 */ TME_BUS_LANE_ROUTE(0) | TME_BUS_LANE_WARN, ! 2753: /* D31-D24 */ TME_BUS_LANE_UNDEF, ! 2754: ! 2755: /* initiator maximum cycle size: 8 bits ! 2756: initiator address offset: 16 bits ! 2757: responder bus port size: 32 bits ! 2758: responder port least lane: D7-D0: */ ! 2759: /* D7-D0 */ TME_BUS_LANE_UNDEF, ! 2760: /* D15-D8 */ TME_BUS_LANE_UNDEF, ! 2761: /* D23-D16 */ TME_BUS_LANE_ROUTE(0), ! 2762: /* D31-D24 */ TME_BUS_LANE_UNDEF, ! 2763: ! 2764: /* initiator maximum cycle size: 8 bits ! 2765: initiator address offset: 16 bits ! 2766: responder bus port size: 32 bits ! 2767: responder port least lane: D15-D8 ! 2768: (responder port not correctly positioned for this initiator): */ ! 2769: /* D7-D0 */ TME_BUS_LANE_UNDEF, ! 2770: /* D15-D8 */ TME_BUS_LANE_UNDEF, ! 2771: /* D23-D16 */ TME_BUS_LANE_ROUTE(0), ! 2772: /* D31-D24 */ TME_BUS_LANE_UNDEF, ! 2773: ! 2774: /* initiator maximum cycle size: 8 bits ! 2775: initiator address offset: 16 bits ! 2776: responder bus port size: 32 bits ! 2777: responder port least lane: D23-D16 ! 2778: (responder port not correctly positioned for this initiator): */ ! 2779: /* D7-D0 */ TME_BUS_LANE_UNDEF, ! 2780: /* D15-D8 */ TME_BUS_LANE_UNDEF, ! 2781: /* D23-D16 */ TME_BUS_LANE_ROUTE(0), ! 2782: /* D31-D24 */ TME_BUS_LANE_UNDEF, ! 2783: ! 2784: /* initiator maximum cycle size: 8 bits ! 2785: initiator address offset: 16 bits ! 2786: responder bus port size: 32 bits ! 2787: responder port least lane: D31-D24 ! 2788: (responder port not correctly positioned for this initiator): */ ! 2789: /* D7-D0 */ TME_BUS_LANE_UNDEF, ! 2790: /* D15-D8 */ TME_BUS_LANE_UNDEF, ! 2791: /* D23-D16 */ TME_BUS_LANE_ROUTE(0) | TME_BUS_LANE_WARN, ! 2792: /* D31-D24 */ TME_BUS_LANE_UNDEF, ! 2793: ! 2794: /* initiator maximum cycle size: 8 bits ! 2795: initiator address offset: 24 bits ! 2796: responder bus port size: 8 bits ! 2797: responder port least lane: D7-D0: */ ! 2798: /* D7-D0 */ TME_BUS_LANE_UNDEF, ! 2799: /* D15-D8 */ TME_BUS_LANE_UNDEF, ! 2800: /* D23-D16 */ TME_BUS_LANE_UNDEF, ! 2801: /* D31-D24 */ TME_BUS_LANE_ROUTE(0) | TME_BUS_LANE_WARN, ! 2802: ! 2803: /* initiator maximum cycle size: 8 bits ! 2804: initiator address offset: 24 bits ! 2805: responder bus port size: 8 bits ! 2806: responder port least lane: D15-D8: */ ! 2807: /* D7-D0 */ TME_BUS_LANE_UNDEF, ! 2808: /* D15-D8 */ TME_BUS_LANE_UNDEF, ! 2809: /* D23-D16 */ TME_BUS_LANE_UNDEF, ! 2810: /* D31-D24 */ TME_BUS_LANE_ROUTE(0) | TME_BUS_LANE_WARN, ! 2811: ! 2812: /* initiator maximum cycle size: 8 bits ! 2813: initiator address offset: 24 bits ! 2814: responder bus port size: 8 bits ! 2815: responder port least lane: D23-D16: */ ! 2816: /* D7-D0 */ TME_BUS_LANE_UNDEF, ! 2817: /* D15-D8 */ TME_BUS_LANE_UNDEF, ! 2818: /* D23-D16 */ TME_BUS_LANE_UNDEF, ! 2819: /* D31-D24 */ TME_BUS_LANE_ROUTE(0) | TME_BUS_LANE_WARN, ! 2820: ! 2821: /* initiator maximum cycle size: 8 bits ! 2822: initiator address offset: 24 bits ! 2823: responder bus port size: 8 bits ! 2824: responder port least lane: D31-D24: */ ! 2825: /* D7-D0 */ TME_BUS_LANE_UNDEF, ! 2826: /* D15-D8 */ TME_BUS_LANE_UNDEF, ! 2827: /* D23-D16 */ TME_BUS_LANE_UNDEF, ! 2828: /* D31-D24 */ TME_BUS_LANE_ROUTE(0), ! 2829: ! 2830: /* initiator maximum cycle size: 8 bits ! 2831: initiator address offset: 24 bits ! 2832: responder bus port size: 16 bits ! 2833: responder port least lane: D7-D0: */ ! 2834: /* D7-D0 */ TME_BUS_LANE_UNDEF, ! 2835: /* D15-D8 */ TME_BUS_LANE_UNDEF, ! 2836: /* D23-D16 */ TME_BUS_LANE_UNDEF, ! 2837: /* D31-D24 */ TME_BUS_LANE_ROUTE(0) | TME_BUS_LANE_WARN, ! 2838: ! 2839: /* initiator maximum cycle size: 8 bits ! 2840: initiator address offset: 24 bits ! 2841: responder bus port size: 16 bits ! 2842: responder port least lane: D15-D8: */ ! 2843: /* D7-D0 */ TME_BUS_LANE_UNDEF, ! 2844: /* D15-D8 */ TME_BUS_LANE_UNDEF, ! 2845: /* D23-D16 */ TME_BUS_LANE_UNDEF, ! 2846: /* D31-D24 */ TME_BUS_LANE_ROUTE(0) | TME_BUS_LANE_WARN, ! 2847: ! 2848: /* initiator maximum cycle size: 8 bits ! 2849: initiator address offset: 24 bits ! 2850: responder bus port size: 16 bits ! 2851: responder port least lane: D23-D16: */ ! 2852: /* D7-D0 */ TME_BUS_LANE_UNDEF, ! 2853: /* D15-D8 */ TME_BUS_LANE_UNDEF, ! 2854: /* D23-D16 */ TME_BUS_LANE_UNDEF, ! 2855: /* D31-D24 */ TME_BUS_LANE_ROUTE(0), ! 2856: ! 2857: /* initiator maximum cycle size: 8 bits ! 2858: initiator address offset: 24 bits ! 2859: responder bus port size: 16 bits ! 2860: responder port least lane: D31-D24 ! 2861: (responder port not correctly positioned for this initiator): */ ! 2862: /* D7-D0 */ TME_BUS_LANE_UNDEF, ! 2863: /* D15-D8 */ TME_BUS_LANE_UNDEF, ! 2864: /* D23-D16 */ TME_BUS_LANE_UNDEF, ! 2865: /* D31-D24 */ TME_BUS_LANE_ROUTE(0), ! 2866: ! 2867: /* initiator maximum cycle size: 8 bits ! 2868: initiator address offset: 24 bits ! 2869: responder bus port size: 32 bits ! 2870: responder port least lane: D7-D0: */ ! 2871: /* D7-D0 */ TME_BUS_LANE_UNDEF, ! 2872: /* D15-D8 */ TME_BUS_LANE_UNDEF, ! 2873: /* D23-D16 */ TME_BUS_LANE_UNDEF, ! 2874: /* D31-D24 */ TME_BUS_LANE_ROUTE(0), ! 2875: ! 2876: /* initiator maximum cycle size: 8 bits ! 2877: initiator address offset: 24 bits ! 2878: responder bus port size: 32 bits ! 2879: responder port least lane: D15-D8 ! 2880: (responder port not correctly positioned for this initiator): */ ! 2881: /* D7-D0 */ TME_BUS_LANE_UNDEF, ! 2882: /* D15-D8 */ TME_BUS_LANE_UNDEF, ! 2883: /* D23-D16 */ TME_BUS_LANE_UNDEF, ! 2884: /* D31-D24 */ TME_BUS_LANE_ROUTE(0), ! 2885: ! 2886: /* initiator maximum cycle size: 8 bits ! 2887: initiator address offset: 24 bits ! 2888: responder bus port size: 32 bits ! 2889: responder port least lane: D23-D16 ! 2890: (responder port not correctly positioned for this initiator): */ ! 2891: /* D7-D0 */ TME_BUS_LANE_UNDEF, ! 2892: /* D15-D8 */ TME_BUS_LANE_UNDEF, ! 2893: /* D23-D16 */ TME_BUS_LANE_UNDEF, ! 2894: /* D31-D24 */ TME_BUS_LANE_ROUTE(0), ! 2895: ! 2896: /* initiator maximum cycle size: 8 bits ! 2897: initiator address offset: 24 bits ! 2898: responder bus port size: 32 bits ! 2899: responder port least lane: D31-D24 ! 2900: (responder port not correctly positioned for this initiator): */ ! 2901: /* D7-D0 */ TME_BUS_LANE_UNDEF, ! 2902: /* D15-D8 */ TME_BUS_LANE_UNDEF, ! 2903: /* D23-D16 */ TME_BUS_LANE_UNDEF, ! 2904: /* D31-D24 */ TME_BUS_LANE_ROUTE(0), ! 2905: ! 2906: /* initiator maximum cycle size: 16 bits ! 2907: initiator address offset: 0 bits ! 2908: responder bus port size: 8 bits ! 2909: responder port least lane: D7-D0: */ ! 2910: /* D7-D0 */ TME_BUS_LANE_ROUTE(0), ! 2911: /* D15-D8 */ TME_BUS_LANE_ROUTE(1) | TME_BUS_LANE_WARN, ! 2912: /* D23-D16 */ TME_BUS_LANE_UNDEF, ! 2913: /* D31-D24 */ TME_BUS_LANE_UNDEF, ! 2914: ! 2915: /* initiator maximum cycle size: 16 bits ! 2916: initiator address offset: 0 bits ! 2917: responder bus port size: 8 bits ! 2918: responder port least lane: D15-D8: */ ! 2919: /* D7-D0 */ TME_BUS_LANE_ROUTE(0) | TME_BUS_LANE_WARN, ! 2920: /* D15-D8 */ TME_BUS_LANE_ROUTE(1), ! 2921: /* D23-D16 */ TME_BUS_LANE_UNDEF, ! 2922: /* D31-D24 */ TME_BUS_LANE_UNDEF, ! 2923: ! 2924: /* initiator maximum cycle size: 16 bits ! 2925: initiator address offset: 0 bits ! 2926: responder bus port size: 8 bits ! 2927: responder port least lane: D23-D16: */ ! 2928: /* D7-D0 */ TME_BUS_LANE_ROUTE(0) | TME_BUS_LANE_WARN, ! 2929: /* D15-D8 */ TME_BUS_LANE_ROUTE(1) | TME_BUS_LANE_WARN, ! 2930: /* D23-D16 */ TME_BUS_LANE_UNDEF, ! 2931: /* D31-D24 */ TME_BUS_LANE_UNDEF, ! 2932: ! 2933: /* initiator maximum cycle size: 16 bits ! 2934: initiator address offset: 0 bits ! 2935: responder bus port size: 8 bits ! 2936: responder port least lane: D31-D24: */ ! 2937: /* D7-D0 */ TME_BUS_LANE_ROUTE(0) | TME_BUS_LANE_WARN, ! 2938: /* D15-D8 */ TME_BUS_LANE_ROUTE(1) | TME_BUS_LANE_WARN, ! 2939: /* D23-D16 */ TME_BUS_LANE_UNDEF, ! 2940: /* D31-D24 */ TME_BUS_LANE_UNDEF, ! 2941: ! 2942: /* initiator maximum cycle size: 16 bits ! 2943: initiator address offset: 0 bits ! 2944: responder bus port size: 16 bits ! 2945: responder port least lane: D7-D0: */ ! 2946: /* D7-D0 */ TME_BUS_LANE_ROUTE(0), ! 2947: /* D15-D8 */ TME_BUS_LANE_ROUTE(1), ! 2948: /* D23-D16 */ TME_BUS_LANE_UNDEF, ! 2949: /* D31-D24 */ TME_BUS_LANE_UNDEF, ! 2950: ! 2951: /* initiator maximum cycle size: 16 bits ! 2952: initiator address offset: 0 bits ! 2953: responder bus port size: 16 bits ! 2954: responder port least lane: D15-D8: */ ! 2955: /* D7-D0 */ TME_BUS_LANE_ROUTE(0) | TME_BUS_LANE_WARN, ! 2956: /* D15-D8 */ TME_BUS_LANE_ROUTE(1), ! 2957: /* D23-D16 */ TME_BUS_LANE_UNDEF, ! 2958: /* D31-D24 */ TME_BUS_LANE_UNDEF, ! 2959: ! 2960: /* initiator maximum cycle size: 16 bits ! 2961: initiator address offset: 0 bits ! 2962: responder bus port size: 16 bits ! 2963: responder port least lane: D23-D16: */ ! 2964: /* D7-D0 */ TME_BUS_LANE_ROUTE(0) | TME_BUS_LANE_WARN, ! 2965: /* D15-D8 */ TME_BUS_LANE_ROUTE(1) | TME_BUS_LANE_WARN, ! 2966: /* D23-D16 */ TME_BUS_LANE_UNDEF, ! 2967: /* D31-D24 */ TME_BUS_LANE_UNDEF, ! 2968: ! 2969: /* initiator maximum cycle size: 16 bits ! 2970: initiator address offset: 0 bits ! 2971: responder bus port size: 16 bits ! 2972: responder port least lane: D31-D24 ! 2973: (responder port not correctly positioned for this initiator): */ ! 2974: /* D7-D0 */ TME_BUS_LANE_ROUTE(0) | TME_BUS_LANE_WARN, ! 2975: /* D15-D8 */ TME_BUS_LANE_ROUTE(1) | TME_BUS_LANE_WARN, ! 2976: /* D23-D16 */ TME_BUS_LANE_UNDEF, ! 2977: /* D31-D24 */ TME_BUS_LANE_UNDEF, ! 2978: ! 2979: /* initiator maximum cycle size: 16 bits ! 2980: initiator address offset: 0 bits ! 2981: responder bus port size: 32 bits ! 2982: responder port least lane: D7-D0: */ ! 2983: /* D7-D0 */ TME_BUS_LANE_ROUTE(0), ! 2984: /* D15-D8 */ TME_BUS_LANE_ROUTE(1), ! 2985: /* D23-D16 */ TME_BUS_LANE_UNDEF, ! 2986: /* D31-D24 */ TME_BUS_LANE_UNDEF, ! 2987: ! 2988: /* initiator maximum cycle size: 16 bits ! 2989: initiator address offset: 0 bits ! 2990: responder bus port size: 32 bits ! 2991: responder port least lane: D15-D8 ! 2992: (responder port not correctly positioned for this initiator): */ ! 2993: /* D7-D0 */ TME_BUS_LANE_ROUTE(0) | TME_BUS_LANE_WARN, ! 2994: /* D15-D8 */ TME_BUS_LANE_ROUTE(1), ! 2995: /* D23-D16 */ TME_BUS_LANE_UNDEF, ! 2996: /* D31-D24 */ TME_BUS_LANE_UNDEF, ! 2997: ! 2998: /* initiator maximum cycle size: 16 bits ! 2999: initiator address offset: 0 bits ! 3000: responder bus port size: 32 bits ! 3001: responder port least lane: D23-D16 ! 3002: (responder port not correctly positioned for this initiator): */ ! 3003: /* D7-D0 */ TME_BUS_LANE_ROUTE(0) | TME_BUS_LANE_WARN, ! 3004: /* D15-D8 */ TME_BUS_LANE_ROUTE(1) | TME_BUS_LANE_WARN, ! 3005: /* D23-D16 */ TME_BUS_LANE_UNDEF, ! 3006: /* D31-D24 */ TME_BUS_LANE_UNDEF, ! 3007: ! 3008: /* initiator maximum cycle size: 16 bits ! 3009: initiator address offset: 0 bits ! 3010: responder bus port size: 32 bits ! 3011: responder port least lane: D31-D24 ! 3012: (responder port not correctly positioned for this initiator): */ ! 3013: /* D7-D0 */ TME_BUS_LANE_ROUTE(0) | TME_BUS_LANE_WARN, ! 3014: /* D15-D8 */ TME_BUS_LANE_ROUTE(1) | TME_BUS_LANE_WARN, ! 3015: /* D23-D16 */ TME_BUS_LANE_UNDEF, ! 3016: /* D31-D24 */ TME_BUS_LANE_UNDEF, ! 3017: ! 3018: /* initiator maximum cycle size: 16 bits ! 3019: initiator address offset: 8 bits ! 3020: responder bus port size: 8 bits ! 3021: responder port least lane: D7-D0: */ ! 3022: /* D7-D0 */ TME_BUS_LANE_UNDEF, ! 3023: /* D15-D8 */ TME_BUS_LANE_ROUTE(0) | TME_BUS_LANE_WARN, ! 3024: /* D23-D16 */ TME_BUS_LANE_ROUTE(1) | TME_BUS_LANE_WARN, ! 3025: /* D31-D24 */ TME_BUS_LANE_UNDEF, ! 3026: ! 3027: /* initiator maximum cycle size: 16 bits ! 3028: initiator address offset: 8 bits ! 3029: responder bus port size: 8 bits ! 3030: responder port least lane: D15-D8: */ ! 3031: /* D7-D0 */ TME_BUS_LANE_UNDEF, ! 3032: /* D15-D8 */ TME_BUS_LANE_ROUTE(0), ! 3033: /* D23-D16 */ TME_BUS_LANE_ROUTE(1) | TME_BUS_LANE_WARN, ! 3034: /* D31-D24 */ TME_BUS_LANE_UNDEF, ! 3035: ! 3036: /* initiator maximum cycle size: 16 bits ! 3037: initiator address offset: 8 bits ! 3038: responder bus port size: 8 bits ! 3039: responder port least lane: D23-D16: */ ! 3040: /* D7-D0 */ TME_BUS_LANE_UNDEF, ! 3041: /* D15-D8 */ TME_BUS_LANE_ROUTE(0) | TME_BUS_LANE_WARN, ! 3042: /* D23-D16 */ TME_BUS_LANE_ROUTE(1), ! 3043: /* D31-D24 */ TME_BUS_LANE_UNDEF, ! 3044: ! 3045: /* initiator maximum cycle size: 16 bits ! 3046: initiator address offset: 8 bits ! 3047: responder bus port size: 8 bits ! 3048: responder port least lane: D31-D24: */ ! 3049: /* D7-D0 */ TME_BUS_LANE_UNDEF, ! 3050: /* D15-D8 */ TME_BUS_LANE_ROUTE(0) | TME_BUS_LANE_WARN, ! 3051: /* D23-D16 */ TME_BUS_LANE_ROUTE(1) | TME_BUS_LANE_WARN, ! 3052: /* D31-D24 */ TME_BUS_LANE_UNDEF, ! 3053: ! 3054: /* initiator maximum cycle size: 16 bits ! 3055: initiator address offset: 8 bits ! 3056: responder bus port size: 16 bits ! 3057: responder port least lane: D7-D0: */ ! 3058: /* D7-D0 */ TME_BUS_LANE_UNDEF, ! 3059: /* D15-D8 */ TME_BUS_LANE_ROUTE(0), ! 3060: /* D23-D16 */ TME_BUS_LANE_ROUTE(1) | TME_BUS_LANE_WARN, ! 3061: /* D31-D24 */ TME_BUS_LANE_UNDEF, ! 3062: ! 3063: /* initiator maximum cycle size: 16 bits ! 3064: initiator address offset: 8 bits ! 3065: responder bus port size: 16 bits ! 3066: responder port least lane: D15-D8: */ ! 3067: /* D7-D0 */ TME_BUS_LANE_UNDEF, ! 3068: /* D15-D8 */ TME_BUS_LANE_ROUTE(0), ! 3069: /* D23-D16 */ TME_BUS_LANE_ROUTE(1), ! 3070: /* D31-D24 */ TME_BUS_LANE_UNDEF, ! 3071: ! 3072: /* initiator maximum cycle size: 16 bits ! 3073: initiator address offset: 8 bits ! 3074: responder bus port size: 16 bits ! 3075: responder port least lane: D23-D16: */ ! 3076: /* D7-D0 */ TME_BUS_LANE_UNDEF, ! 3077: /* D15-D8 */ TME_BUS_LANE_ROUTE(0) | TME_BUS_LANE_WARN, ! 3078: /* D23-D16 */ TME_BUS_LANE_ROUTE(1), ! 3079: /* D31-D24 */ TME_BUS_LANE_UNDEF, ! 3080: ! 3081: /* initiator maximum cycle size: 16 bits ! 3082: initiator address offset: 8 bits ! 3083: responder bus port size: 16 bits ! 3084: responder port least lane: D31-D24 ! 3085: (responder port not correctly positioned for this initiator): */ ! 3086: /* D7-D0 */ TME_BUS_LANE_UNDEF, ! 3087: /* D15-D8 */ TME_BUS_LANE_ROUTE(0) | TME_BUS_LANE_WARN, ! 3088: /* D23-D16 */ TME_BUS_LANE_ROUTE(1) | TME_BUS_LANE_WARN, ! 3089: /* D31-D24 */ TME_BUS_LANE_UNDEF, ! 3090: ! 3091: /* initiator maximum cycle size: 16 bits ! 3092: initiator address offset: 8 bits ! 3093: responder bus port size: 32 bits ! 3094: responder port least lane: D7-D0: */ ! 3095: /* D7-D0 */ TME_BUS_LANE_UNDEF, ! 3096: /* D15-D8 */ TME_BUS_LANE_ROUTE(0), ! 3097: /* D23-D16 */ TME_BUS_LANE_ROUTE(1), ! 3098: /* D31-D24 */ TME_BUS_LANE_UNDEF, ! 3099: ! 3100: /* initiator maximum cycle size: 16 bits ! 3101: initiator address offset: 8 bits ! 3102: responder bus port size: 32 bits ! 3103: responder port least lane: D15-D8 ! 3104: (responder port not correctly positioned for this initiator): */ ! 3105: /* D7-D0 */ TME_BUS_LANE_UNDEF, ! 3106: /* D15-D8 */ TME_BUS_LANE_ROUTE(0), ! 3107: /* D23-D16 */ TME_BUS_LANE_ROUTE(1), ! 3108: /* D31-D24 */ TME_BUS_LANE_UNDEF, ! 3109: ! 3110: /* initiator maximum cycle size: 16 bits ! 3111: initiator address offset: 8 bits ! 3112: responder bus port size: 32 bits ! 3113: responder port least lane: D23-D16 ! 3114: (responder port not correctly positioned for this initiator): */ ! 3115: /* D7-D0 */ TME_BUS_LANE_UNDEF, ! 3116: /* D15-D8 */ TME_BUS_LANE_ROUTE(0) | TME_BUS_LANE_WARN, ! 3117: /* D23-D16 */ TME_BUS_LANE_ROUTE(1), ! 3118: /* D31-D24 */ TME_BUS_LANE_UNDEF, ! 3119: ! 3120: /* initiator maximum cycle size: 16 bits ! 3121: initiator address offset: 8 bits ! 3122: responder bus port size: 32 bits ! 3123: responder port least lane: D31-D24 ! 3124: (responder port not correctly positioned for this initiator): */ ! 3125: /* D7-D0 */ TME_BUS_LANE_UNDEF, ! 3126: /* D15-D8 */ TME_BUS_LANE_ROUTE(0) | TME_BUS_LANE_WARN, ! 3127: /* D23-D16 */ TME_BUS_LANE_ROUTE(1) | TME_BUS_LANE_WARN, ! 3128: /* D31-D24 */ TME_BUS_LANE_UNDEF, ! 3129: ! 3130: /* initiator maximum cycle size: 16 bits ! 3131: initiator address offset: 16 bits ! 3132: responder bus port size: 8 bits ! 3133: responder port least lane: D7-D0: */ ! 3134: /* D7-D0 */ TME_BUS_LANE_UNDEF, ! 3135: /* D15-D8 */ TME_BUS_LANE_UNDEF, ! 3136: /* D23-D16 */ TME_BUS_LANE_ROUTE(0) | TME_BUS_LANE_WARN, ! 3137: /* D31-D24 */ TME_BUS_LANE_ROUTE(1) | TME_BUS_LANE_WARN, ! 3138: ! 3139: /* initiator maximum cycle size: 16 bits ! 3140: initiator address offset: 16 bits ! 3141: responder bus port size: 8 bits ! 3142: responder port least lane: D15-D8: */ ! 3143: /* D7-D0 */ TME_BUS_LANE_UNDEF, ! 3144: /* D15-D8 */ TME_BUS_LANE_UNDEF, ! 3145: /* D23-D16 */ TME_BUS_LANE_ROUTE(0) | TME_BUS_LANE_WARN, ! 3146: /* D31-D24 */ TME_BUS_LANE_ROUTE(1) | TME_BUS_LANE_WARN, ! 3147: ! 3148: /* initiator maximum cycle size: 16 bits ! 3149: initiator address offset: 16 bits ! 3150: responder bus port size: 8 bits ! 3151: responder port least lane: D23-D16: */ ! 3152: /* D7-D0 */ TME_BUS_LANE_UNDEF, ! 3153: /* D15-D8 */ TME_BUS_LANE_UNDEF, ! 3154: /* D23-D16 */ TME_BUS_LANE_ROUTE(0), ! 3155: /* D31-D24 */ TME_BUS_LANE_ROUTE(1) | TME_BUS_LANE_WARN, ! 3156: ! 3157: /* initiator maximum cycle size: 16 bits ! 3158: initiator address offset: 16 bits ! 3159: responder bus port size: 8 bits ! 3160: responder port least lane: D31-D24: */ ! 3161: /* D7-D0 */ TME_BUS_LANE_UNDEF, ! 3162: /* D15-D8 */ TME_BUS_LANE_UNDEF, ! 3163: /* D23-D16 */ TME_BUS_LANE_ROUTE(0) | TME_BUS_LANE_WARN, ! 3164: /* D31-D24 */ TME_BUS_LANE_ROUTE(1), ! 3165: ! 3166: /* initiator maximum cycle size: 16 bits ! 3167: initiator address offset: 16 bits ! 3168: responder bus port size: 16 bits ! 3169: responder port least lane: D7-D0: */ ! 3170: /* D7-D0 */ TME_BUS_LANE_UNDEF, ! 3171: /* D15-D8 */ TME_BUS_LANE_UNDEF, ! 3172: /* D23-D16 */ TME_BUS_LANE_ROUTE(0) | TME_BUS_LANE_WARN, ! 3173: /* D31-D24 */ TME_BUS_LANE_ROUTE(1) | TME_BUS_LANE_WARN, ! 3174: ! 3175: /* initiator maximum cycle size: 16 bits ! 3176: initiator address offset: 16 bits ! 3177: responder bus port size: 16 bits ! 3178: responder port least lane: D15-D8: */ ! 3179: /* D7-D0 */ TME_BUS_LANE_UNDEF, ! 3180: /* D15-D8 */ TME_BUS_LANE_UNDEF, ! 3181: /* D23-D16 */ TME_BUS_LANE_ROUTE(0), ! 3182: /* D31-D24 */ TME_BUS_LANE_ROUTE(1) | TME_BUS_LANE_WARN, ! 3183: ! 3184: /* initiator maximum cycle size: 16 bits ! 3185: initiator address offset: 16 bits ! 3186: responder bus port size: 16 bits ! 3187: responder port least lane: D23-D16: */ ! 3188: /* D7-D0 */ TME_BUS_LANE_UNDEF, ! 3189: /* D15-D8 */ TME_BUS_LANE_UNDEF, ! 3190: /* D23-D16 */ TME_BUS_LANE_ROUTE(0), ! 3191: /* D31-D24 */ TME_BUS_LANE_ROUTE(1), ! 3192: ! 3193: /* initiator maximum cycle size: 16 bits ! 3194: initiator address offset: 16 bits ! 3195: responder bus port size: 16 bits ! 3196: responder port least lane: D31-D24 ! 3197: (responder port not correctly positioned for this initiator): */ ! 3198: /* D7-D0 */ TME_BUS_LANE_UNDEF, ! 3199: /* D15-D8 */ TME_BUS_LANE_UNDEF, ! 3200: /* D23-D16 */ TME_BUS_LANE_ROUTE(0) | TME_BUS_LANE_WARN, ! 3201: /* D31-D24 */ TME_BUS_LANE_ROUTE(1), ! 3202: ! 3203: /* initiator maximum cycle size: 16 bits ! 3204: initiator address offset: 16 bits ! 3205: responder bus port size: 32 bits ! 3206: responder port least lane: D7-D0: */ ! 3207: /* D7-D0 */ TME_BUS_LANE_UNDEF, ! 3208: /* D15-D8 */ TME_BUS_LANE_UNDEF, ! 3209: /* D23-D16 */ TME_BUS_LANE_ROUTE(0), ! 3210: /* D31-D24 */ TME_BUS_LANE_ROUTE(1), ! 3211: ! 3212: /* initiator maximum cycle size: 16 bits ! 3213: initiator address offset: 16 bits ! 3214: responder bus port size: 32 bits ! 3215: responder port least lane: D15-D8 ! 3216: (responder port not correctly positioned for this initiator): */ ! 3217: /* D7-D0 */ TME_BUS_LANE_UNDEF, ! 3218: /* D15-D8 */ TME_BUS_LANE_UNDEF, ! 3219: /* D23-D16 */ TME_BUS_LANE_ROUTE(0), ! 3220: /* D31-D24 */ TME_BUS_LANE_ROUTE(1), ! 3221: ! 3222: /* initiator maximum cycle size: 16 bits ! 3223: initiator address offset: 16 bits ! 3224: responder bus port size: 32 bits ! 3225: responder port least lane: D23-D16 ! 3226: (responder port not correctly positioned for this initiator): */ ! 3227: /* D7-D0 */ TME_BUS_LANE_UNDEF, ! 3228: /* D15-D8 */ TME_BUS_LANE_UNDEF, ! 3229: /* D23-D16 */ TME_BUS_LANE_ROUTE(0), ! 3230: /* D31-D24 */ TME_BUS_LANE_ROUTE(1), ! 3231: ! 3232: /* initiator maximum cycle size: 16 bits ! 3233: initiator address offset: 16 bits ! 3234: responder bus port size: 32 bits ! 3235: responder port least lane: D31-D24 ! 3236: (responder port not correctly positioned for this initiator): */ ! 3237: /* D7-D0 */ TME_BUS_LANE_UNDEF, ! 3238: /* D15-D8 */ TME_BUS_LANE_UNDEF, ! 3239: /* D23-D16 */ TME_BUS_LANE_ROUTE(0) | TME_BUS_LANE_WARN, ! 3240: /* D31-D24 */ TME_BUS_LANE_ROUTE(1), ! 3241: ! 3242: /* initiator maximum cycle size: 16 bits ! 3243: initiator address offset: 24 bits ! 3244: (a 32-bit initiator cannot request 16 bits at an 24-bit offset - this is an array placeholder) ! 3245: responder bus port size: 8 bits ! 3246: responder port least lane: D7-D0: */ ! 3247: /* D7-D0 */ TME_BUS_LANE_ABORT, ! 3248: /* D15-D8 */ TME_BUS_LANE_ABORT, ! 3249: /* D23-D16 */ TME_BUS_LANE_ABORT, ! 3250: /* D31-D24 */ TME_BUS_LANE_ABORT, ! 3251: ! 3252: /* initiator maximum cycle size: 16 bits ! 3253: initiator address offset: 24 bits ! 3254: (a 32-bit initiator cannot request 16 bits at an 24-bit offset - this is an array placeholder) ! 3255: responder bus port size: 8 bits ! 3256: responder port least lane: D15-D8: */ ! 3257: /* D7-D0 */ TME_BUS_LANE_ABORT, ! 3258: /* D15-D8 */ TME_BUS_LANE_ABORT, ! 3259: /* D23-D16 */ TME_BUS_LANE_ABORT, ! 3260: /* D31-D24 */ TME_BUS_LANE_ABORT, ! 3261: ! 3262: /* initiator maximum cycle size: 16 bits ! 3263: initiator address offset: 24 bits ! 3264: (a 32-bit initiator cannot request 16 bits at an 24-bit offset - this is an array placeholder) ! 3265: responder bus port size: 8 bits ! 3266: responder port least lane: D23-D16: */ ! 3267: /* D7-D0 */ TME_BUS_LANE_ABORT, ! 3268: /* D15-D8 */ TME_BUS_LANE_ABORT, ! 3269: /* D23-D16 */ TME_BUS_LANE_ABORT, ! 3270: /* D31-D24 */ TME_BUS_LANE_ABORT, ! 3271: ! 3272: /* initiator maximum cycle size: 16 bits ! 3273: initiator address offset: 24 bits ! 3274: (a 32-bit initiator cannot request 16 bits at an 24-bit offset - this is an array placeholder) ! 3275: responder bus port size: 8 bits ! 3276: responder port least lane: D31-D24: */ ! 3277: /* D7-D0 */ TME_BUS_LANE_ABORT, ! 3278: /* D15-D8 */ TME_BUS_LANE_ABORT, ! 3279: /* D23-D16 */ TME_BUS_LANE_ABORT, ! 3280: /* D31-D24 */ TME_BUS_LANE_ABORT, ! 3281: ! 3282: /* initiator maximum cycle size: 16 bits ! 3283: initiator address offset: 24 bits ! 3284: (a 32-bit initiator cannot request 16 bits at an 24-bit offset - this is an array placeholder) ! 3285: responder bus port size: 16 bits ! 3286: responder port least lane: D7-D0: */ ! 3287: /* D7-D0 */ TME_BUS_LANE_ABORT, ! 3288: /* D15-D8 */ TME_BUS_LANE_ABORT, ! 3289: /* D23-D16 */ TME_BUS_LANE_ABORT, ! 3290: /* D31-D24 */ TME_BUS_LANE_ABORT, ! 3291: ! 3292: /* initiator maximum cycle size: 16 bits ! 3293: initiator address offset: 24 bits ! 3294: (a 32-bit initiator cannot request 16 bits at an 24-bit offset - this is an array placeholder) ! 3295: responder bus port size: 16 bits ! 3296: responder port least lane: D15-D8: */ ! 3297: /* D7-D0 */ TME_BUS_LANE_ABORT, ! 3298: /* D15-D8 */ TME_BUS_LANE_ABORT, ! 3299: /* D23-D16 */ TME_BUS_LANE_ABORT, ! 3300: /* D31-D24 */ TME_BUS_LANE_ABORT, ! 3301: ! 3302: /* initiator maximum cycle size: 16 bits ! 3303: initiator address offset: 24 bits ! 3304: (a 32-bit initiator cannot request 16 bits at an 24-bit offset - this is an array placeholder) ! 3305: responder bus port size: 16 bits ! 3306: responder port least lane: D23-D16: */ ! 3307: /* D7-D0 */ TME_BUS_LANE_ABORT, ! 3308: /* D15-D8 */ TME_BUS_LANE_ABORT, ! 3309: /* D23-D16 */ TME_BUS_LANE_ABORT, ! 3310: /* D31-D24 */ TME_BUS_LANE_ABORT, ! 3311: ! 3312: /* initiator maximum cycle size: 16 bits ! 3313: initiator address offset: 24 bits ! 3314: (a 32-bit initiator cannot request 16 bits at an 24-bit offset - this is an array placeholder) ! 3315: responder bus port size: 16 bits ! 3316: responder port least lane: D31-D24 ! 3317: (responder port not correctly positioned for this initiator): */ ! 3318: /* D7-D0 */ TME_BUS_LANE_ABORT, ! 3319: /* D15-D8 */ TME_BUS_LANE_ABORT, ! 3320: /* D23-D16 */ TME_BUS_LANE_ABORT, ! 3321: /* D31-D24 */ TME_BUS_LANE_ABORT, ! 3322: ! 3323: /* initiator maximum cycle size: 16 bits ! 3324: initiator address offset: 24 bits ! 3325: (a 32-bit initiator cannot request 16 bits at an 24-bit offset - this is an array placeholder) ! 3326: responder bus port size: 32 bits ! 3327: responder port least lane: D7-D0: */ ! 3328: /* D7-D0 */ TME_BUS_LANE_ABORT, ! 3329: /* D15-D8 */ TME_BUS_LANE_ABORT, ! 3330: /* D23-D16 */ TME_BUS_LANE_ABORT, ! 3331: /* D31-D24 */ TME_BUS_LANE_ABORT, ! 3332: ! 3333: /* initiator maximum cycle size: 16 bits ! 3334: initiator address offset: 24 bits ! 3335: (a 32-bit initiator cannot request 16 bits at an 24-bit offset - this is an array placeholder) ! 3336: responder bus port size: 32 bits ! 3337: responder port least lane: D15-D8 ! 3338: (responder port not correctly positioned for this initiator): */ ! 3339: /* D7-D0 */ TME_BUS_LANE_ABORT, ! 3340: /* D15-D8 */ TME_BUS_LANE_ABORT, ! 3341: /* D23-D16 */ TME_BUS_LANE_ABORT, ! 3342: /* D31-D24 */ TME_BUS_LANE_ABORT, ! 3343: ! 3344: /* initiator maximum cycle size: 16 bits ! 3345: initiator address offset: 24 bits ! 3346: (a 32-bit initiator cannot request 16 bits at an 24-bit offset - this is an array placeholder) ! 3347: responder bus port size: 32 bits ! 3348: responder port least lane: D23-D16 ! 3349: (responder port not correctly positioned for this initiator): */ ! 3350: /* D7-D0 */ TME_BUS_LANE_ABORT, ! 3351: /* D15-D8 */ TME_BUS_LANE_ABORT, ! 3352: /* D23-D16 */ TME_BUS_LANE_ABORT, ! 3353: /* D31-D24 */ TME_BUS_LANE_ABORT, ! 3354: ! 3355: /* initiator maximum cycle size: 16 bits ! 3356: initiator address offset: 24 bits ! 3357: (a 32-bit initiator cannot request 16 bits at an 24-bit offset - this is an array placeholder) ! 3358: responder bus port size: 32 bits ! 3359: responder port least lane: D31-D24 ! 3360: (responder port not correctly positioned for this initiator): */ ! 3361: /* D7-D0 */ TME_BUS_LANE_ABORT, ! 3362: /* D15-D8 */ TME_BUS_LANE_ABORT, ! 3363: /* D23-D16 */ TME_BUS_LANE_ABORT, ! 3364: /* D31-D24 */ TME_BUS_LANE_ABORT, ! 3365: ! 3366: /* initiator maximum cycle size: 24 bits ! 3367: initiator address offset: 0 bits ! 3368: responder bus port size: 8 bits ! 3369: responder port least lane: D7-D0: */ ! 3370: /* D7-D0 */ TME_BUS_LANE_ROUTE(0), ! 3371: /* D15-D8 */ TME_BUS_LANE_ROUTE(1) | TME_BUS_LANE_WARN, ! 3372: /* D23-D16 */ TME_BUS_LANE_ROUTE(2) | TME_BUS_LANE_WARN, ! 3373: /* D31-D24 */ TME_BUS_LANE_UNDEF, ! 3374: ! 3375: /* initiator maximum cycle size: 24 bits ! 3376: initiator address offset: 0 bits ! 3377: responder bus port size: 8 bits ! 3378: responder port least lane: D15-D8: */ ! 3379: /* D7-D0 */ TME_BUS_LANE_ROUTE(0) | TME_BUS_LANE_WARN, ! 3380: /* D15-D8 */ TME_BUS_LANE_ROUTE(1), ! 3381: /* D23-D16 */ TME_BUS_LANE_ROUTE(2) | TME_BUS_LANE_WARN, ! 3382: /* D31-D24 */ TME_BUS_LANE_UNDEF, ! 3383: ! 3384: /* initiator maximum cycle size: 24 bits ! 3385: initiator address offset: 0 bits ! 3386: responder bus port size: 8 bits ! 3387: responder port least lane: D23-D16: */ ! 3388: /* D7-D0 */ TME_BUS_LANE_ROUTE(0) | TME_BUS_LANE_WARN, ! 3389: /* D15-D8 */ TME_BUS_LANE_ROUTE(1) | TME_BUS_LANE_WARN, ! 3390: /* D23-D16 */ TME_BUS_LANE_ROUTE(2), ! 3391: /* D31-D24 */ TME_BUS_LANE_UNDEF, ! 3392: ! 3393: /* initiator maximum cycle size: 24 bits ! 3394: initiator address offset: 0 bits ! 3395: responder bus port size: 8 bits ! 3396: responder port least lane: D31-D24: */ ! 3397: /* D7-D0 */ TME_BUS_LANE_ROUTE(0) | TME_BUS_LANE_WARN, ! 3398: /* D15-D8 */ TME_BUS_LANE_ROUTE(1) | TME_BUS_LANE_WARN, ! 3399: /* D23-D16 */ TME_BUS_LANE_ROUTE(2) | TME_BUS_LANE_WARN, ! 3400: /* D31-D24 */ TME_BUS_LANE_UNDEF, ! 3401: ! 3402: /* initiator maximum cycle size: 24 bits ! 3403: initiator address offset: 0 bits ! 3404: responder bus port size: 16 bits ! 3405: responder port least lane: D7-D0: */ ! 3406: /* D7-D0 */ TME_BUS_LANE_ROUTE(0), ! 3407: /* D15-D8 */ TME_BUS_LANE_ROUTE(1), ! 3408: /* D23-D16 */ TME_BUS_LANE_ROUTE(2) | TME_BUS_LANE_WARN, ! 3409: /* D31-D24 */ TME_BUS_LANE_UNDEF, ! 3410: ! 3411: /* initiator maximum cycle size: 24 bits ! 3412: initiator address offset: 0 bits ! 3413: responder bus port size: 16 bits ! 3414: responder port least lane: D15-D8: */ ! 3415: /* D7-D0 */ TME_BUS_LANE_ROUTE(0) | TME_BUS_LANE_WARN, ! 3416: /* D15-D8 */ TME_BUS_LANE_ROUTE(1), ! 3417: /* D23-D16 */ TME_BUS_LANE_ROUTE(2), ! 3418: /* D31-D24 */ TME_BUS_LANE_UNDEF, ! 3419: ! 3420: /* initiator maximum cycle size: 24 bits ! 3421: initiator address offset: 0 bits ! 3422: responder bus port size: 16 bits ! 3423: responder port least lane: D23-D16: */ ! 3424: /* D7-D0 */ TME_BUS_LANE_ROUTE(0) | TME_BUS_LANE_WARN, ! 3425: /* D15-D8 */ TME_BUS_LANE_ROUTE(1) | TME_BUS_LANE_WARN, ! 3426: /* D23-D16 */ TME_BUS_LANE_ROUTE(2), ! 3427: /* D31-D24 */ TME_BUS_LANE_UNDEF, ! 3428: ! 3429: /* initiator maximum cycle size: 24 bits ! 3430: initiator address offset: 0 bits ! 3431: responder bus port size: 16 bits ! 3432: responder port least lane: D31-D24 ! 3433: (responder port not correctly positioned for this initiator): */ ! 3434: /* D7-D0 */ TME_BUS_LANE_ROUTE(0) | TME_BUS_LANE_WARN, ! 3435: /* D15-D8 */ TME_BUS_LANE_ROUTE(1) | TME_BUS_LANE_WARN, ! 3436: /* D23-D16 */ TME_BUS_LANE_ROUTE(2) | TME_BUS_LANE_WARN, ! 3437: /* D31-D24 */ TME_BUS_LANE_UNDEF, ! 3438: ! 3439: /* initiator maximum cycle size: 24 bits ! 3440: initiator address offset: 0 bits ! 3441: responder bus port size: 32 bits ! 3442: responder port least lane: D7-D0: */ ! 3443: /* D7-D0 */ TME_BUS_LANE_ROUTE(0), ! 3444: /* D15-D8 */ TME_BUS_LANE_ROUTE(1), ! 3445: /* D23-D16 */ TME_BUS_LANE_ROUTE(2), ! 3446: /* D31-D24 */ TME_BUS_LANE_UNDEF, ! 3447: ! 3448: /* initiator maximum cycle size: 24 bits ! 3449: initiator address offset: 0 bits ! 3450: responder bus port size: 32 bits ! 3451: responder port least lane: D15-D8 ! 3452: (responder port not correctly positioned for this initiator): */ ! 3453: /* D7-D0 */ TME_BUS_LANE_ROUTE(0) | TME_BUS_LANE_WARN, ! 3454: /* D15-D8 */ TME_BUS_LANE_ROUTE(1), ! 3455: /* D23-D16 */ TME_BUS_LANE_ROUTE(2), ! 3456: /* D31-D24 */ TME_BUS_LANE_UNDEF, ! 3457: ! 3458: /* initiator maximum cycle size: 24 bits ! 3459: initiator address offset: 0 bits ! 3460: responder bus port size: 32 bits ! 3461: responder port least lane: D23-D16 ! 3462: (responder port not correctly positioned for this initiator): */ ! 3463: /* D7-D0 */ TME_BUS_LANE_ROUTE(0) | TME_BUS_LANE_WARN, ! 3464: /* D15-D8 */ TME_BUS_LANE_ROUTE(1) | TME_BUS_LANE_WARN, ! 3465: /* D23-D16 */ TME_BUS_LANE_ROUTE(2), ! 3466: /* D31-D24 */ TME_BUS_LANE_UNDEF, ! 3467: ! 3468: /* initiator maximum cycle size: 24 bits ! 3469: initiator address offset: 0 bits ! 3470: responder bus port size: 32 bits ! 3471: responder port least lane: D31-D24 ! 3472: (responder port not correctly positioned for this initiator): */ ! 3473: /* D7-D0 */ TME_BUS_LANE_ROUTE(0) | TME_BUS_LANE_WARN, ! 3474: /* D15-D8 */ TME_BUS_LANE_ROUTE(1) | TME_BUS_LANE_WARN, ! 3475: /* D23-D16 */ TME_BUS_LANE_ROUTE(2) | TME_BUS_LANE_WARN, ! 3476: /* D31-D24 */ TME_BUS_LANE_UNDEF, ! 3477: ! 3478: /* initiator maximum cycle size: 24 bits ! 3479: initiator address offset: 8 bits ! 3480: responder bus port size: 8 bits ! 3481: responder port least lane: D7-D0: */ ! 3482: /* D7-D0 */ TME_BUS_LANE_UNDEF, ! 3483: /* D15-D8 */ TME_BUS_LANE_ROUTE(0) | TME_BUS_LANE_WARN, ! 3484: /* D23-D16 */ TME_BUS_LANE_ROUTE(1) | TME_BUS_LANE_WARN, ! 3485: /* D31-D24 */ TME_BUS_LANE_ROUTE(2) | TME_BUS_LANE_WARN, ! 3486: ! 3487: /* initiator maximum cycle size: 24 bits ! 3488: initiator address offset: 8 bits ! 3489: responder bus port size: 8 bits ! 3490: responder port least lane: D15-D8: */ ! 3491: /* D7-D0 */ TME_BUS_LANE_UNDEF, ! 3492: /* D15-D8 */ TME_BUS_LANE_ROUTE(0), ! 3493: /* D23-D16 */ TME_BUS_LANE_ROUTE(1) | TME_BUS_LANE_WARN, ! 3494: /* D31-D24 */ TME_BUS_LANE_ROUTE(2) | TME_BUS_LANE_WARN, ! 3495: ! 3496: /* initiator maximum cycle size: 24 bits ! 3497: initiator address offset: 8 bits ! 3498: responder bus port size: 8 bits ! 3499: responder port least lane: D23-D16: */ ! 3500: /* D7-D0 */ TME_BUS_LANE_UNDEF, ! 3501: /* D15-D8 */ TME_BUS_LANE_ROUTE(0) | TME_BUS_LANE_WARN, ! 3502: /* D23-D16 */ TME_BUS_LANE_ROUTE(1), ! 3503: /* D31-D24 */ TME_BUS_LANE_ROUTE(2) | TME_BUS_LANE_WARN, ! 3504: ! 3505: /* initiator maximum cycle size: 24 bits ! 3506: initiator address offset: 8 bits ! 3507: responder bus port size: 8 bits ! 3508: responder port least lane: D31-D24: */ ! 3509: /* D7-D0 */ TME_BUS_LANE_UNDEF, ! 3510: /* D15-D8 */ TME_BUS_LANE_ROUTE(0) | TME_BUS_LANE_WARN, ! 3511: /* D23-D16 */ TME_BUS_LANE_ROUTE(1) | TME_BUS_LANE_WARN, ! 3512: /* D31-D24 */ TME_BUS_LANE_ROUTE(2), ! 3513: ! 3514: /* initiator maximum cycle size: 24 bits ! 3515: initiator address offset: 8 bits ! 3516: responder bus port size: 16 bits ! 3517: responder port least lane: D7-D0: */ ! 3518: /* D7-D0 */ TME_BUS_LANE_UNDEF, ! 3519: /* D15-D8 */ TME_BUS_LANE_ROUTE(0), ! 3520: /* D23-D16 */ TME_BUS_LANE_ROUTE(1) | TME_BUS_LANE_WARN, ! 3521: /* D31-D24 */ TME_BUS_LANE_ROUTE(2) | TME_BUS_LANE_WARN, ! 3522: ! 3523: /* initiator maximum cycle size: 24 bits ! 3524: initiator address offset: 8 bits ! 3525: responder bus port size: 16 bits ! 3526: responder port least lane: D15-D8: */ ! 3527: /* D7-D0 */ TME_BUS_LANE_UNDEF, ! 3528: /* D15-D8 */ TME_BUS_LANE_ROUTE(0), ! 3529: /* D23-D16 */ TME_BUS_LANE_ROUTE(1), ! 3530: /* D31-D24 */ TME_BUS_LANE_ROUTE(2) | TME_BUS_LANE_WARN, ! 3531: ! 3532: /* initiator maximum cycle size: 24 bits ! 3533: initiator address offset: 8 bits ! 3534: responder bus port size: 16 bits ! 3535: responder port least lane: D23-D16: */ ! 3536: /* D7-D0 */ TME_BUS_LANE_UNDEF, ! 3537: /* D15-D8 */ TME_BUS_LANE_ROUTE(0) | TME_BUS_LANE_WARN, ! 3538: /* D23-D16 */ TME_BUS_LANE_ROUTE(1), ! 3539: /* D31-D24 */ TME_BUS_LANE_ROUTE(2), ! 3540: ! 3541: /* initiator maximum cycle size: 24 bits ! 3542: initiator address offset: 8 bits ! 3543: responder bus port size: 16 bits ! 3544: responder port least lane: D31-D24 ! 3545: (responder port not correctly positioned for this initiator): */ ! 3546: /* D7-D0 */ TME_BUS_LANE_UNDEF, ! 3547: /* D15-D8 */ TME_BUS_LANE_ROUTE(0) | TME_BUS_LANE_WARN, ! 3548: /* D23-D16 */ TME_BUS_LANE_ROUTE(1) | TME_BUS_LANE_WARN, ! 3549: /* D31-D24 */ TME_BUS_LANE_ROUTE(2), ! 3550: ! 3551: /* initiator maximum cycle size: 24 bits ! 3552: initiator address offset: 8 bits ! 3553: responder bus port size: 32 bits ! 3554: responder port least lane: D7-D0: */ ! 3555: /* D7-D0 */ TME_BUS_LANE_UNDEF, ! 3556: /* D15-D8 */ TME_BUS_LANE_ROUTE(0), ! 3557: /* D23-D16 */ TME_BUS_LANE_ROUTE(1), ! 3558: /* D31-D24 */ TME_BUS_LANE_ROUTE(2), ! 3559: ! 3560: /* initiator maximum cycle size: 24 bits ! 3561: initiator address offset: 8 bits ! 3562: responder bus port size: 32 bits ! 3563: responder port least lane: D15-D8 ! 3564: (responder port not correctly positioned for this initiator): */ ! 3565: /* D7-D0 */ TME_BUS_LANE_UNDEF, ! 3566: /* D15-D8 */ TME_BUS_LANE_ROUTE(0), ! 3567: /* D23-D16 */ TME_BUS_LANE_ROUTE(1), ! 3568: /* D31-D24 */ TME_BUS_LANE_ROUTE(2), ! 3569: ! 3570: /* initiator maximum cycle size: 24 bits ! 3571: initiator address offset: 8 bits ! 3572: responder bus port size: 32 bits ! 3573: responder port least lane: D23-D16 ! 3574: (responder port not correctly positioned for this initiator): */ ! 3575: /* D7-D0 */ TME_BUS_LANE_UNDEF, ! 3576: /* D15-D8 */ TME_BUS_LANE_ROUTE(0) | TME_BUS_LANE_WARN, ! 3577: /* D23-D16 */ TME_BUS_LANE_ROUTE(1), ! 3578: /* D31-D24 */ TME_BUS_LANE_ROUTE(2), ! 3579: ! 3580: /* initiator maximum cycle size: 24 bits ! 3581: initiator address offset: 8 bits ! 3582: responder bus port size: 32 bits ! 3583: responder port least lane: D31-D24 ! 3584: (responder port not correctly positioned for this initiator): */ ! 3585: /* D7-D0 */ TME_BUS_LANE_UNDEF, ! 3586: /* D15-D8 */ TME_BUS_LANE_ROUTE(0) | TME_BUS_LANE_WARN, ! 3587: /* D23-D16 */ TME_BUS_LANE_ROUTE(1) | TME_BUS_LANE_WARN, ! 3588: /* D31-D24 */ TME_BUS_LANE_ROUTE(2), ! 3589: ! 3590: /* initiator maximum cycle size: 24 bits ! 3591: initiator address offset: 16 bits ! 3592: (a 32-bit initiator cannot request 24 bits at an 16-bit offset - this is an array placeholder) ! 3593: responder bus port size: 8 bits ! 3594: responder port least lane: D7-D0: */ ! 3595: /* D7-D0 */ TME_BUS_LANE_ABORT, ! 3596: /* D15-D8 */ TME_BUS_LANE_ABORT, ! 3597: /* D23-D16 */ TME_BUS_LANE_ABORT, ! 3598: /* D31-D24 */ TME_BUS_LANE_ABORT, ! 3599: ! 3600: /* initiator maximum cycle size: 24 bits ! 3601: initiator address offset: 16 bits ! 3602: (a 32-bit initiator cannot request 24 bits at an 16-bit offset - this is an array placeholder) ! 3603: responder bus port size: 8 bits ! 3604: responder port least lane: D15-D8: */ ! 3605: /* D7-D0 */ TME_BUS_LANE_ABORT, ! 3606: /* D15-D8 */ TME_BUS_LANE_ABORT, ! 3607: /* D23-D16 */ TME_BUS_LANE_ABORT, ! 3608: /* D31-D24 */ TME_BUS_LANE_ABORT, ! 3609: ! 3610: /* initiator maximum cycle size: 24 bits ! 3611: initiator address offset: 16 bits ! 3612: (a 32-bit initiator cannot request 24 bits at an 16-bit offset - this is an array placeholder) ! 3613: responder bus port size: 8 bits ! 3614: responder port least lane: D23-D16: */ ! 3615: /* D7-D0 */ TME_BUS_LANE_ABORT, ! 3616: /* D15-D8 */ TME_BUS_LANE_ABORT, ! 3617: /* D23-D16 */ TME_BUS_LANE_ABORT, ! 3618: /* D31-D24 */ TME_BUS_LANE_ABORT, ! 3619: ! 3620: /* initiator maximum cycle size: 24 bits ! 3621: initiator address offset: 16 bits ! 3622: (a 32-bit initiator cannot request 24 bits at an 16-bit offset - this is an array placeholder) ! 3623: responder bus port size: 8 bits ! 3624: responder port least lane: D31-D24: */ ! 3625: /* D7-D0 */ TME_BUS_LANE_ABORT, ! 3626: /* D15-D8 */ TME_BUS_LANE_ABORT, ! 3627: /* D23-D16 */ TME_BUS_LANE_ABORT, ! 3628: /* D31-D24 */ TME_BUS_LANE_ABORT, ! 3629: ! 3630: /* initiator maximum cycle size: 24 bits ! 3631: initiator address offset: 16 bits ! 3632: (a 32-bit initiator cannot request 24 bits at an 16-bit offset - this is an array placeholder) ! 3633: responder bus port size: 16 bits ! 3634: responder port least lane: D7-D0: */ ! 3635: /* D7-D0 */ TME_BUS_LANE_ABORT, ! 3636: /* D15-D8 */ TME_BUS_LANE_ABORT, ! 3637: /* D23-D16 */ TME_BUS_LANE_ABORT, ! 3638: /* D31-D24 */ TME_BUS_LANE_ABORT, ! 3639: ! 3640: /* initiator maximum cycle size: 24 bits ! 3641: initiator address offset: 16 bits ! 3642: (a 32-bit initiator cannot request 24 bits at an 16-bit offset - this is an array placeholder) ! 3643: responder bus port size: 16 bits ! 3644: responder port least lane: D15-D8: */ ! 3645: /* D7-D0 */ TME_BUS_LANE_ABORT, ! 3646: /* D15-D8 */ TME_BUS_LANE_ABORT, ! 3647: /* D23-D16 */ TME_BUS_LANE_ABORT, ! 3648: /* D31-D24 */ TME_BUS_LANE_ABORT, ! 3649: ! 3650: /* initiator maximum cycle size: 24 bits ! 3651: initiator address offset: 16 bits ! 3652: (a 32-bit initiator cannot request 24 bits at an 16-bit offset - this is an array placeholder) ! 3653: responder bus port size: 16 bits ! 3654: responder port least lane: D23-D16: */ ! 3655: /* D7-D0 */ TME_BUS_LANE_ABORT, ! 3656: /* D15-D8 */ TME_BUS_LANE_ABORT, ! 3657: /* D23-D16 */ TME_BUS_LANE_ABORT, ! 3658: /* D31-D24 */ TME_BUS_LANE_ABORT, ! 3659: ! 3660: /* initiator maximum cycle size: 24 bits ! 3661: initiator address offset: 16 bits ! 3662: (a 32-bit initiator cannot request 24 bits at an 16-bit offset - this is an array placeholder) ! 3663: responder bus port size: 16 bits ! 3664: responder port least lane: D31-D24 ! 3665: (responder port not correctly positioned for this initiator): */ ! 3666: /* D7-D0 */ TME_BUS_LANE_ABORT, ! 3667: /* D15-D8 */ TME_BUS_LANE_ABORT, ! 3668: /* D23-D16 */ TME_BUS_LANE_ABORT, ! 3669: /* D31-D24 */ TME_BUS_LANE_ABORT, ! 3670: ! 3671: /* initiator maximum cycle size: 24 bits ! 3672: initiator address offset: 16 bits ! 3673: (a 32-bit initiator cannot request 24 bits at an 16-bit offset - this is an array placeholder) ! 3674: responder bus port size: 32 bits ! 3675: responder port least lane: D7-D0: */ ! 3676: /* D7-D0 */ TME_BUS_LANE_ABORT, ! 3677: /* D15-D8 */ TME_BUS_LANE_ABORT, ! 3678: /* D23-D16 */ TME_BUS_LANE_ABORT, ! 3679: /* D31-D24 */ TME_BUS_LANE_ABORT, ! 3680: ! 3681: /* initiator maximum cycle size: 24 bits ! 3682: initiator address offset: 16 bits ! 3683: (a 32-bit initiator cannot request 24 bits at an 16-bit offset - this is an array placeholder) ! 3684: responder bus port size: 32 bits ! 3685: responder port least lane: D15-D8 ! 3686: (responder port not correctly positioned for this initiator): */ ! 3687: /* D7-D0 */ TME_BUS_LANE_ABORT, ! 3688: /* D15-D8 */ TME_BUS_LANE_ABORT, ! 3689: /* D23-D16 */ TME_BUS_LANE_ABORT, ! 3690: /* D31-D24 */ TME_BUS_LANE_ABORT, ! 3691: ! 3692: /* initiator maximum cycle size: 24 bits ! 3693: initiator address offset: 16 bits ! 3694: (a 32-bit initiator cannot request 24 bits at an 16-bit offset - this is an array placeholder) ! 3695: responder bus port size: 32 bits ! 3696: responder port least lane: D23-D16 ! 3697: (responder port not correctly positioned for this initiator): */ ! 3698: /* D7-D0 */ TME_BUS_LANE_ABORT, ! 3699: /* D15-D8 */ TME_BUS_LANE_ABORT, ! 3700: /* D23-D16 */ TME_BUS_LANE_ABORT, ! 3701: /* D31-D24 */ TME_BUS_LANE_ABORT, ! 3702: ! 3703: /* initiator maximum cycle size: 24 bits ! 3704: initiator address offset: 16 bits ! 3705: (a 32-bit initiator cannot request 24 bits at an 16-bit offset - this is an array placeholder) ! 3706: responder bus port size: 32 bits ! 3707: responder port least lane: D31-D24 ! 3708: (responder port not correctly positioned for this initiator): */ ! 3709: /* D7-D0 */ TME_BUS_LANE_ABORT, ! 3710: /* D15-D8 */ TME_BUS_LANE_ABORT, ! 3711: /* D23-D16 */ TME_BUS_LANE_ABORT, ! 3712: /* D31-D24 */ TME_BUS_LANE_ABORT, ! 3713: ! 3714: /* initiator maximum cycle size: 24 bits ! 3715: initiator address offset: 24 bits ! 3716: (a 32-bit initiator cannot request 24 bits at an 24-bit offset - this is an array placeholder) ! 3717: responder bus port size: 8 bits ! 3718: responder port least lane: D7-D0: */ ! 3719: /* D7-D0 */ TME_BUS_LANE_ABORT, ! 3720: /* D15-D8 */ TME_BUS_LANE_ABORT, ! 3721: /* D23-D16 */ TME_BUS_LANE_ABORT, ! 3722: /* D31-D24 */ TME_BUS_LANE_ABORT, ! 3723: ! 3724: /* initiator maximum cycle size: 24 bits ! 3725: initiator address offset: 24 bits ! 3726: (a 32-bit initiator cannot request 24 bits at an 24-bit offset - this is an array placeholder) ! 3727: responder bus port size: 8 bits ! 3728: responder port least lane: D15-D8: */ ! 3729: /* D7-D0 */ TME_BUS_LANE_ABORT, ! 3730: /* D15-D8 */ TME_BUS_LANE_ABORT, ! 3731: /* D23-D16 */ TME_BUS_LANE_ABORT, ! 3732: /* D31-D24 */ TME_BUS_LANE_ABORT, ! 3733: ! 3734: /* initiator maximum cycle size: 24 bits ! 3735: initiator address offset: 24 bits ! 3736: (a 32-bit initiator cannot request 24 bits at an 24-bit offset - this is an array placeholder) ! 3737: responder bus port size: 8 bits ! 3738: responder port least lane: D23-D16: */ ! 3739: /* D7-D0 */ TME_BUS_LANE_ABORT, ! 3740: /* D15-D8 */ TME_BUS_LANE_ABORT, ! 3741: /* D23-D16 */ TME_BUS_LANE_ABORT, ! 3742: /* D31-D24 */ TME_BUS_LANE_ABORT, ! 3743: ! 3744: /* initiator maximum cycle size: 24 bits ! 3745: initiator address offset: 24 bits ! 3746: (a 32-bit initiator cannot request 24 bits at an 24-bit offset - this is an array placeholder) ! 3747: responder bus port size: 8 bits ! 3748: responder port least lane: D31-D24: */ ! 3749: /* D7-D0 */ TME_BUS_LANE_ABORT, ! 3750: /* D15-D8 */ TME_BUS_LANE_ABORT, ! 3751: /* D23-D16 */ TME_BUS_LANE_ABORT, ! 3752: /* D31-D24 */ TME_BUS_LANE_ABORT, ! 3753: ! 3754: /* initiator maximum cycle size: 24 bits ! 3755: initiator address offset: 24 bits ! 3756: (a 32-bit initiator cannot request 24 bits at an 24-bit offset - this is an array placeholder) ! 3757: responder bus port size: 16 bits ! 3758: responder port least lane: D7-D0: */ ! 3759: /* D7-D0 */ TME_BUS_LANE_ABORT, ! 3760: /* D15-D8 */ TME_BUS_LANE_ABORT, ! 3761: /* D23-D16 */ TME_BUS_LANE_ABORT, ! 3762: /* D31-D24 */ TME_BUS_LANE_ABORT, ! 3763: ! 3764: /* initiator maximum cycle size: 24 bits ! 3765: initiator address offset: 24 bits ! 3766: (a 32-bit initiator cannot request 24 bits at an 24-bit offset - this is an array placeholder) ! 3767: responder bus port size: 16 bits ! 3768: responder port least lane: D15-D8: */ ! 3769: /* D7-D0 */ TME_BUS_LANE_ABORT, ! 3770: /* D15-D8 */ TME_BUS_LANE_ABORT, ! 3771: /* D23-D16 */ TME_BUS_LANE_ABORT, ! 3772: /* D31-D24 */ TME_BUS_LANE_ABORT, ! 3773: ! 3774: /* initiator maximum cycle size: 24 bits ! 3775: initiator address offset: 24 bits ! 3776: (a 32-bit initiator cannot request 24 bits at an 24-bit offset - this is an array placeholder) ! 3777: responder bus port size: 16 bits ! 3778: responder port least lane: D23-D16: */ ! 3779: /* D7-D0 */ TME_BUS_LANE_ABORT, ! 3780: /* D15-D8 */ TME_BUS_LANE_ABORT, ! 3781: /* D23-D16 */ TME_BUS_LANE_ABORT, ! 3782: /* D31-D24 */ TME_BUS_LANE_ABORT, ! 3783: ! 3784: /* initiator maximum cycle size: 24 bits ! 3785: initiator address offset: 24 bits ! 3786: (a 32-bit initiator cannot request 24 bits at an 24-bit offset - this is an array placeholder) ! 3787: responder bus port size: 16 bits ! 3788: responder port least lane: D31-D24 ! 3789: (responder port not correctly positioned for this initiator): */ ! 3790: /* D7-D0 */ TME_BUS_LANE_ABORT, ! 3791: /* D15-D8 */ TME_BUS_LANE_ABORT, ! 3792: /* D23-D16 */ TME_BUS_LANE_ABORT, ! 3793: /* D31-D24 */ TME_BUS_LANE_ABORT, ! 3794: ! 3795: /* initiator maximum cycle size: 24 bits ! 3796: initiator address offset: 24 bits ! 3797: (a 32-bit initiator cannot request 24 bits at an 24-bit offset - this is an array placeholder) ! 3798: responder bus port size: 32 bits ! 3799: responder port least lane: D7-D0: */ ! 3800: /* D7-D0 */ TME_BUS_LANE_ABORT, ! 3801: /* D15-D8 */ TME_BUS_LANE_ABORT, ! 3802: /* D23-D16 */ TME_BUS_LANE_ABORT, ! 3803: /* D31-D24 */ TME_BUS_LANE_ABORT, ! 3804: ! 3805: /* initiator maximum cycle size: 24 bits ! 3806: initiator address offset: 24 bits ! 3807: (a 32-bit initiator cannot request 24 bits at an 24-bit offset - this is an array placeholder) ! 3808: responder bus port size: 32 bits ! 3809: responder port least lane: D15-D8 ! 3810: (responder port not correctly positioned for this initiator): */ ! 3811: /* D7-D0 */ TME_BUS_LANE_ABORT, ! 3812: /* D15-D8 */ TME_BUS_LANE_ABORT, ! 3813: /* D23-D16 */ TME_BUS_LANE_ABORT, ! 3814: /* D31-D24 */ TME_BUS_LANE_ABORT, ! 3815: ! 3816: /* initiator maximum cycle size: 24 bits ! 3817: initiator address offset: 24 bits ! 3818: (a 32-bit initiator cannot request 24 bits at an 24-bit offset - this is an array placeholder) ! 3819: responder bus port size: 32 bits ! 3820: responder port least lane: D23-D16 ! 3821: (responder port not correctly positioned for this initiator): */ ! 3822: /* D7-D0 */ TME_BUS_LANE_ABORT, ! 3823: /* D15-D8 */ TME_BUS_LANE_ABORT, ! 3824: /* D23-D16 */ TME_BUS_LANE_ABORT, ! 3825: /* D31-D24 */ TME_BUS_LANE_ABORT, ! 3826: ! 3827: /* initiator maximum cycle size: 24 bits ! 3828: initiator address offset: 24 bits ! 3829: (a 32-bit initiator cannot request 24 bits at an 24-bit offset - this is an array placeholder) ! 3830: responder bus port size: 32 bits ! 3831: responder port least lane: D31-D24 ! 3832: (responder port not correctly positioned for this initiator): */ ! 3833: /* D7-D0 */ TME_BUS_LANE_ABORT, ! 3834: /* D15-D8 */ TME_BUS_LANE_ABORT, ! 3835: /* D23-D16 */ TME_BUS_LANE_ABORT, ! 3836: /* D31-D24 */ TME_BUS_LANE_ABORT, ! 3837: ! 3838: /* initiator maximum cycle size: 32 bits ! 3839: initiator address offset: 0 bits ! 3840: responder bus port size: 8 bits ! 3841: responder port least lane: D7-D0: */ ! 3842: /* D7-D0 */ TME_BUS_LANE_ROUTE(0), ! 3843: /* D15-D8 */ TME_BUS_LANE_ROUTE(1) | TME_BUS_LANE_WARN, ! 3844: /* D23-D16 */ TME_BUS_LANE_ROUTE(2) | TME_BUS_LANE_WARN, ! 3845: /* D31-D24 */ TME_BUS_LANE_ROUTE(3) | TME_BUS_LANE_WARN, ! 3846: ! 3847: /* initiator maximum cycle size: 32 bits ! 3848: initiator address offset: 0 bits ! 3849: responder bus port size: 8 bits ! 3850: responder port least lane: D15-D8: */ ! 3851: /* D7-D0 */ TME_BUS_LANE_ROUTE(0) | TME_BUS_LANE_WARN, ! 3852: /* D15-D8 */ TME_BUS_LANE_ROUTE(1), ! 3853: /* D23-D16 */ TME_BUS_LANE_ROUTE(2) | TME_BUS_LANE_WARN, ! 3854: /* D31-D24 */ TME_BUS_LANE_ROUTE(3) | TME_BUS_LANE_WARN, ! 3855: ! 3856: /* initiator maximum cycle size: 32 bits ! 3857: initiator address offset: 0 bits ! 3858: responder bus port size: 8 bits ! 3859: responder port least lane: D23-D16: */ ! 3860: /* D7-D0 */ TME_BUS_LANE_ROUTE(0) | TME_BUS_LANE_WARN, ! 3861: /* D15-D8 */ TME_BUS_LANE_ROUTE(1) | TME_BUS_LANE_WARN, ! 3862: /* D23-D16 */ TME_BUS_LANE_ROUTE(2), ! 3863: /* D31-D24 */ TME_BUS_LANE_ROUTE(3) | TME_BUS_LANE_WARN, ! 3864: ! 3865: /* initiator maximum cycle size: 32 bits ! 3866: initiator address offset: 0 bits ! 3867: responder bus port size: 8 bits ! 3868: responder port least lane: D31-D24: */ ! 3869: /* D7-D0 */ TME_BUS_LANE_ROUTE(0) | TME_BUS_LANE_WARN, ! 3870: /* D15-D8 */ TME_BUS_LANE_ROUTE(1) | TME_BUS_LANE_WARN, ! 3871: /* D23-D16 */ TME_BUS_LANE_ROUTE(2) | TME_BUS_LANE_WARN, ! 3872: /* D31-D24 */ TME_BUS_LANE_ROUTE(3), ! 3873: ! 3874: /* initiator maximum cycle size: 32 bits ! 3875: initiator address offset: 0 bits ! 3876: responder bus port size: 16 bits ! 3877: responder port least lane: D7-D0: */ ! 3878: /* D7-D0 */ TME_BUS_LANE_ROUTE(0), ! 3879: /* D15-D8 */ TME_BUS_LANE_ROUTE(1), ! 3880: /* D23-D16 */ TME_BUS_LANE_ROUTE(2) | TME_BUS_LANE_WARN, ! 3881: /* D31-D24 */ TME_BUS_LANE_ROUTE(3) | TME_BUS_LANE_WARN, ! 3882: ! 3883: /* initiator maximum cycle size: 32 bits ! 3884: initiator address offset: 0 bits ! 3885: responder bus port size: 16 bits ! 3886: responder port least lane: D15-D8: */ ! 3887: /* D7-D0 */ TME_BUS_LANE_ROUTE(0) | TME_BUS_LANE_WARN, ! 3888: /* D15-D8 */ TME_BUS_LANE_ROUTE(1), ! 3889: /* D23-D16 */ TME_BUS_LANE_ROUTE(2), ! 3890: /* D31-D24 */ TME_BUS_LANE_ROUTE(3) | TME_BUS_LANE_WARN, ! 3891: ! 3892: /* initiator maximum cycle size: 32 bits ! 3893: initiator address offset: 0 bits ! 3894: responder bus port size: 16 bits ! 3895: responder port least lane: D23-D16: */ ! 3896: /* D7-D0 */ TME_BUS_LANE_ROUTE(0) | TME_BUS_LANE_WARN, ! 3897: /* D15-D8 */ TME_BUS_LANE_ROUTE(1) | TME_BUS_LANE_WARN, ! 3898: /* D23-D16 */ TME_BUS_LANE_ROUTE(2), ! 3899: /* D31-D24 */ TME_BUS_LANE_ROUTE(3), ! 3900: ! 3901: /* initiator maximum cycle size: 32 bits ! 3902: initiator address offset: 0 bits ! 3903: responder bus port size: 16 bits ! 3904: responder port least lane: D31-D24 ! 3905: (responder port not correctly positioned for this initiator): */ ! 3906: /* D7-D0 */ TME_BUS_LANE_ROUTE(0) | TME_BUS_LANE_WARN, ! 3907: /* D15-D8 */ TME_BUS_LANE_ROUTE(1) | TME_BUS_LANE_WARN, ! 3908: /* D23-D16 */ TME_BUS_LANE_ROUTE(2) | TME_BUS_LANE_WARN, ! 3909: /* D31-D24 */ TME_BUS_LANE_ROUTE(3), ! 3910: ! 3911: /* initiator maximum cycle size: 32 bits ! 3912: initiator address offset: 0 bits ! 3913: responder bus port size: 32 bits ! 3914: responder port least lane: D7-D0: */ ! 3915: /* D7-D0 */ TME_BUS_LANE_ROUTE(0), ! 3916: /* D15-D8 */ TME_BUS_LANE_ROUTE(1), ! 3917: /* D23-D16 */ TME_BUS_LANE_ROUTE(2), ! 3918: /* D31-D24 */ TME_BUS_LANE_ROUTE(3), ! 3919: ! 3920: /* initiator maximum cycle size: 32 bits ! 3921: initiator address offset: 0 bits ! 3922: responder bus port size: 32 bits ! 3923: responder port least lane: D15-D8 ! 3924: (responder port not correctly positioned for this initiator): */ ! 3925: /* D7-D0 */ TME_BUS_LANE_ROUTE(0) | TME_BUS_LANE_WARN, ! 3926: /* D15-D8 */ TME_BUS_LANE_ROUTE(1), ! 3927: /* D23-D16 */ TME_BUS_LANE_ROUTE(2), ! 3928: /* D31-D24 */ TME_BUS_LANE_ROUTE(3), ! 3929: ! 3930: /* initiator maximum cycle size: 32 bits ! 3931: initiator address offset: 0 bits ! 3932: responder bus port size: 32 bits ! 3933: responder port least lane: D23-D16 ! 3934: (responder port not correctly positioned for this initiator): */ ! 3935: /* D7-D0 */ TME_BUS_LANE_ROUTE(0) | TME_BUS_LANE_WARN, ! 3936: /* D15-D8 */ TME_BUS_LANE_ROUTE(1) | TME_BUS_LANE_WARN, ! 3937: /* D23-D16 */ TME_BUS_LANE_ROUTE(2), ! 3938: /* D31-D24 */ TME_BUS_LANE_ROUTE(3), ! 3939: ! 3940: /* initiator maximum cycle size: 32 bits ! 3941: initiator address offset: 0 bits ! 3942: responder bus port size: 32 bits ! 3943: responder port least lane: D31-D24 ! 3944: (responder port not correctly positioned for this initiator): */ ! 3945: /* D7-D0 */ TME_BUS_LANE_ROUTE(0) | TME_BUS_LANE_WARN, ! 3946: /* D15-D8 */ TME_BUS_LANE_ROUTE(1) | TME_BUS_LANE_WARN, ! 3947: /* D23-D16 */ TME_BUS_LANE_ROUTE(2) | TME_BUS_LANE_WARN, ! 3948: /* D31-D24 */ TME_BUS_LANE_ROUTE(3), ! 3949: ! 3950: /* initiator maximum cycle size: 32 bits ! 3951: initiator address offset: 8 bits ! 3952: (a 32-bit initiator cannot request 32 bits at an 8-bit offset - this is an array placeholder) ! 3953: responder bus port size: 8 bits ! 3954: responder port least lane: D7-D0: */ ! 3955: /* D7-D0 */ TME_BUS_LANE_ABORT, ! 3956: /* D15-D8 */ TME_BUS_LANE_ABORT, ! 3957: /* D23-D16 */ TME_BUS_LANE_ABORT, ! 3958: /* D31-D24 */ TME_BUS_LANE_ABORT, ! 3959: ! 3960: /* initiator maximum cycle size: 32 bits ! 3961: initiator address offset: 8 bits ! 3962: (a 32-bit initiator cannot request 32 bits at an 8-bit offset - this is an array placeholder) ! 3963: responder bus port size: 8 bits ! 3964: responder port least lane: D15-D8: */ ! 3965: /* D7-D0 */ TME_BUS_LANE_ABORT, ! 3966: /* D15-D8 */ TME_BUS_LANE_ABORT, ! 3967: /* D23-D16 */ TME_BUS_LANE_ABORT, ! 3968: /* D31-D24 */ TME_BUS_LANE_ABORT, ! 3969: ! 3970: /* initiator maximum cycle size: 32 bits ! 3971: initiator address offset: 8 bits ! 3972: (a 32-bit initiator cannot request 32 bits at an 8-bit offset - this is an array placeholder) ! 3973: responder bus port size: 8 bits ! 3974: responder port least lane: D23-D16: */ ! 3975: /* D7-D0 */ TME_BUS_LANE_ABORT, ! 3976: /* D15-D8 */ TME_BUS_LANE_ABORT, ! 3977: /* D23-D16 */ TME_BUS_LANE_ABORT, ! 3978: /* D31-D24 */ TME_BUS_LANE_ABORT, ! 3979: ! 3980: /* initiator maximum cycle size: 32 bits ! 3981: initiator address offset: 8 bits ! 3982: (a 32-bit initiator cannot request 32 bits at an 8-bit offset - this is an array placeholder) ! 3983: responder bus port size: 8 bits ! 3984: responder port least lane: D31-D24: */ ! 3985: /* D7-D0 */ TME_BUS_LANE_ABORT, ! 3986: /* D15-D8 */ TME_BUS_LANE_ABORT, ! 3987: /* D23-D16 */ TME_BUS_LANE_ABORT, ! 3988: /* D31-D24 */ TME_BUS_LANE_ABORT, ! 3989: ! 3990: /* initiator maximum cycle size: 32 bits ! 3991: initiator address offset: 8 bits ! 3992: (a 32-bit initiator cannot request 32 bits at an 8-bit offset - this is an array placeholder) ! 3993: responder bus port size: 16 bits ! 3994: responder port least lane: D7-D0: */ ! 3995: /* D7-D0 */ TME_BUS_LANE_ABORT, ! 3996: /* D15-D8 */ TME_BUS_LANE_ABORT, ! 3997: /* D23-D16 */ TME_BUS_LANE_ABORT, ! 3998: /* D31-D24 */ TME_BUS_LANE_ABORT, ! 3999: ! 4000: /* initiator maximum cycle size: 32 bits ! 4001: initiator address offset: 8 bits ! 4002: (a 32-bit initiator cannot request 32 bits at an 8-bit offset - this is an array placeholder) ! 4003: responder bus port size: 16 bits ! 4004: responder port least lane: D15-D8: */ ! 4005: /* D7-D0 */ TME_BUS_LANE_ABORT, ! 4006: /* D15-D8 */ TME_BUS_LANE_ABORT, ! 4007: /* D23-D16 */ TME_BUS_LANE_ABORT, ! 4008: /* D31-D24 */ TME_BUS_LANE_ABORT, ! 4009: ! 4010: /* initiator maximum cycle size: 32 bits ! 4011: initiator address offset: 8 bits ! 4012: (a 32-bit initiator cannot request 32 bits at an 8-bit offset - this is an array placeholder) ! 4013: responder bus port size: 16 bits ! 4014: responder port least lane: D23-D16: */ ! 4015: /* D7-D0 */ TME_BUS_LANE_ABORT, ! 4016: /* D15-D8 */ TME_BUS_LANE_ABORT, ! 4017: /* D23-D16 */ TME_BUS_LANE_ABORT, ! 4018: /* D31-D24 */ TME_BUS_LANE_ABORT, ! 4019: ! 4020: /* initiator maximum cycle size: 32 bits ! 4021: initiator address offset: 8 bits ! 4022: (a 32-bit initiator cannot request 32 bits at an 8-bit offset - this is an array placeholder) ! 4023: responder bus port size: 16 bits ! 4024: responder port least lane: D31-D24 ! 4025: (responder port not correctly positioned for this initiator): */ ! 4026: /* D7-D0 */ TME_BUS_LANE_ABORT, ! 4027: /* D15-D8 */ TME_BUS_LANE_ABORT, ! 4028: /* D23-D16 */ TME_BUS_LANE_ABORT, ! 4029: /* D31-D24 */ TME_BUS_LANE_ABORT, ! 4030: ! 4031: /* initiator maximum cycle size: 32 bits ! 4032: initiator address offset: 8 bits ! 4033: (a 32-bit initiator cannot request 32 bits at an 8-bit offset - this is an array placeholder) ! 4034: responder bus port size: 32 bits ! 4035: responder port least lane: D7-D0: */ ! 4036: /* D7-D0 */ TME_BUS_LANE_ABORT, ! 4037: /* D15-D8 */ TME_BUS_LANE_ABORT, ! 4038: /* D23-D16 */ TME_BUS_LANE_ABORT, ! 4039: /* D31-D24 */ TME_BUS_LANE_ABORT, ! 4040: ! 4041: /* initiator maximum cycle size: 32 bits ! 4042: initiator address offset: 8 bits ! 4043: (a 32-bit initiator cannot request 32 bits at an 8-bit offset - this is an array placeholder) ! 4044: responder bus port size: 32 bits ! 4045: responder port least lane: D15-D8 ! 4046: (responder port not correctly positioned for this initiator): */ ! 4047: /* D7-D0 */ TME_BUS_LANE_ABORT, ! 4048: /* D15-D8 */ TME_BUS_LANE_ABORT, ! 4049: /* D23-D16 */ TME_BUS_LANE_ABORT, ! 4050: /* D31-D24 */ TME_BUS_LANE_ABORT, ! 4051: ! 4052: /* initiator maximum cycle size: 32 bits ! 4053: initiator address offset: 8 bits ! 4054: (a 32-bit initiator cannot request 32 bits at an 8-bit offset - this is an array placeholder) ! 4055: responder bus port size: 32 bits ! 4056: responder port least lane: D23-D16 ! 4057: (responder port not correctly positioned for this initiator): */ ! 4058: /* D7-D0 */ TME_BUS_LANE_ABORT, ! 4059: /* D15-D8 */ TME_BUS_LANE_ABORT, ! 4060: /* D23-D16 */ TME_BUS_LANE_ABORT, ! 4061: /* D31-D24 */ TME_BUS_LANE_ABORT, ! 4062: ! 4063: /* initiator maximum cycle size: 32 bits ! 4064: initiator address offset: 8 bits ! 4065: (a 32-bit initiator cannot request 32 bits at an 8-bit offset - this is an array placeholder) ! 4066: responder bus port size: 32 bits ! 4067: responder port least lane: D31-D24 ! 4068: (responder port not correctly positioned for this initiator): */ ! 4069: /* D7-D0 */ TME_BUS_LANE_ABORT, ! 4070: /* D15-D8 */ TME_BUS_LANE_ABORT, ! 4071: /* D23-D16 */ TME_BUS_LANE_ABORT, ! 4072: /* D31-D24 */ TME_BUS_LANE_ABORT, ! 4073: ! 4074: /* initiator maximum cycle size: 32 bits ! 4075: initiator address offset: 16 bits ! 4076: (a 32-bit initiator cannot request 32 bits at an 16-bit offset - this is an array placeholder) ! 4077: responder bus port size: 8 bits ! 4078: responder port least lane: D7-D0: */ ! 4079: /* D7-D0 */ TME_BUS_LANE_ABORT, ! 4080: /* D15-D8 */ TME_BUS_LANE_ABORT, ! 4081: /* D23-D16 */ TME_BUS_LANE_ABORT, ! 4082: /* D31-D24 */ TME_BUS_LANE_ABORT, ! 4083: ! 4084: /* initiator maximum cycle size: 32 bits ! 4085: initiator address offset: 16 bits ! 4086: (a 32-bit initiator cannot request 32 bits at an 16-bit offset - this is an array placeholder) ! 4087: responder bus port size: 8 bits ! 4088: responder port least lane: D15-D8: */ ! 4089: /* D7-D0 */ TME_BUS_LANE_ABORT, ! 4090: /* D15-D8 */ TME_BUS_LANE_ABORT, ! 4091: /* D23-D16 */ TME_BUS_LANE_ABORT, ! 4092: /* D31-D24 */ TME_BUS_LANE_ABORT, ! 4093: ! 4094: /* initiator maximum cycle size: 32 bits ! 4095: initiator address offset: 16 bits ! 4096: (a 32-bit initiator cannot request 32 bits at an 16-bit offset - this is an array placeholder) ! 4097: responder bus port size: 8 bits ! 4098: responder port least lane: D23-D16: */ ! 4099: /* D7-D0 */ TME_BUS_LANE_ABORT, ! 4100: /* D15-D8 */ TME_BUS_LANE_ABORT, ! 4101: /* D23-D16 */ TME_BUS_LANE_ABORT, ! 4102: /* D31-D24 */ TME_BUS_LANE_ABORT, ! 4103: ! 4104: /* initiator maximum cycle size: 32 bits ! 4105: initiator address offset: 16 bits ! 4106: (a 32-bit initiator cannot request 32 bits at an 16-bit offset - this is an array placeholder) ! 4107: responder bus port size: 8 bits ! 4108: responder port least lane: D31-D24: */ ! 4109: /* D7-D0 */ TME_BUS_LANE_ABORT, ! 4110: /* D15-D8 */ TME_BUS_LANE_ABORT, ! 4111: /* D23-D16 */ TME_BUS_LANE_ABORT, ! 4112: /* D31-D24 */ TME_BUS_LANE_ABORT, ! 4113: ! 4114: /* initiator maximum cycle size: 32 bits ! 4115: initiator address offset: 16 bits ! 4116: (a 32-bit initiator cannot request 32 bits at an 16-bit offset - this is an array placeholder) ! 4117: responder bus port size: 16 bits ! 4118: responder port least lane: D7-D0: */ ! 4119: /* D7-D0 */ TME_BUS_LANE_ABORT, ! 4120: /* D15-D8 */ TME_BUS_LANE_ABORT, ! 4121: /* D23-D16 */ TME_BUS_LANE_ABORT, ! 4122: /* D31-D24 */ TME_BUS_LANE_ABORT, ! 4123: ! 4124: /* initiator maximum cycle size: 32 bits ! 4125: initiator address offset: 16 bits ! 4126: (a 32-bit initiator cannot request 32 bits at an 16-bit offset - this is an array placeholder) ! 4127: responder bus port size: 16 bits ! 4128: responder port least lane: D15-D8: */ ! 4129: /* D7-D0 */ TME_BUS_LANE_ABORT, ! 4130: /* D15-D8 */ TME_BUS_LANE_ABORT, ! 4131: /* D23-D16 */ TME_BUS_LANE_ABORT, ! 4132: /* D31-D24 */ TME_BUS_LANE_ABORT, ! 4133: ! 4134: /* initiator maximum cycle size: 32 bits ! 4135: initiator address offset: 16 bits ! 4136: (a 32-bit initiator cannot request 32 bits at an 16-bit offset - this is an array placeholder) ! 4137: responder bus port size: 16 bits ! 4138: responder port least lane: D23-D16: */ ! 4139: /* D7-D0 */ TME_BUS_LANE_ABORT, ! 4140: /* D15-D8 */ TME_BUS_LANE_ABORT, ! 4141: /* D23-D16 */ TME_BUS_LANE_ABORT, ! 4142: /* D31-D24 */ TME_BUS_LANE_ABORT, ! 4143: ! 4144: /* initiator maximum cycle size: 32 bits ! 4145: initiator address offset: 16 bits ! 4146: (a 32-bit initiator cannot request 32 bits at an 16-bit offset - this is an array placeholder) ! 4147: responder bus port size: 16 bits ! 4148: responder port least lane: D31-D24 ! 4149: (responder port not correctly positioned for this initiator): */ ! 4150: /* D7-D0 */ TME_BUS_LANE_ABORT, ! 4151: /* D15-D8 */ TME_BUS_LANE_ABORT, ! 4152: /* D23-D16 */ TME_BUS_LANE_ABORT, ! 4153: /* D31-D24 */ TME_BUS_LANE_ABORT, ! 4154: ! 4155: /* initiator maximum cycle size: 32 bits ! 4156: initiator address offset: 16 bits ! 4157: (a 32-bit initiator cannot request 32 bits at an 16-bit offset - this is an array placeholder) ! 4158: responder bus port size: 32 bits ! 4159: responder port least lane: D7-D0: */ ! 4160: /* D7-D0 */ TME_BUS_LANE_ABORT, ! 4161: /* D15-D8 */ TME_BUS_LANE_ABORT, ! 4162: /* D23-D16 */ TME_BUS_LANE_ABORT, ! 4163: /* D31-D24 */ TME_BUS_LANE_ABORT, ! 4164: ! 4165: /* initiator maximum cycle size: 32 bits ! 4166: initiator address offset: 16 bits ! 4167: (a 32-bit initiator cannot request 32 bits at an 16-bit offset - this is an array placeholder) ! 4168: responder bus port size: 32 bits ! 4169: responder port least lane: D15-D8 ! 4170: (responder port not correctly positioned for this initiator): */ ! 4171: /* D7-D0 */ TME_BUS_LANE_ABORT, ! 4172: /* D15-D8 */ TME_BUS_LANE_ABORT, ! 4173: /* D23-D16 */ TME_BUS_LANE_ABORT, ! 4174: /* D31-D24 */ TME_BUS_LANE_ABORT, ! 4175: ! 4176: /* initiator maximum cycle size: 32 bits ! 4177: initiator address offset: 16 bits ! 4178: (a 32-bit initiator cannot request 32 bits at an 16-bit offset - this is an array placeholder) ! 4179: responder bus port size: 32 bits ! 4180: responder port least lane: D23-D16 ! 4181: (responder port not correctly positioned for this initiator): */ ! 4182: /* D7-D0 */ TME_BUS_LANE_ABORT, ! 4183: /* D15-D8 */ TME_BUS_LANE_ABORT, ! 4184: /* D23-D16 */ TME_BUS_LANE_ABORT, ! 4185: /* D31-D24 */ TME_BUS_LANE_ABORT, ! 4186: ! 4187: /* initiator maximum cycle size: 32 bits ! 4188: initiator address offset: 16 bits ! 4189: (a 32-bit initiator cannot request 32 bits at an 16-bit offset - this is an array placeholder) ! 4190: responder bus port size: 32 bits ! 4191: responder port least lane: D31-D24 ! 4192: (responder port not correctly positioned for this initiator): */ ! 4193: /* D7-D0 */ TME_BUS_LANE_ABORT, ! 4194: /* D15-D8 */ TME_BUS_LANE_ABORT, ! 4195: /* D23-D16 */ TME_BUS_LANE_ABORT, ! 4196: /* D31-D24 */ TME_BUS_LANE_ABORT, ! 4197: ! 4198: /* initiator maximum cycle size: 32 bits ! 4199: initiator address offset: 24 bits ! 4200: (a 32-bit initiator cannot request 32 bits at an 24-bit offset - this is an array placeholder) ! 4201: responder bus port size: 8 bits ! 4202: responder port least lane: D7-D0: */ ! 4203: /* D7-D0 */ TME_BUS_LANE_ABORT, ! 4204: /* D15-D8 */ TME_BUS_LANE_ABORT, ! 4205: /* D23-D16 */ TME_BUS_LANE_ABORT, ! 4206: /* D31-D24 */ TME_BUS_LANE_ABORT, ! 4207: ! 4208: /* initiator maximum cycle size: 32 bits ! 4209: initiator address offset: 24 bits ! 4210: (a 32-bit initiator cannot request 32 bits at an 24-bit offset - this is an array placeholder) ! 4211: responder bus port size: 8 bits ! 4212: responder port least lane: D15-D8: */ ! 4213: /* D7-D0 */ TME_BUS_LANE_ABORT, ! 4214: /* D15-D8 */ TME_BUS_LANE_ABORT, ! 4215: /* D23-D16 */ TME_BUS_LANE_ABORT, ! 4216: /* D31-D24 */ TME_BUS_LANE_ABORT, ! 4217: ! 4218: /* initiator maximum cycle size: 32 bits ! 4219: initiator address offset: 24 bits ! 4220: (a 32-bit initiator cannot request 32 bits at an 24-bit offset - this is an array placeholder) ! 4221: responder bus port size: 8 bits ! 4222: responder port least lane: D23-D16: */ ! 4223: /* D7-D0 */ TME_BUS_LANE_ABORT, ! 4224: /* D15-D8 */ TME_BUS_LANE_ABORT, ! 4225: /* D23-D16 */ TME_BUS_LANE_ABORT, ! 4226: /* D31-D24 */ TME_BUS_LANE_ABORT, ! 4227: ! 4228: /* initiator maximum cycle size: 32 bits ! 4229: initiator address offset: 24 bits ! 4230: (a 32-bit initiator cannot request 32 bits at an 24-bit offset - this is an array placeholder) ! 4231: responder bus port size: 8 bits ! 4232: responder port least lane: D31-D24: */ ! 4233: /* D7-D0 */ TME_BUS_LANE_ABORT, ! 4234: /* D15-D8 */ TME_BUS_LANE_ABORT, ! 4235: /* D23-D16 */ TME_BUS_LANE_ABORT, ! 4236: /* D31-D24 */ TME_BUS_LANE_ABORT, ! 4237: ! 4238: /* initiator maximum cycle size: 32 bits ! 4239: initiator address offset: 24 bits ! 4240: (a 32-bit initiator cannot request 32 bits at an 24-bit offset - this is an array placeholder) ! 4241: responder bus port size: 16 bits ! 4242: responder port least lane: D7-D0: */ ! 4243: /* D7-D0 */ TME_BUS_LANE_ABORT, ! 4244: /* D15-D8 */ TME_BUS_LANE_ABORT, ! 4245: /* D23-D16 */ TME_BUS_LANE_ABORT, ! 4246: /* D31-D24 */ TME_BUS_LANE_ABORT, ! 4247: ! 4248: /* initiator maximum cycle size: 32 bits ! 4249: initiator address offset: 24 bits ! 4250: (a 32-bit initiator cannot request 32 bits at an 24-bit offset - this is an array placeholder) ! 4251: responder bus port size: 16 bits ! 4252: responder port least lane: D15-D8: */ ! 4253: /* D7-D0 */ TME_BUS_LANE_ABORT, ! 4254: /* D15-D8 */ TME_BUS_LANE_ABORT, ! 4255: /* D23-D16 */ TME_BUS_LANE_ABORT, ! 4256: /* D31-D24 */ TME_BUS_LANE_ABORT, ! 4257: ! 4258: /* initiator maximum cycle size: 32 bits ! 4259: initiator address offset: 24 bits ! 4260: (a 32-bit initiator cannot request 32 bits at an 24-bit offset - this is an array placeholder) ! 4261: responder bus port size: 16 bits ! 4262: responder port least lane: D23-D16: */ ! 4263: /* D7-D0 */ TME_BUS_LANE_ABORT, ! 4264: /* D15-D8 */ TME_BUS_LANE_ABORT, ! 4265: /* D23-D16 */ TME_BUS_LANE_ABORT, ! 4266: /* D31-D24 */ TME_BUS_LANE_ABORT, ! 4267: ! 4268: /* initiator maximum cycle size: 32 bits ! 4269: initiator address offset: 24 bits ! 4270: (a 32-bit initiator cannot request 32 bits at an 24-bit offset - this is an array placeholder) ! 4271: responder bus port size: 16 bits ! 4272: responder port least lane: D31-D24 ! 4273: (responder port not correctly positioned for this initiator): */ ! 4274: /* D7-D0 */ TME_BUS_LANE_ABORT, ! 4275: /* D15-D8 */ TME_BUS_LANE_ABORT, ! 4276: /* D23-D16 */ TME_BUS_LANE_ABORT, ! 4277: /* D31-D24 */ TME_BUS_LANE_ABORT, ! 4278: ! 4279: /* initiator maximum cycle size: 32 bits ! 4280: initiator address offset: 24 bits ! 4281: (a 32-bit initiator cannot request 32 bits at an 24-bit offset - this is an array placeholder) ! 4282: responder bus port size: 32 bits ! 4283: responder port least lane: D7-D0: */ ! 4284: /* D7-D0 */ TME_BUS_LANE_ABORT, ! 4285: /* D15-D8 */ TME_BUS_LANE_ABORT, ! 4286: /* D23-D16 */ TME_BUS_LANE_ABORT, ! 4287: /* D31-D24 */ TME_BUS_LANE_ABORT, ! 4288: ! 4289: /* initiator maximum cycle size: 32 bits ! 4290: initiator address offset: 24 bits ! 4291: (a 32-bit initiator cannot request 32 bits at an 24-bit offset - this is an array placeholder) ! 4292: responder bus port size: 32 bits ! 4293: responder port least lane: D15-D8 ! 4294: (responder port not correctly positioned for this initiator): */ ! 4295: /* D7-D0 */ TME_BUS_LANE_ABORT, ! 4296: /* D15-D8 */ TME_BUS_LANE_ABORT, ! 4297: /* D23-D16 */ TME_BUS_LANE_ABORT, ! 4298: /* D31-D24 */ TME_BUS_LANE_ABORT, ! 4299: ! 4300: /* initiator maximum cycle size: 32 bits ! 4301: initiator address offset: 24 bits ! 4302: (a 32-bit initiator cannot request 32 bits at an 24-bit offset - this is an array placeholder) ! 4303: responder bus port size: 32 bits ! 4304: responder port least lane: D23-D16 ! 4305: (responder port not correctly positioned for this initiator): */ ! 4306: /* D7-D0 */ TME_BUS_LANE_ABORT, ! 4307: /* D15-D8 */ TME_BUS_LANE_ABORT, ! 4308: /* D23-D16 */ TME_BUS_LANE_ABORT, ! 4309: /* D31-D24 */ TME_BUS_LANE_ABORT, ! 4310: ! 4311: /* initiator maximum cycle size: 32 bits ! 4312: initiator address offset: 24 bits ! 4313: (a 32-bit initiator cannot request 32 bits at an 24-bit offset - this is an array placeholder) ! 4314: responder bus port size: 32 bits ! 4315: responder port least lane: D31-D24 ! 4316: (responder port not correctly positioned for this initiator): */ ! 4317: /* D7-D0 */ TME_BUS_LANE_ABORT, ! 4318: /* D15-D8 */ TME_BUS_LANE_ABORT, ! 4319: /* D23-D16 */ TME_BUS_LANE_ABORT, ! 4320: /* D31-D24 */ TME_BUS_LANE_ABORT, ! 4321: }; ! 4322: ! 4323: /* the 32-bit bus master DMA read function: */ ! 4324: int ! 4325: tme_bus_device_dma_read_32(struct tme_bus_device *bus_device, ! 4326: tme_bus_addr_t address_init, ! 4327: tme_bus_addr_t size, ! 4328: tme_uint8_t *buffer, ! 4329: unsigned int locks) ! 4330: { ! 4331: struct tme_bus_tlb *tlb, tlb_local; ! 4332: struct tme_bus_connection *conn_bus; ! 4333: tme_bus_addr_t count_minus_one, count; ! 4334: struct tme_bus_cycle cycle; ! 4335: tme_bus_addr_t address_resp; ! 4336: tme_bus_addr_t tlb_addr_last; ! 4337: int shift; ! 4338: int err; ! 4339: ! 4340: /* assume no error: */ ! 4341: err = TME_OK; ! 4342: ! 4343: /* loop while we have more bytes to read: */ ! 4344: for (; err == TME_OK && size > 0; ) { ! 4345: ! 4346: /* hash this address into a TLB entry: */ ! 4347: tlb = (*bus_device->tme_bus_device_tlb_hash) ! 4348: (bus_device, ! 4349: address_init, ! 4350: TME_BUS_CYCLE_READ); ! 4351: ! 4352: /* if this TLB entry doesn't cover this address, or if it doesn't ! 4353: allow reading, reload it: */ ! 4354: tlb_addr_last = TME_ATOMIC_READ(tme_bus_addr_t, tlb->tme_bus_tlb_addr_last); ! 4355: if (address_init < TME_ATOMIC_READ(tme_bus_addr_t, tlb->tme_bus_tlb_addr_first) ! 4356: || address_init > tlb_addr_last ! 4357: || (tlb->tme_bus_tlb_emulator_off_read == TME_EMULATOR_OFF_UNDEF ! 4358: && !(tlb->tme_bus_tlb_cycles_ok & TME_BUS_CYCLE_READ))) { ! 4359: ! 4360: /* reserve this TLB entry: */ ! 4361: tme_bus_tlb_reserve(tlb, &tlb_local); ! 4362: tlb = &tlb_local; ! 4363: ! 4364: /* get our bus connection: */ ! 4365: conn_bus = TME_ATOMIC_READ(struct tme_bus_connection *, ! 4366: bus_device->tme_bus_device_connection); ! 4367: ! 4368: /* unlock the device: */ ! 4369: (*bus_device->tme_bus_device_unlock)(bus_device, locks); ! 4370: ! 4371: /* reload the TLB entry: */ ! 4372: err = (*conn_bus->tme_bus_tlb_fill) ! 4373: (conn_bus, ! 4374: tlb, ! 4375: address_init, ! 4376: TME_BUS_CYCLE_READ); ! 4377: ! 4378: /* lock the device: */ ! 4379: (*bus_device->tme_bus_device_lock)(bus_device, locks); ! 4380: ! 4381: /* return if we couldn't fill the TLB entry: */ ! 4382: if (err != TME_OK) { ! 4383: return (err); ! 4384: } ! 4385: ! 4386: /* the TLB entry must cover this address and allow reading: */ ! 4387: tlb_addr_last = TME_ATOMIC_READ(tme_bus_addr_t, tlb->tme_bus_tlb_addr_last); ! 4388: assert (address_init >= TME_ATOMIC_READ(tme_bus_addr_t, tlb->tme_bus_tlb_addr_first) ! 4389: && address_init <= tlb_addr_last ! 4390: && (tlb->tme_bus_tlb_emulator_off_read != TME_EMULATOR_OFF_UNDEF ! 4391: || (tlb->tme_bus_tlb_cycles_ok & TME_BUS_CYCLE_READ))); ! 4392: ! 4393: /* store the TLB entry: */ ! 4394: tme_bus_tlb_back(tlb); ! 4395: } ! 4396: ! 4397: /* if this TLB entry allows fast reading: */ ! 4398: if (tlb->tme_bus_tlb_emulator_off_read != TME_EMULATOR_OFF_UNDEF) { ! 4399: ! 4400: /* see how many bytes we can fast read from this TLB entry, ! 4401: starting at this address: */ ! 4402: count_minus_one = (tlb_addr_last - address_init); ! 4403: ! 4404: /* read that many bytes or size bytes, whichever is smaller: */ ! 4405: count_minus_one = TME_MIN(count_minus_one, ! 4406: (size - 1)); ! 4407: count = count_minus_one + 1; ! 4408: assert (count != 0); ! 4409: ! 4410: /* do the fast read: */ ! 4411: tme_memory_sequence_rdlock(tlb->tme_bus_tlb_rwlock); ! 4412: memcpy(buffer, ! 4413: (tlb->tme_bus_tlb_emulator_off_read + address_init), ! 4414: count); ! 4415: tme_memory_sequence_unlock(tlb->tme_bus_tlb_rwlock); ! 4416: } ! 4417: ! 4418: /* otherwise, we have to do a slow read: */ ! 4419: else { ! 4420: ! 4421: /* get the size of this bus cycle: */ ! 4422: count = (1 << TME_BUS32_LOG2); ! 4423: count -= (address_init & (count - 1)); ! 4424: count = TME_MIN(count, size); ! 4425: ! 4426: /* fill the cycle structure: */ ! 4427: cycle.tme_bus_cycle_type = TME_BUS_CYCLE_READ; ! 4428: cycle.tme_bus_cycle_size = count; ! 4429: cycle.tme_bus_cycle_buffer = (tme_uint8_t *) buffer; /* XXX this breaks const */ ! 4430: cycle.tme_bus_cycle_buffer_increment = 1; ! 4431: cycle.tme_bus_cycle_lane_routing ! 4432: = (bus_device->tme_bus_device_router ! 4433: + TME_BUS_ROUTER_INIT_INDEX(TME_BUS32_LOG2, count, address_init)); ! 4434: ! 4435: /* XXX this should come from a socket configuration: */ ! 4436: cycle.tme_bus_cycle_port = TME_BUS_CYCLE_PORT(0, TME_BUS32_LOG2); ! 4437: ! 4438: /* form the physical address for the bus cycle handler: */ ! 4439: address_resp = tlb->tme_bus_tlb_addr_offset + address_init; ! 4440: shift = tlb->tme_bus_tlb_addr_shift; ! 4441: if (shift < 0) { ! 4442: address_resp <<= (0 - shift); ! 4443: } ! 4444: else if (shift > 0) { ! 4445: address_resp >>= shift; ! 4446: } ! 4447: cycle.tme_bus_cycle_address = address_resp; ! 4448: ! 4449: /* unlock the device: */ ! 4450: (*bus_device->tme_bus_device_unlock)(bus_device, locks); ! 4451: ! 4452: /* run the bus cycle: */ ! 4453: err = (*tlb->tme_bus_tlb_cycle) ! 4454: (tlb->tme_bus_tlb_cycle_private, &cycle); ! 4455: ! 4456: /* we don't support deadlocking: */ ! 4457: if (err == TME_EDEADLK) { ! 4458: abort(); ! 4459: } ! 4460: ! 4461: /* otherwise, any other error might be a bus error: */ ! 4462: else if (err != TME_OK) { ! 4463: err = tme_bus_tlb_fault(tlb, &cycle, err); ! 4464: assert (err != TME_OK); ! 4465: } ! 4466: ! 4467: /* lock the device: */ ! 4468: (*bus_device->tme_bus_device_lock)(bus_device, locks); ! 4469: } ! 4470: ! 4471: /* update the address, buffer, and size and continue: */ ! 4472: address_init += count; ! 4473: buffer += count; ! 4474: size -= count; ! 4475: } ! 4476: ! 4477: return (err); ! 4478: } ! 4479: ! 4480: /* the 32-bit bus master DMA write function: */ ! 4481: int ! 4482: tme_bus_device_dma_write_32(struct tme_bus_device *bus_device, ! 4483: tme_bus_addr_t address_init, ! 4484: tme_bus_addr_t size, ! 4485: const tme_uint8_t *buffer, ! 4486: unsigned int locks) ! 4487: { ! 4488: struct tme_bus_tlb *tlb, tlb_local; ! 4489: struct tme_bus_connection *conn_bus; ! 4490: tme_bus_addr_t count_minus_one, count; ! 4491: struct tme_bus_cycle cycle; ! 4492: tme_bus_addr_t address_resp; ! 4493: tme_bus_addr_t tlb_addr_last; ! 4494: int shift; ! 4495: int err; ! 4496: ! 4497: /* assume no error: */ ! 4498: err = TME_OK; ! 4499: ! 4500: /* loop while we have more bytes to write: */ ! 4501: for (; err == TME_OK && size > 0; ) { ! 4502: ! 4503: /* hash this address into a TLB entry: */ ! 4504: tlb = (*bus_device->tme_bus_device_tlb_hash) ! 4505: (bus_device, ! 4506: address_init, ! 4507: TME_BUS_CYCLE_WRITE); ! 4508: ! 4509: /* if this TLB entry doesn't cover this address, or if it doesn't ! 4510: allow writing, reload it: */ ! 4511: tlb_addr_last = TME_ATOMIC_READ(tme_bus_addr_t, tlb->tme_bus_tlb_addr_last); ! 4512: if (address_init < TME_ATOMIC_READ(tme_bus_addr_t, tlb->tme_bus_tlb_addr_first) ! 4513: || address_init > tlb_addr_last ! 4514: || (tlb->tme_bus_tlb_emulator_off_write == TME_EMULATOR_OFF_UNDEF ! 4515: && !(tlb->tme_bus_tlb_cycles_ok & TME_BUS_CYCLE_WRITE))) { ! 4516: ! 4517: /* reserve this TLB entry: */ ! 4518: tme_bus_tlb_reserve(tlb, &tlb_local); ! 4519: tlb = &tlb_local; ! 4520: ! 4521: /* get our bus connection: */ ! 4522: conn_bus = TME_ATOMIC_READ(struct tme_bus_connection *, ! 4523: bus_device->tme_bus_device_connection); ! 4524: ! 4525: /* unlock the device: */ ! 4526: (*bus_device->tme_bus_device_unlock)(bus_device, locks); ! 4527: ! 4528: /* reload the TLB entry: */ ! 4529: err = (*conn_bus->tme_bus_tlb_fill) ! 4530: (conn_bus, ! 4531: tlb, ! 4532: address_init, ! 4533: TME_BUS_CYCLE_WRITE); ! 4534: ! 4535: /* lock the device: */ ! 4536: (*bus_device->tme_bus_device_lock)(bus_device, locks); ! 4537: ! 4538: /* return if we couldn't fill the TLB entry: */ ! 4539: if (err != TME_OK) { ! 4540: return (err); ! 4541: } ! 4542: ! 4543: /* the TLB entry must cover this address and allow writing: */ ! 4544: tlb_addr_last = TME_ATOMIC_READ(tme_bus_addr_t, tlb->tme_bus_tlb_addr_last); ! 4545: assert (address_init >= TME_ATOMIC_READ(tme_bus_addr_t, tlb->tme_bus_tlb_addr_first) ! 4546: && address_init <= tlb_addr_last ! 4547: && (tlb->tme_bus_tlb_emulator_off_write != TME_EMULATOR_OFF_UNDEF ! 4548: || (tlb->tme_bus_tlb_cycles_ok & TME_BUS_CYCLE_WRITE))); ! 4549: ! 4550: /* store the TLB entry: */ ! 4551: tme_bus_tlb_back(tlb); ! 4552: } ! 4553: ! 4554: /* if this TLB entry allows fast writing: */ ! 4555: if (tlb->tme_bus_tlb_emulator_off_write != TME_EMULATOR_OFF_UNDEF) { ! 4556: ! 4557: /* see how many bytes we can fast write to this TLB entry, ! 4558: starting at this address: */ ! 4559: count_minus_one = (tlb_addr_last - address_init); ! 4560: ! 4561: /* write that many bytes or size bytes, whichever is smaller: */ ! 4562: count_minus_one = TME_MIN(count_minus_one, ! 4563: (size - 1)); ! 4564: count = count_minus_one + 1; ! 4565: assert (count != 0); ! 4566: ! 4567: /* do the fast write: */ ! 4568: tme_memory_sequence_wrlock(tlb->tme_bus_tlb_rwlock); ! 4569: memcpy((tlb->tme_bus_tlb_emulator_off_write + address_init), ! 4570: buffer, ! 4571: count); ! 4572: tme_memory_sequence_unlock(tlb->tme_bus_tlb_rwlock); ! 4573: } ! 4574: ! 4575: /* otherwise, we have to do a slow write: */ ! 4576: else { ! 4577: ! 4578: /* get the size of this bus cycle: */ ! 4579: count = (1 << TME_BUS32_LOG2); ! 4580: count -= (address_init & (count - 1)); ! 4581: count = TME_MIN(count, size); ! 4582: ! 4583: /* fill the cycle structure: */ ! 4584: cycle.tme_bus_cycle_type = TME_BUS_CYCLE_WRITE; ! 4585: cycle.tme_bus_cycle_size = count; ! 4586: cycle.tme_bus_cycle_buffer = (tme_uint8_t *) buffer; /* XXX this breaks const */ ! 4587: cycle.tme_bus_cycle_buffer_increment = 1; ! 4588: cycle.tme_bus_cycle_lane_routing ! 4589: = (bus_device->tme_bus_device_router ! 4590: + TME_BUS_ROUTER_INIT_INDEX(TME_BUS32_LOG2, count, address_init)); ! 4591: ! 4592: /* XXX this should come from a socket configuration: */ ! 4593: cycle.tme_bus_cycle_port = TME_BUS_CYCLE_PORT(0, TME_BUS32_LOG2); ! 4594: ! 4595: /* form the physical address for the bus cycle handler: */ ! 4596: address_resp = tlb->tme_bus_tlb_addr_offset + address_init; ! 4597: shift = tlb->tme_bus_tlb_addr_shift; ! 4598: if (shift < 0) { ! 4599: address_resp <<= (0 - shift); ! 4600: } ! 4601: else if (shift > 0) { ! 4602: address_resp >>= shift; ! 4603: } ! 4604: cycle.tme_bus_cycle_address = address_resp; ! 4605: ! 4606: /* unlock the device: */ ! 4607: (*bus_device->tme_bus_device_unlock)(bus_device, locks); ! 4608: ! 4609: /* run the bus cycle: */ ! 4610: err = (*tlb->tme_bus_tlb_cycle) ! 4611: (tlb->tme_bus_tlb_cycle_private, &cycle); ! 4612: ! 4613: /* we don't support deadlocking: */ ! 4614: if (err == TME_EDEADLK) { ! 4615: abort(); ! 4616: } ! 4617: ! 4618: /* otherwise, any other error might be a bus error: */ ! 4619: else if (err != TME_OK) { ! 4620: err = tme_bus_tlb_fault(tlb, &cycle, err); ! 4621: assert (err != TME_OK); ! 4622: } ! 4623: ! 4624: /* lock the device: */ ! 4625: (*bus_device->tme_bus_device_lock)(bus_device, locks); ! 4626: } ! 4627: ! 4628: /* update the address, buffer, and size and continue: */ ! 4629: address_init += count; ! 4630: buffer += count; ! 4631: size -= count; ! 4632: } ! 4633: ! 4634: return (err); ! 4635: }
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